Professional Documents
Culture Documents
·Pages: 5
Time :Three Hours
Instructions to Candidates :
1. Do not write anything on question paper except Seat No.
2. Answersheet should be written with blue ink only. Graph or diagram should ·
be drawn with the same pen being used for writirig paper or black HB
pencil.
3. Student sh9uld note, no suppliment will be provided.
4. All questions carry equal marks.
5. Assume suitable data if required :
6. Unless specified, assume material of device as silicon (Si).
7. Unless specified in the questi.on use data information at end of question
paper.
8. Use of. programmable calculator is all,owed.
-- - ---~ - ~Lr.
-- -~ ~!4 - ei_,:zt . ~
h -=-~"~ v~£;f f. f?~';'.~ ·1-1""'~ UNv!s .
I i'tt,- (,,&.:(/__ "'12.f3·~~J . t./-t,.'E..l:> t~-V J.c l~ i. ~'rlV't ~ :Z f:..· ~
1. Answer any two. - ,, 20
. ' R. ~ :;.c.- 4,, 4 .rJ51..-fl-..
a) Desi.gn a discrete s~ries regulator for the following conditions regulated ·
output voltage VL =12 V .
Maximum load current /Lmax = 150 mA
Input voltage \!fn = 20 ± 2V
Draw the designed circuit diagram along with all ratings of components
used.
a) Design a voltage divider bias circuit for .Q point (7.5 V, 1.5 mA) with
S:::; 3. Assume transistor hFE = 100. Verify that designed circuit meets .
stability factor constraints.
)"-lL.c_
. ~ ,a.. J."1nf\-- b) Design a common source amplifier with supply voltage V 00 of 18 V, /
ft!.~ '7"W a) Design a transformer coupled class A power amplifier for output voltage
PU l'I"" V0 = 5V, S = 8, Vee= 18 V and RL = 4Q. Efficiency of tra_!1sformer is 90%
'i~;?. t i.-"'1' and hre of transformer will be 100. Draw-the designed circuit diagram.
~c...v 1- l -r '1-At"'l Design must include calculation of bias component, selection of
'1'14_ .. ~- & 1 ~ Y!Jransformer and transistor rating calculation .
' 14..,..,_..,, bJl- .
~ ~ b) Design a class B-transformer coupled audio - power amplifier to give
o/ "~" -t.J.IL.> output of 1OW to resistive· load-of 40. Efficiency of output transformer is
U-=- "'8 r '!A--J'<- 80%. Stability of bias network is 8 and Vee = 18 V .
M.r(N1 r-~"1" Design must include calculation of transistor rating, bias component and
~ ?- \.,b'" .JV
~ ,.,._ ~y-\ Jl_, · transformer selection. Assume suitable value of hre for transistors.
P-L-'- I 1 ~rvJ f <l~z--~
l?d5dci - 023 f4.!_ -z ~-ir t f'- k_~ L--Z.!f,k
Rt_-:zl -3~"2.. t../6 z_S 4,..:dt,.../L
~ '=>-LI> n-L ~2 tl '- ~~
l
ea>aa - 023 Ect>aa - 023 -
+Vee
-:-V cc
----,,..---- __._,
4. Answer any two.
__
_.--.._-,- --
20
~'.
/-· '\ ·..,
t
. !~·
I - _/
QCf)d('I - 023 3 I. ' ·
. / P,.T.O.
'1 ,, ,/ .• ~
, ~ V'\,,
~I ·
ed>cid - 023
..
-~
L
c
10 kn
R ·. 1 I
s kn
---
feedback network calculations. Assume inductance of feedback network
be s µH . (2.. c ? ti"I. c;. ' ""--'· 'PJUL v ~: :-; r o Ii · v t v 0>'"
.
. 5. Answer any two. C..c -;_CT·~ \\.b · . 20
~~ s · \r "V\ i,
a) · Design a non inverting amplifier with single supply of +15V using
Op-Amp IC 741 C for following requirement.
i) Voltage gain Av = 50 I
ec:pda -- 023 4
~
ea;ci(1 - 023 ea>ciri - 023
v) Output resistance R0 = 75 n
b) Design a second order 1OW pass sallen-key filter with equal component
,
having f0 =1 KHz, Q = 5. Assume 0 in circuit to be 10 nF for design.
Calculate de gain of circuit. Modify the circuit for de gain of 0 dB and
draw the modified Circuit diagram.
Data Information .
i) Zener diodes :
ii) Transistors :
**************