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P.

·Pages: 5
Time :Three Hours

Instructions to Candidates :
1. Do not write anything on question paper except Seat No.
2. Answersheet should be written with blue ink only. Graph or diagram should ·
be drawn with the same pen being used for writirig paper or black HB
pencil.
3. Student sh9uld note, no suppliment will be provided.
4. All questions carry equal marks.
5. Assume suitable data if required :
6. Unless specified, assume material of device as silicon (Si).
7. Unless specified in the questi.on use data information at end of question
paper.
8. Use of. programmable calculator is all,owed.

-- - ---~ - ~Lr.
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h -=-~"~ v~£;f f. f?~';'.~ ·1-1""'~ UNv!s .
I i'tt,- (,,&.:(/__ "'12.f3·~~J . t./-t,.'E..l:> t~-V J.c l~ i. ~'rlV't ~ :Z f:..· ~
1. Answer any two. - ,, 20
. ' R. ~ :;.c.- 4,, 4 .rJ51..-fl-..
a) Desi.gn a discrete s~ries regulator for the following conditions regulated ·
output voltage VL =12 V .
Maximum load current /Lmax = 150 mA
Input voltage \!fn = 20 ± 2V
Draw the designed circuit diagram along with all ratings of components
used.

b) Design a regulated power supply using LM 340 - 5T to provide output of


. 5V at load eurrent of 600 mA at 30°C. Draw the designed circuit diagram.
Design must include selection of transformer, filter capacitor, diodes
and beat sink if required.
For IC LM 340 - ST
Dropout voltage is 2 V. 'Y ,r 'I'\~ ftJ...z. 1-i> hi 1. \ ".3 ~<\ ~ ' ~µttU..·

0 V (_ v_\.'l-v f Pl -·- f o\I ~ tr'?."


eJA ( c1w)=50 /
~ $-M1Q.. . ~11/HV.7
BsA (0 c IW )= 7.9

~ct5da - 023 '1 P.T.O.


.c:o-.-
k....:::__.-----t~~------r-'-~..-r--o \~~

tfcbd('I - 023 ed5cia - 023

c) Design a boost type switching regulator using IC 1577/2577 to meet


following parameters. JJ ,,
. 'I l ::. I ~~ 'r'll..vJ
~~ ~"""ti!' ~(..(\'I Ein = 5V, VLoad = 12V, lioadmax = 800 mA (~
~ ~ l.Y'~
Iii= 25% of fLmax
-r~ z:." o· <> /
"
~
(J._c_ ?-'"!> L\ r~ . prJo -t--'"

c~~ '1J.t '31"-~ !'lVioad(P-P)=0.05 V


Ct.. -:;.. 2-1\ ~ ·\/\--~
BJA = 65 °C/W
Draw designed circuit diagram. Design should include calculation of
component value and heat sink for IC if required . (No need to design
unregulated power supply).

2. . Answer any two. 20

a) Design a voltage divider bias circuit for .Q point (7.5 V, 1.5 mA) with
S:::; 3. Assume transistor hFE = 100. Verify that designed circuit meets .
stability factor constraints.
)"-lL.c_
. ~ ,a.. J."1nf\-- b) Design a common source amplifier with supply voltage V 00 of 18 V, /

°V'9.bv ~ s.v -loss= 9mA, Vp = -4 V and Rd-ext)= 4 kQ and cut-offfr~qu~ncy 50 Hz.


~ ::- 2-:3., g l:::.
Draw the output wave form of the amplifier if input is. 50 mV and 2.5 V.
~ <.. ~<ft>'):.

c) Design a single stage common emitter configuration amplifier with S=10,


=
Q pt (5V, 2 mA), cut-off freq. fL = 100 Hz to have gain greater than 70:
Modify the circuit to give gain of 10. Design all the components with
transistor rating . State the feed_back methodology used to stabilize
the gain. Make suitable assumption for hFE.
'

3. Answer any two. 20

ft!.~ '7"W a) Design a transformer coupled class A power amplifier for output voltage
PU l'I"" V0 = 5V, S = 8, Vee= 18 V and RL = 4Q. Efficiency of tra_!1sformer is 90%
'i~;?. t i.-"'1' and hre of transformer will be 100. Draw-the designed circuit diagram.
~c...v 1- l -r '1-At"'l Design must include calculation of bias component, selection of
'1'14_ .. ~- & 1 ~ Y!Jransformer and transistor rating calculation .
' 14..,..,_..,, bJl- .
~ ~ b) Design a class B-transformer coupled audio - power amplifier to give
o/ "~" -t.J.IL.> output of 1OW to resistive· load-of 40. Efficiency of output transformer is
U-=- "'8 r '!A--J'<- 80%. Stability of bias network is 8 and Vee = 18 V .
M.r(N1 r-~"1" Design must include calculation of transistor rating, bias component and
~ ?- \.,b'" .JV
~ ,.,._ ~y-\ Jl_, · transformer selection. Assume suitable value of hre for transistors.
P-L-'- I 1 ~rvJ f <l~z--~
l?d5dci - 023 f4.!_ -z ~-ir t f'- k_~ L--Z.!f,k
Rt_-:zl -3~"2.. t../6 z_S 4,..:dt,.../L
~ '=>-LI> n-L ~2 tl '- ~~
l
ea>aa - 023 Ect>aa - 023 -

c) Design a complementary symmetry circuit to deliver a power output of


15W for load of RL = 6Q and operating frequency of 20 Hz. Design the
component rating, transistor ratings . Modify the circuit to remove
cross over distortion and draw circuit for the same.

+Vee

-:-V cc

----,,..---- __._,
4. Answer any two.
__
_.--.._-,- --
20

a) Design an astable muttivibrator·(using BJT) to generate a square wave


of 5 KHz and amplitude 1OV with collector current of 2 mA. Use transistor
with hte(min) = 100. Dra\iv the designed circuit along with component rating
calculations. Ilg~ 4 '- \f:... R.L::. ~ -i:i ')-ct:. c__ ?- "! '3 'rf't' 'Jt.'
= b) Design a single tuned amplifier as shown in figure for following
specifications.
i) Voltage gain Av ~ 50 ·~:: ~-~ t:z
ii) Q effective for- 8Jllplifier =20 L -z ',.. ~ ~t-t
~ =- t ')--'f'~t;_ '-" 1r
iii) Resonant frequency f0 = 4 MHz . {( ·'::;. l ~ ~

iv) Working load resistance RLw == 100 kHD.

Use transistor with parameters


hte = 100, hie = ·1 b kn, r0 .= 50 kO. and C0 = 10 pF

~'.
/-· '\ ·..,

t
. !~·

I - _/
QCf)d('I - 023 3 I. ' ·
. / P,.T.O.
'1 ,, ,/ .• ~
, ~ V'\,,
~I ·

ed>cid - 023

..
-~

L
c
10 kn
R ·. 1 I

s kn

c) Design a transistorized colpitts oscillator circuit for following.


i) Frequency of oscillations f0 = 1 MHz
ii) Voltage gain Av = 25 ~ :-
iii)
iv)
Q pt =(1mA, 5V)
Stability factor= 6 "'"
·1
j~
v) Input resistance R; = 5/<Q.

Use transistor with hFE =300, h;e =10kQ, r0 =20 kQ .


Draw designed circuit. Design must include bias components calculations, 'J

---
feedback network calculations. Assume inductance of feedback network
be s µH . (2.. c ? ti"I. c;. ' ""--'· 'PJUL v ~: :-; r o Ii · v t v 0>'"
.
. 5. Answer any two. C..c -;_CT·~ \\.b · . 20
~~ s · \r "V\ i,
a) · Design a non inverting amplifier with single supply of +15V using
Op-Amp IC 741 C for following requirement.
i) Voltage gain Av = 50 I

ii) Lower cut-off frequency FL= 20Hz ~

iii) Load current IL= 5 mA.

The specifications of IC - 741 Care:


i) Open loop voltage gain . A0 = 2x10 5 .
:,

ec:pda -- 023 4

~
ea;ci(1 - 023 ea>ciri - 023

ii) Break frequency f0 =5 Hz

iii) Slew rate S = 0.5 VI µs.

iv) Input resistance Ri =2 Mn

v) Output resistance R0 = 75 n

Draw designed circuit diagram .

b) Design a second order 1OW pass sallen-key filter with equal component
,
having f0 =1 KHz, Q = 5. Assume 0 in circuit to be 10 nF for design.
Calculate de gain of circuit. Modify the circuit for de gain of 0 dB and
draw the modified Circuit diagram.

c) Draw the designed circuit diagram to meet the following require


of a wide band pass filter.
fL =200 Hz

Pass band gain = 4 and pass band as flat as possible.

Data Information .
i) Zener diodes :

a) BZZ14: Vz =5.6 V . lz(m) ·= 20mA, rz =4.5 n


b) BZZ15 : Vz =6 V lz(m) = 20mA, r2 =2 Q

ii) Transistors :

Transistor Type hte (min) P0 (max) le (max) fr

1) Bd-227 PNP 40 12.SW ~ 3A 125·MHz


- ~ EC~-100 1 ~PN 50 SW 0.7 A 100 MHz
BC-147 B NPf'{ 200 250mW 0.1 A 100 MHz

**************

l:!Cb<id - 023 ·5 211/555

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