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2.1 Introduction
Logic circuits are the basis for modern digital computer systems. To
appreciate how computer systems operate you will need to understand
digital logic and Boolean algebra.
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both closed at the same time. Then we can define these switching operations
in the following switching theory truth table.
The truth table shows that the lamp will only be “ON” and
illuminated when EITHER switch, A OR switch, B are pressed and closed
as pressing either switch will cause current to flow because there will
always be a conducting path available for the lamp through whichever
closed switch.
This therefore proves that when two switches S1 and S2 are connected
together in parallel, the switching condition that allows current (I) to flow
and make the lamp illuminate is when any one of the switches, or both are
closed. This gives the boolean expression of: L = A or B.
In Boolean Algebra terms, this expression is that of the OR function
which is denoted by a addition or plus sign, (+) between the variables giving
us the Boolean expression of: L = A+B.
Thus when switches are connected together in parallel their
switching theory and operation is the same as for the digital logic “OR” gate
because if both inputs are “0”, then the output is “0”, otherwise the output
is “1” as shown..
Digital Logic OR Gate
Thus if input “A” is OR’ed with input “B” it produces output “Q”,
and in switching terms, the OR function is referred to as the Boolean
Algebra logical addition function.
Switching Theory can be used to implement Boolean expressions as
well as digital logic gates. Ad we have seen above, in switch contact terms,
the boolean expression using a dot (.) is interpreted as a series connection
for Boolean multiplication, while a plus sign (+) is interpreted as a pair of
parallel branches for Boolean addition.
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Logic NOT Gates are available using digital circuits to produce the
desired logical function. The standard NOT gate is given a symbol whose
shape is of a triangle pointing to the right with a circle at its end. This circle
is known as an “inversion bubble” and is used in NOT, NAND and NOR
symbols at their output to represent the logical operation of the NOT
function. This bubble denotes a signal inversion (complementation) of the
signal and can be present on either or both the output and/or the input
terminals.
A Q
0 1
1 0
Inverter or NOT Gate
Logic NOT gates provide the complement of their input signal and
are so called because when their input signal is “HIGH” their output state
will NOT be “HIGH”. Likewise, when their input signal is “LOW” their
output state will NOT be “LOW”. As they are single input devices,
logic NOT gates are not normally classed as “decision” making devices or
even as a gate, such as the AND or OR gates which have two or more logic
inputs. Commercial available NOT gates IC’s are available in either 4 or 6
individual gates within a single IC package.
The “bubble” (o) present at the end of the NOT gate symbol above
denotes a signal inversion (complementation) of the output signal. But this
bubble can also be present at the gates input to indicate an active-LOW input.
This inversion of the input signal is not restricted to the NOT gate only but
can be used on any digital circuit or gate as shown with the operation of
inversion being exactly the same whether on the input or output terminal.
The easiest way is to think of the bubble as simply an inverter.
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2. Associative law
This law states that the order in which the logic operations are
performed is irrelevant as their effect is the same.
3. Distributive law
Distributive law states the following condition.
4. AND law
These laws use the AND operation. Therefore they are called
as AND laws.
5. OR law
These laws use the OR operation. Therefore they are called as OR laws.
6. INVERSION law
This law uses the NOT operation. The inversion law states that double
inversion of a variable results in the original variable itself.
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Each binary digit is also called a bit. Binary number system is also
positional value system, where each digit has a value expressed in powers of
2, as displayed here.
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In any binary number, the rightmost digit is called least significant bit
(LSB) and leftmost digit is called most significant bit (MSB).
Decimal equivalent of any octal number is sum of product of each digit with
its positional value.
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ASCII
Besides numerical data, computer must be able to handle alphabets,
punctuation marks, mathematical operators, special symbols, etc. that form
the complete character set of English language. The complete set of characters
or symbols are called alphanumeric codes. The complete alphanumeric code
typically includes –
ISCII
ISCII stands for Indian Script Code for Information Interchange. IISCII
was developed to support Indian languages on computer. Language
supported by IISCI include Devanagari, Tamil, Bangla, Gujarati, Gurmukhi,
Tamil, Telugu, etc. IISCI is mostly used by government departments and
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Unicode
Decimal to Binary
The remainders are to be read from bottom to top to obtain the binary
equivalent.
Division Remainder
43/2 = 21 1
21/2 = 10 1
10/2 = 5 0
5/2 = 2 1
2/2 = 1 0
1/2 = 0 1
4310 = 1010112
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Decimal to Octal
Decimal to Hexadecimal
101100101012 = 26258
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Octal Digit 0 1 2 3 4 5 6 7
Binary Equivalent 000 001 010 011 100 101 110 111
546738 = 1011001101110112
Binary to Hexadecimal
101101101012 = DB516
To convert an octal number to binary, each octal digit is converted to
its 3-bit binary equivalent.
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Binary arithmetic is essential part of all the digital computers and many
other digital system.
Binary Addition
Example: Addition
Binary Subtraction
Subtraction and Borrow, these two words will be used very frequently
for the binary subtraction. There are four rules of binary subtraction.
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Example: Subtraction
Binary Multiplication
Example: Multiplication
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Binary Division
Example: Division
In this method, number is divided into two parts: Sign bit and
Magnitude. If the number is positive then sign bit will be 0 and if number is
negative then sign bit will be 1. Magnitude is represented with the binary form
of the number to be represented.
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Range of Numbers: For k bits register, MSB will be sign bit and (k-1)
bits will be magnitude. Positive largest number that can be stored is (2 (k-1)-1)
and negative lowest number that can be stored is -(2(k-1)-1).
Note: Drawback of this system is that 0 has two different representation one is
-0 (e.g., 1 0000 in five bit register) and second is +0 (e.g., 0 0000 in five bit
register).
Example: Let we are using 5 bits register. The representation of -5 and +5 will
be as follows:
(i) +5 = 0 0101
(ii) Take 1’s complement of 0 0101 and that is 1 1010. MSB is 1 which
indicates that number is negative. MSB is always 1 in case of negative
numbers.
Range of Numbers: For k bits register, positive largest number that can be
stored is (2(k-1)-1) and negative lowest number that can be stored is -(2(k-1)-1).
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Note: Drawback of this system is that 0 has two different representation one is
-0 (e.g., 1 1111 in five bit register) and second is +0 (e.g., 0 0000 in five bit
register).
Example: Let we are using 5 bits registers. The representation of -5 and +5 will
be as follows:
(i) +5 = 0 0101
(ii) Take 2’s complement of 0 0101 and that is 1 1011. MSB is 1 which
indicates that number is negative. MSB is always 1 in case of negative
numbers.
Range of Numbers: For k bits register, positive largest number that can be
stored is (2(k-1)-1) and negative lowest number that can be stored is -(2(k-1)).
The advantage of this system is that 0 has only one representation for
-0 and +0. Zero (0) is considered as always positive (sign bit is 0) in 2’s
complement representation. Therefore, it is unique or unambiguous
representation.
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There are difference scenario for addition of two binary numbers using
2’s complement. These are explained as following below.
Case-1 − Addition of positive and negative number when positive number has greater
magnitude:
When positive number has greater magnitude, then take simply 2’s
complement of negative number and carry bit 1 is dropped and this result
will be positive number.
So, take 2’s complement of 1101, which will be 0011, then add with
given number. So, 1110+0011=1 0001, and carry bit 1 is dropped and this
result will be positive number, i.e., +0001.
Note: That if the register size is big then use sign extension method of MSB
bit to preserve sign of number.
Case-2 − Addition of positive and negative number when negative number has
greater magnitude:
When the negative number has greater magnitude, then take 2’s
complement of negative number and add with given positive number. Since
there will not be any end-around carry bit, so take 2’s complement of the
result and this result will be negative.
Note: That there are five-bit registers, so these new numbers will have 01010
and -01100. Now take 2’s complement of 01100 which will be 10100 and
add 01010+10100=11110. Then take 2’s complement of this result, which will
be 00010 and this will be negative number, i.e., -00010, which is the answer.
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You need to take 2’s complement for both numbers, then add these 2’s
complement of numbers. Since there will always be end-around carry bit, so
it is dropped. Now, take 2’s complement also of previous result, so this will
be negative number.
Alternatively, you can add both of these Binary numbers and take
result which will be negative only.
Example: add -1010 and -0101 in five bit-register.
These five bit numbers are -01010 and -00101. Add 2’s complements of
these numbers, 10110+11011 =1 10001. Since, there is a carry bit 1, so it is
dropped. Now take the 2’s complement of this result, which will be 01111 and
this number is negative, i.e, -01111, which is answer.
Note: That 2’s complement arithmetic operations are much easier than 1’s
complement because of there is no addition of end-around-carry-bit.
Case-1: Addition of positive and negative number when positive number has greater
magnitude:
When positive number has greater magnitude, then take simply 1’s
complement of negative number and the end-around carry of the sum is
added to the least significant bit (LSB).
So, take 1’s complement of 1101, which will be 0010, then add with
given number. So, 1110+0010=1 0000 , then add this carry bit to the LSB,
0000+1=0001 , which is the answer.
Note: That if the register size is big then fill the same value of MSB to preserve
sign magnitude for inputs and output.
Case-2: Addition of positive and negative number when negative number has greater
magnitude:
When the negative number has greater magnitude, then take 1’s
complement of negative number and add with given positive number. Since
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there will not be any end-around carry bit, so take 1’s complement of the
result and this result will be negative.
Note: That there are five-bit registers, so these new numbers will be 01010 and
-01100.
You need to take 1’s complement for both numbers, then add these
1’s complement of numbers. Since there will always be end-around carry bit,
so add this again to the MSB of result. Now, take 1’s complement also of
previous result, so this will be negative number. Alternatively, you can add
both negative number directly, and get this result which will be negative only.
These five bit numbers are -01010 and -00101. Add complements of
these numbers, 10101+11010 =1 01111 . Since, there is a carry bit 1, so add this
to the LSB of result, i.e., 01111+1=10000 . Now take the 1’s complement of this
result, which will be 01111 and this number is negative, i.e, -01111, which is
answer.
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Weighted Codes
Weighted binary codes are those binary codes which obey the
positional weight principle. Each position of the number represents a specific
weight. Several systems of the codes are used to express the decimal digits 0
through 9. In these codes each decimal digit is represented by a group of four
bits.
Non-Weighted Codes
In this type of binary codes, the positional weights are not assigned.
The examples of non-weighted codes are Excess-3 code and Gray code.
Excess-3 code
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Example:
Gray Code
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1111). But in BCD code only first ten of these are used (0000 to 1001). The
remaining six code combinations i.e. 1010 to 1111 are invalid in BCD.
Alphanumeric codes
A binary digit or bit can represent only two symbols as it has only
two states '0' or '1'. But this is not enough for communication between two
computers because there we need many more symbols for communication.
These symbols are required to represent 26 alphabets with capital and small
letters, numbers from 0 to 9, punctuation marks and other symbols.
The alphanumeric codes are the codes that represent numbers and
alphabetic characters. Mostly such codes also represent other characters
such as symbol and various instructions necessary for conveying
information. An alphanumeric code should at least represent 10 digits and
26 letters of alphabet i.e. total 36 items. The following three alphanumeric
codes are very commonly used for the data representation.
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Error Codes
There are binary code techniques available to detect and correct data
during data transmission.
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A A
B B
1. 3.
A
A
B
C
B
2. 4.
1.3 References
Note: Should you have questions about the topics discussed in this module, please
feel free to text or call me thru this cellphone number, 09672200502. I will
appreciate if you’ll ask questions for clarifications to have sufficient learning.
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