Combinational Logic Circuits

Combinational Logic Circuits are memoryless digital logic circuits whose output at any
instant in time depends only on the combination of its inputs

Unlike Sequential Logic Circuits whose outputs are dependant on both their
present inputs and their previous output state giving them some form
of Memory. The outputs of Combinational Logic Circuits are only
determined by the logical function of their current input state, logic “0” or logic
“1”, at any given instant in time.
The result is that combinational logic circuits have no feedback, and any
changes to the signals being applied to their inputs will immediately have an
effect at the output. In other words, in a Combinational Logic Circuit, the
output is dependant at all times on the combination of its inputs. Thus a
combinational circuit is memoryless.
So if one of its inputs condition changes state, from 0-1 or 1-0, so too will the
resulting output as by default combinational logic circuits have “no memory”,
“timing” or “feedback loops” within their design.

Combinational Logic

Combinational Logic Circuits are made up from basic logic NAND, NOR or
NOT gates that are “combined” or connected together to produce more
complicated switching circuits. These logic gates are the building blocks of
combinational logic circuits.
An example of a combinational circuit is a decoder, which converts the binary
code data present at its input into a number of different output lines, one at a
time producing an equivalent decimal code at its output.
 Combinational logic circuits can be very simple or very complicated and any
combinational circuit can be implemented with only NAND and NOR gates as
these are classed as “universal” gates.
The three main ways of specifying the function of a combinational logic circuit
are:
 1. Boolean Algebra – This forms the algebraic expression showing the
operation of the logic circuit for each input variable either True or False that
results in a logic “1” output.
 2. Truth Table – A truth table defines the function of a logic gate by providing
a concise list that shows all the output states in tabular form for each possible
combination of input variable that the gate could encounter.
 3. Logic Diagram – This is a graphical representation of a logic circuit that
shows the wiring and connections of each individual logic gate, represented by
a specific graphical symbol, that implements the logic circuit.
and all three of these logic circuit representations are shown below.

As combinational logic circuits are made up from individual logic gates only,
they can also be considered as “decision making circuits” and combinational
logic is about combining logic gates together to process two or more signals in
order to produce at least one output signal according to the logical function of
each logic gate.
Common combinational circuits made up from individual logic gates that carry
out a desired application include Multiplexers, De-
multiplexers, Encoders, Decoders, Full and Half Adders etc.
Classification of Combinational Logic

One of the most common uses of combinational logic is in Multiplexer and De-
multiplexer type circuits. Here, multiple inputs or outputs are connected to a
common signal line and logic gates are used to decode an address to select a
single data input or output switch.
A multiplexer consist of two separate components, a logic decoder and some
solid state switches, but before we can discuss multiplexers, decoders and
de-multiplexers in more detail we first need to understand how these devices
use these “solid state switches” in their design.

Solid State Switches

Standard TTL logic devices made up from Transistors can only pass signal
currents in one direction only making them “uni-directional” devices and poor
imitations of conventional electro-mechanical switches or relays. However,
some CMOS switching devices made up from FET’s act as near perfect “bi-
directional” switches making them ideal for use as solid state switches.
Solid state switches come in a variety of different types and ratings, and there
are many different applications for using solid state switches. They can
basically be sub-divided into 3 different main groups for switching applications
and in this combinational logic section we will only look at the Analogue type
of switch but the principal is the same for all types including digital.
 Solid State Switch Applications
 Analogue Switches – Used in Data Switching and Communications, Video and
Audio Signal Switching, Instrumentation and Process Control Circuits …etc.
 Digital Switches – High Speed Data Transmission, Switching and Signal
Routing, Ethernet, LAN’s, USB and Serial Transmissions …etc.
 Power Switches – Power Supplies and General “Standby Power” Switching
Applications, Switching of Larger Voltages and Currents …etc.

Analogue Bilateral Switches

Analogue or “Analog” switches are those types that are used to switch data or
signal currents when they are in their “ON” state and block them when they
are in their “OFF” state. The rapid switching between the “ON” and the “OFF”
state is usually controlled by a digital signal applied to the control gate of the
switch.
An ideal analogue switch has zero resistance when “ON” (or closed), and
infinite resistance when “OFF” (or open) and switches with RON values of less
than 1Ω are commonly available.

Solid State Analogue Switch

By connecting an N-channel MOSFET in parallel with a P-channel MOSFET

allows signals to pass in either direction making it a “Bi-directional” switch and
as to whether the N-channel or the P-channel device carries more signal
current will depend upon the ratio between the input to the output voltage. The
two MOSFET’s are switched “ON” or “OFF” by two internal non-inverting and
inverting amplifiers.
Contact Types
Just like mechanical switches, analogue switches come in a variety of forms
or contact types, depending on the number of “poles” and “throws” they offer.
Thus, terms such as “SPST” (single-pole single throw) and “SPDT” (single-
pole double-throw) also apply to solid state analogue switches with “make-
before-break” and “break-before-make” configurations available.

Analogue Switch Types

Individual analogue switches can be grouped together into standard IC

packages to form devices with multiple switching configurations of SPST
(single-pole single-throw) and SPDT (single-pole double-throw) as well as
multi channel multiplexers.
The most common and simplest analogue switch in a single IC package is the
74HC4066 which has 4 independent bi-directional “ON/OFF” Switches within
a single package but the most widely used variants of the CMOS analogue
switch are those described as “Multi-way Bilateral Switches” otherwise known
as the “Multiplexer” and “De-multiplexer” IC’s and these are discussed in the
next tutorial.

Combinational Logic Summary

Then to summarise, Combinational Logic Circuits consist of inputs, two or
more basic logic gates and outputs. The logic gates are combined in such a
way that the output state depends entirely on the input states.
Combinational logic circuits have “no memory”, “timing” or “feedback loops”
thus, there operation is instantaneous. A combinational logic circuit will
perform a switching operation assigned logically by a Boolean expression and
corresponding truth table.
As we will see in the following tutorials. Examples of common combinational
logic circuits include: half adders, full adders, multiplexers, demultiplexers,

Universal Logic Gates-

Universal logic gates are the logic gates that are capable of
implementing any Boolean function
without requiring any other type of gate.

COMPARATOR
Another common and very useful combinational logic circuit is that of the Digital
Comparator circuit. Digital or Binary Comparators are made up from standard AND, NOR
and NOT gates that compare the digital signals present at their input terminals and produce an
output depending upon the condition of those inputs.
For example, along with being able to add and subtract binary numbers we need to be able to
compare them and determine whether the value of input A is greater than, smaller than or equal
to the value at input B etc. The digital comparator accomplishes this using several logic gates
that operate on the principles of Boolean Algebra. There are two main types of Digital
Comparator available and these are.

1. Identity Comparator – an Identity Comparator is a digital comparator that has only one output
terminal for when A = B either “HIGH” A = B = 1 or “LOW” A = B = 0.

2. Magnitude Comparator – a Magnitude Comparator is a digital comparator which has three

output terminals, one each for equality, A = B greater than, A > B and less than A < B.

The purpose of a Digital Comparator is to compare a set of variables or unknown numbers, for
example A (A1, A2, A3, …. An, etc) against that of a constant or unknown value such as B (B1,
B2, B3, …. Bn, etc) and produce an output condition or flag depending upon the result of the
comparison. For example, a magnitude comparator of two 1-bits, (A and B) inputs would
produce the following three output conditions when compared to each other.

A is greater than B, A is equal to B, and A is less than B.

This is useful if we want to compare two variables and want to produce an output when any of
the above three conditions are achieved. For example, produce an output from a counter when a
certain count number is reached. Consider the simple 1-bit comparator below.
1-BIT DIGITAL COMPARATOR CIRCUIT

2-BIT DIGITAL COMPARATOR

Logic diagram
4-BIT MAGNITUDE COMPARATOR

Some commercially available digital comparators such as the TTL 74LS85 or CMOS 4063 4-bit
magnitude comparator have additional input terminals that allow more individual comparators to
be “cascaded” together to compare words larger than 4-bits with magnitude comparators of “n”-
bits being produced. These cascading inputs are connected directly to the corresponding outputs
of the previous comparator as shown to compare 8, 16 or even 32-bit words.

8-BIT WORD COMPARATOR

DECODERS
A decoder is a multiple-input, multiple-output logic circuit that converts
coded inputs into coded outputs, where the input and output codes are
different. The input code generally has fewer bits than the output
code, and there is one-to-one mapping from input code words into
output code words. The general structure of a decoder circuit is shown
in Figure 7.16. The enable inputs, if present, must be asserted for the
decoder to perform its normal mapping function. The most commonly
used input code is an N-bit binary code, where an N-bit word
represents one of 2N different coded values. Normally, they range
from 0 through 2N − 1. The input code lines select which output is
active. The remaining output lines are disabled. Thus, the decoder is
intended to provide a binary code to other circuits, such as a memory
circuit. In this case, the decoder is referred to as an address decoder
because it selects one address of a memory location. However, a
decoder could also be used to channel a stream of data on a
designated output line selected by the input code lines.

Figure 7.16 Block Diagram of a N : 2N Decoder

Figure 7.17 Logic Implementation of a 2 : 4 Decoder

A 2: 4 decoder is illustrated in Figure 7.17. The two data inputs

are x1 and x2. These inputs represent a 2-bit binary ...
An Encoder is a combinational circuit that performs the reverse operation of Decoder. It has
maximum of 2n input lines and ‘n’ output lines. It will produce a binary code equivalent to the
input, which is active High. Therefore, the encoder encodes 2 n input lines with ‘n’ bits. It is
optional to represent the enable signal in encoders.

4 to 2 Encoder
Let 4 to 2 Encoder has four inputs Y3, Y2, Y1 & Y0 and two outputs A1 & A0. The block
diagram of 4 to 2 Encoder is shown in the following figure.

At any time, only one of these 4 inputs can be ‘1’ in order to get the respective binary code at the
output. The Truth table of 4 to 2 encoder is shown below.

Inputs Outputs

Y3 Y2 Y1 Y0 A1 A0

0 0 0 1 0 0

0 0 1 0 0 1

0 1 0 0 1 0

1 0 0 0 1 1

From Truth table, we can write the Boolean functions for each output as

A1=Y3+Y2�1=�3+�2
A0=Y3+Y1�0=�3+�1
We can implement the above two Boolean functions by using two input OR gates. The circuit
diagram of 4 to 2 encoder is shown in the following figure.
The above circuit diagram contains two OR gates. These OR gates encode the four inputs with
two bits

Octal to Binary Encoder

Octal to binary Encoder has eight inputs, Y7 to Y0 and three outputs A2, A1 & A0. Octal to binary
encoder is nothing but 8 to 3 encoder. The block diagram of octal to binary Encoder is shown in
the following figure.

At any time, only one of these eight inputs can be ‘1’ in order to get the respective binary code.
The Truth table of octal to binary encoder is shown below.

Inputs Outputs

Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 A2 A1 A0
 0 0 0 0 0 0 0 1 0 0 0

0 0 0 0 0 0 1 0 0 0 1

0 0 0 0 0 1 0 0 0 1 0

0 0 0 0 1 0 0 0 0 1 1

0 0 0 1 0 0 0 0 1 0 0

0 0 1 0 0 0 0 0 1 0 1

0 1 0 0 0 0 0 0 1 1 0

1 0 0 0 0 0 0 0 1 1 1

From Truth table, we can write the Boolean functions for each output as

A2=Y7+Y6+Y5+Y4�2=�7+�6+�5+�4
A1=Y7+Y6+Y3+Y2�1=�7+�6+�3+�2
A0=Y7+Y5+Y3+Y1�0=�7+�5+�3+�1
We can implement the above Boolean functions by using four input OR gates. The circuit
diagram of octal to binary encoder is shown in the following figure.
The above circuit diagram contains three 4-input OR gates. These OR gates encode the eight
inputs with three bits.

Drawbacks of Encoder
Following are the drawbacks of normal encoder.

 There is an ambiguity, when all outputs of encoder are equal to zero. Because, it could be
the code corresponding to the inputs, when only least significant input is one or when all
inputs are zero.
 If more than one input is active High, then the encoder produces an output, which may not
be the correct code. For example, if both Y3 and Y6 are ‘1’, then the encoder produces 111
at the output. This is neither equivalent code corresponding to Y 3, when it is ‘1’ nor the
equivalent code corresponding to Y6, when it is ‘1’.

So, to overcome these difficulties, we should assign priorities to each input of encoder. Then, the
output of encoder will be the binary������ code corresponding to the active High
inputs�, which has higher priority. This encoder is called as priority encoder.

Priority Encoder
A 4 to 2 priority encoder has four inputs Y3, Y2, Y1 & Y0 and two outputs A1 & A0. Here, the
input, Y3 has the highest priority, whereas the input, Y0 has the lowest priority. In this case, even
if more than one input is ‘1’ at the same time, the output will be the binary������ code
corresponding to the input, which is having higher priority.

We considered one more output, V in order to know, whether the code available at outputs is
valid or not.

 If at least one input of the encoder is ‘1’, then the code available at outputs is a valid one.
In this case, the output, V will be equal to 1.
 If all the inputs of encoder are ‘0’, then the code available at outputs is not a valid one. In
this case, the output, V will be equal to 0.

The Truth table of 4 to 2 priority encoder is shown below.

Inputs Outputs

Y3 Y2 Y1 Y0 A1 A0 V

0 0 0 0 0 0 0

0 0 0 1 0 0 1

0 0 1 x 0 1 1

0 1 x x 1 0 1

1 x x x 1 1 1

Use 4 variable K-maps for getting simplified expressions for each output.
The simplified Boolean functions are

A1=Y3+Y2�1=�3+�2

A0=Y3+Y2′Y1�0=�3+�2′�1
Similarly, we will get the Boolean function of output, V as

V=Y3+Y2+Y1+Y0�=�3+�2+�1+�0
We can implement the above Boolean functions using logic gates. The circuit diagram of 4 to 2
priority encoder is shown in the following figure.
The above circuit diagram contains two 2-input OR gates, one 4-input OR gate, one 2input AND
gate & an inverter. Here AND gate & inverter combination are used for producing a valid code at
the outputs, even when multiple inputs are equal to ‘1’ at the same time. Hence, this circuit
encodes the f our inputs with two bits based on the priority assigned to each input.

Code Converters
Numbers are usually coded in one form or another so as to represent or use it as required.
For instance, a number ‘nine’ is coded in decimal using symbol (9)d. Same is coded in
natural-binary as (1001)b. While digital computers all deal with binary numbers, there are
situations wherein natural-binary representation of numbers in in-convenient or in-
efficient and some other (binary) code must be used to process the numbers.

One of these other code is gray-code, in which any two numbers in sequence differ only by
one bit change. This code is used in K-map reduction technique. The advantage is that
when numbers are changing frequently, the logic gates are turning ON and OFF frequently
and so are the transistors switching which characterizes power consumption of the circuit;
since only one bit is changing from number to number, switching is reduced and hence is
the power consumption.

Let’s discuss the conversion of various codes from one form to other.

Binary-to-Gray
The table that follows shows natural-binary numbers (upto 4-bit) and corresponding gray
codes.

Looking at gray-code (G3G2G1G0), we find that any two subsequent numbers differ in only
one bit-change.

The same table is used as truth-table for designing a logic circuitry that converts a given 4-
bit natural binary number into gray number. For this circuit, B 3 B2 B1 B0 are inputs while
G3 G2 G1 G0 are outputs.

K-map for the outputs:

And G3 = B3

So that’s a simple three EX-OR gate circuit that converts a 4-bit input binary number into
its equivalent 4-bit gray code. It can be extended to convert more than 4-bit binary
numbers.

Gray-to-Binary
Once the converted code (now in Gray form) is processed, we want the processed data back
in binary representation. So we need a converter that would perform reverse operation to
that of earlier converter. This we call a Gray-to-Binary converter.

The design again starts from truth-table:

Then the K-maps:

And B3 = G3

The realization of Gray-to-Binary converter is