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A Modified BSIM 0.

35 µm MOSFET RF Large-Signal Model


for Microwave Circuit Application

CHAO-CHIH HSIAO, CHING-WEI KUO and YI-JEN CHAN


Department of Electrical Engineering
National Central University
Chungli, Taiwan 32054, R.O.C.

A modified 0.35 µm gate-length MOSFET RF large signal model based on BSIM3v3 is


presented in this report. The RF large signal model includes a BSIM3v3 model, and some passive
components to simulate the device DC and RF characteristics. The added parasitic components are
scaleable versus the device gate-width. A 2.4 GHz CMOS MMIC oscillator has been demonstrated
based on these active models and on chip passive components.

1 Introduction

In near decades, the rapid growth of personal communication system market driving IC designs to a
higher level of integration with higher operational frequencies and lower working voltage circuits.
Therefore, Si CMOS technology becomes very attractive due to its integration level and potential low
power operation. With the advanced sub-micron process technologies, RF circuits operating at GHz
regime, can be realized in a standard CMOS process. However, a major concern to implement robust
commercial CMOS RF circuits is the lack of adequate device models, which can accurately predict
MOSFET device behavior at GHz frequencies.

The BSIM3v3 model is the latest physics-based, deep sub-micron MOSFET model for digital and
analog circuit designs. It has been widely accepted as a standard CMOS model for circuit operating
frequencies below GHz. Recent works have demonstrated the capability of modeling CMOS devices
at high frequencies by adding a complicated substrate resistance network into the conventional device
model [1-3]. Most of these studies provide single device size model, where the added parasitic
components in the model are simply not scalable. Therefore, a fully scaleable large signal model is
needed for a complicate integrated circuit design. In this report, a scaleable 0.35 µm MOSFET RF
large signal model is presented. Based on the device physical dimension, it provides a convenient way
to accommodate various devices with different gate-width. In this study, the multi gate-finger
approach is used, and each gate-finger is 5 µm wide. 0.35 µm n-MOSFETs with gate-width of 50 µm,
80 µm, 100 µm and 200 µm were fabricated and characterized. Finally, this report also presented a
cross-coupled LC oscillator, which was designed by the MOSFET RF large signal model.

2 RF Large-signal model for 0.35µm MOSFET

The BSIM3v3 model can well predict the characteristics of deep submicron MOSFETs. However it
still can’t correctly model the MOSFET RF behavior. A complete MOSFET RF large-signal model
based on a standard BSIM3v3 model in conjugation with an extended network representing the silicon
substrate parasitic effect, for RF simulation. Fig. 1 shows the cross-section of a typical n-type
MOSFET. The n+-doped drain and source regions form a P-N junction capacitance in a p-type
substrate. It therefore creates a series capacitance-resistance pair near the P-N junction depletion
region and substrate. In a typical BSIM3v3 model, the substrate network is not included. The RF
large-signal model equivalent circuit is shown in Fig. 2. The MOSFET M1 is the intrinsic BSIM3v3
model for DC, and other passive components represent the high frequency parasitic effects. The values
of BSIM3v3 model and parasitic components are extracted by fitting device DC I-V characteristic and
measured S-parameters.

S D

Depletion p- substrate
region

B B
Fig.1. The cross section of MOSFET

Ld

drain
Rd

Csub

gate
M1 Rsub
Rg Cds

RS

Fig.2. The MOSFET RF large-signal model

For a scaleable MOSFET RF large-signal model, different device sizes are required. Those device
sizes are 50 µm, 80 µm, 100 µm and 200 µm, respectively. The same extraction methods are employed
to different size of MOSFET RF large-signal model. Inherently, BSIM3v3 is a scaleable model within
a limited gate-length and width region. The gate-width of each gate-finger is the same, so each unit
finger MOSFET large-signal model can use the same BSIM3v3 parameters.

The parasitic passive components are scaling with the device dimension. Rg is scaled with the gate-
finger length and width. Csub is associated with substrate capacitance, which is formed by the depletion
regions of n+-drain and p-type substrate. Rsub represents the silicon substrate equivalent impedance.
Csub and Rsub are scaled with the drain/source area. The Cds represents the external capacitance, which
is formed by drain to source overlap region in device layout. The other resistance Rs and Rd represent
the contact resistance of source/drain, which can be scaleable versus the total drain/source area. The Ld
is the metal interconnection inductance of drain. Ld is also scaleable versus the physical device layout
dimension. All the passive components can be expressed as a linear function of the number of gate-
fingers (m). The resistance, such as Rg, Rsub, Rs and Rd, decreases as the m-value increases, which can
be expressed in Equation (1) and Equation (2).
Runit
R= (1)
m
C = Cunit × m (2)
The passive components of different device dimension are listed in Table 1. Using those components
attached into typical BSIM3v3 model can develop a complete scaleable RF large-signal model to
predict device’s RF behavior with different device dimension. Fig. 3(a) is the fitting results of S-
parameters; the device size is 200µm with a frequency band from 50 MHz to 20 GHz. The bias
condition is Vd = 3 V and Vg = 1~3 V. The DC I-V curve fitting result is shown in Fig. 3(b) for the
same devices. The simulation result shows the RF large-signal model can accurately predict the DC
and RF behaviors of MOSFET.
200 µm 100 µm 80 µm 50 µm
Rg 3.2 ohm 6.4 ohm 8 ohm 12.8 ohm
Rd 0.30 ohm 0.61 ohm 0.74 ohm 1.25 ohm
Rs 0.78 ohm 1.18 ohm 1.33 ohm 1.67 ohm
Cds 0.05 pF 0.023 pF 0.018 pF 0.012 pF
Ld 0.08 nH 0.1 nH 0.12 nH 0.14 nH
Csub 0.075 pF 0.038 pF 0.03 pF 0.019 pF
Rsub 350 ohm 700 ohm 900 ohm 1280 ohm
Table 1. The passive components list of different device dimension

S o li d li n e s : s i m u l a te d d a te
0 .0 5
O p e n p o i n ts : m e a s u r e d d a ta

S21
S12*15 0 .0 4

Id s (A )
0 .0 3

Vg=1~3V step 1V 0 .0 2

S22
0 .0 1

S11 0 .0 0
0 .0 0 .5 1 .0 1 .5 2 .0 2 .5 3 .0
Vd

(a) (b)
Fig.3. (a)The fitting results of S-parameters, open circle points are measurement results and solid lines
are simulation results. (b) The DC I-V fitting result, Vd from 0 V to 3 V and Vg from 1 V to 2 V
step 0.25 V

3 Cross-coupled LC oscillator

A basic oscillator of previous works consists of a tank circuit with a cross-coupled gate structure. The
tank circuit can consist of either configuration of two capacitors and one inductor or one capacitor and
two inductors. The oscillator generates two out of phase output waveform, V+ and V- [4-5]. Fig. 4
shows the oscillator schematics. The gm of the cross-coupled transistors, M1 and M2, was chosen to be
40 mS to provide sufficient negative resistance to cancel the loss in the LC-resonator. The gate-width
of M1 and M2 are both 200 µm. Inductors for the LC-tank implementation is on chip spiral inductors.
The inductance of L1 and L2 is chosen to be ~0.5 nH at 2.4 GHz. CB and CC used MIM capacitance
structure. The dimension of capacitor CC is 220 µm × 220 µm, and CB is 100 µm × 100 µm. The
capacitance of CC is 2.17 pF and CB is 0.45 pF. Single power supply is needed in the whole circuit.

VDD

L1 L1
CC
CB CB
V- V+

M1 M2

Fig.4. The schematic of cross-coupled LC oscillator


The simulation result of fundamental oscillation frequency is 2.40 GHz, and the single-ended output
power is –6.9 dBm. The measurement result of fundamental oscillation frequency is 2.37 GHz, and
output power is –6.1 dBm. The measurement result is shown in Fig. 5. The measured higher order
harmonic frequencies and power level are matching with the simulated results. It demonstrates an
accurate prediction of non-linear circuit behavior by the MOSFET RF large-signal model.

Fig. 5. The measurement results of a 2.4 GHz oscillator

4 Conclusions

In summary, a scaleable 0.35 µm MOSFET RF large-signal model, based on BSIM3v3 model, is


presented. It predicts both DC and RF performance of different device gate-width. Using the RF large-
signal model, an oscillator was fabricated. The accurate prediction of oscillation frequency and output
power level proves that the RF large signal model can be use in a modern RF circuit design.

Acknowledgements

The authors are grateful to the Chip Implementation Center, NSC, and TSMC for providing CMOS
process.

References

[1] Jia-Jiunn Ou, “CMOS RF Modeling for GHz Communication IC’s”, 1998 Symposium on VLSI
Technology Digest of Technical Papers, pp 94-95, 1998.
[2] W. Liu, “R.F. MOSFET Modeling Accounting for Distributed Substrate and Channel Resistances
with Emphasis on the BSIM3v3 SPICE Model”, IEDM 97, pp 309-312, 1997.
[3] M. C. Ho, “A Physical Large Signal Si MOSFET Model for RF Circuit Design”, IEEE MTT-S
Digest, pp 391-394, 1997.
[4] A. Hajimiri, “Design Issues in CMOS Differential LC Oscillators”, IEEE JSSC, Vol. 34, pp 717-
724, May 1999.
[5] “The Design of CMOS Radio-Frequency Integrated Circuits”, Cambridge University Press,
Thomas H. Lee, 1998.

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