IEEE - 43488
Analysis and Integration of Nine Level Cascaded H-
Bridge Multilevel Inverter Configuration in a
Photovoltaic System
Nupur Yadav
Department of Electrical Engineering
Rajasthan Technical University
Kota, India 324010
nupuryadav.ny@gmail.com
Abstract— Power electronics converters are gaining
importance due to the reliable performance of grid-connected
solar system or standalone solar system. In this paper nine levels
cascaded H-bridge Multi-level inverter (CHB-MLI) is analyzed.
The effectiveness of this multilevel inverter is investigated by
replacing the input dc source in cascaded inverter bridge with
separate PV array and boost converters. This PV fed nine levels
CHB is analyzed in two ways: (i) with equal magnitude of input
voltage source to inverter and (ii) with unequal magnitude of
input voltage source. Total harmonic distortion (THD) analysis
for both cases has been carried out. Different multicarrier PWM
strategies are also discussed. Further, the improvement in power
quality by using passive filters at the output end of MLI is shown.
Results are verified in MATLAB/SIMULINK environment by
performing simulation.
Keywords— Photovoltaic (PV) array; Cascaded Multilevel
Inverter (MLI); Pulse width Modulation (PWM); Total Harmonic
Distortion (THD).
I. INTRODUCTION
In present days, to deal with the issue postured by
conventional energy sources, that are depletion of fossil fuels,
atmosphere changes, greenhouse effect, etc., various countries
are expecting to generate more amounts of energy from
renewable sources[1]. Biofuel, solar, hydro and wind are the
major applicants of renewable energy. Among these, solar and
winds are more prominent. Solar-energy installation has
grown quickly over the past few years in India. The reason
behind this growth is the various advantages provided by solar
such as reduced price, non-polluted, low maintenance cost,
continuous availability during the daytime [2]. Factors which
cause the reduction in solar cost are increasing efficiency,
advance manufacturing techniques, etc. In [3, 4] mathematical
modelling of PV is presented and how PV characteristics vary
with variation in environment factors such as that irradiance,
temperature, etc. also described.
Power electronics interfaces are used for grid integration
and standalone PV fed system. DC-DC boost converter raises
the output voltage to meet the load requirement. A brief review
9th ICCCNT 2018
July 10-12, 2018, IISC, Bengaluru
Bengaluru, India
D.K.Sambariya
Department of Electrical Engineering
Rajasthan Technical University
Kota, India 324010
dsambariya_2003@yahoo.com
on voltage rating improving techniques is reported in [5, 6].
Inverters play a vital role in PV system. Inverters provide
alternating voltage at the output end. Pulse Width Modulation
(PWM) based full bridge inverters [7] are generally used in
standalone PV system. PWM inverters produce harmonics and
have high value of total harmonic distortion(THD), hence
reduce the quality of output power. Large-size passive filters
are used to suppress these harmonics. Different MLI topologies
are described in [8, 9] but they are not supplied by PV source.
In [10], conventional neutral point clamped MLI is
incorporated with PV system, but it used an external controller
for maintaining the constant voltage across the capacitor.
Balancing of capacitor voltage is the main hindrance when the
number of level is increased. In [11], grid-connected PV
inverter with sliding mode control is presented but isolation
transformers are used to get the required voltage level. In [12],
reduced switch topology with PV system is described. To
obtain the needed output voltage each transformer secondary is
cascaded. The use of the transformer will rise system price and
space.
To overcome the above problems, PV based multilevel
inverters (MLI) are used. Due to simplicity, flexibility and
requiring the least number of components cascaded H-bridge
multilevel inverter (CHB-MLI) is mainly used. With this, it is
possible to get less distorted voltage by simply raising the
number of output voltage levels without using any transformer.
Hence this paper presents an approach for improving the power
quality of PV fed inverter output voltage.
This paper emphasizes the analysis of a nine level CHB-
MLI for a standalone PV system. This analysis is performed by
considering two configurations (i) Symmetrical configuration
that is with equal input voltage magnitude to each H-bridge
and (ii) Asymmetrical configuration in which unequal input
voltage magnitude is supplied to each H-bridge. The
investigation is carried out to calculate the THD of the output
voltage waveform. Further passive LC filters are used for the
improvement of power quality.
 IEEE - 43488

II. PROPOSED PV INTEGRATED SINGLE PHASE MLI Where -energy band gap of semiconductor =1.1 eV
PV integrated single phase MLI includes PV arrays along 100
PV Curve

with boost circuit and MLI. This configuration provides nine

level output voltage by using 16 switches and four dc sources.
80

A. PV modeling
60
Fig-1 presents the equivalent circuit of a PV cell [3].

Power(W)
40

Rs I
20
Iph
Rsh
Id V
0
0 5 10 15 20 25
Voltage(V)

Fig. 2. PV Characteristic of Solar Cell

Fig. 1. PV cell equivalent circuit [1]
I-V Curve
5

According to Fig. -1, the output current is given as- 4.5

I I ph  I d  I sh (1) 4

Where, is module photocurrent: 3.5

[I sc  k i (T  Tr )]G (2)
Current
I ph 2.5

2
Where, short circuit current (A) 1.5

ki - short circuit current at 250 C and 1000W// 1

0.5

T- operating temperature 0
0 5 10 15 20 25

-reference Temperature i.e. Voltage(V)

G- solar irradiance per 1000 W m 2 =1 Fig. 3. I-V Characteristics curve of Solar cell

And I d is diode current given as- So, the output current of PV module is

ª § V I u Rs · º
ª § qV · º « ¨N  N ¸ »
I o «exp ¨ ¸  1» (3)
N p u I ph  N p u I o u «exp ¨ ¸  1»  I
Id
¬ © nkT ¹ ¼ (6)
s p
« ¨ ¸ » sh
I
n u Vt
is Module reverse saturation current: « ¨ ¸ »
¬« © ¹ ¼»
k uT
I sc
I rs (4)
§ qvoc · With Vt (7)
exp ¨ ¸  1] q
© N s knT ¹
Vu  I u Rs
Np
Where, q- charge of electron
And I sh Ns (8)
-Open circuit voltage Rsh
- series connected cells =36 Where, - Series Resistance=0.001 ohm
23
-Boltzmann’s constant = 1.3805 u 10 J/k - shunt resistance=1000 ohm
íDiode ideality Factor =1.2 - diode thermal resistance
is Saturation current which depends on operating - No. of parallel connected cell =1
temperature as:
Fig. 2 and Fig. 3 shows P-V and I-V characteristics of solar
3 cell.
ªT º ª q u E go § 1 1 ·º
Io I rs « » exp « ¨  ¸» (5)
¬ Tr ¼ «¬ nk © T Tr ¹ ¼»

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July 10-12, 2018, IISC, Bengaluru
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 IEEE - 43488

shows the different parameters values of 80 W PV C. Cascaded H-bridge Multilevel Inverter (CHB-MLI)-
panel. A CHB-MLI can be considered as a series connected full
bridge inverter with separate dc source as input. This input
TABLE I. DESCRIPTION OF SOLAR CELL PARAMETER [13] source can be fed from PV arrays, fuel mass, batteries. CHB-
Name 80 W Panel MLI basically blends the output voltage level from isolated dc
Maximum Power(Pm) 80 W input sources. In PV fed CHB-MLI, each H-bridge requires
Voltage@ Pmax (Vm) 18.33V one PV along with separate boost converter as shown in Fig. 5.
Current at@Pmax (Im) 4.37A The output voltage of MLI is given as in [13].
Short Circuit Current(Isc) 4.71A

¦V
N
Open Circuit Voltage(Voc) 22.24V
Temperature Coefficient of Voc -(80 10) mv/ V0 HBn VHB1  VHB 2  .......  VHBk (13)
Temperature Coefficient of Isc (0.065 ) / n 1
Where, Vo output voltage of inverter
B. Design of Boost Converter-
DC-DC converter plays an important role in PV fed system VHBn - nth H-bride output voltage
because sometimes the PV output voltage is not sufficient to On the occurrence of fault, CHB-MLI provides an easily
meet the load demand. Here boosts a converter deal with high replacement of faulty section from the complete circuit. In case
value of switching frequency. Boost converter is basically used of removal of faulty section, power remains in the circuit
to step up the input voltage and provide boosted voltage at the continuously with reduction in output voltage level. While in
output end. In Fig. 4 boost circuit is depicted. This consisted of case of conventional 2 - level voltage source inverter(VSI),
an inductor, diode, IGBT (as switch) and a capacitor. The whole circuit will be interrupted.
output voltage ripple can be reduced by the output capacitor of
the boost circuit. Boost converter can operate in two modes, The number of voltage (Phase)level in output waveform is
i.e. (i) Continuous mode of operation; (ii) Discontinuous mode evaluated as.
of operation. L 2n  1 (14)
L2 Where, L-level in output voltage; n – Number of H-bridges
PV with Boost

Q1 C1 Load
BT1
PV with Boost

LOAD

Fig. 4. Boost Converter equivalent circuit

PV with Boost

In continuous mode, inductor current remains

continuous throughout the operation and never falls to zero.
The design parameters are calculated as [14]:
Vout  Vin
Duty cycle  D (9)
Vout
Vout u D u 1  D 
PV with Boost

Ripple current 'iL (10)

Lf s
RL u D u 1  D 
2
Inductor L (11)
2 fs Fig. 5. Single Phase Proposed MLI integrated with PV array
Vout u D
Capacitor C (12) Two types of configuration can be perform with CHB-MLI:
RL u 'V0 u f s
(i)Symmetrical MLI and (ii) Asymmetrical MLI
Where, 'iL present inductor ripple (3-5%)
'V0 is for capacitor voltage ripple (3-5%). In symmetrical configuration, each H-bridge is supplied by
equal magnitude of input voltage; on the other hand, in
f s – supply frequency asymmetrical MLI, H-bridges are supplied with unequal
voltage magnitude [15].

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 IEEE - 43488

III. PULSE WIDTH MODULATION (PWM)STRATEGY- A. Case-1: Symmetrical MLI

Various modulation strategies are used for the generation
of firing pulses of MLI. Space vector modulation and Carrier-
based modulation are the most prominent topologies,
especially in case of high switching frequency. Space vector
modulation becomes difficult as the number of voltage level
increases. So mainly carrier-based modulation method is used.
In carrier-based modulation scheme, carriers are arrangement
either by level shifting techniques or by phase shifting
techniques. In Level shifting techniques generally, three
arrangements that are in-phase Disposition(PD), Alternative
Phase Disposition(APOD) and Phase opposition Disposition
(POD) are considered. In this paper, Phase disposition carrier-
based modulation scheme is used as depict in Fig. 6. In this
scheme, carriers are in phase with equal frequency and
magnitude. In level shifting techniques, to generate firing
pulses for ‘L’ level inverter ‘ Lv -1’ carriers are required.
Carriers are equally divided into two parts: one is for above the
zero reference and other are placed below the zero reference. In
PD carrier scheme, sinusoidal pulse is compared with the
triangular carrier to generate the Boolean outputs, which
produce suitable firing pulses for inverter switches.
In symmetrical configuration, each H-bridge is provided by
equal magnitude of input voltage. Here 120V input voltage is
supplied to each H-bridge network. Fig. 7 demonstrate the
output voltage waveform with equal input voltages.
From Fig. 7, it is noticed that the maximum output voltage
of MLI is around 460V, and its RMS value is about 325V.
Fig. 8 illustrate the selected cycle for FFT analysis. Fig. 9
shows the harmonic spectrum of the output voltage of nine
level inverter. Its THD is 15.51%.
This output waveform has distortions, which causes the
reduction in power quality. To reduce these hindrances, passive
filters are used. In this paper, we have used a simple LC filter
at the load end for improvement of the power quality. Passive
filter improves the power quality as depicted in Fig. 10. By
using these LC filters, waveform smoothness increases. Fig. 11
shows the selected number of cycle for FFT analysis. As the
smoothness of the output waveform increases, its THD reduces
which is shown in Fig. 12.
Here a series combination of an inductor and capacitor is
used. Capacitor is connected in shunt with the resistive load
while the inductor is connected in series with the load.

Fig. 6. Carrier arrangement for nine level Cascaded MLI

IV. SIMULATION RESULTS

The simulation analysis of nine levels CHB-MLI with PV
system is performed using MATLAB / Simulink. Here a
resistance of 400 ohm is taken as load. Table-II shows the Fig. 7. Nine level Cascaded symetrical MLI output voltage
parameters used for simulaion. The obtained simulation results
FFT window: 2 of 25 cycles of selected signal
for standalone PV system with nine levels CHB-MLI is
discussed as follows: 400

200

TABLE II. DESIGN PARAMETER FOR SIMULATION

Signal mag.

0
Parameter Symmetri Asymmetrical MLi
cal MLI
-200
Input 120V,120 120V,120V,60V,60
Voltage to V, V
-400
each H- 120V,120
bridge V 0.25 0.255 0.26 0.265 0.27 0.275 0.28 0.285

Switching 5KHz
Frequency Time (s)
Load 400 Ohm
Fig. 8. Selected Cycle for the FFT analysis

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 IEEE - 43488

Fundamental (50Hz) = 433 , THD= 15.51%

4 B. Case -2 Asymmetrical MLI
In asymmetrical MLI, the H-bridge is provided with unequal
3 voltage source input. Here we have applied 120V input for
two H-bridges separately, and other two bridges are supplied
Mag (% of Fundamental)

2
with 60-60V input source. Here the overall input voltage is
360 V while in previous case it 480V. This input dc voltage is
1
converted into stepped ac voltage output. As the number of
steps increases, waveform becomes more sinusoidal in shape.
As a result, its THD reduces and power quality improves.
0
0 5 10 15 20 The Fig. 13 depicts the output voltage waveform of
Harmonic order asymmetric MLI. Fig.14 shows selected cycle for FFT
analysis. It is observed that asymmetric MLI has more THD as
Fig. 9. Harmonic spectrum of the symmetrical MLI Voltage
compare to symmetric MLI.

Fig. 10. Output Voltage with LC filter Fig. 13. Nine Level cascaded asymetrical MLI

FFT window: 2 of 25 cycles of selected signal FFT window: 2 of 25 cycles of selected signal

400 300

200
200
100
Signal mag.
Signal mag.

0 0

-100
-200
-200

-300
-400
0.25 0.255 0.26 0.265 0.27 0.275 0.28 0.285
0.25 0.255 0.26 0.265 0.27 0.275 0.28 0.285
Time (s) Time (s)

Fig. 11. Selected Cycle for the FFT analysis Fig. 14. Selected Cycle for the FFT analysis
al m

T analysis
-400
nal mag

200
0
Fundamental (50Hz) = 434.6 , THD= 4.49% -200 Fundamental (50Hz) = 331.6 , THD= 23.56%

180 25 0 255 0 26 0 265 Ti 0 27

( ) 0 275 0 28 0 285
4
16
3.5
14
3
12
Mag (% of Fundamental)

Mag (% of Fundamental)

2.5
10

2
8

1.5 6

1 4

0.5 2

0
0
0 5 10 15 20
0 5 10 15 20
Harmonic order Harmonic order

Fig. 12. Harmonic spectrum of otuput voltage (with LC) Fig. 15. Harmonic spectrum of asymmetrical MLI voltage

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 IEEE - 43488

In asymmetric case, calculated THD is 23.56% as shown in level increases, THD reduces. So, in this way this proposed
Fig. 15. In this case also, we used LC filter for power quality nine level topology is better as compare to previously existing
improvement. Fig. 16 shows output voltage waveform with low-level topologies [15, 16].
asymmetrical MLI with LC filter. Fig. 17 shows the selected
cycle for FFT analysis. With LC filter, THD reduces from TABLE III.
23.56% to 17.53% as depicts in Fig. 15 and Fig.18.
Symmetrical MLI
Voltage THD
Without LC filter 15.51%
With LC filter 4.49%
Asymmetrical MLI
Without LC filter 23.56%
With LC filter 17.53%

CONCLUSION
In this paper, PV fed cascaded H-bridge nine level inverter is
analyzed (i) with equal magnitude voltage input and (ii) with
unequal voltage input. It is observed that when magnitude of
input voltages is equal for H-bridges, then total harmonic
distortion reduces as compare to unequal input case. By this
Fig. 16. Output Voltage with asymmetrical MLI with LC analysis, it is found that symmetrical MLI is a good choice for
PV fed system as compare to asymmetrical MLI. It is also
FFT window: 2 of 25 cycles of selected signal noticed that by using passive filters, total harmonic distortion
reduces drastically in both equal and unequal input cases. So,
200 by applying equal input sources with passive filter, power
quality of PV fed nine level inverters are highly improved.
Signal mag.

0
REFERENCES
[1] S. K. Kar, A. Sharma, and B. Roy, "Solar energy market developments
-200 in India," Renewable and Sustainable Energy Reviews, vol. 62, pp. 121-
133, 2016.
0.25 0.255 0.26 0.265 0.27 0.275 0.28 0.285 [2] N. Kannan and D. Vakeesan, "Solar energy for future world:-A review,"
Time (s) Renewable and Sustainable Energy Reviews, vol. 62, pp. 1092-1105,
2016.
[3] X. H. Nguyen and M. P. Nguyen, "Mathematical modeling of
Fig. 17. Selected Cycle for the FFT analysis photovoltaic cell/module/arrays with tags in Matlab/Simulink,"
FFT analysis FFT window: 2 of 25 cycles of selected signal Environmental Systems Research, vol. 4, p. 24, 2015.
200 Fundamental (50Hz) = 332.1 , THD= 17.53%
[4] S. S. Mohammed, "Modeling and Simulation of Photovoltaic module
using MATLAB/Simulink," International Journal of Chemical and
Signal mag.

18 0
Environmental Engineering, vol. 2, 2011.
-200
16 [5] F. L. Tofoli, D. de Castro Pereira, W. J. de Paula, and D. d. S. O. Júnior,
0.25 0.255 0.26 0.265 0.27 0.275 0.28 0.285
14
"Survey on non-isolated high-voltage step-up dc–dc topologies based on
the boost converter," IET power Electronics, vol. 8, pp. 2044-2057,
12 2015.
Mag (% of Fundamental)

10
[6] W. Li, X. Lv, Y. Deng, J. Liu, and X. He, "A review of non-isolated
high step-up DC/DC converters in renewable energy applications," in
8 Applied Power Electronics Conference and Exposition, 2009. APEC
2009. Twenty-Fourth Annual IEEE, 2009, pp. 364-369.
6
[7] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B.
4 Wu, et al., "Recent advances and industrial applications of multilevel
converters," IEEE Transactions on industrial electronics, vol. 57, pp.
2
2553-2580, 2010.
0 [8] K. K. Gupta, A. Ranjan, P. Bhatnagar, L. K. Sahu, and S. Jain,
0 5 10 15 20
"Multilevel inverter topologies with reduced device count: A review,"
Harmonic order
IEEE Transactions on Power Electronics, vol. 31, pp. 135-151, 2016.
[9] E. Babaei, S. Laali, and Z. Bayat, "A single-phase cascaded multilevel
Fig. 18. Harmonic spectrum of asymmetrical MLI voltage (with LC) inverter based on a new basic unit with reduced number of power
switches," IEEE Transactions on industrial electronics, vol. 62, pp. 922-
Table III represents the overall performance of Nine level 929, 2015.
cascaded MLI with standalone PV system. This shows the [10] P. Kakosimos, K. Pavlou, A. Kladas, and S. Manias, "A single-phase
effectiveness of passive filters for the improvement of power nine-level inverter for renewable energy systems employing model
quality. It is also noticed that as the number of output voltage predictive control," Energy Conversion and Management, vol. 89, pp.
427-437, 2015.

9th ICCCNT 2018

July 10-12, 2018, IISC, Bengaluru
Bengaluru, India
 IEEE - 43488

[11] N. Kumar, T. K. Saha, and J. Dey, "Sliding-mode control of PWM dual

inverter-based grid-connected PV system: modeling and performance
analysis," IEEE Journal of Emerging and Selected Topics in Power
Electronics, vol. 4, pp. 435-444, 2016.
[12] M. González, V. Cárdenas, H. Miranda, and R. Álvarez-Salas,
"Conception of a modular multilevel converter for high-scale
photovoltaic generation based on efficiency criteria," Solar Energy, vol.
125, pp. 381-397, 2016.
[13] N. Prabaharan and K. Palanisamy, "Analysis and integration of
multilevel inverter configuration with boost converters in a photovoltaic
system," Energy Conversion and Management, vol. 128, pp. 327-342,
2016.
[14] G. Vijay and D. Palwalia, "A Novel Analysis and Modeling of Boost
And Buck Converter," 2017.
[15] K. Venkataramanan, B. Shanthi, and K. Prathapkumar,
"PERFORMANCE EVALUATION OF NEW BREED MULTILEVEL
INVERTER."
[16] P. Yadav, A. Bhargava, and M. Sharma, "MPPT Using Soft Computing
Technique with MLI in Photovoltaic System," in Micro-Electronics and
Telecommunication Engineering (ICMETE), 2016 International
Conference on, 2016, pp. 466-470.

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