ZCAS UNIVERSITY

BCE 332

Computer Organization and architecture

LECTURER: Mr. Jonathan Zulu

ASSIGNMENT NO: one

DUE DATE: 13th March 2020

STUDENT NUMBER: ZU18070

STUDENT NAME: Franklin Doroba

Basically, control unit (CU) is the engine that runs the entire functions of a computer with
the help of control signals in the proper sequence. In the micro-programmed control unit
approach, the control signals that are associated with the operations are stored in special
memory units. It is convenient to think of sets of control signals that cause specific micro-
operations to occur as being “microinstructions”. The sequences of microinstructions could
be stored in an internal “control” memory.
Micro-programmed control unit can be classified into two types based on the type of Control
Word stored in the Control Memory, viz., Horizontal micro-programmed control unit and
Vertical micro-programmed control unit.

 In Horizontal micro-programmed control unit, the control signals are represented in the

decoded binary format, i.e., 1 bit/CS. Here ‘n’ control signals require n bit encoding. On
the other hand.
 In Vertical micro-programmed control unit, the control signals are represented in the
encoded binary format. Here ‘n’ control signals require log2n bit encoding.
The main difference between Hardwired and Microprogrammed Control Unit is that a
Hardwired Control Unit is a sequential circuit that generates control signals while a
Microprogrammed Control Unit is a unit with microinstructions in the control memory to
generate control signals. 
The processor or the CPU is the main component of the computer that handles most of the
tasks. It consists of main two subsystems: Arithmetic and Logic Unit (ALU) and the control
unit (CU). ALU handles the mathematical and logical operations while CU sends timing and
control signals to the other units to synchronize the tasks. The Control Unit can either be
hardwired or microprogrammed. Hardwired Control Units are difficult to modify, decode and
implement, but executes operations much faster. On the other hand, Microprogrammed
Control Units are easier to modify, decode, implement and capable of handling complex
instructions.
Hardwired Control Unit is implemented using various electronic components such as
combinational logic units and gates. The circuit uses a fixed architecture. If the instruction set
is changed, the wiring should also be changed. As it is hardwired, the instruction set is
constant and does not change. Therefore, a Hardwired Control Unit is used in processors that
use simple instruction set known as the Reduced Instruction Set Computers (RISC).
Usually, these control units execute faster. However, Hardwired Control Units are difficult to
modify and implement. It is also difficult to add new features to the existing design.
Therefore, it has minimum flexibility.

What is a Microprogrammed Control Unit

Before talking about Microprogrammed Control Unit, it is important to understand some
terms. A control variable refers to a binary variable that specifies micro-operations. A control
word is a set of ones and zeros in a control variable. The control memory contains control
words.

Microprogrammed Control Unit has a sequence of microinstructions stored in control

memory. These microinstructions refer to a control word that resides in control memory,
containing control signals for execution of micro-operations. Furthermore, a
Microprogrammed Control Unit is used in processors based on complex instruction set
known as Complex Instruction Set Computer (CISC).

Overall, these control units have a simple structure. Therefore, it is easier to design,
implement and test. Moreover, Microprogrammed Control Units are easier to modify.

Hardwired Control Unit is a unit that uses combinational logic units, featuring a finite
number of gates that can generate specific results based on the instructions that were used to
invoke those responses. Microprogrammed Control Unit is a unit that contains
microinstructions in the control memory to produce control signals.

The speed of operations in Hardwired Control Unit is fast. The speed of operations in
Microprogrammed Control Unit is slow because it requires frequent memory accesses.

To do modifications in a Hardwired Control Unit, the entire unit should be redesigned. In

Microprogrammed Control Unit, modifications can be implemented by changing the
microinstructions in the control memory. Therefore, Microprogrammed Control Unit is more
flexible.
Virtual Memory is a space where large programs can store themselves in form of pages while
their execution and only the required pages or portions of processes are loaded into the main
memory. This technique is useful as large virtual memory is provided for user programs
when a very small physical memory is there.

Mapping Virtual Addresses to Physical Addresses

Memory consists of large array of words or arrays, each of which has address associated with
it. Now the work of CPU is to fetch instructions from the memory-based program counter.
Now further these instructions may cause loading or storing to specific memory address.

Address binding is the process of mapping from one address space to another address space.
Logical address is address generated by CPU during execution whereas Physical Address
refers to location in memory unit the one that is loaded into memory. Note that user deals
with only logical address (Virtual address). The logical address undergoes translation by the
MMU or address translation unit in particular. The output of this process is the appropriate
physical address or the location of code/data in RAM.

Compile Time – If you know that during compile time where process will reside in memory
then absolute address is generated that is physical address is embedded to the executable of
the program during compilation. Loading the executable as a process in memory is very fast.
But if the generated address space is preoccupied by other process, then the program crashes
and it becomes necessary to recompile the program to change the address space.
Load time If it is not known at the compile time where process will reside then relocatable
address will be generated. Loader translates the relocatable address to absolute address. The
base address of the process in main memory is added to all logical addresses by the loader to
generate absolute address. In this if the base address of the process changes then we need to
reload the process again.
Execution time the instructions are in memory and are being processed by the CPU.
Additional memory may be allocated and/or deallocated at this time. This is used if process
can be moved from one memory to another during execution (dynamic linking-Linking that is
done during load or run time). For example, Compaction.
The run time mapping between Virtual address and Physical Address is done by hardware
device known as MMU. In memory management, Operating System will handle the
processes and moves the processes between disk and memory for execution. It keeps the
track of available and used memory.
Instruction-execution cycle Follows steps:
1. First instruction is fetched from memory e.g. ADD A, B
2. Then these instructions are decoded i.e., Addition of A and B
3. And further loading or storing at some particular memory location takes place.
Basic Hardware
As main memory and registers are built into processor and CPU can access these only. So,
every instruction should be written in direct access storage
devices.

1. If CPU access instruction from register then it can be done in one CPU clock cycle as
registers are built into CPU.
2. If instruction resides in main memory then it will be accessed via memory bus that will
take lot of time. So, remedy to this add fast memory in between CPU and main memory
that is adding cache for transaction.
3. Now we should insure that process resides in legal address.
4. Legal address consists of base register (holds smallest physical address) and limit
register (size of range).
For example:
Base register = 300040
limit register = 120900
then legal address = (300040+120900) = 420940(inclusive).
legal address = base register+ limit register

Normal procedure is that process is selected from input queue and loaded in memory. As
process executes it accesses data and instructions from memory and as soon as it completes it
will release memory and now memory will be available for other processes.

MMU scheme –
CPU------- MMU------Memory
 1. CPU will generate logical address for e.g.: 346
2. MMU will generate relocation register (base register) for eg:14000
3. In Memory physical address is located e.g.:(346+14000= 14346)

Addressing Modes– The term addressing modes refers to the way in which the operand of
an instruction is specified. The addressing mode specifies a rule for interpreting or
modifying the address field of the instruction before the operand is actually executed.
Addressing modes for 8086 instructions are divided into two categories:
1) Addressing modes for data
2) Addressing modes for branch

The 8086 memory addressing modes provide flexible access to memory, allowing you to
easily access variables, arrays, records, pointers, and other complex data types.  The key to
good assembly language programming is the proper use of memory addressing modes.

An assembly language program instruction consists of two parts

The memory address of an operand consists of two components: 

IMPORTANT TERMS
  Starting address of memory segment.
 Effective address or Offset: An offset is determined by adding any combination of
three address elements: displacement, base and index.
 Displacement: It is an 8 bit or 16-bit immediate value given in the instruction.
 Base: Contents of base register, BX or BP.
 Index: Content of index register SI or DI.
According to different ways of specifying an operand by 8086 microprocessor, different
addressing modes are used by 8086.

Addressing modes used by 8086 microprocessors are discussed below:

 Implied mode: In implied addressing the operand is specified in the instruction itself.
In this mode the data is 8 bits or 16 bits long and data is the part of instruction. Zero
address instruction are designed with implied addressing mode.

Example:  CLC (used to reset Carry flag to 0)

 Immediate addressing mode (symbol #): In this mode data is present in address field
of instruction. Designed like one address instruction format.
Note: Limitation in the immediate mode is that the range of constants are restricted by
size of address field.

Example:  MOV AL, 35H (move the data 35H into AL register)

 Register mode: In register addressing the operand is placed in one of 8 bit or 16 bit
general purpose registers. The data is in the register that is specified by the instruction.
 Here one register reference is required to access the data.

 Example: MOV AX, CX (move the contents of CX register to AX register)

 Register Indirect mode: In this addressing the operand’s offset is placed in any one of
the registers BX, BP, SI, DI as specified in the instruction. The effective address of the
data is in the base register or an index register that is specified by the instruction.
Here two register reference is required to access the data.

The 8086 CPUs let you access memory indirectly through a register using the register
indirect addressing modes.
 MOV AX, [BX] (move the contents of memory location s

addressed by the register BX to the register AX)

 Auto Indexed (increment mode): Effective address of the operand is the contents of a
register specified in the instruction. After accessing the operand, the contents of this
register are automatically incremented to point to the next consecutive memory
location. (R1) +.
Here one register reference, one memory reference and one ALU operation is required
to access the data.
Example:
 Add R1, (R2) + // OR

 R1 = R1 +M[R2]

R2 = R2 + d

Useful for stepping through arrays in a loop. R2 – start of array  d – size of an element
 Auto indexed (decrement mode): Effective address of the operand is the contents of a
register specified in the instruction. Before accessing the operand, the contents of this
 register are automatically decremented to point to the previous consecutive memory
location. –(R1)
Here one register reference, one memory reference and one ALU operation is required
to access the data.
Example:
Add R1, -(R2)   //OR

R2 = R2-d
R1 = R1 + M[R2]
Auto decrement mode is same as auto increment mode. Both can also be used to implement a
stack as push and pop. Auto increment and Auto decrement modes are useful for
implementing “Last-In-First-Out” data structures.
 Direct addressing/ Absolute addressing Mode (symbol [ ]): The operand’s offset is
given in the instruction as an 8 bit or 16-bit displacement element. In this addressing
mode the 16-bit effective address of the data is the part of the instruction.
Here only one memory reference operation is required to access the data.

Example: ADD AL, [0301]   //add the contents of offset address 0301 to AL

 Indirect addressing Mode (symbol @ or ()): In this mode address field of instruction
contains the address of effective address. Here two references are required.
1st reference to get effective address.
2nd reference to access the data.
Based on the availability of Effective address, Indirect mode is of two kind:

1. Register Indirect: In this mode effective address is in the register, and

corresponding register name will be maintained in the address field of an
instruction.
Here one register reference, one memory reference is required to access the data.
2. Memory Indirect: In this mode effective address is in the memory, and
corresponding memory address will be maintained in the address field of an
instruction.
Here two memory reference is required to access the data.
  Indexed addressing mode: The operand’s offset is the sum of the content of an index
register SI or DI and an 8 bit or 16-bit displacement.
Example AX, [SI +05]

  Based Indexed Addressing: The operand’s offset is sum of the content of a base

register BX or BP and an index register SI or DI.
Example: ADD AX, [BX+SI]

Based on Transfer of control, addressing modes are:

 PC relative addressing mode: PC relative addressing mode is used to implement intra
segment transfer of control, in this mode effective address is obtained by adding
displacement to PC.
 EA= PC + Address field value

PC= PC + Relative value.

 Base register addressing mode: Base register addressing mode is used to implement
inter segment transfer of control. In this mode effective address is obtained by adding
base register value to address field value.
 EA= Base register + Address field value.

 PC= Base register + Relative value.

Note:
1. PC relative nad based register both addressing modes are suitable for program
relocation at runtime.
2. Based register addressing mode is best suitable to write position independent
codes.
Advantages of Addressing Modes
6. To give programmers to facilities such as Pointers, counters for loop controls, indexing
of data and program relocation.
7. To reduce the number bits in the addressing field of the Instruction.

Question 2
An instruction cycle, also known as fetch-decode-execute cycle is the basic operational
process of a computer. This process is repeated continuously by CPU from boot up to shut
down of computer.

Following are the steps that occur during an instruction cycle:

1. Fetch the Instruction

The instruction is fetched from memory address that is stored in PC (Program Counter) and
stored in the instruction register IR. At the end of the fetch operation, PC is incremented by 1
and it then points to the next instruction to be executed.

2. Decode the Instruction

The instruction in the IR is executed by the decoder.

3. Read the Effective Address

If the instruction has an indirect address, the effective address is read from the memory.
Otherwise operands are directly read in case of immediate operand instruction.

4. Execute the Instruction

The Control Unit passes the information in the form of control signals to the functional unit
of CPU. The result generated is stored in main memory or sent to an output device

The cycle is then repeated by fetching the next instruction. Thus, in this way the instruction
cycle is repeated continuously.
B) Register addressing mode:
In case of register addressing mode, the instruction will have the opcode and a register
number. Depending upon the register number, one of the registers will be selected from the
available sets of registers by default automatically.
The unique identification of the register can be done by the register number which is
mentioned in the instruction. In that register, the operand can be found.
Advantages

 Shorter instructions and faster instruction fetch.

 Faster memory access to the operand(s)

Disadvantages

 Very limited address space

 Using multiple registers helps performance but it complicates the instructions.

Immediate addressing mode :

In the immediate addressing mode, the instruction contains two fields. One for
the opcode and another field contains the operand itself. That means in this addressing
mode, there is no need to go anywhere to access the operand because of the instruction itself
containing the operand. This is known as immediate addressing mode.


Direct addressing mode:
In the direct addressing mode, the instruction will have the two parts. One part will contain
the opcode and another one will contain the address of the memory location at where the
operand can be found.
Here A is the address of the operand. That means at the location in the memory, the operand
can be found.

Question 3
A bus is a pathway for digital signals to rapidly move data. There are three internal buses
associated with processors: the data bus, address bus, and control bus. Together, these three
make up the “system bus.” The system bus is an internal bus, intended to connect the
processor with internal hardware devices, and is also called the “local” bus, Front Side Bus,
or is sometimes loosely referred to as the “memory bus.”

Data moving in and out of the data bus is bi-directional, since the processor reads and writes
data, however, the others are unit-directional, since the processor always determines when
and what it will read from or write to. The address bus carries addressing signals from the
processor to memory, I/O (or peripherals), and other addressable devices around the
processor. Control signals move out of the processor, but not in to it.

The data bus “width” of an MCU is typically 8-, 16-, 32- or 64-bits, although MCUs of just a
4-bit data bus or greater than 64-bit width are possible. The width of the data bus reflects the
maximum amount of data that can be processed and delivered at one time.  A 64-bit
processor has a 64-bit data bus and can communicate 64-bits of data at a time, and whether
the data is read or written is determined by the control bus. The physical location of the data
in memory is carried by the address bus. An internal hardware component, having received
the address from the address bus and about to receive the data, enables a buffer to allow the
flow of signals to or from the location that was designated by the address bus. The address
bus carries only the information regarding the address, and is synchronized with the data bus
to accomplish read/write tasks from the processor. The address bus is only as wide as is
necessary to address all memory in the system.

Other communication buses also communicate with the processor but are external to the
system, such as Universal Serial Bus, RS-232, Controller Area Network (CAN), e-SATA,
and others. External peripherals may be set up to use the internal bus, and this was common
with computers that used “expansion cards” to connect products to the internal bus. However,
with one card per device this became untenable for the long term, and other bus
communication systems such as USB were developed.

A system bus can be “extended” to communicate with other computers via a chassis called a
backplane. Internal buses have very rapid throughput and low latency. Several computers can
be rack-mounted in a single backplane for very fast communication between computers.