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5 4 3 2 1

Z8C_GDDR3 SHB ULT SYSTEM BLOCK DIAGRAM


BOM
IV@ : iGPU
EV@ : Optimus
01
SW@ : With DP switch
Dual Channel DDR III VRAM 8 PCS NSW@ : W/O DP switch
DDR3L-SODIMM 1600 MHZ GPU GV2-DDR3 TPL@ : Touch screen
Memory Down HSW/ BDW ULT 15W PCIE-5 N15S-GT 840M
P20~P23 KBL@ : Keyboard backlight
P14
MCP 1168pins PCI-E x4 N15V-GM 820M TPM@ : TPM
D D
TX/RX
2Rx16 IMC
DC+GT3 Display X'TAL 27MHz
CLK
40 mm X 24 mm
SATA0 P16~P19
Max. 4G P15 SATA - HDD
P28 EDP
SATA eDP Conn. P25
eDP

USB3-2
DDI2-Lane0~1 DP to VGA
CRT Conn. P24
USB3 Port USB2-1 IF6513FN P24
MB side
P32 DP
DDI1
HDMI Conn. P26
USB2-3 Integrated PCH
USB3-1
USB2 IO P32
USB3.0/2.0
USB2-6 USB2-0 USB Charger USB3 Port
CCD(Camera) P32 MB side
P25 SLG55584A P32
USB2.0
C
USB2-5 CLK C

Touch Screen(reserve)
P25
PCI-E x3 PCIE-4
USB2-7 PCIE-2 MINI CARD
Fingerprint(option) USB2-4 WIGIG
P25 X'TAL P27
32.768KHz

I/O board
PCIE-3
RTL8411AAR RJ45
USB2-2 /RTL8411BAR P29
USB2 IO I/O Board Conn. X'TAL 24MHz
P32
10/100/1G P29

CLK
P8 BATTERY RTC Cardreader
Azalia P2~P13 X'TAL 25MHz CONN. 2in 1
IHDA
SPI SPI ROM P30
LPC
P8

EC
B Int. MIC ALC3225 TPM(option) B
DMIC Array BQ24737A TPS51216 Thermal Protection
AUDIO CODEC IT8587 P28 Batery Charger P36 +1.35V_SUS P39 P41
P31 P31 P35
Discharger

TPS51225 TPS54318
+3V/+5V P37 +1.5V P41

TPS51624 UP1642
+VCCIN P40 +VGPU_CORE P42

Combo HP Speaker*2 D/B G- Sensor Touch Pad Fan Driver TPS51211 TPS51211
P31 P31
K/B Con. HALL SENSOR (PWM Type) +1.05V_S5/+1.05V +1.5V_GFX/1.05V_GFX/3V_GFX
P34 P32 P33 P34 P34 P38 P43

A A

www.vinafix.com Size Document Number


Quanta Computer Inc.
PROJECT : Z8C
Block Diagram
Rev
3A

Date: Saturday, November 15, 2014 Sheet 1 of 48


5 4 3 2 1
5 4 3 2 1

Haswell ULT (DISPLAY,eDP)


U45A HSW_ULT_DDR3L
02

eDP Panel
C54 C45 EDP_TXN0
26 INT_HDMITX2N DDI1_TXN0 EDP_TXN0 EDP_TXN0 25
D 26 INT_HDMITX2P C55 B46 EDP_TXP0 EDP_TXP0 25 D
B58 DDI1_TXP0 EDP_TXP0 A47 EDP_TXN1
HDMI

26 INT_HDMITX1N DDI1_TXN1 EDP_TXN1 EDP_TXN1 25


26 INT_HDMITX1P C58 B47 EDP_TXP1 EDP_TXP1 25
B55 DDI1_TXP1 EDP_TXP1
26 INT_HDMITX0N DDI1_TXN2
A55 C47 EDP_TXN2
26 INT_HDMITX0P DDI1_TXP2 EDP_TXN2 EDP_TXN2 25
26 INT_HDMICLK- A57 C46 EDP_TXP2 EDP_TXP2 25
B57 DDI1_TXN3 EDP_TXP2 A49 EDP_TXN3
26 INT_HDMICLK+ DDI1_TXP3 EDP_TXN3 EDP_TXN3 25
DDI EDP B49 EDP_TXP3 EDP_TXP3 25
C51 EDP_TXP3
24 CRT_TXN0 DDI2_TXN0
24 CRT_TXP0 C50 A45 EDP_AUXN EDP_AUXN 25
CRT

C53 DDI2_TXP0 EDP_AUXN B45 EDP_AUXP


24 CRT_TXN1 DDI2_TXN1 EDP_AUXP EDP_AUXP 25
24 CRT_TXP1 B54
C49 DDI2_TXP1 D20 EDP_RCOMP R107 24.9/F_4
TP109 DDI2_TXN2 EDP_RCOMP +VCCIOA_OUT
ITE FAE suggest CAP TP108
B50
DDI2_TXP2 EDP_DISP_UTIL
A43 DP_UTIL R502 *0_4 PCH_BRIGHT
should be at PCH side. A53
TP114 DDI2_TXN3
B53
TP113 DDI2_TXP3
eDP_RCOMP
R503 *0_4
Trace length < 100 mils
Trace width = 20 mils
1 OF 19 Trace spacing = 25 mils

C C
+3V
HSW_ULT_DDR3L
U45I
PCI_PIRQA# R115 10K_4
PCI_PIRQB# R570 10K_4
PCI_PIRQC# R538 10K_4
PCI_PIRQD# R551 10K_4
25 PCH_BRIGHT PCH_BRIGHT B8 B9 HDMI_DDCCLK_SW 26 DGPU_SELECT# R543 10K_4
PCH_BLON A9 EDP_BKLCTL DDPB_CTRLCLK C9
25 PCH_BLON EDP_BKLEN DDPB_CTRLDATA HDMI_DDCDATA_SW 26
PCH_VDDEN C6 eDP SIDEBAND D9 CRT_CLK
25 PCH_VDDEN EDP_VDDEN DDPC_CTRLCLK D11 CRT_DATA
DDPC_CTRLDATA
+3V
PCI_PIRQA# U6 +3V
PCI_PIRQB# P4 PIRQA/GPIO77 C5 TPD_INT#_D
PIRQB/GPIO78 +3V DDPB_AUXN
R130 TPL@100K_4
PCI_PIRQC# N4 +3V B6 CRT_AUXN 24 CRT_CLK R515 2.2K_4
PCI_PIRQD# N2 PIRQC/GPIO79 DISPLAY DDPC_AUXN B5 CRT_DATA
PIRQD/GPIO80 +3V DDPB_AUXP
R514 2.2K_4
PCI_PME# AD4 +3V_S5 A6 CRT_AUXP 24
TP61 PME PCIE DDPC_AUXP
TPD_INT#_D U7 +3V
35 TPD_INT#_D GPIO55
DGPU_SELECT# L1 +3V
BOARD_ID4 L3 GPIO52 C8
10 BOARD_ID4 GPIO54 +3V DDPB_HPD INT_HDMI_HPD 26
BOARD_ID1 R5 +3V A8 CRT_HPD 24
10 BOARD_ID1 GPIO51 DDPC_HPD
BOARD_ID2 L4 +3V D6 EDP_HPD 25
10 BOARD_ID2 GPIO53 EDP_HPD
B B

R86 R484
4.7K_4
9 OF 19 100K_4

A A

Quanta Computer Inc.


PROJECT :Z8C
Size Document Number Rev
3A
Haswell 3/5 (DDI/eDP)
Date: Saturday, November 15, 2014 Sheet 2 of 48
5 4 3 2 1
5 4 3 2 1

Haswell ULT
U45C HSW_ULT_DDR3L
(DDR3L)
U45D
Haswell Processor (DDR3)
HSW_ULT_DDR3L
03
14 M_A_DQ[63:0] 15 M_B_DQ[63:0]
M_A_DQ0 AH63 AU37 M_A_CLK0# 14
M_A_DQ1 AH62 SA_DQ0 SA_CLK#0 AV37 M_B_DQ0 AY31 AM38
SA_DQ1 SA_CLK0 M_A_CLK0 14 SB_DQ0 SB_CK#0 M_B_CLK0# 15
M_A_DQ2 AK63 AW36 M_A_CLK1# 14 M_B_DQ1 AW31 AN38 M_B_CLK0 15
M_A_DQ3 AK62 SA_DQ2 SA_CLK#1 AY36 M_B_DQ2 AY29 SB_DQ1 SB_CK0 AK38
SA_DQ3 SA_CLK1 M_A_CLK1 14 SB_DQ2 SB_CK#1 M_B_CLK1# 15
M_A_DQ4 AH61 M_B_DQ3 AW29 AL38 M_B_CLK1 15
M_A_DQ5 AH60 SA_DQ4 AU43 M_B_DQ4 AV31 SB_DQ3 SB_CK1
D SA_DQ5 SA_CKE0 M_A_CKE0 14 SB_DQ4 D
M_A_DQ6 AK61 AW43 M_A_CKE1 14 M_B_DQ5 AU31 AY49 M_B_CKE0 15
M_A_DQ7 AK60 SA_DQ6 SA_CKE1 AY42 M_B_DQ6 AV29 SB_DQ5 SB_CKE0 AU50
SA_DQ7 SA_CKE2 SB_DQ6 SB_CKE1 M_B_CKE1 15
M_A_DQ8 AM63 AY43 M_B_DQ7 AU29 AW49
M_A_DQ9 AM62 SA_DQ8 SA_CKE3 M_B_DQ8 AY27 SB_DQ7 SB_CKE2 AV50
M_A_DQ10 AP63 SA_DQ9 AP33 M_B_DQ9 AW27 SB_DQ8 SB_CKE3
SA_DQ10 SA_CS#0 M_A_CS#0 14 SB_DQ9
M_A_DQ11 AP62 AR32 M_A_CS#1 14 M_B_DQ10 AY25 AM32 M_B_CS#0 15
M_A_DQ12 AM61 SA_DQ11 SA_CS#1 M_B_DQ11 AW25 SB_DQ10 SB_CS#0 AK32
SA_DQ12 SB_DQ11 SB_CS#1 M_B_CS#1 15
M_A_DQ13 AM60 AP32 M_B_DQ12 AV27
SA_DQ13 SA_ODT0 TP80 SB_DQ12
M_A_DQ14 AP61 M_B_DQ13 AU27 AL32 M_B_ODT0
SA_DQ14 SB_DQ13 SB_ODT0 TP78
M_A_DQ15 AP60 AY34 M_A_RAS# 14 M_B_DQ14 AV25
M_A_DQ16 AP58 SA_DQ15 SA_RAS AW34 M_B_DQ15 AU25 SB_DQ14 AM35
SA_DQ16 SA_WE M_A_WE# 14 SB_DQ15 SB_RAS M_B_RAS# 15
M_A_DQ17 AR58 AU34 M_A_CAS# 14 M_B_DQ16 AM29 AK35 M_B_WE# 15
M_A_DQ18 AM57 SA_DQ17 SA_CAS M_B_DQ17 AK29 SB_DQ16 SB_WE AM33
SA_DQ18 SB_DQ17 SB_CAS M_B_CAS# 15
M_A_DQ19 AK57 AU35 M_A_BS#0 14 M_B_DQ18 AL28
M_A_DQ20 AL58 SA_DQ19 SA_BA0 AV35 M_B_DQ19 AK28 SB_DQ18 AL35
SA_DQ20 SA_BA1 M_A_BS#1 14 SB_DQ19 SB_BA0 M_B_BS#0 15
M_A_DQ21 AK58 AY41 M_A_BS#2 14 M_B_DQ20 AR29 AM36 M_B_BS#1 15
M_A_DQ22 AR57 SA_DQ21 SA_BA2 M_B_DQ21 AN29 SB_DQ20 SB_BA1 AU49
SA_DQ22 M_A_A[15:0] 14 SB_DQ21 SB_BA2 M_B_BS#2 15
M_A_DQ23 AN57 AU36 M_A_A0 M_B_DQ22 AR28 M_B_A[15:0] 15
M_A_DQ24 AP55 SA_DQ23 SA_MA0 AY37 M_A_A1 M_B_DQ23 AP28 SB_DQ22 AP40 M_B_A0
M_A_DQ25 AR55 SA_DQ24 SA_MA1 AR38 M_A_A2 M_B_DQ24 AN26 SB_DQ23 SB_MA0 AR40 M_B_A1
M_A_DQ26 AM54 SA_DQ25 SA_MA2 AP36 M_A_A3 M_B_DQ25 AR26 SB_DQ24 SB_MA1 AP42 M_B_A2
M_A_DQ27 AK54 SA_DQ26 SA_MA3 AU39 M_A_A4 M_B_DQ26 AR25 SB_DQ25 SB_MA2 AR42 M_B_A3
M_A_DQ28 AL55 SA_DQ27 SA_MA4 AR36 M_A_A5 M_B_DQ27 AP25 SB_DQ26 SB_MA3 AR45 M_B_A4
M_A_DQ29 AK55 SA_DQ28 SA_MA5 AV40 M_A_A6 M_B_DQ28 AK26 SB_DQ27 SB_MA4 AP45 M_B_A5
M_A_DQ30 AR54 SA_DQ29 SA_MA6 AW39M_A_A7 M_B_DQ29 AM26 SB_DQ28 SB_MA5 AW46M_B_A6
M_A_DQ31 AN54 SA_DQ30 DDR CHANNEL A SA_MA7 AY39 M_A_A8 M_B_DQ30 AK25 SB_DQ29 SB_MA6 AY46 M_B_A7
M_A_DQ32 AY58 SA_DQ31 SA_MA8 AU40 M_A_A9 M_B_DQ31 AL25 SB_DQ30 SB_MA7 AY47 M_B_A8
M_A_DQ33 AW58 SA_DQ32 SA_MA9 AP35 M_A_A10 M_B_DQ32 AY23 SB_DQ31 DDR CHANNEL B SB_MA8 AU46 M_B_A9
M_A_DQ34 AY56 SA_DQ33 SA_MA10 AW41M_A_A11 M_B_DQ33 AW23 SB_DQ32 SB_MA9 AK36 M_B_A10
M_A_DQ35 AW56 SA_DQ34 SA_MA11 AU41 M_A_A12 M_B_DQ34 AY21 SB_DQ33 SB_MA10 AV47 M_B_A11
M_A_DQ36 AV58 SA_DQ35 SA_MA12 AR35 M_A_A13 M_B_DQ35 AW21 SB_DQ34 SB_MA11 AU47 M_B_A12
M_A_DQ37 AU58 SA_DQ36 SA_MA13 AV42 M_A_A14 M_B_DQ36 AV23 SB_DQ35 SB_MA12 AK33 M_B_A13
C M_A_DQ38 AV56 SA_DQ37 SA_MA14 AU42 M_A_A15 M_B_DQ37 AU23 SB_DQ36 SB_MA13 AR46 M_B_A14 C
M_A_DQ39 AU56 SA_DQ38 SA_MA15 M_B_DQ38 AV21 SB_DQ37 SB_MA14 AP46 M_B_A15
SA_DQ39 M_A_DQS#[7:0] 14 SB_DQ38 SB_MA15
M_A_DQ40 AY54 AJ61 M_A_DQS#0 M_B_DQ39 AU21 M_B_DQS#[7:0] 15
M_A_DQ41 AW54 SA_DQ40 SA_DQSN0 AN62 M_A_DQS#1 M_B_DQ40 AY19 SB_DQ39 AW30 M_B_DQS#0
M_A_DQ42 AY52 SA_DQ41 SA_DQSN1 AM58 M_A_DQS#2 M_B_DQ41 AW19 SB_DQ40 SB_DQSN0 AV26 M_B_DQS#1
M_A_DQ43 AW52 SA_DQ42 SA_DQSN2 AM55 M_A_DQS#3 M_B_DQ42 AY17 SB_DQ41 SB_DQSN1 AN28 M_B_DQS#2
M_A_DQ44 AV54 SA_DQ43 SA_DQSN3 AV57 M_A_DQS#4 M_B_DQ43 AW17 SB_DQ42 SB_DQSN2 AN25 M_B_DQS#3
M_A_DQ45 AU54 SA_DQ44 SA_DQSN4 AV53 M_A_DQS#5 M_B_DQ44 AV19 SB_DQ43 SB_DQSN3 AW22 M_B_DQS#4
M_A_DQ46 AV52 SA_DQ45 SA_DQSN5 AL43 M_A_DQS#6 M_B_DQ45 AU19 SB_DQ44 SB_DQSN4 AV18 M_B_DQS#5
M_A_DQ47 AU52 SA_DQ46 SA_DQSN6 AL48 M_A_DQS#7 M_B_DQ46 AV17 SB_DQ45 SB_DQSN5 AN21 M_B_DQS#6
M_A_DQ48 AK40 SA_DQ47 SA_DQSN7 M_B_DQ47 AU17 SB_DQ46 SB_DQSN6 AN18 M_B_DQS#7
SA_DQ48 M_A_DQS[7:0] 14 SB_DQ47 SB_DQSN7
M_A_DQ49 AK42 AJ62 M_A_DQS0 M_B_DQ48 AR21 M_B_DQS[7:0] 15
M_A_DQ50 AM43 SA_DQ49 SA_DQSP0 AN61 M_A_DQS1 M_B_DQ49 AR22 SB_DQ48 AV30 M_B_DQS0
M_A_DQ51 AM45 SA_DQ50 SA_DQSP1 AN58 M_A_DQS2 M_B_DQ50 AL21 SB_DQ49 SB_DQSP0 AW26 M_B_DQS1
M_A_DQ52 AK45 SA_DQ51 SA_DQSP2 AN55 M_A_DQS3 M_B_DQ51 AM22 SB_DQ50 SB_DQSP1 AM28 M_B_DQS2
M_A_DQ53 AK43 SA_DQ52 SA_DQSP3 AW57 M_A_DQS4 M_B_DQ52 AN22 SB_DQ51 SB_DQSP2 AM25 M_B_DQS3
M_A_DQ54 AM40 SA_DQ53 SA_DQSP4 AW53 M_A_DQS5 M_B_DQ53 AP21 SB_DQ52 SB_DQSP3 AV22 M_B_DQS4
M_A_DQ55 AM42 SA_DQ54 SA_DQSP5 AL42 M_A_DQS6 M_B_DQ54 AK21 SB_DQ53 SB_DQSP4 AW18 M_B_DQS5
M_A_DQ56 AM46 SA_DQ55 SA_DQSP6 AL49 M_A_DQS7 M_B_DQ55 AK22 SB_DQ54 SB_DQSP5 AM21 M_B_DQS6
M_A_DQ57 AK46 SA_DQ56 SA_DQSP7 M_B_DQ56 AN20 SB_DQ55 SB_DQSP6 AM18 M_B_DQS7
M_A_DQ58 AM49 SA_DQ57 AP49 M_B_DQ57 AR20 SB_DQ56 SB_DQSP7
SA_DQ58 SM_VREF_CA +VREF_CA_CPU SB_DQ57
M_A_DQ59 AK49 AR51 +VREFDQ_SA_M3 M_B_DQ58 AK18
M_A_DQ60 AM48 SA_DQ59 SM_VREF_DQ0 AP51 M_B_DQ59 AL18 SB_DQ58
SA_DQ60 SM_VREF_DQ1 +VREFDQ_SB_M3 SB_DQ59
M_A_DQ61 AK48 M_B_DQ60 AK20
M_A_DQ62 AM51 SA_DQ61 M_B_DQ61 AM20 SB_DQ60
M_A_DQ63 AK51 SA_DQ62 M_B_DQ62 AR18 SB_DQ61
SA_DQ63 M_B_DQ63 AP18 SB_DQ62
SB_DQ63

B B

3 OF 19 4 OF 19

A A

Quanta Computer Inc.


PROJECT : Z8C
Size Document Number Rev
Haswell 2/5 (DDR3 I/F) 3A

Date: Saturday, November 15, 2014 Sheet 3 of 48


5 4 3 2 1
5 4 3 2 1

04
H_PECI (50ohm)
Haswell ULT (SIDEBAND)
Route on microstrip only
D
Spacing >18 mils D
Trace Length: 0.4~6.125 iches

H_PWRGOOD (50ohm)
Trace Length: 1~11.25 inches HSW_ULT_DDR3L
U45B

CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches PROC_DETECT D61
TP116 PROC_DETECT
CATERR# K61 MISC
TP28 N62 CATERR J62
35 H_PECI H_PECI XDP_PRDY# XDP_PRDY# 13
PECI PRDY K62 XDP_PREQ#
PREQ XDP_PREQ# 13
E60 XDP_TCK0 TCK,TMS
PROC_TCK E61 XDP_TCK0 8,13
XDP_TMS_CPU Trace Length < 9000mils
H_PROCHOT# R542 56_4 H_PROCHOT#_R K63 JTAG PROC_TMS E59 XDP_TRST# XDP_TMS_CPU 13
35,36,40 H_PROCHOT# PROCHOT PROC_TRST XDP_TRST# 8,13
THERMAL F63 XDP_TDI_CPU
PROC_TDI F62 XDP_TDO_CPU XDP_TDI_CPU 13
PROC_TDO XDP_TDO_CPU 13
H_PWRGOOD_R C61
PROCPWRGD PWR
J60 XDP_BPM#0
BPM#0 H60 XDP_BPM#0 13
XDP_BPM#1
BPM#1 XDP_BPM#1 13
SM_RCOMP[0:2] H61 XDP_BPM#2 BPM#[0:7]
BPM#2 H62 TP118
Trace length < 500 mils XDP_BPM#3 Trace Length 1~6 inches
BPM#3 TP119
SM_RCOMP_0 AU60 K59 XDP_BPM#4
Trace width = 12~15 mils SM_RCOMP_1 AV60 SM_RCOMP0 DDR3L BPM#4 H63 XDP_BPM#5
TP21 Length match < 300 mils
Trace spacing = 20 mils SM_RCOMP_2 AU61 SM_RCOMP1 BPM#5 K60 XDP_BPM#6
TP117
C TP23 C
AV15 SM_RCOMP2 BPM#6 J61
CPU_DRAMRST#
SM_DRAMRST DSW BPM#7
XDP_BPM#7
TP16
DDR_PG_CTRL AV61
SM_PG_CNTL1

2 OF 19

B B

DRAM COMP XDP PU/PD DDR3L ODT GENERATION +1.35V_SUS


+1.05V_VCCST
R639 200/F_4 SM_RCOMP_0 +5V_S5 U23
XDP_TDO_CPU R103 51_4
5 1
VCC NC

1
R645 120/F_4 SM_RCOMP_1

1
XDP_TCK0 R152 51_4
XDP_TRST# R644 *51_4 R280 C299 2 R649 *SHORT_4 DDR_PG_CTRL
R640 100/F_4 SM_RCOMP_2 220K/F_4 0.1u/10V_4 A

2
2
4 3
39 DDR_VTTT_PG_CTRL Y GND

+1.35V_SUS 74AUP1G07GW

PU/PD of CPU DRAMRST

3
+1.35V_SUS
+VCCIO_OUT 2 Q25
2N7002K
1

H_PROCHOT# R546 *62_4


R375 R709 66.5/F_4 M_B_ODT0_DIMM 15
+1.05V_VCCST 470_4

1
A R710 66.5/F_4 A
M_B_ODT1_DIMM 15
R548 62_4
CPU DRAM
2

CPU_DRAMRST# R376 *SHORT_4 DDR3_DRAMRST# 14,15


Quanta Computer Inc.
1

H_PWRGOOD_R R508 10K_4 C460


*0.1u/10V_4
PROJECT : Z8C
2

Size Document Number Rev


3A
Haswell 1/5 (PEG/DMI/FDI)
Date: Saturday, November 15, 2014 Sheet 4 of 48
5 4 3 2 1
5 4 3 2 1

VDDQ Output Decoupling Recommendations


VCCST PWRGD
330uFx2
22uFx11
10uFx10
7343
0805
0805
BOT socket side
5 onTOP, 6 on BOT inside socket cavity
5 onTOP, 5 on BOT inside socket cavity +1.05V_VCCST
CRB is via +1.05V PG
+3V_S5

5
U42

1
05
VCC NC
C623
R499 0.1u/10V_4 2 VCCST_PWRGD_EN
10K_4 A

D
+1.35V_SUS Haswell ULT (POWER) VCCST_PWRGD R497 *SHORT0402 4
VCCST_PWRGD_R
Y GND
3 D

C622 74AUP1G07GW
*0.1u/10V_4
+ C572
*470u/2V_7343 R521 *0_4 HWPG_1.05V_EC

3
HSW_ULT_DDR3L
U45L
+1.35V_CPU 1.4A +VCCIN 32A Q39 Reserve from EC
TP24 ULT_RVSD_61 L59 C36
RSVD VCC +VCCIN
+1.35V_CPU TP15 ULT_RVSD_62 J58 C40 B-stage DNP 2 HWPG_1.05V_EC# 35
RSVD VCC C44
AH26 VCC C48 C210 C60 C93 C606 C246 C95
C269 C270 C272 C271 C243 C244 AJ31 VDDQ VCC C52 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 *2N7002K
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 AJ33 VDDQ VCC C56

1
AJ37 VDDQ VCC E23
AN33 VDDQ VCC E25
AP43 VDDQ VCC E27
AR48 VDDQ VCC E29 R518 *SHORT0402
VDDQ VCC PCH_PWROK 7,35
+ AY35 E31 VCCST_PWRGD_EN
C291 C276 C242 C268 C245 AY40 VDDQ VCC E33 C228 C602 C219 C224 C220 R519 *0_4
VDDQ VCC APWORK 7,35
*470u/2V_7343 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 AY44 E35 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8
AY50 VDDQ VCC E37
VDDQ VCC E39
F59 VCC E41
+VCCIN VCC VCC
TP31 ULT_RVSD_63 N58 E43
R522 100/F_4 ULT_RVSD_64 AC58 RSVD VCC E45
+VCCIN TP56 RSVD VCC
C E47 C
R526 *SHORT_4 VCC_SENSE_R E63 VCC E49 C607 C179 C59 C181 C177 C183
40 VCC_SENSE VCC_SENSE VCC
TP58 ULT_RVSD_65 AB23 E51 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8
A59 RSVD VCC E53
300mA +VCCIO_OUT VCCIO_OUT VCC
300mA E20 E55 +1.05V +VCCIO_OUT
+VCCIOA_OUT VCCIOA_OUT VCC
TP59 ULT_RVSD_66 AD23 E57
ULT_RVSD_67 AA23 RSVD VCC F24 R495 *0_8
TP66 RSVD VCC
TP73 ULT_RVSD_68 AE59 F28
R506 *10K_4 RSVD VCC F32
+1.05V_VCCST VCC
H_CPU_SVIDART# L62 F36 C222 C185 C184 C182 C221 C223 C621
VRON_CPU R507 10K_4 IMVP_PWRGD H_CPU_SVIDCLK N63 VIDALERT HSW ULT POWER VCC F40 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 *4.7u/6.3V_6
H_CPU_SVIDDAT L63 VIDSCLK VCC F44
VCCST_PWRGD B59 VIDSOUT VCC F48
13 VCCST_PWRGD F60 VCCST_PWRGD VCC F52
VRON_CPU
40 VRON_CPU IMVP_PWRGD C59 VR_EN VCC F56
10,40 IMVP_PWRGD VR_READY VCC G23
D63 VCC G25
R127 *SHORT_4 PWR_DEBUG_R H59 VSS VCC G27 C595 C180 C90 C586 C94 C605
13 PWR_DEBUG PWR_DEBUG VCC
P62 G29 22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8
R109 150_6 ULT_RVSD_69 P60 VSS VCC G31
+1.05V_VCCST TP29 RSVD_TP VCC
ULT_RVSD_70 P61 G33
TP27
ULT_RVSD_71 N59 RSVD_TP VCC G35 SVID Layout note: need routing together
TP25 RSVD_TP VCC and ALERT need between CLK and DATA.
TP125 ULT_RVSD_72 N61 G37
ULT_RVSD_73 T59 RSVD_TP VCC G39
TP37 RSVD VCC
TP72 ULT_RVSD_74 AD60 G41
ULT_RVSD_75 AD59 RSVD VCC G43 +VCCIO_OUT +1.05V_VCCST
TP75 RSVD VCC VCC Output Decoupling Recommendations
TP49 ULT_RVSD_76 AA59 G45
ULT_RVSD_77 AE60 RSVD VCC G47
TP54 RSVD VCC 470uFx4 7343 TOP socket side
B TP57 ULT_RVSD_78 AC59 G49 B
ULT_RVSD_79 AG58 RSVD VCC G51
TP71 RSVD VCC 22uFx8 0805 4 on TOP, 4 on BOT near socket edge
TP34 ULT_RVSD_80 U59 G53 R555 R554
ULT_RVSD_81 V59 RSVD VCC G55 *130/F_4 130/F_4
TP50 RSVD VCC 22uFx11 0805 TOP, inside socket cavity
G57
AC22 VCC H23 H_CPU_SVIDDAT R558 *SHORT_4
VCCST VCC 10uFx11 0805 BOT, inside socket cavity VR_SVID_DATA 40
+1.05V +1.05V_VCCST AE22 J23
AE23 VCCST VCC K23
+1.05V_VCCST VCCST VCC Place PU resistor
R144 *SHORT_8 K57 close to CPU
AB57 VCC L22 +1.05V_VCCST +VCCIO_OUT
AD57 VCC VCC M23
C241 AG57 VCC VCC M57
*4.7u/6.3V_6 C24 VCC VCC P57
C28 VCC VCC U57
VCC VCC Place PU resistor
C32 W57 close to CPU R578 R568
+VCCIN VCC VCC 75_4 *75_4
12 OF 19
H_CPU_SVIDART# R565 43_4 VR_SVID_ALERT# 40

+3V
HWPG_1.05V for DDR=1.5V
H_CPU_SVIDCLK R579 *SHORT_4 VR_SVID_CLK 40
+3V
R402
*4.7K_4
A A
R399
HWPG_1.05V 35
*4.7K_4
3
3

R400
R401 *4.7K_4 2 2
+1.05V *100K/F_4
Quanta Computer Inc.
Q33
1

C493 *MMBT3904-7-F C492 Q34


PROJECT : Z8C
1

*1000p/50V_4 *1000p/50V_4 *DTC144EU


10/30 reserve Size Document Number Rev
DDR=1.5V ,This block POP Haswell 4/5 (POWER) 3A

Date: Saturday, November 15, 2014 Sheet 5 of 48


5 4 3 2 1
5 4 3 2 1

Haswell ULT (CFG,RSVD)


U45S HSW_ULT_DDR3L
06
D CFG0 AC60 AV63 D
13 CFG0 CFG0 RSVD_TP
CFG1 AC62 AU63
13 CFG1 CFG1 RSVD_TP
CFG2 AC63
13 CFG2 CFG2
13 CFG3 CFG3 AA63
CFG4 AA60 CFG3 C63
8,13 CFG4 CFG4 RSVD_TP
13 CFG5 CFG5 Y62 C62
CFG6 Y61 CFG5 RSVD_TP B43
13 CFG6 CFG6 RSVD
CFG7 Y60
13 CFG7 CFG7
13 CFG8 CFG8 V62 A51
CFG9 V61 CFG8 RSVD_TP B51
13 CFG9 CFG9 RSVD_TP
13 CFG10 CFG10 V60
CFG11 U60 CFG10 L60
13 CFG11 CFG11 RSVD_TP
CFG12 T63
13 CFG12 CFG12 RESERVED
13 CFG13 CFG13 T62 N60
CFG14 T61 CFG13 RSVD
13 CFG14 CFG14
13 CFG15 CFG15 T60 W23
CFG15 RSVD Y22
NOA_STBN_0 AA62 RSVD AY15 OPI_COMP1 R654 49.9/F_4
13 NOA_STBN_0 CFG16 PROC_OPI_RCOMP
NOA_STBN_1 U63
13 NOA_STBN_1 AA61 CFG18 AV62
NOA_STBP_0
13 NOA_STBP_0 CFG17 RSVD
NOA_STBP_1 U62 D58
13 NOA_STBP_1 CFG19 RSVD
R129 49.9/F_4 CFG_RCOMP V63 P22
CFG_RCOMP VSS N21
C VSS C
A5
RSVD P20
E1 RSVD R20
D1 RSVD RSVD
J20 RSVD
H18 RSVD
R511 8.2K_4 TD_IREF B12 RSVD
TD_IREF
19 OF 19

Processor Strapping
1 0
CFG0 CFG0
(DEFAULT) NORMAL OPERATION; NO STALL STALL R153 *1K_4
EAR-STALL/NOT STALL RESET SEQUENCE
AFTER PCU PLL IS LOCKED
CFG1 CFG1
(DEFAULT) NORMAL OPERATION PCH-LESS MODE R136 *1K_4
PCH/ PCH LESS MODE SELECTION
B B

CFG3 DISABLED ENABLED CFG3 R142 *1K_4


PHYSICAL_DEBUG_ENABLED (DFX PRIVACY) NO PHYSICAL DISPLAY PORT ATTACHED AN EXTERNAL DISPLAY PORT DEVICE IS
TO CONNECTED
EMBEDDED DISPLAY PORT TO THE EMBEDDED DISPLAY PORT

CFG 8 DISABLED(DEFAULT); IN THIS CASE, NOA ENABLED; NOA WILL BE AVAILABLE


ALLOW THE USE OF NOA ON LOCKED UNITS WILL BE DISABLED IN LOCKED UNITS AND REGARDLESS OF THE LOCKING OF THE UNIT CFG8 R125 *1K_4
ENABLED IN UN-LOCKED UNITS

CFG9 NO VR SUPPORTING SVID IS PRESENT. THE CFG9


VRS SUPPORTING SVID PROTOCOL ARE R126 *1K_4
NO SVID PROTOCOL CAPABLE VR CHIP WILL NOT GENERATE (OR RESPOND TO)
CONNECTED PRESENT SVID ACTIVITY

A A
CFG10 POWER FEATURES ACTIVATED POWER FEATURES (ESPECIALLY CLOCK
CFG10 R135 *1K_4
SAFE MODE BOOT DURING RESET GATINE ARE NOT ACTIVATED
Quanta Computer Inc.
PROJECT : Z8C
Size Document Number Rev
3A
Haswell 5/5 (CFG/GND)
Date: Saturday, November 15, 2014 Sheet 6 of 48
5 4 3 2 1
5 4 3 2 1

Haswell ULT PCH (PM)


35

13
PCH_SUSACK#

SYS_RESET#
PCH_SUSPWRACK R615
R620 *0_4

*0_4 SUSACK#_R
SYS_RESET#
AK2
U45H HSW_ULT_DDR3L

SYSTEM POWER MANAGEMENT

AW7 DSWVREN
Deep Sx
DSWVREN 8
07
C660 *1u/6.3V_4 AC3 SUSACK DSWVRMEN AV5 DPWROK_R R681 *0_4
SYS_RESET DPWROK DPWROK 35
SYS_PWROK R601 *SHORT_4 SYS_PWROK_R AG2
SYS_PWROK DSW WAKE
AJ5 PCIE_LAN_WAKE# PCIE_LAN_WAKE# 27,29
D R673 *0_4 R661 *0_4 EC_PWROK_R AY7 D
EC_PWROK R656 *0_4 R653 *0_4 APWROK_R AB5 PCH_PWROK
AG7 APWROK V5
PLTRST +3V_S5 +3V
PCI_PLTRST# CLKRUN# CLKRUN# 28,35
35 PCI_PLTRST# CLKRUN/GPIO32
+3V_S5 SUS_STAT/GPIO61
AG4
TP76
+3V_S5 SUSCLK/GPIO62
AE6 PCH_SUSCLK R689 0_4
PCH_WIFI_SUSCLK# 27
DSW AP5 PCH_SLP_S5# PCH_SLP_S5# 13
R678 *SHORT_4 PCH_RSMRST# AW6 SLP_S5/GPIO63
35 RSMRST# RSMRST
35 PCH_SUSPWARN# R616 *SHORT_4PCH_SUSPWRACK AV4 +3V_S5
SUSWARN/SUSPWRDNACK/GPIO30
35 DNBSWON# R236 *SHORT_4 PCH_PWRBTN# AL7
PWRBTN DSW DSW SLP_S4
AJ6 SUSC# SUSC# 13,35
ACPRESENT/GPIO31 DSW DSW
36 ACPRESENT R239 *SHORT_4 PCH_ACPRESENT AJ8 AT4 SUSB# SUSB# 13,35
AN4 SLP_S3 AL5
PCH_BATLOW#
BATLOW/GPIO72 DSW DSW SLP_A
PCH_SLP_A# PCH_SLP_A# 13
13 PCH_SLP_S0#
R598 *SHORT_4 PCH_SLP_S0#_R AF3
SLP_S0 +3V_S5 DSW SLP_SUS
AP4 PCH_SLP_SUS#
PCH_SLP_SUS# 35
PCH_SLP_WLAN# AM5 DSW DSW AJ7 PCH_SLP_LAN#
TP79 SLP_WLAN/GPIO29 SLP_LAN TP67

8 OF 19

C C
Power Sequence R377 *SHORT_4 APWROK_R
5,35 APWORK
5,35 PCH_PWROK R352 *SHORT_4 EC_PWROK_R

EC_PWROK R666 *0_4 SYS_PWROK_R


R356 Speed up 250ms to boot up R379

100K_4
RSMRST# R679 *SHORT_4 DPWROK_R for EC power on 250 ms 10K_4

Non Deep Sx

PCH PM PU/PD PLTRST# Buffer Deep Sx Circuit Non Deep Sx


+3V +3V
R273 *SHORT_6
C266 0.1u/10V_4
CLKRUN# R131 8.2K_4 +3V_S5 +3VCC_S5
5

SYS_RESET# R581 10K_4


2 1 3
4 PLTRST# 13,16,27,28,29,35
B PCI_PLTRST# 1 R277 Q23 B
PCH_RSMRST# R663 10K_4 C307 *100K_4 *AO3413

2
SYS_PWROK R687 *10K_4 U20 *0.33u/10V_6
3

DPWROK_R R680 100K/F_4 TC7SH08FU R198


100K_4

R278
*SHORT_6
+3V_S5

3
PCH_SUSPWRACK R650 *10K_4
SYSPWOK
+3V_S5 PCH_SLP_SUS# 2

Follow ZQ0 +3V_S5 C677 *0.1u/10V_4 Q24


*2N7002K
PCH_ACPRESENT R219 10K_4

1
5

PCH_BATLOW# R226 8.2K_4


PCIE_LAN_WAKE# R228 *10K_4 2 EC_PWROK EC_PWROK 35
PCH_PWRBTN# R221 *10K_4 13 SYS_PWROK SYS_PWROK 4
1 IMVP_PWRGD_3V 10
A +3VPCU A

U47
3

R234 *10K_4 TC7SH08FU R674


R237
R238
*8.2K_4
1K_4 R683 *0_4
10K_4 Quanta Computer Inc.
R235 *10K_4
PROJECT : Z8C
Size Document Number Rev
3A
LPT 1/6 (DMI/FDI/VGA)
Date: Saturday, November 15, 2014 Sheet 7 of 48
5 4 3 2 1
5 4 3 2 1

RTC Clock 32.768KHz (RTC)

08
C664 15p/50V_4 RTC_X1
Haswell ULT PCH (RTC/HDA/SATA/SPI)

1
Y5 R655
Haswell ULT PCH(LPC,SPI,SMBUS,C-LINK,THERMAL)
32.768KHZ 10M_4

C665 15p/50V_4 RTC_X2

2
HSW_ULT_DDR3L HSW_ULT_DDR3L
U45E U45G
RTC Circuitry (RTC) +3V_RTC
D D
Trace width = 30 mils 27,28,35 LPC_LAD0 AU14
LAD0 +3V_S5 SMBALERT/GPIO11 AN2 SMBALERT#
D15 +3V_RTC RTC_X1 AW5 27,28,35 LPC_LAD1 AW12 +3V_S5 AP2 SMB_PCH_CLK
AY5 RTCX1 AY12 LAD1 SMBCLK AH1
+3VPCU R349 *SHORT_6 +3V_RTC_2 R726 RTC_X2
RTCX2 27,28,35 LPC_LAD2 LAD2
LPC
SMBUS
+3V_S5 SMBDATA
SMB_PCH_DAT
RTC_RST# +3V_RTC R665 1M_4 SM_INTRUDER# AU6
INTRUDER SATA_RN0/PERN6_L3
J5
SATA_RXN0 28 27,28,35 LPC_LAD3
AW11
LAD3 +3V_S5 SML0ALERT/GPIO60 AL2 SMB0ALERT#
+3V_RTC_0 R336 1K_4 +3V_RTC_1 PCH_INTVRMEN AV7
INTVRMEN SATA_RP0/PERP6_L3
H5
SATA_RXP0 28 27,28,35 LPC_LFRAME#
AV12
LFRAME +3V_S5 SML0CLK
AN1 SMB_ME0_CLK

1
20K/F_4 SRTC_RST# AV6
SRTCRST
RTC
SATA_TN0/PETN6_L3
B15
SATA_TXN0 28 HDD +3V_S5 SML0DATA
AK1 SMB_ME0_DAT
BAT54C
13 RTC_RST#
RTC_RST# AU7
RTCRST SATA_TP0/PETP6_L3
A15
SATA_TXP0 28 +3V_S5 SML1ALERT/PCHHOT/GPIO73
AU4 SMB1ALERT#
C711 J2 +3V_S5 AU3 SMB_ME1_CLK
SML1CLK/GPIO75
+3V_RTC_[0:2] 1u/6.3V_4 *JUMP J8 +3V_S5 AH3 SMB_ME1_DAT

2
SATA_RN1/PERN6_L2 H8 PCH_SPI_CLK AA3 SML1DATA/GPIO74
Trace width = 20 mils R722 SATA_RP1/PERP6_L2 A17 PCH_SPI_CS0# Y7 SPI_CLK AF2 CL_CLK
SATA_TN1/PETN6_L2 Remove mSATA SPI_CS0 CL_CLK TP135
1

SRTC_RST# B17 PCH_SPI_CS1# Y4 AD2 CL_DAT


SATA_TP1/PETP6_L2 TP48 AC2 SPI_CS1 CL_DATA AF4 CL_RST# TP133
CN9 SPI C-LINK
AW8 J6 AA2 SPI_CS2 CL_RST TP140
BAT_CONN 20K/F_4 HDA_BCLK_R TP14 PCH_SPI_SI
HDA_SYNC_R AV11 HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 H6 PCH_SPI_SO AA4 SPI_MOSI
TP9
2

C716 C710 HDA_RST#_R AU8 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 B14 PCH_SPI_IO2 Y6 SPI_MISO


HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1 TP6 SPI_IO2
1u/6.3V_4 1u/6.3V_4 AY10 AUDIO SATA C15 PCH_SPI_IO3 AF1
31 PCH_AZ_CODEC_SDIN0 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1 TP4 SPI_IO3
AU12
HDA_SDO_R AU11 HDA_SDI1/I2S1_RXD F5
AW10 HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0 E5 7 OF 19
AV10 HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 C17
AY8 HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 D17
HDA31 PCH_AZ_CODEC_RST# R659 33_4 HDA_RST#_R I2S1_SCLK SATA_TP3/PETP6_L0
SATA_RCOMP
31 PCH_AZ_CODEC_SDOUT R657 33_4 HDA_SDO_R +3V SATA0GP/GPIO34
V1 VGPU_EN VGPU_EN 42 Impedance = 50 ohm
+3V SATA1GP/GPIO35
U1 SYS_COM_REQ TP39 Trace length < 500 mils
+3V
SMBus +3V_S5
31 PCH_AZ_CODEC_BITCLK R652 33_4 HDA_BCLK_R +3V SATA2GP/GPIO36
V6 GPIO36
TP36 Trace spacing = 15 mils
+3V AC1 GPIO37 SYS_COM_REQ R137 *10K_4
AU62 SATA3GP/GPIO37 TP134
4,13 XDP_TRST# PCH_TRST
C C679 XDP_TCK1 AE62 A12 SATA_IREF R512 *SHORT_4 +V1.05S_ASATA3PLL R636 10K_4 SMB0ALERT# C
13 XDP_TCK1 PCH_TCK SATA_IREF
*10p/50V_4 13 XDP_TDI XDP_TDI AD61 L11 IV@10K_4 R557 VGPU_EN *10K_4 R560 R651 10K_4 SMB1ALERT#
R162 *SHORT_4 PCH_JTAG_TDOAE61 PCH_TDI RSVD K10 *10K_4 R120 GPIO36 10K_4 R134 R643 10K_4 SMBALERT#
13 XDP_TDO PCH_TDO RSVD
AD62 JTAG C12 SATA_RCOMP R513 3.01K/F_4 *10K_4 R595 GPIO37 10K_4 R599
13 XDP_TMS PCH_TMS SATA_RCOMP +V1.05S_ASATA3PLL
AL11 U3 SATA_LED# R575 10K_4
RSVD SATALED +3V
R684 33_4 HDA_SYNC_R AC4
31 PCH_AZ_CODEC_SYNC RSVD
4,13 XDP_TCK0 R597 *SHORT_4 PCH_JTAGX AE63 R255 2.2K_4 SMB_PCH_CLK
C678 *10p/50V_4 AV2 JTAGX R244 2.2K_4 SMB_PCH_DAT
RSVD R622 2.2K_4 SMB_ME0_CLK
R619 2.2K_4 SMB_ME0_DAT
+5V_S5 PCH Quad SPI ROM
20MIL
1 3VCCRTC_3 R795 *4.7K_4VCCRTC_4 R797 *4.7K_4
PCH JTAG +3V_RTC_0 5 OF 19

JTAG_TCK,JTAG_TMS MP remove(Intel) Q42 (Default for WIN8)


*MMBT3904 +3V
Trace Length < 9000mils
2

R794
+1.05V_S5 *68.1K/F_4

XDP_TMS R150 51_4


XDP_TDI R151 51_4 R257 R241
PCH_JTAG_TDO
PCH_JTAGX
R164
R594
51_4
*1K_4
+3V_S5 R494 *SHORT_6 +3V_PCH_ME SMBus(PCH) Q20
4.7K_4 4.7K_4

R796 5
XDP_TCK1 R602 *51_4 *150K/F_4
SMB_PCH_DAT 3 4
CLK_SDATA 13,14,15,33
+3V_PCH_ME R76 *10K_4
+3V_PCH_ME
U14 2
PCH_SPI_CS0# 1 8
B CS# VCC SMB_PCH_CLK 6 1 B

ULT Strapping Table PCH_SPI_SO R78


PCH_SPI_SO_EC R75
8M4M@15_4SPI_SO_8M2
8M@15_4 IO1/DO IO3/HOLD#
7 SPI_HOLD_IO3_ME R106 *1K_4
CLK_SCLK 13,14,15,33

Pin Name Strap description Sampled Configuration note


35 PCH_SPI_SO_EC
3
IO2/WP# CLK
6 SPI_CLK_8M R112 8M4M@15_4 PCH_SPI_CLK C157 PCH_XDP_WLAN/S5 2N7002DW DDR_TP/S0
0 = Default enable (iPD 20K) 5 SPI_SI_8M R111 8M4M@15_4 PCH_SPI_SI 0.1u/10V_4
R580 *1K_4 SPKR 4 IO0/DI
GPIO81(SPKR) No reboot on TCO Timer PWROK +3V SPKR 10,31 GND
expiration 1 =Disable No-Reboot mode C193
0 = Default can program ME (iPD 20K) +3V_PCH_ME R77 *1K_4 SPI_WP_IO2_ME W25Q64FW -- 8MB *22p/50V_4 SMBus(EC) +3V_S5
HDA_SDO Flash Descriptor Security PWROK HDA_SDO_R R658 *SHORT_4
ME_WR# 35
Override / Intel ME Debug Mode 1 =can't program ME 35 PCH_SPI_CLK_EC PCH_SPI_CLK_EC R102 8M@15_4

35 PCH_SPI_SI_EC PCH_SPI_SI_EC R100 8M@15_4


INTVRMEN Integrated 1.05V VRM enable ALWAYS 1=Should be always pull-up +3V_RTC R676 330K_4 PCH_INTVRMEN R660 *330K_4 R260 R240
*2.2K_4 *2.2K_4
PCH_SPI_IO2 R74 8M4M@15_4 SPI_WP_IO2_ME Q19
0 = Default disable (iPD 20K) 10 GPIO66 5
GPIO66 Top-Block Swap override R517 *1K_4 GPIO66 R516 *1K_4 PCH_SPI_IO3 R105 8M4M@15_4 SPI_HOLD_IO3_ME 3 4 SMB_ME1_CLK
1 = Enable TBS function +3V 19,35 2ND_MBCLK

0 = Default SPI (iPD 20K) 10 GPIO86


2
GPIO86 Boot BIOS Strap Bit R99 *1K_4 GPIO86 R93 *1K_4
1 =LPC +3V
6 1 SMB_ME1_DAT
19,35 2ND_MBDATA
0 = Default enable w/o
confidentiality(iPD 20K)
10 GPIO15
EC/S5 *2N7002DW PCH/S5
GPIO15 TLS(Transport layer security) 35 SPI_CS0#_UR_ME R85 *8M@SHORT_4 PCH_SPI_CS0#
A 1 =Default enable with +3V_S5 R146 8.2K_4 GPIO15 R140 *1K_4 A
2ND_MBCLK R242 0_4 SMB_ME1_CLK
confidentiality 2ND_MBDATA R243 0_4 SMB_ME1_DAT

0 = Enable an external display +3V_PCH_ME


CFG4 port is connected to the eDP CFG4 R143 1K_4 R80 10K_4 SPI_CS0#_UR_ME
DP presence strap
1 =disable
6,13 CFG4
Quanta Computer Inc.
7 DSWVREN
PROJECT : Z8C
DSWVREN Deep Sx well on die VR enable 1=Should be always pull-up Size Document Number Rev
R677 330K_4 DSWVREN R662 *330K_4 3A
+3V_RTC LPT 2/6 (SATA/HDA/SPI)
Date: Saturday, November 15, 2014 Sheet 8 of 48
5 4 3 2 1
5 4 3 2 1

Haswell ULT PCH (PCIE,USB3.0,USB2.0) Haswell ULT PCH (CLOCK) XTAL24_IN C630 12p/50V_4
09

3
4
U45K HSW_ULT_DDR3L R501 Y3
1M_4 24MHz

16 PEG_RX#0
F10 DSW AN8 USBP0- 32

1
2
E10 PERN5_L0 USB2N0 AM8
16 PEG_RX0 PERP5_L0 DSW USB2P0 USBP0+ 32 MB USB3.0
D XTAL24_OUT D
16 PEG_TX#0 C633 EV@0.22u/10V_4 R_PEG_TX#0 C23 DSW AR7 USBP1- 32 C631 12p/50V_4
C22 PETN5_L0 USB2N1 AT7 HSW_ULT_DDR3L
16 PEG_TX0 C632 EV@0.22u/10V_4 R_PEG_TX0
PETP5_L0 DSW USB2P1 USBP1+ 32 MB USB3.0 U45F

16 PEG_RX#1 F8 DSW AR8 USBP2- 32


E8 PERN5_L1 USB2N2 AP8
16 PEG_RX1 PERP5_L1 DSW USB2P2 USBP2+ 32 DB USB2.0
PEG x4

16 PEG_TX#1 C614 EV@0.22u/10V_4 R_PEG_TX#1 B23 DSW AR10 USBP3- 32 TP106 CLK_PCIE_N0 C43 A25 XTAL24_IN
A23 PETN5_L1 USB2N3 AT10 C42 CLKOUT_PCIE_N0 XTAL24_IN B25 XTAL24_OUT
16 PEG_TX1 C615 EV@0.22u/10V_4 R_PEG_TX1
PETP5_L1 DSW USB2P3 USBP3+ 32 MB USB2.0 TP107 CLK_PCIE_P0
CLKOUT_PCIE_P0 XTAL24_OUT
TP126 CLK_PCIE_REQ0# U2 +3V
H10 AM15 PCIECLKRQ0/GPIO18 K21
DSW

WIGIG
16 PEG_RX#2 PERN5_L2 USB2N4 USBP4- 27 RSVD
16 PEG_RX2 G10 DSW AL15 USBP4+ 27 NGFF BT 27 CLK_PCIE_WIGIGN B41 M21
PERP5_L2 USB2P4 A41 CLKOUT_PCIE_N1 RSVD C26 ICLK_BIAS R500 3.01K/F_4
27 CLK_PCIE_WIGIGP CLKOUT_PCIE_P1 DIFFCLK_BIASREF +V1.05S_AXCK_LCPLL
16 PEG_TX#2 C637 EV@0.22u/10V_4 R_PEG_TX#2 B21 DSW AM13 27 PCIE_CLKREQ_WIGIG# R572 Y5
*SHORT_4CLK_PCIE_REQ1# +3V
PETN5_L2 USB2N5 USBP5- 25 PCIECLKRQ1/GPIO19
16 PEG_TX2 C638 EV@0.22u/10V_4 R_PEG_TX2 C21 DSW AN13 TP(reserve) C35 TESTLOW_C35
PETP5_L2 USB2P5 USBP5+ 25 C41 CLOCK TESTLOW_C35 C34 TESTLOW_C34

LAN
29 CLK_PCIE_LANN CLKOUT_PCIE_N2 TESTLOW_C34
16 PEG_RX#3 E6 DSW AP11 USBP6- 25 29 CLK_PCIE_LANP B42 AK8 TESTLOW_AK8
F6 PERN5_L3 USB2N6 AN11 CLK_PCIE_REQ2# AD1 CLKOUT_PCIE_P2 SIGNALS TESTLOW_AK8 AL8
16 PEG_RX3 PERP5_L3 DSW USB2P6 USBP6+ 25 CCD 29 CLK_PCIE_LAN_REQ# R600 *SHORT_4
PCIECLKRQ2/GPIO20 +3V TESTLOW_AL8
TESTLOW_AL8
TPM@22_4 R224 PCLK_TPM 28
C616 EV@0.22u/10V_4 R_PEG_TX#3 B22 DSW AR13 B38 AN15 CLK_PCH_PCI3 22_4 R223

VGA WIFI
16 PEG_TX#3 PETN5_L3 USB2N7 USBP7- 25 27 CLK_PCIE_WLANN CLKOUT_PCIE_N3 CLKOUT_LPC_0 CLK_PCI_LPC 27
16 PEG_TX3 C617 EV@0.22u/10V_4 R_PEG_TX3 A21 DSW AP13 USBP7+ 25 Fingerprint 27 CLK_PCIE_WLANP
C37 AP15 CLK_PCH_PCI4 22_4 R222 CLK_PCI_EC 35
PETP5_L3 USB2P7 CLK_PCIE_REQ3# N1 CLKOUT_PCIE_P3 CLKOUT_LPC_1
27 PCIE_CLKREQ_WLAN# R550 *SHORT_4
PCIECLKRQ3/GPIO21 +3V
29 PCIE_RX3-_LAN
G11 B35 CLK_PCIE_XDPN 13
F11 PERN3 G20 A39 CLKOUT_ITPXDP A35
29 PCIE_RX3+_LAN PERP3 USB3RN1 USB3_RXN0 32 16 CLK_PCIE_VGA# CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P CLK_PCIE_XDPP 13
H20 B39
LAN

USB3RP1 USB3_RXP0 32 16 CLK_PCIE_VGA CLKOUT_PCIE_P4


29 PCIE_TX3-_LAN C627 0.1u/10V_4 PCIE_TX3- C29 MB USB3.0 16 CLK_PEGA_REQ# R573 *SHORT_4
CLK_PCIE_REQ4# U5 +3V
B30 PETN3 PCIE USB C33 PCIECLKRQ4/GPIO22
29 PCIE_TX3+_LAN C626 0.1u/10V_4 PCIE_TX3+
PETP3 +3V_S5 USB3TN1 USB3_TXN0 32
C +3V_S5 B34 USB3_TXP0 32 B37 C
F13 USB3TP1 A37 CLKOUT_PCIE_N5
27 PCIE_RX4-_WLAN PERN4 CLKOUT_PCIE_P5
G13 E18 TP123 CLK_PCIE_REQ5# T2 +3V
WIFI

27 PCIE_RX4+_WLAN PERP4 USB3RN2 USB3_RXN1 32 PCIECLKRQ5/GPIO23


F18 USB3_RXP1 32
C613 0.1u/10V_4 PCIE_TX4- B29 USB3RP2
27 PCIE_TX4-_WLAN
A29 PETN4 B33
MB USB3.0
27 PCIE_TX4+_WLAN C612 0.1u/10V_4 PCIE_TX4+
PETP4 +3V_S5 USB3TN2 USB3_TXN1 32 6 OF 19
+3V_S5 A33 USB3_TXP1 32
G17 USB3TP2
TP157 PERN1/USB3RN3
TP159 F17
PERP1/USB3RP3
USBCOMP +3V
C30
TP158
C31 PETN1/USB3TN3 +3V_S5 AJ10 Impedance = 50 ohm
PETP1/USB3TP3 +3V_S5
TP160 USBCOMP R207 22.6/F_4
USBRBIAS AJ11 Trace length < 500 mils CLK_PCIE_REQ0# R576 10K_4
F15 USBRBIAS AN10 Trace spacing = 15 mils CLK_PCIE_REQ1# R582 10K_4
27 WIGIG_RX1-_WLAN PERN2/USB3RN4 RSVD
G15 AM10 CLK_PCIE_REQ2# R596 10K_4
USB Overcurrent
WIGIG

27 WIGIG_RX1+_WLAN PERP2/USB3RP4 RSVD CLK_PCIE_REQ3# R545 10K_4 CLK_PCI_EC CLK_PCI_LPC PCLK_TPM


B31
PETN2/USB3TN4 +3V_S5
27 WIGIG_TX1-_WLAN C625 WIGIG_TX3-0.1u/10V_4 CLK_PCIE_REQ5# R569 10K_4
WIGIG_TX3+0.1u/10V_4 A31 +3V_S5
PETP2/USB3TP4 +3V_S5
27 WIGIG_TX1+_WLAN C624
+3V_S5 AL3 USB_OC0# USB_OC0# 32 MB U3 RP2
OC0/GPIO40 AT1 USB_OC1# 10 1
+3V_S5 OC1/GPIO41 USB_OC1# 32 MB U2 DB U2 TESTLOW_C35 R504 10K_4 C288 C289 C290
+3V_S5 AH2 USB_OC2# USB_OC0# 9 2 TESTLOW_C34 R505 10K_4 *18p/50V_4 *18p/50V_4 *18p/50V_4
E15 OC2/GPIO42 AV3 USB_OC3# 8 3
RSVD +3V_S5 OC3/GPIO43
USB_OC1# TESTLOW_AK8 R225 10K_4
E13 USB_OC2# 7 4 TESTLOW_AL8 R233 10K_4
R510 3.01K/F_4 PCIE_RCOMP A27 RSVD USB_OC3# 6 5
R509 *SHORT_4 PCIE_IREF B27 PCIE_RCOMP
+V1.05S_AUSB3PLL PCIE_IREF 10K_10P8R

+3V
B B
11 OF 19
CLK_PCIE_REQ4# R577 10K_4
R571 *1K_4

A A

Quanta Computer Inc.


PROJECT : Z8C
Size Document Number Rev
3A
LPT 3/6 (PCIE/USB/CLK)
Date: Saturday, November 15, 2014 Sheet 9 of 48
5 4 3 2 1
5 4 3 2 1

PCH GPIO PU/PD

High Low
Haswell ULT PCH (GPIO,CPU/MISC,NCTF)
U45J HSW_ULT_DDR3L
10
+3V
GPIO8 Touch panel No touch panel IRQ_SERIRQ R114 10K_4
DEVSLP0 R132 *10K_4
D
BOARD_ID0 P1
BMBUSY/GPIO76 +3V THRMTRIP
D60 THRMTRIP# DEVSLP1 R544 *10K_4
D
25 GPIO8 GPIO8 AU2 +3V_S5 +3V V4 SIO_RCIN# SIO_RCIN# 35 SIO_RCIN# R139 10K_4
AM7 GPIO8 RCIN/GPIO82 T4
LAN_DISABLE#
LAN_PHY_PWR_CTRL/GPIO12 DSW SERIRQ
IRQ_SERIRQ IRQ_SERIRQ 28,35 SIO_EXT_SMI# R160 10K_4
AD6 AW15 OPI_COMP2
GPIO15 +3V_S5
GPIO15 CPU/ R664 49.9/F_4 SIO_EXT_SCI# R528 10K_4
8 GPIO15 PCH_OPI_RCOMP
Y1 AF20
GPIO16 +3V
SKU_ID0 MISC GPIO83 R156 10K_4
RSVD
GPIO17 +3V
18 DGPU_PWROK DGPU_PWROK T3 AB21 GPIO84 R108 10K_4
AD5 RSVD
GPIO24 +3V_S5
GPIO24 GPIO85 R158 10K_4
TP60
AN5
GPIO27 DSW
WK_GPIO27 GPIO87 R110 10K_4
AD7
GPIO28 +3V_S5
GPIO28 GPIO88 R157 10K_4
TP77
AN3
GPIO26 +3V_S5
ODD_PRSNT# GPIO89 R155 10K_4
+3V GSPI0_CS/GPIO83
R6 GPIO83 TP_INT_PCH 25 GPIO90 R539 10K_4
AG6 L6
GPIO56 +3V_S5 +3V
GPIO56 GPIO84 GPIO91 R533 10K_4
TP74 GSPI0_CLK/GPIO84
AP1 N6
GPIO57 +3V_S5 +3V
GPIO57 GPIO85 GPIO92 R159 10K_4
TP143 GSPI0_MISO/GPIO85
AL4 L8
GPIO58 +3V_S5 +3V
GPIO58 GPIO86 GPIO86 8 GPIO93 R529 10K_4
TP81 GSPI0_MOSI/GPIO86
AT5 R7
GPIO59 +3V_S5 +3V
GPIO59 GPIO87 GPIO94 R527 10K_4
TP83 GSPI1_CS/GPIO87
GPIO44 +3V_S5 +3V
GPIO44 AK4 GPIO L5 GPIO88 GPIO6 R98 10K_4
TP82 GSPI1_CLK/GPIO88
AB6 N7
GPIO47 +3V_S5 +3V
GPIO47 GPIO89 Follow ZQ0 GPIO7 R94 10K_4
TP51 GSPI1_MISO/GPIO89
DGPU_HOLD_RST# U4 K2
GPIO48 +3V +3V
16 DGPU_HOLD_RST# GPIO90 GPIO2 R534 *10K_4
Y3 GSPI_MOSI/GPIO90 J1
GPIO49 +3V +3V
43 DGPU_PWR_EN DGPU_PWR_EN GPIO91 R535 *EVG@10K_4 GPIO3 R531 *IV@10K_4
DGPU_PW_CTRL# P3 UART0_RXD/GPIO91 K3
GPIO50 +3V +3V GPIO92 GPIO4 R524 10K_4
UART0_TXD/GPIO92
HSIOPC/GPIO71 +3V +3V
MODPHY_EN Y2 J2 GPIO93 change GPIO port same as ZQ0 GPIO5 R525 10K_4
TP43 UART0_RTS/GPIO93
AT3 G1
GPIO13 +3V_S5 +3V
RAM_ID0 SERIAL IO GPIO94 GPIO64 R523 10K_4
AH4 UART0_CTS/GPIO94 K4
GPIO14 +3V_S5 +3V
RAM_ID3 SIO_EXT_SMI# SIO_EXT_SMI# 35 GPIO65 R97 10K_4
AM4 UART1_RXD/GPIO0 G2
GPIO25 DSW +3V
GPIO25 SIO_EXT_SCI# SIO_EXT_SCI# 35 GPIO67 R92 10K_4
TP142 UART1_TXD/GPIO1
AG5 J3
GPIO45 +3V_S5 +3V
GPIO45 GPIO2 DGPU_EVENT# 19 GPIO68 R91 10K_4
TP70 UART1_RST/GPIO2
GPIO46 +3V_S5 +3V
ACCEL_INTA AG3 J4 GPIO3 GC6_FB_EN 17,19 GPIO69 R520 10K_4
33 ACCEL_INTA UART1_CTS/GPIO3
C +3V F2 GPIO4 C
AM3 I2C0_SDA/GPIO4 F3
RAM_ID1
GPIO9 +3V_S5 +3V I2C0_SCL/GPIO5
GPIO5
AM2 G4
GPIO10 +3V_S5 +3V
RAM_ID2 GPIO6 GPU GC6 2.0 function use R592 *100K_4 DGPU_PWR_EN R593 10K_4
P2 I2C1_SDA/GPIO6 F1
28 DEVSLP0 DEVSLP0
DEVSLP0/GPIO33 +3V +3V I2C1_SCL/GPIO7
GPIO7 GPIO2/3.
BOARD_ID3 C4
SDIO_POWER_EN/GPIO70 +3V +3V SDIO_CLK/GPIO64
E3 GPIO64 DGPU_HOLD_RST# R586 10K_4
DEVSLP1 L2 +3V +3V F4 GPIO65
TP26 DEVSLP1/GPIO38 SDIO_CMD/GPIO65
SKU_ID1 N5 +3V +3V D3 GPIO66 GPIO66 8
V2 DEVSLP2/GPIO39 SDIO_D0/GPIO66 E4
8,31 SPKR SPKR
SPKR/GPIO81 +3V +3V SDIO_D1/GPIO67
GPIO67
+3V C3 GPIO68
SDIO_D2/GPIO68
DEVSLP0 for HDD +3V SDIO_D3/GPIO69
E2 GPIO69
high UMA Only
DEVSLP1 for mSATA 10 OF 19
GPU power is control by PCH
low GPIO (Discrete, SG or Optimize) +3V

Board ID RAM ID +3V_S5 CPU thermal trip R556 EV@100K_4 DGPU_PW_CTRL# R574 IV@1K_4

R647 10K_4 RAM_ID0 R646 *10K_4 +1.05V_VCCST R118 *10K_4 DGPU_PWROK


+3V R227 *10K_4 RAM_ID1 R214 10K_4
R638 10K_4 RAM_ID2 R637 *10K_4 DGPU_PWROK PD on GPU side

3
R642 10K_4 RAM_ID3 R641 *10K_4
R559 10K_4 BOARD_ID0 R561 *10K_4 +3V_S5

2 BOARD_ID1 Vender RAM_ID Q PN Mfr. PN Freq. IMVP_PWRGD_3V 2 Q8 LAN_DISABLE# R220 10K_4


ODD_PRSNT# R635 10K_4
B R547 10K_4 BOARD_ID1 R549 *10K_4 Hynix 0000 AKD5JGETW04 H5TC4G63AFR-PRBA 1600MHz FDV301N GPIO8 R213 *10K_4 B

2 BOARD_ID2 Hynix 0001 AKD5JGETW04 H5TC4G63AFR-PBA 1600MHz 2G GPIO24 R138 10K_4

1
GPIO28 R204 10K_4
R541 10K_4 BOARD_ID2 R540 *10K_4 Kingston 0010 AKD5PZSTP02 D2516EC4BXGGB 1600MHz +1.05V_VCCST
4G R95 GPIO47 R141 10K_4
R89 10K_4 BOARD_ID3 R88 *10K_4 Hynix 0011 AKD5JGETW04 H5TC4G63AFR-PBA 1600MHz 4G 1K_4 GPIO57 R648 10K_4
GPIO56 R208 10K_4
2 BOARD_ID4 MICRON 0100 AKD5JGSTL08 MT41K256M16HA-125 1600MHz R96 GPIO59 R202 10K_4

2
R537 10K_4 BOARD_ID4 R536 *10K_4 1K_4 GPIO58 R203 10K_4
GPIO44 R231 10K_4
THRMTRIP# 1 3
SYS_SHDN# 28,37,41
Q9 MMBT3904-7-F GPIO25 R206 10K_4
+3V
SKU ID GPIO45 R209 10K_4

Low High R588 IV@10K_4 SKU_ID0 R587 EV@10K_4


U10 +1.05V_VCCST +3V
R101 IV@10K_4 SKU_ID1 R104 EV@10K_4 +3VPCU
N15S-GT N15S_GT 1 5
BOARD_ID0 Dual Rank Single Rank NC VCC R686 *10K_4

1
R33 WK_GPIO27 R688 10K_4
2 C51
BOARD_ID1 Enable on Disable on SKU_ID1 SKU_ID0 VGA H/W Setup 5,40 IMVP_PWRGD A 0.1u/10V_4
10K_4
board memory board memory

2
Signal Menu
A 3
GND Y
4 IMVP_PWRGD_3V 7 GPIO27 : If not used then use A
UMA Only 0 0 UMA Hidden UMA boot 8.2-kΩ to 10-kΩ pull-down to GND.
Pin8 of SYNAPTICS and ELAN are NC
BOARD_ID2 pin. BIOS maybe will use EEPROM 74AUP1G07GW
detection. Default is pull high. dGPU Only 0 1 GPU Hidden GPU boot
Quanta Computer Inc.
Reserved Switchable
1 0 UMA+GPU dGPU/SG UMA boot
BOARD_ID3 (Default) Reserved (Mux) PROJECT :Z8C
Reserved Optimize Size Document Number Rev
1 1 UMA UMA/SG UMA boot
BOARD_ID4 (Default) Reserved (Muxless) LPT 4/6 (GPIO/MISC) 3A

Date: Saturday, November 15, 2014 Sheet 10 of 48


5 4 3 2 1
5 4 3 2 1

C173
C191
1u/6.3V_4
1u/6.3V_4 U45M
Haswell ULT PCH (Power)
HSW_ULT_DDR3L
C238
1u/6.3V_4
+3VCC_S5

11
1.838A K9
+1.05V +V1.05DX_MODPHY VCCHSIO
L10
VCCHSIO +3V_RTC
1.741A M9
R133 *SHORT_8 +V1.05S_AIDLE N8 VCCHSIO HSIO RTC AH11
P9 VCC1_05 VCCSUS3_3 AG10 C249 C683 C682
D B18 VCC1_05 VCCRTC AE7 +VCCRTCEXT 0.1u/10V_4 0.1u/10V_4 1u/6.3V_4 D
+V1.05S_AUSB3PLL VCCUSB3PLL DCPRTC
C194 B11
+V1.05S_ASATA3PLL VCCSATA3PLL
*1u/6.3V_4
18mA C225
Y20 SPI Y8 +V3.3M_PSPI 0.1u/10V_4
AA21 RSVD VCCSPI R168 *SHORT_6 +3V_S5
R119 *0_4
10mA +V1.05S_APLLOPI
W21 VCCAPLL
OPI
+1.05V_S5 VCCAPLL AG14 R154 *0_6 +3V
VCCASW AG13 PCH_VCC_1_1_21
C174 C178 VCCASW
10u/6.3V_6 1u/6.3V_4 +1.05V_DCPSUS3 J13 USB3
+1.05V C233
DCPSUS3 J11 +V1.05S_CORE_PCH R145 *SHORT_6 +1.05V 0.1u/10V_4
VCC1_05 H11
AH14 HDA VCC1_05 H15
R263 *0_6
25mA +1.05V_DCPSUS2
+V3.3DX_1.5DX_1.8DX_AUDIO VCCHDA VCC1_05 AE8 R128 *SHORT_8 +1.05V
+1.05V_S5 VCC1_05 AF22
AH13 VCC1_05 AG19
Deep Sx 0.114A DCPSUS2
VRM
CORE DCPSUSBYP
C252 +3VPCU R212 *0_6 AG20 C254 C231 C211
1u/6.3V_4 C292 22u/6.3V_8 DCPSUSBYP AE9 1u/6.3V_4 1u/6.3V_4 10u/6.3V_6
R211 *SHORT_6 VCCASW AF9
+3V_S5 VCCASW
+3VCC_S5 AC9 AG8
AA9 VCCSUS3_3 VCCASW AD10
Non Deep Sx VCCSUS3_3
GPIO/LPC
DCPSUS1
+1.05V_DCPSUS1 +PCH_VCCDSW
C255 +VCCPDSW AH10 AD8
1u/6.3V_4 +V3.3S_VCCPCORE V8 VCCDSW3_3 DCPSUS1
W9 VCC3_3 C250
VCC3_3 J15 1u/6.3V_4
*SHORT_8 R117
41mA THERMAL SENSOR VCCTS1_5 K14
+3V VCC3_3 +V1.05M_VCCASW
K16
VCC3_3
C176 +V1.05M_VCCASW
0.658A R165 *SHORT_8 +1.05V
C 22u/6.3V_8 +V1.05S_AXCK_DCB J18 0.109A C
K19 VCCCLK SERIAL IO U8
A20 VCCCLK VCCSDIO T9 R264 *0_6 C239 C235
+V1.05S_AXCK_LCPLL VCCACLKPLL VCCSDIO
+1.05V J17 +1.05V_S5 1u/6.3V_4 22u/6.3V_8
R21 VCCCLK
+1.05V VCCCLK
C175 1u/6.3V_4 T21 LPT LP POWER C229
C227 1u/6.3V_4 K18 VCCCLK SUS OSCILLATOR AB8 1u/6.3V_4
RSVD DCPSUS4
WW15 4/10 Intel VCCDSW3 M20
RSVD
63mA V21 3mA
G3 can't boot issue. AE20 RSVD AC20 +V1.5S_VCCATS R84 *SHORT_6
C240 +3VCC_S5 VCCSUS3_3 RSVD +1.5V
AE21 AG16 1mA
+VCCPDSW +PCH_VCCDSW VCCSUS3_3 USB2 VCC1_05 AG17 +V3.3S_VCCPTS R79 *SHORT_6
VCC1_05 +3V

0.47u/25V_6 C205
13 OF 19 1u/6.3V_4

+V3.3S_VCCSDIO
17mA R113 *SHORT_6 +3V
PCH VCCHSIO Power(REMOVE LDO) +1.05V_DCPSUS4 R262 *0_6 +1.05V_S5
C212
1u/6.3V_4
C216
1u/6.3V_4

+V1.05S_VCCUSBCORE R232 *SHORT_8 +1.05V


B +V1.05DX_MODPHY +1.05V B
C253
1u/6.3V_4

PR21 *SHORT_8

VCCAPLL power +1.05V +V1.05S_AXCK_DCB

+1.05V +V1.05S_APLLOPI L30 2.2uH/210mA_8


0.2A

L16 2.2uH/210mA_8
57mA
C619 C618 C165
47u/6.3V_8 47u/6.3V_8 1u/6.3V_4

C260 C661 C236


*47u/6.3V_8 *47u/6.3V_8 1u/6.3V_4

+1.05V +V1.05S_AXCK_LCPLL

PCH HDA Power L10 2.2uH/210mA_8


31mA
+V1.05DX_MODPHY +V1.05S_AUSB3PLL +V1.05DX_MODPHY +V1.05S_ASATA3PLL
11mA
A L12 2.2uH/210mA_8
41mA L11 2.2uH/210mA_8
42mA C87 C96 C634 A
+3V_S5 +V3.3DX_1.5DX_1.8DX_AUDIO 47u/6.3V_8 47u/6.3V_8 1u/6.3V_4

R210 *SHORT_6
C103 C99 C635 C104 C100 C636
47u/6.3V_8 47u/6.3V_8 1u/6.3V_4 47u/6.3V_8 47u/6.3V_8 1u/6.3V_4
C251
0.1u/10V_4 Quanta Computer Inc.
Place close to ball PROJECT :Z8C
Size Document Number Rev
3A
LPT 5/6 (POWER)
Date: Sunday, November 16, 2014 Sheet 11 of 48
5 4 3 2 1
5 4 3 2 1

Haswell ULT (GND) 12


HSW_ULT_DDR3L HSW_ULT_DDR3L HSW_ULT_DDR3L HSW_ULT_DDR3L
U45N U45O U45P U45R
D H17 D
A11 AJ35 AP22 AV59 D33 VSS H57
A14 VSS VSS AJ39 AP23 VSS VSS AV8 D34 VSS VSS J10 N23
A18 VSS VSS AJ41 AP26 VSS VSS AW16 D35 VSS VSS J22 RSVD R23
A24 VSS VSS AJ43 AP29 VSS VSS AW24 D37 VSS VSS J59 RSVD T23
VSS VSS VSS VSS VSS VSS AT2 RSVD
A28 AJ45 AP3 AW33 D38 J63 RSVD U10
VSS VSS VSS VSS VSS VSS AU44 RSVD
A32 AJ47 AP31 AW35 D39 K1 RSVD
VSS VSS VSS VSS VSS VSS AV44
A36 AJ50 AP38 AW37 D41 K12 RSVD
VSS VSS VSS VSS VSS VSS D15
A40 AJ52 AP39 AW4 D42 L13 RSVD AL1
A44 VSS VSS AJ54 AP48 VSS VSS AW40 D43 VSS VSS L15 RSVD AM11
A48 VSS VSS AJ56 AP52 VSS VSS AW42 D45 VSS VSS L17 RSVD AP7
VSS VSS VSS VSS VSS VSS F22 RSVD
A52 AJ58 AP54 AW44 D46 L18 RSVD AU10
VSS VSS VSS VSS VSS VSS H22 RSVD
A56 AJ60 AP57 AW47 D47 L20 RSVD AU15
VSS VSS VSS VSS VSS VSS J21 RSVD
AA1 AJ63 AR11 AW50 D49 L58 RSVD AW14
AA58 VSS VSS AK23 AR15 VSS VSS AW51 D5 VSS VSS L61 RSVD AY14
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D50 VSS VSS L7 RSVD
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D51 VSS VSS M22
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D53 VSS VSS N10 18 OF 19
AB7 VSS VSS AL13 AR33 VSS VSS AY16 D54 VSS VSS N3
AC61 VSS VSS AL17 AR39 VSS VSS AY18 D55 VSS VSS P59
AD21 VSS VSS AL20 AR43 VSS VSS AY22 D57 VSS VSS P63
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D59 VSS VSS R10
AD63 VSS VSS AL23 AR5 VSS VSS AY26 D62 VSS VSS R22
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D8 VSS VSS R8
AE5 VSS VSS AL29 AT13 VSS VSS AY33 E11 VSS VSS T1
AE58 VSS VSS AL31 AT35 VSS VSS AY4 E17 VSS VSS T58
AF11 VSS VSS AL33 AT37 VSS VSS AY51 F20 VSS VSS U20
AF12 VSS VSS AL36 AT40 VSS VSS AY53 F26 VSS VSS U22
AF14 VSS VSS AL39 AT42 VSS VSS AY57 F30 VSS VSS U61
C AF15 VSS VSS AL40 AT43 VSS VSS AY59 F34 VSS VSS U9 C
AF17 VSS VSS AL45 AT46 VSS VSS AY6 F38 VSS VSS V10
AF18 VSS VSS AL46 AT49 VSS VSS B20 F42 VSS VSS V3
AG1 VSS VSS AL51 AT61 VSS VSS B24 F46 VSS VSS V7
AG11 VSS VSS AL52 AT62 VSS VSS B26 F50 VSS VSS W20
AG21 VSS VSS AL54 AT63 VSS VSS B28 F54 VSS VSS W22
AG23 VSS VSS AL57 AU1 VSS VSS B32 F58 VSS VSS Y10
AG60 VSS VSS AL60 AU16 VSS VSS B36 F61 VSS VSS Y59
AG61 VSS VSS AL61 AU18 VSS VSS B4 G18 VSS VSS Y63
AG62 VSS VSS AM1 AU20 VSS VSS B40 G22 VSS VSS
AG63 VSS VSS AM17 AU22 VSS VSS B44 G3 VSS
AH17 VSS VSS AM23 AU24 VSS VSS B48 G5 VSS V58
AH19 VSS VSS AM31 AU26 VSS VSS B52 G6 VSS VSS AH46
AH20 VSS VSS AM52 AU28 VSS VSS B56 G8 VSS VSS V23
AH22 VSS VSS AN17 AU30 VSS VSS B60 H13 VSS VSS E62 VSS_SENSE_R R530 *SHORT_4
VSS VSS VSS VSS VSS VSS_SENSE VSS_SENSE 40
AH24 AN23 AU33 C11 AH16
AH28 VSS VSS AN31 AU51 VSS VSS C14 16 OF 19 VSS R532 100/F_4
AH30 VSS VSS AN32 AU53 VSS VSS C18
AH32 VSS VSS AN35 AU55 VSS VSS C20
AH34 VSS VSS AN36 AU57 VSS VSS C25
AH36 VSS VSS AN39 AU59 VSS VSS C27
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH40 VSS VSS AN42 AV16 VSS VSS C39
AH42 VSS VSS AN43 AV20 VSS VSS C57
AH44 VSS VSS AN45 AV24 VSS VSS D12
AH49 VSS VSS AN46 AV28 VSS VSS D14
AH51 VSS VSS AN48 AV33 VSS VSS D18
AH53 VSS VSS AN49 AV34 VSS VSS D2
AH55 VSS VSS AN51 AV36 VSS VSS D21
B AH57 VSS VSS AN52 AV39 VSS VSS D23 B
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ14 VSS VSS AN63 AV43 VSS VSS D26
AJ23 VSS VSS AN7 AV46 VSS VSS D27
AJ25 VSS VSS AP10 AV49 VSS VSS D29
AJ27 VSS VSS AP17 AV51 VSS VSS D30
AJ29 VSS VSS AP20 AV55 VSS VSS D31
VSS VSS VSS 15 OF 19 VSS

14 OF 19

HSW_ULT_DDR3L
U45Q

DC_TEST_AY2_AW 2 AY2 A3 DC_TEST_A3_B3


DC_TEST_AY3_AW 3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 TP_DC_TEST_A4
DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 TP110
TP146 TP_DC_TEST_AY60 AY60
DC_TEST_AY61_AW 61 AY61 DAISY_CHAIN_NCTF_AY60 A60 TP_DC_TEST_A60
DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 TP112
DC_TEST_AY62_AW 62 AY62 A61 DC_TEST_A61_B61
TP_DC_TEST_B2 B2 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 A62 TP_DC_TEST_A62
A TP111 DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 TP115 A
DC_TEST_A3_B3 B3 AV1 TP_DC_TEST_AV1 TP144
DC_TEST_A61_B61 B61 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 AW1 TP_DC_TEST_AW 1
DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 TP145
DC_TEST_B62_B63 B62 AW2 DC_TEST_AY2_AW 2
B63 DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 AW3 DC_TEST_AY3_AW 3
DC_TEST_C1_C2 C1 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW61 DC_TEST_AY61_AW 61
C2 DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 AW62 DC_TEST_AY62_AW 62
DAISY_CHAIN_NCTF_C2
17 OF 19
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63
AW63 TP_DC_TEST_AW 63 TP147 Quanta Computer Inc.
PROJECT : Z8C
Size Document Number Rev
LPT 6/6 (GND) 3A

Date: Saturday, November 15, 2014 Sheet 12 of 48


5 4 3 2 1
5 4 3 2 1

H_SYS_PWROK_XDP R274 *1K_4


+3V_S5

13
+3V
XDP_PREQ_N NOA_STBP_0
4 XDP_PREQ# TP30 TP52 NOA_STBP_0 6
XDP_DBRESET_N R196 *1K_4 XDP_PRDY_N NOA_STBN_0
4 XDP_PRDY# TP20 TP132 NOA_STBN_0 6
D D
CFG0 CFG8
6 CFG0 TP63 TP38 CFG8 6
CFG1 CFG9
6 CFG1 TP45 TP42 CFG9 6
CFG2 CFG10
6 CFG2 TP44 TP47 CFG10 6
CFG3 CFG11
6 CFG3 TP46 TP131 CFG11 6
NOA_STBP_1
4 XDP_BPM#0 TP19 TP141 NOA_STBP_1 6
NOA_STBN_1
4 XDP_BPM#1 TP17 TP69 NOA_STBN_1 6
CFG4 CFG12
6,8 CFG4 TP55 TP32 CFG12 6
CFG5 CFG13
6 CFG5 TP128 TP129 CFG13 6
CFG6 CFG14
6 CFG6 TP40 TP33 CFG14 6
CFG7 CFG15
6 CFG7 TP53 TP41 CFG15 6
R254 1K_4 VCCST_PWRGD_XDP CK_XDP_P_R R81 *SHORT_4 CLK_PCIE_XDPP 9
35,38 HWPG_1.05V_S5 TP86 TP2
NBSWON# CK_XDP_N_R R82 *SHORT_4 CLK_PCIE_XDPN 9
TP130 TP3

5 PWR_DEBUG XDP_RST_R_N R215 1K_4


TP35 TP85 PLTRST# 7,16,27,28,29,35
H_SYS_PWROK_XDP XDP_DBRESET_N R195 *SHORT_4 SYS_RESET#
7 SYS_PWROK TP87 TP84
R261 *SHORT_4
8,14,15,33 CLK_SDATA XDP_TDO R166 *51_4 +1.05V_S5
TP88 TP65
8,14,15,33 CLK_SCLK XDP_TRST_N
TP89 TP121
XDP_TDI
C 8 XDP_TCK1 TP139 TP64 C
XDP_TMS
4,8 XDP_TCK0 TP62 TP68

+3V

C192
0.1u/10V_4

U17
14
VCC
B XDP_TDO 2 3 B
8 XDP_TDO 1A 1B XDP_TDO_CPU 4
1
APS1 R737 *SHORT_6 APS3 R718 *SHORT_6 APS7 1OE
XDP_TDI 5 6
8 XDP_TDI 2A 2B XDP_TDI_CPU 4
APS 4
2OE

8 XDP_TMS XDP_TMS 9 8
+3VCC_S5 3A 3B XDP_TMS_CPU 4
CN14 10
1 APS1 R723 *SHORT_6 3OE
1 2 R736 *SHORT_4 XDP_TRST_N 12 11
2 SUSB# 7,35 4A 4B XDP_TRST# 4,8
3 APS3 R716 *0_6 +3VPCU
3 4 R735 *SHORT_4 13
4 5 R734 *SHORT_4 PCH_SLP_S5# 7 4OE 15
5 6 R733 *SHORT_4 SUSC# 7,35 DPAD
6 7 APS7 R717 *0_6 PCH_SLP_A# 7 7
7 +3VPCU GND
8
8 9 R730 *SHORT_4 *74CBTLV3126
9 10 RTC_RST# 8
10 11 R729 *SHORT_4
11 12 NBSWON# 32,35 +1.05V +3V
12 13 R728 *SHORT_4 SYS_RESET# U15
13 14 SYS_RESET# 7
A 14 15 R727 *SHORT_4 1 5 A
15 16 PCH_SLP_S0# 7 NC VCC R90
16
1

17 *10K_4
17 18 2 C156
18 5 VCCST_PWRGD A *0.1u/10V_4 Quanta Computer Inc.
2

*ACES_88511-180N
3
GND Y
4
PROJECT :Z8C
Size Document Number Rev
*74AUP1G07GW 3A
CPU/PCH XDP
Date: Saturday, November 15, 2014 Sheet 13 of 48
5 4 3 2 1
1 2 3 4 5 6 7 8

<DDR> BYTE1_8-15 BYTE5_40-47 BYTE0_0-7 BYTE4_32-39


14
3 M_A_DQS#[7:0]
3 M_A_DQS[7:0]
3 M_A_DQ[63:0]
BYTE3_24-31 BYTE6_48-55 BYTE2_16-23 BYTE7_56-63
U28 U29 U30 U31

+SMDDR_VREF_DIMM M8 E3 M_A_DQ12 +SMDDR_VREF_DIMM M8 E3 M_A_DQ41 +SMDDR_VREF_DIMM M8 E3 M_A_DQ4 +SMDDR_VREF_DIMM M8 E3 M_A_DQ33


+SMDDR_VREF_DQ0 H1 VREFCA DQL0 F7 M_A_DQ11 +SMDDR_VREF_DQ0 H1 VREFCA DQL0 F7 M_A_DQ42 +SMDDR_VREF_DQ0 H1 VREFCA DQL0 F7 M_A_DQ2 +SMDDR_VREF_DQ0 H1 VREFCA DQL0 F7 M_A_DQ35
VREFDQ DQL1 F2 M_A_DQ13 VREFDQ DQL1 F2 M_A_DQ40 VREFDQ DQL1 F2 M_A_DQ5 VREFDQ DQL1 F2 M_A_DQ32
3 M_A_A[15:0] N3 DQL2 F8 N3 DQL2 F8 N3 DQL2 F8 N3 DQL2 F8
M_A_A0 M_A_DQ15 M_A_A0 M_A_DQ46 M_A_A0 M_A_DQ6 M_A_A0 M_A_DQ39
M_A_A1 P7 A0 DQL3 H3 M_A_DQ9 M_A_A1 P7 A0 DQL3 H3 M_A_DQ44 M_A_A1 P7 A0 DQL3 H3 M_A_DQ1 M_A_A1 P7 A0 DQL3 H3 M_A_DQ36
M_A_A2 P3 A1 DQL4 H8 M_A_DQ10 M_A_A2 P3 A1 DQL4 H8 M_A_DQ43 M_A_A2 P3 A1 DQL4 H8 M_A_DQ3 M_A_A2 P3 A1 DQL4 H8 M_A_DQ34
M_A_A3 N2 A2 DQL5 G2 M_A_DQ8 M_A_A3 N2 A2 DQL5 G2 M_A_DQ45 M_A_A3 N2 A2 DQL5 G2 M_A_DQ0 M_A_A3 N2 A2 DQL5 G2 M_A_DQ38
M_A_A4 P8 A3 DQL6 H7 M_A_DQ14 M_A_A4 P8 A3 DQL6 H7 M_A_DQ47 M_A_A4 P8 A3 DQL6 H7 M_A_DQ7 M_A_A4 P8 A3 DQL6 H7 M_A_DQ37
M_A_A5 P2 A4 DQL7 M_A_A5 P2 A4 DQL7 M_A_A5 P2 A4 DQL7 M_A_A5 P2 A4 DQL7
M_A_A6 R8 A5 M_A_A6 R8 A5 M_A_A6 R8 A5 M_A_A6 R8 A5
R2 A6 D7 R2 A6 D7 R2 A6 D7 R2 A6 D7
SO-DIMMB SPD Address is 0XA4 M_A_A7
A7 DQU0
M_A_DQ30 M_A_A7
A7 DQU0
M_A_DQ55 M_A_A7
A7 DQU0
M_A_DQ16 M_A_A7
A7 DQU0
M_A_DQ60
SO-DIMMB TS Address is 0X34 M_A_A8 T8 C3 M_A_DQ25 M_A_A8 T8 C3 M_A_DQ52 M_A_A8 T8 C3 M_A_DQ19 M_A_A8 T8 C3 M_A_DQ62
M_A_A9 R3 A8 DQU1 C8 M_A_DQ31 M_A_A9 R3 A8 DQU1 C8 M_A_DQ49 M_A_A9 R3 A8 DQU1 C8 M_A_DQ17 M_A_A9 R3 A8 DQU1 C8 M_A_DQ61
M_A_A10 L7 A9 DQU2 C2 M_A_DQ28 M_A_A10 L7 A9 DQU2 C2 M_A_DQ51 M_A_A10 L7 A9 DQU2 C2 M_A_DQ18 M_A_A10 L7 A9 DQU2 C2 M_A_DQ63
M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ27 M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ48 M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ23 M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ56
M_A_A12 N7 A11 DQU4 A2 M_A_DQ29 M_A_A12 N7 A11 DQU4 A2 M_A_DQ53 M_A_A12 N7 A11 DQU4 A2 M_A_DQ20 M_A_A12 N7 A11 DQU4 A2 M_A_DQ59
M_A_A13 T3 A12/BC DQU5 B8 M_A_DQ26 M_A_A13 T3 A12/BC DQU5 B8 M_A_DQ54 M_A_A13 T3 A12/BC DQU5 B8 M_A_DQ22 M_A_A13 T3 A12/BC DQU5 B8 M_A_DQ57
M_A_A14 T7 A13 DQU6 A3 M_A_DQ24 M_A_A14 T7 A13 DQU6 A3 M_A_DQ50 M_A_A14 T7 A13 DQU6 A3 M_A_DQ21 M_A_A14 T7 A13 DQU6 A3 M_A_DQ58
M_A_A15 M7 A14 DQU7 M_A_A15 M7 A14 DQU7 M_A_A15 M7 A14 DQU7 M_A_A15 M7 A14 DQU7
A15 +1.35V_SUS A15 +1.35V_SUS A15 +1.35V_SUS A15 +1.35V_SUS
3 M_A_BS#[2:0]
M_A_BS#0 M2 B2 M_A_BS#0 M2 B2 M_A_BS#0 M2 B2 M_A_BS#0 M2 B2
M_A_BS#1 N8 BA0 VDD#B2 D9 M_A_BS#1 N8 BA0 VDD#B2 D9 M_A_BS#1 N8 BA0 VDD#B2 D9 M_A_BS#1 N8 BA0 VDD#B2 D9
M_A_BS#2 M3 BA1 VDD#D9 G7 M_A_BS#2 M3 BA1 VDD#D9 G7 M_A_BS#2 M3 BA1 VDD#D9 G7 M_A_BS#2 M3 BA1 VDD#D9 G7
A BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 A
K2 K2 K2 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
J7 VDD#N1 N9 M_A_CLK0 J7 VDD#N1 N9 M_A_CLK0 J7 VDD#N1 N9 M_A_CLK0 J7 VDD#N1 N9
3 M_A_CLK0 K7 CK VDD#N9 R1 K7 CK VDD#N9 R1 K7 CK VDD#N9 R1 K7 CK VDD#N9 R1
M_A_CLK0# M_A_CLK0# M_A_CLK0#
3 M_A_CLK0# CK VDD#R1 CK VDD#R1 CK VDD#R1 CK VDD#R1
M_A_CKE0 K9 R9 M_A_CKE0 K9 R9 M_A_CKE0 K9 R9 M_A_CKE0 K9 R9
3 M_A_CKE0 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9

M_A_ODT0 K1 A1 M_A_ODT0 K1 A1 M_A_ODT0 K1 A1 M_A_ODT0 K1 A1


L2 ODT VDDQ#A1 A8 M_A_CS#0 L2 ODT VDDQ#A1 A8 M_A_CS#0 L2 ODT VDDQ#A1 A8 M_A_CS#0 L2 ODT VDDQ#A1 A8
3 M_A_CS#0 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8
J3 C1 M_A_RAS# J3 C1 M_A_RAS# J3 C1 M_A_RAS# J3 C1
3 M_A_RAS# RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
K3 C9 M_A_CAS# K3 C9 M_A_CAS# K3 C9 M_A_CAS# K3 C9
3 M_A_CAS# CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
L3 D2 M_A_WE# L3 D2 M_A_WE# L3 D2 M_A_WE# L3 D2
3 M_A_WE# WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
E9 E9 E9 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
M_A_DQS1 F3 VDDQ#F1 H2 M_A_DQS5 F3 VDDQ#F1 H2 M_A_DQS0 F3 VDDQ#F1 H2 M_A_DQS4 F3 VDDQ#F1 H2
M_A_DQS3 C7 DQSL VDDQ#H2 H9 M_A_DQS6 C7 DQSL VDDQ#H2 H9 M_A_DQS2 C7 DQSL VDDQ#H2 H9 M_A_DQS7 C7 DQSL VDDQ#H2 H9
DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9

E7 A9 E7 A9 E7 A9 E7 A9
D3 DML VSS#A9 B3 D3 DML VSS#A9 B3 D3 DML VSS#A9 B3 D3 DML VSS#A9 B3
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
M_A_DQS#1 G3 VSS#G8 J2 M_A_DQS#5 G3 VSS#G8 J2 M_A_DQS#0 G3 VSS#G8 J2 M_A_DQS#4 G3 VSS#G8 J2
M_A_DQS#3 B7 DQSL VSS#J2 J8 M_A_DQS#6 B7 DQSL VSS#J2 J8 M_A_DQS#2 B7 DQSL VSS#J2 J8 M_A_DQS#7 B7 DQSL VSS#J2 J8
DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
T2 VSS#P1 P9 DDR3_DRAMRST# T2 VSS#P1 P9 DDR3_DRAMRST# T2 VSS#P1 P9 DDR3_DRAMRST# T2 VSS#P1 P9
4,15 DDR3_DRAMRST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
M_A_ZQ1 L8 VSS#T1 T9 M_A_ZQ2 L8 VSS#T1 T9 M_A_ZQ3 L8 VSS#T1 T9 M_A_ZQ4 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

B1 B1 B1 B1
VSSQ#B1 VSSQ#B1 VSSQ#B1 VSSQ#B1
2

2
B9 B9 B9 B9
R374 VSSQ#B9 D1 R342 VSSQ#B9 D1 R378 VSSQ#B9 D1 R343 VSSQ#B9 D1
VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8
240/F_4 240/F_4 240/F_4 240/F_4
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
1

1
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
RAM _DDR3L RAM _DDR3L RAM _DDR3L RAM _DDR3L
Vendor P/N

Hynix

AKD5JGST400 DDR3L 1333Mhz 4Gb


Elpida BYTE1_8-15 BYTE5_40-47 BYTE0_0-7 BYTE4_32-39
AKD5JGST404 DDR3L 1600Mhz 4Gb
BYTE3_24-31 BYTE6_48-55 BYTE2_16-23 BYTE7_56-63
U50 U51 U52 U53

+SMDDR_VREF_DIMM M8 E3 M_A_DQ11 +SMDDR_VREF_DIMM M8 E3 M_A_DQ42 +SMDDR_VREF_DIMM M8 E3 M_A_DQ2 +SMDDR_VREF_DIMM M8 E3 M_A_DQ35


+SMDDR_VREF_DQ0 H1 VREFCA DQL0 F7 M_A_DQ12 +SMDDR_VREF_DQ0 H1 VREFCA DQL0 F7 M_A_DQ41 +SMDDR_VREF_DQ0 H1 VREFCA DQL0 F7 M_A_DQ4 +SMDDR_VREF_DQ0 H1 VREFCA DQL0 F7 M_A_DQ33
VREFDQ DQL1 F2 M_A_DQ15 VREFDQ DQL1 F2 M_A_DQ46 VREFDQ DQL1 F2 M_A_DQ6 VREFDQ DQL1 F2 M_A_DQ39
B M_A_A0 N3 DQL2 F8 M_A_DQ13 M_A_A0 N3 DQL2 F8 M_A_DQ40 M_A_A0 N3 DQL2 F8 M_A_DQ5 M_A_A0 N3 DQL2 F8 M_A_DQ32 B
M_A_A1 P7 A0 DQL3 H3 M_A_DQ14 M_A_A1 P7 A0 DQL3 H3 M_A_DQ47 M_A_A1 P7 A0 DQL3 H3 M_A_DQ7 M_A_A1 P7 A0 DQL3 H3 M_A_DQ37
M_A_A2 P3 A1 DQL4 H8 M_A_DQ8 M_A_A2 P3 A1 DQL4 H8 M_A_DQ45 M_A_A2 P3 A1 DQL4 H8 M_A_DQ0 M_A_A2 P3 A1 DQL4 H8 M_A_DQ38
M_A_A3 N2 A2 DQL5 G2 M_A_DQ10 M_A_A3 N2 A2 DQL5 G2 M_A_DQ43 M_A_A3 N2 A2 DQL5 G2 M_A_DQ3 M_A_A3 N2 A2 DQL5 G2 M_A_DQ34
M_A_A4 P8 A3 DQL6 H7 M_A_DQ9 M_A_A4 P8 A3 DQL6 H7 M_A_DQ44 M_A_A4 P8 A3 DQL6 H7 M_A_DQ1 M_A_A4 P8 A3 DQL6 H7 M_A_DQ36
M_A_A5 P2 A4 DQL7 M_A_A5 P2 A4 DQL7 M_A_A5 P2 A4 DQL7 M_A_A5 P2 A4 DQL7
M_A_A6 R8 A5 M_A_A6 R8 A5 M_A_A6 R8 A5 M_A_A6 R8 A5
A6 A6 A6 A6
SO-DIMMB SPD Address is 0XA4 M_A_A7 R2 D7 M_A_DQ25 M_A_A7 R2 D7 M_A_DQ52 M_A_A7 R2 D7 M_A_DQ19 M_A_A7 R2 D7 M_A_DQ62
M_A_A8 T8 A7 DQU0 C3 M_A_DQ30 M_A_A8 T8 A7 DQU0 C3 M_A_DQ55 M_A_A8 T8 A7 DQU0 C3 M_A_DQ16 M_A_A8 T8 A7 DQU0 C3 M_A_DQ60
SO-DIMMB TS Address is 0X34 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
M_A_A9 R3 C8 M_A_DQ28 M_A_A9 R3 C8 M_A_DQ51 M_A_A9 R3 C8 M_A_DQ18 M_A_A9 R3 C8 M_A_DQ63
M_A_A10 L7 A9 DQU2 C2 M_A_DQ31 M_A_A10 L7 A9 DQU2 C2 M_A_DQ49 M_A_A10 L7 A9 DQU2 C2 M_A_DQ17 M_A_A10 L7 A9 DQU2 C2 M_A_DQ61
M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ29 M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ53 M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ20 M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ59
M_A_A12 N7 A11 DQU4 A2 M_A_DQ26 M_A_A12 N7 A11 DQU4 A2 M_A_DQ54 M_A_A12 N7 A11 DQU4 A2 M_A_DQ22 M_A_A12 N7 A11 DQU4 A2 M_A_DQ57
M_A_A13 T3 A12/BC DQU5 B8 M_A_DQ24 M_A_A13 T3 A12/BC DQU5 B8 M_A_DQ50 M_A_A13 T3 A12/BC DQU5 B8 M_A_DQ21 M_A_A13 T3 A12/BC DQU5 B8 M_A_DQ58
M_A_A14 T7 A13 DQU6 A3 M_A_DQ27 M_A_A14 T7 A13 DQU6 A3 M_A_DQ48 M_A_A14 T7 A13 DQU6 A3 M_A_DQ23 M_A_A14 T7 A13 DQU6 A3 M_A_DQ56
M_A_A15 M7 A14 DQU7 M_A_A15 M7 A14 DQU7 M_A_A15 M7 A14 DQU7 M_A_A15 M7 A14 DQU7
A15 +1.35V_SUS A15 +1.35V_SUS A15 +1.35V_SUS A15 +1.35V_SUS

M_A_BS#0 M2 B2 M_A_BS#0 M2 B2 M_A_BS#0 M2 B2 M_A_BS#0 M2 B2


M_A_BS#1 N8 BA0 VDD#B2 D9 M_A_BS#1 N8 BA0 VDD#B2 D9 M_A_BS#1 N8 BA0 VDD#B2 D9 M_A_BS#1 N8 BA0 VDD#B2 D9
M_A_BS#2 M3 BA1 VDD#D9 G7 M_A_BS#2 M3 BA1 VDD#D9 G7 M_A_BS#2 M3 BA1 VDD#D9 G7 M_A_BS#2 M3 BA1 VDD#D9 G7
BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
J7 VDD#N1 N9 M_A_CLK1 J7 VDD#N1 N9 M_A_CLK1 J7 VDD#N1 N9 M_A_CLK1 J7 VDD#N1 N9
3 M_A_CLK1 CK VDD#N9 CK VDD#N9 CK VDD#N9 CK VDD#N9
K7 R1 M_A_CLK1# K7 R1 M_A_CLK1# K7 R1 M_A_CLK1# K7 R1
3 M_A_CLK1# K9 CK VDD#R1 R9 K9 CK VDD#R1 R9 K9 CK VDD#R1 R9 K9 CK VDD#R1 R9
M_A_CKE1 M_A_CKE1 M_A_CKE1 M_A_CKE1
3 M_A_CKE1 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9

M_A_ODT0 K1 A1 M_A_ODT0 K1 A1 M_A_ODT0 K1 A1 M_A_ODT0 K1 A1


M_A_CS#1 L2 ODT VDDQ#A1 A8 M_A_CS#1 L2 ODT VDDQ#A1 A8 M_A_CS#1 L2 ODT VDDQ#A1 A8 M_A_CS#1 L2 ODT VDDQ#A1 A8
3 M_A_CS#1 J3 CS VDDQ#A8 C1 J3 CS VDDQ#A8 C1 J3 CS VDDQ#A8 C1 J3 CS VDDQ#A8 C1
M_A_RAS# M_A_RAS# M_A_RAS# M_A_RAS#
M_A_CAS# K3 RAS VDDQ#C1 C9 M_A_CAS# K3 RAS VDDQ#C1 C9 M_A_CAS# K3 RAS VDDQ#C1 C9 M_A_CAS# K3 RAS VDDQ#C1 C9
M_A_WE# L3 CAS VDDQ#C9 D2 M_A_WE# L3 CAS VDDQ#C9 D2 M_A_WE# L3 CAS VDDQ#C9 D2 M_A_WE# L3 CAS VDDQ#C9 D2
WE VDDQ#D2 E9 WE VDDQ#D2 E9 WE VDDQ#D2 E9 WE VDDQ#D2 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
M_A_DQS1 F3 VDDQ#F1 H2 M_A_DQS5 F3 VDDQ#F1 H2 M_A_DQS0 F3 VDDQ#F1 H2 M_A_DQS4 F3 VDDQ#F1 H2
M_A_DQS3 C7 DQSL VDDQ#H2 H9 M_A_DQS6 C7 DQSL VDDQ#H2 H9 M_A_DQS2 C7 DQSL VDDQ#H2 H9 M_A_DQS7 C7 DQSL VDDQ#H2 H9
DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9

E7 A9 E7 A9 E7 A9 E7 A9
D3 DML VSS#A9 B3 D3 DML VSS#A9 B3 D3 DML VSS#A9 B3 D3 DML VSS#A9 B3
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
M_A_DQS#1 G3 VSS#G8 J2 M_A_DQS#5 G3 VSS#G8 J2 M_A_DQS#0 G3 VSS#G8 J2 M_A_DQS#4 G3 VSS#G8 J2
M_A_DQS#3 B7 DQSL VSS#J2 J8 M_A_DQS#6 B7 DQSL VSS#J2 J8 M_A_DQS#2 B7 DQSL VSS#J2 J8 M_A_DQS#7 B7 DQSL VSS#J2 J8
DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
DDR3_DRAMRST# T2 VSS#P1 P9 DDR3_DRAMRST# T2 VSS#P1 P9 DDR3_DRAMRST# T2 VSS#P1 P9 DDR3_DRAMRST# T2 VSS#P1 P9
RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1
M_A_ZQ5 L8 VSS#T1 T9 M_A_ZQ6 L8 VSS#T1 T9 M_A_ZQ7 L8 VSS#T1 T9 M_A_ZQ8 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

B1 B1 B1 B1
VSSQ#B1 VSSQ#B1 VSSQ#B1 VSSQ#B1
2

2
B9 B9 B9 B9
VSSQ#B9 VSSQ#B9 VSSQ#B9 VSSQ#B9
2

R745 D1 R756 D1 D1 R757 D1


VSSQ#D1 D8 VSSQ#D1 D8 R752 VSSQ#D1 D8 VSSQ#D1 D8
240/F_4 240/F_4 240/F_4
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
240/F_4
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
1

1
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
1

J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1


L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
C NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 C
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
RAM _DDR3L RAM _DDR3L RAM _DDR3 RAM _DDR3L

SP : ELPIDA DRAM P/N : AKD5JGST400


HYNIX DRAM P/N : AKD5JGQTW01 M1 solution
+1.35V_SUS

+1.35V_SUS R365 Vref_CA


Place these Caps near Memory Down 1.8K/F_4
+SMDDR_VREF_DIMM +3V

+VREF_CA_CPU R358 *SHORT_6 R363 2/F_6


C464 C425 C418 C463 C374 C461 C705 C756 C737 C462 C363 C319 C465 C350 C367 C431 R763 *1K_4 SPD_A0 R764 *1K_4
2

10u/6.3V_6 10u/6.3V_6 *10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 *10u/6.3V_6 *10u/6.3V_6 10u/6.3V_6 *10u/6.3V_6 10u/6.3V_6 *10u/6.3V_6 *10u/6.3V_6 10u/6.3V_6 *10u/6.3V_6 10u/6.3V_6 *10u/6.3V_6
M3 solution C419 R366 C439 R768 *1K_4 SPD_A1 R771 *1K_4
0.022u/16V_4 1.8K/F_4 470p/50V_4
1

R773 *1K_4 SPD_A2 R777 *1K_4

R357
C733 C734 C713 C422 C395 C421 C347 C365 C449 C385 C364 C453 C459 C440 C450 C442 24.9/F_4
*1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4
U55
R772 *0_4 SPD_CLK_SCLK 6 1 SPD_A0
8,13,15,33 CLK_SCLK R776 *0_4 SPD_CLK_SDATA 5 SCL A0 2 SPD_A1 +3V
8,13,15,33 CLK_SDATA SDA A1 3 SPD_A2
A2
C396 C435 C441 C420 C380 C392 C376 C386 C728 C748 C695 C745 C698 C747 C694 C732 R766 *1K_4 7 8
+3V WP VCC
1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 4
M1 solution GND
R770 *M24C02-WMN6TP C768
+1.35V_SUS
WP =1 : WRITE DISABLE *1K_4 *0.1u/10V_4
SPD address:A2

R325 Vref_DQ
C384 C456 C383 C443 C448 C445 C446 C454 C723 C751 C432 C388 C743 C366 C444 C379 1.8K/F_4
1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 +SMDDR_VREF_DQ0

+VREFDQ_SA_M3 R305 *SHORT_6 R322 5.1/F_6


2

C368 R327 C390


M3 solution 0.022u/16V_4 1.8K/F_4 470p/50V_4
1

C389 C727 C753 C704 C433 C752 C712 C749 C750 C715 C708 C467 C742 C434 C452 C740
1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4
R304
24.9/F_4

C764 C754 C755 C736 C744 C746 C697 C702 C709 C700 C447 C373 C375 C415 C428 C398
*0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4

+DDR_VTT_RUN +1.35V_SUS

D D
M_A_WE# R350 34.8/F_4 M_A_ODT0 R333 30/F_4
M_A_CAS# R738 34.8/F_4
C735 C718 C739 C720 C719 C424 C451 C738 C417 C703 C696 C458 C413 C457 C455 C393 M_A_RAS# R339 34.8/F_4
*0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 M_A_BS#0 R744 34.8/F_4
M_A_BS#1 R746 34.8/F_4
M_A_BS#2 R351 34.8/F_4
M_A_CKE0 R334 34.8/F_4
M_A_CS#0 R345 34.8/F_4 +DDR_VTT_RUN
+SMDDR_VREF_DIMM M_A_A0 R747 34.8/F_4
+DDR_VTT_RUN M_A_A1 R751 34.8/F_4
M_A_A2 R359 34.8/F_4 M_A_CLK1 R719 26.1/F_4
M_A_A3 R355 34.8/F_4 M_A_CLK1# R725 26.1/F_4
1

M_A_A4 R364 34.8/F_4


C414 C731 C725 C730 C438 C437 C436 C411 C408 C741 C412 C466 M_A_A5 R369 34.8/F_4
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 C760 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 M_A_A6 R373 34.8/F_4 M_A_CLK0 R731 26.1/F_4
2

10u/6.3V_6 M_A_A7 R371 34.8/F_4 M_A_CLK0# R739 26.1/F_4


M_A_A8 R372 34.8/F_4
M_A_A9 R750 34.8/F_4
M_A_A10 R742 34.8/F_4
+SMDDR_VREF_DQ0 Place these Caps near Memory Down CA & DQ pin M_A_A11 R360 34.8/F_4
M_A_A12 R354 34.8/F_4
M_A_A13 R370 34.8/F_4
C729 C726 C394 C423 C337 M_A_A14 R368 34.8/F_4
Quanta Computer Inc.
1

1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 10u/6.3V_6 M_A_A15 R346 34.8/F_4


C406 C759 C758 C403 C404 C765 C762 C401
0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4
PROJECT : Z8C
2

M_A_CKE1 R743 34.8/F_4


M_A_CS#1 R340 34.8/F_4 Size Document Number Rev
3A
DDR3 MEMORY DOWNx16 A
Date: Saturday, November 15, 2014 Sheet 14 of 48
1 2 3 4 5 6 7 8
5 4 3 2 1

3 M_B_A[15:0]
M_B_A0
M_B_A1
M_B_A2
M_B_A3
98
97
96
95
JDIM1A

A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
17
M_B_DQ12
M_B_DQ14
M_B_DQ10
M_B_DQ13
M_B_DQ[63:0] 3
+1.35V_SUS

75
76
81
82
JDIM1B

VDD1
VDD2
VDD3
VSS16
VSS17
VSS18
44
48
49
54
15
M_B_A4 92 A3 DQ3 4 M_B_DQ9 87 VDD4 VSS19 55
M_B_A5 91 A4 DQ4 6 M_B_DQ8 88 VDD5 VSS20 60
M_B_A6 90 A5 DQ5 16 M_B_DQ11 93 VDD6 VSS21 61
M_B_A7 86 A6 DQ6 18 M_B_DQ15 94 VDD7 VSS22 65
M_B_A8 89 A7 DQ7 21 M_B_DQ28 99 VDD8 VSS23 66
D
M_B_A9 85 A8 DQ8 23 M_B_DQ29
2.48A 100 VDD9 VSS24 71
D

M_B_A10 107 A9 DQ9 33 M_B_DQ26 105 VDD10 VSS25 72


M_B_A11 84 A10/AP DQ10 35 M_B_DQ27 106 VDD11 VSS26 127

PC2100 DDR3 SDRAM SO-DIMM


M_B_A12 83 A11 DQ11 22 M_B_DQ24 111 VDD12 VSS27 128
M_B_A13 119 A12/BC# DQ12 24 M_B_DQ25 112 VDD13 VSS28 133
M_B_A14 80 A13 DQ13 34 M_B_DQ31 117 VDD14 VSS29 134
M_B_A15 78 A14 DQ14 36 M_B_DQ30 118 VDD15 VSS30 138
A15 DQ15 39 M_B_DQ44 123 VDD16 VSS31 139

PC2100 DDR3 SDRAM SO-DIMM


109 DQ16 41 M_B_DQ41 124 VDD17 VSS32 144
3 M_B_BS#0 BA0 DQ17 VDD18 VSS33
108 51 M_B_DQ43 145
3 M_B_BS#1 BA1 DQ18 VSS34
79 53 M_B_DQ45 199 150
3 M_B_BS#2 BA2 DQ19 +3V VDDSPD VSS35
114 40 M_B_DQ40 151
3 M_B_CS#0 S0# DQ20 VSS36
121 42 M_B_DQ47 77 155
3 M_B_CS#1 S1# DQ21 NC1 VSS37
101 50 M_B_DQ46 122 156
3 M_B_CLK0 CK0 DQ22 NC2 VSS38
103 52 M_B_DQ42 R297 *10K_4 125 161
3 M_B_CLK0# CK0# DQ23 +3V NCTEST VSS39
102 57 M_B_DQ61 162
3 M_B_CLK1 CK1 DQ24 VSS40
104 59 M_B_DQ60 PM_EXTTS#1 198 167
3 M_B_CLK1# CK1# DQ25 EVENT# VSS41
73 67 M_B_DQ57 30 168
3 M_B_CKE0 CKE0 DQ26 4,14 DDR3_DRAMRST# RESET# VSS42
74 69 M_B_DQ56 C362 *0.1u/10V_4 172
3 M_B_CKE1 CKE1 DQ27 VSS43
115 56 M_B_DQ58 173
3 M_B_CAS# CAS# DQ28 VSS44
110 58 M_B_DQ59 +SMDDR_VREF_DQ1 +SMDDR_VREF_DQ1 1 178
3 M_B_RAS# RAS# DQ29 VREF_DQ VSS45
113 68 M_B_DQ62 126 179
3 M_B_WE# WE# DQ30 +SMDDR_VREF_DIMM VREF_CA VSS46
R284 10K_4 DIMM1_SA0 197 70 M_B_DQ63 184
R288 10K_4 DIMM1_SA1 201 SA0 DQ31 129 M_B_DQ0 VSS47 185
+3V SA1 DQ32 VSS48
202 131 M_B_DQ5 2 189
8,13,14,33 CLK_SCLK 200 SCL DQ33 141 M_B_DQ3 3 VSS1 VSS49 190
8,13,14,33 CLK_SDATA SDA DQ34 143 M_B_DQ2 8 VSS2 VSS50 195
C C

(204P)
116 DQ35 130 M_B_DQ4 9 VSS3 VSS51 196
4 M_B_ODT0_DIMM ODT0 DQ36 VSS4 VSS52
120 132 M_B_DQ1 13
4 M_B_ODT1_DIMM ODT1 DQ37 VSS5
140 M_B_DQ6 14
11 DQ38 142 M_B_DQ7 19 VSS6
28 DM0 DQ39 147 M_B_DQ17 20 VSS7
46 DM1 DQ40 149 M_B_DQ16 25 VSS8
63 DM2
DM3
(204P) DQ41
DQ42
157 M_B_DQ22 26 VSS9
VSS10 VTT1
203 +DDR_VTT_RUN
136 159 M_B_DQ18 31 204
153 DM4 DQ43 146 M_B_DQ21 32 VSS11 VTT2
170 DM5 DQ44 148 M_B_DQ20 37 VSS12 205
187 DM6 DQ45 158 M_B_DQ23 38 VSS13 GND 206
DM7 DQ46 160 M_B_DQ19 43 VSS14 GND
M_B_DQS1 12 DQ47 163 M_B_DQ36 VSS15
M_B_DQS3 29 DQS0 DQ48 165 M_B_DQ33
M_B_DQS5 47 DQS1 DQ49 175 M_B_DQ38 DDR3-DIMM1_H=5.2_STD
M_B_DQS7 64 DQS2 DQ50 177 M_B_DQ34
M_B_DQS0 137 DQS3 DQ51 164 M_B_DQ32
M_B_DQS2 154 DQS4 DQ52 166 M_B_DQ37
M_B_DQS4 171 DQS5 DQ53 174 M_B_DQ35
M_B_DQS6 188 DQS6 DQ54 176 M_B_DQ39
3 M_B_DQS[7:0] DQS7 DQ55
M_B_DQS#1 10 181 M_B_DQ55
M_B_DQS#3 27 DQS#0 DQ56 183 M_B_DQ51
M_B_DQS#5 45 DQS#1 DQ57 191 M_B_DQ53
M_B_DQS#7 62 DQS#2 DQ58 193 M_B_DQ50
M_B_DQS#0 135 DQS#3 DQ59 180 M_B_DQ52
M_B_DQS#2 152 DQS#4 DQ60 182 M_B_DQ49
M_B_DQS#4 169 DQS#5 DQ61 192 M_B_DQ48
B DQS#6 DQ62 B
M_B_DQS#6 186 194 M_B_DQ54
3 M_B_DQS#[7:0] DQS#7 DQ63
M1 solution
DDR3-DIMM1_H=5.2_STD +1.35V_SUS

R282 Vref_DQ
1.8K/F_4
+1.35V_SUS Place these Caps near SO-DIMM +SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM +SMDDR_VREF_DQ1
C316 C320 C318 C317 C356 +VREFDQ_SB_M3 R268 *SHORT_6 R279 2/F_6
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 0.1u/10V_4 0.1u/10V_4

2
C348 + C306 C357 C339 C327 C310
M3 solution C304 R283 C321
330u/2V_7343 0.022u/16V_4 1.8K/F_4 470p/50V_4

1
10u/6.3V_6 0.1u/10V_4 0.1u/10V_4

C346 C349 C315 C351 C355 2.2u/6.3V_6 2.2u/6.3V_6 R272


10u/6.3V_6 10u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 24.9/F_4

+3V +DDR_VTT_RUN

A C328 C331 C343 C353 C360 C312 C322 A


C313 C345 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
2.2u/6.3V_6 0.1u/10V_4 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6

Quanta Computer Inc.


PROJECT : Z8C
Size Document Number Rev
3A
DDRIII SO-DIMM-1
Date: Saturday, November 15, 2014 Sheet 15 of 48
5 4 3 2 1
1 2 3 4 5 6 7 8

+1.05V_GFX
Near GPU
C131
C105
EV@22U/6.3VS_6
EV@22U/6.3VS_6
U43A

1/14 PCI_EXPRESS

NVDD = 32.22 ~ 26.66 A +VGACORE


16
C111 EV@10U/6.3VS_6 PEX_WAKE AB6 C190 *EV@0.1U/10V_4
C106 EV@10U/6.3VS_6 Under GPU U43E
C89 EV@4.7U/6.3V_6 AA22 PEX_IOVDD 11/14 NVVDD
AB23 PEX_IOVDD PEX_RST AC7 VGA_RST# R124 *EV@SHORT_4 C123 EV@1U/6.3V_4 K10 VDD
PEGX_RST# 19
AC24 C168 EV@1U/6.3V_4 K12
C141 EV@1U/6.3V_4 AD25
PEX_IOVDD
PEX_IOVDD PEX_CLKREQ AC6 PEX_CLKREQ# R148 EV@10K/F_4 +3V_GFX C169 EV@1U/6.3V_4 K14
VDD
VDD U43C VDD33 = 56mA
A C133 EV@1U/6.3V_4 AE26 PEX_IOVDD C186 EV@1U/6.3V_4 K16 VDD 14/14 XVDD/VDD33 A
AE27 PEX_IOVDD PEX_REFCLK AE8 C140 EV@4.7U/6.3V_6 K18 VDD
CLK_PCIE_VGA 9
Under GPU PEX_REFCLK AD8 C125 EV@4.7U/6.3V_6 L11 VDD AD10 NC VDD33 G10
CLK_PCIE_VGA# 9 +3V_GFX
C154 EV@4.7U/6.3V_6 L13 VDD AD7 NC VDD33 G12
AC9 PEG_RXP0_C C147 EV@0.22U/10V_4 C149 EV@4.7U/6.3V_6 L15 B19 C148 Under
EV@0.1U/10V_4 GPU
PEX_IOVDD + PEX_IOVDDQ = 1.042A PEX_TX0
PEX_TX0 AB9 PEG_RXN0_C C153 EV@0.22U/10V_4
PEG_RX0 9
C159 EV@4.7U/6.3V_6 L17
VDD
VDD
NC
PEG_RX#0 9 M10
C136 EV@4.7U/6.3V_6 VDD
PEX_RX0 AG6 C135 EV@4.7U/6.3V_6 M12 VDD F11 3V3AUX_NC C214 Near
EV@4.7U/6.3V_6 GPU
+1.05V_GFX PEG_TX0 9
C97 EV@22U/6.3VS_6 AA10 PEX_IOVDDQ PEX_RX0 AG7 C151 EV@4.7U/6.3V_6 M14 VDD C1951 2 EV@1U/10V_6
PEG_TX#0 9
C118 *EV@22U/6.3VS_6 AA12 PEX_IOVDDQ C142 EV@4.7U/6.3V_6 M16 VDD V5 FERMI_RSVD1_NC
C91 *EV@10U/6.3VS_6 AA13 PEX_IOVDDQ PEX_TX1 AB10 PEG_RXP1_C C144 EV@0.22U/10V_4 C124 EV@4.7U/6.3V_6 M18 VDD V6 FERMI_RSVD2_NC
PEG_RX1 9
C126 EV@10U/6.3VS_6 AA16 PEX_IOVDDQ PEX_TX1 AC10 PEG_RXN1_C C138 EV@0.22U/10V_4 N11 VDD VDD33 G8
PEG_RX#1 9 +3V_GFX
C611 EV@4.7U/6.3V_6 AA18 PEX_IOVDDQ N13 VDD VDD33 G9
AA19 PEX_IOVDDQ PEX_RX1 AF7 2 1 N15 VDD
PEG_TX1 9
Near GPU AA20 AE7 C146 N17

+
PEX_IOVDDQ PEX_RX1 PEG_TX#1 9 VDD
AA21 PEX_IOVDDQ EV@330u_2.5V_3528 P10 VDD CONFIGURABLE C213 EV@4.7U/6.3V_6
AB22 PEX_IOVDDQ PEX_TX2 AD11 PEG_RXP2_C C132 EV@0.22U/10V_4 P12 VDD POWER CHANNELS C1961 2 EV@1U/10V_6
AC23 AC11 PEG_RXN2_C C128 PEG_RX2 9 P14
PEX_IOVDDQ PEX_TX2 EV@0.22U/10V_4 VDD * nc on substrate
AD24 PEG_RX#2 9 P16
Under GPU PEX_IOVDDQ VDD
C150 *EV@1U/6.3V_4 AE25 PEX_IOVDDQ PEX_RX2 AE9 P18 VDD G1 XPWR_G1 C161 EV@0.1U/10V_4
PEG_TX2 9
C160 *EV@1U/6.3V_4 AF26 PEX_IOVDDQ PEX_RX2 AF9 R11 VDD G2 XPWR_G2 C171 EV@0.1U/10V_4
PEG_TX#2 9
AF27 PEX_IOVDDQ C247 EV@22U/6.3V_8 R13 VDD G3 XPWR_G3
PEX_TX3 AC12 PEG_RXP3_C C158 EV@0.22U/10V_4 C232 EV@47u/6.3V_8 R15 VDD G4 XPWR_G4 Under GPU
AB12 PEG_RXN3_C C164 PEG_RX3 9 R17 G5
PEX_TX3 EV@0.22U/10V_4 VDD XPWR_G5
PEG_RX#3 9
C248 EV@4.7U/6.3VS_6 T10 VDD G6 XPWR_G6
PEX_RX3 AG9 C206 EV@4.7U/6.3VS_6 T12 VDD G7 XPWR_G7
PEG_TX3 9
PEX_RX3 AG10 C215 EV@4.7U/6.3VS_6 T14 VDD
PEG_TX#3 9
C217 EV@4.7U/6.3VS_6 T16
PEX_PLL_HVDD + PEX_TX4 AB13 C257 EV@4.7U/6.3VS_6 T18
VDD
VDD V1 XPWR_V1

B
PEX_SVDD_3V3 = 143mA PEX_TX4 AC13 U11
U13
VDD V2 XPWR_V2
B
Near GPU VDD
PEX_RX4 AF10 U15 VDD
+3V_GFX PEX_RX4 AE10 U17 VDD
V10 VDD
PEX_TX5 AD14 V12 VDD W1 XPWR_W1
AA8 PEX_PLL_HVDD PEX_TX5 AC14 V14 VDD W2 XPWR_W2
C170 EV@0.1U/10V_4 AA9 PEX_PLL_HVDD V16 VDD W3 XPWR_W3
C187 EV@4.7U/6.3V_6 PEX_RX5 AE12 V18 VDD W4 XPWR_W4
C188 EV@4.7U/6.3V_6 PEX_RX5 AF12
Near GPU AB8 PEX_SVDD_3V3
PEX_TX6 AC15 bga595-nvidia-n13p-gv2-s-a2 bga595-nvidia-n13p-gv2-s-a2 COMMON

PEX_TX6 AB15 COMMON

PEX_RX6 AG12
PEX_RX6 AG13

PEX_TX7 AB16 Power up


AC16
PEX_TX7
sequence
PEX_RX7 AF13
AE13
PEX_RX7 ALL 3.3V
PEX_TX8 AD17 +3VGFX & +3V3_AON
NC
NC PEX_TX8 AC17
+3V
PEX_RX8 AE15
NC
NC PEX_RX8 AF15

F2 VDD_SENSE NC PEX_TX9 AC18 NVVDD t>0


42 GPU_VCCP_SENSE AB18
NC PEX_TX9
C C275 +VGACORE C
F1 GND_SENSE PEX_RX9 AG15 U22 EV@0.1U/10V_4
42 GPU_VSSP_SENSE NC
PEX_RX9 AG16 EV@MC74VHC1G08DFT2G
NC

5
AB19 2
NC PEX_TX10
AC19
7,13,27,28,29,35 PLTRST#
4 R183 *EV@SHORT_4 PEGX_RST#
PEX_VDD
PEX_TX10
NC
1 +1.05V_GFX
10 DGPU_HOLD_RST#
AF16
NC PEX_RX10
AE16
t>=0
NC PEX_RX10

3
AD20 R179
NC PEX_TX11
AC20 EV@100K/F_4
FBVDDQ
NC PEX_TX11
+1.5V_GFX Power down
AE18
NC
NC
PEX_RX11
PEX_RX11 AF18 sequence
PEX_TX12 AC21
NC
PEX_TX12 AB21
NC
+3V_GFX
*EV@200/F_4 R83 PEX_TSTCLK AF22 PEX_TSTCLK_OUT NC PEX_RX12 AG18
PEX_TSTCLK# AE22 PEX_TSTCLK_OUT PEX_RX12 AG19
NC
CX300T30001 Change to 0ohm
+1.05V_GFX R67 EV@0_6 NC PEX_TX13 AD23 Follow Z09 to isolate CLK_REQ#
NC PEX_TX13 AE23
2

Near GPU
EV@4.7U/6.3V_6 C84 PEX_PLLVDD AA14 PEX_PLLVDD PEX_RX13 AF19
NC
EV@1U/6.3V_4 C143 AA15 PEX_PLLVDD NC PEX_RX13 AE19 PEX_CLKREQ# 1 3
CLK_PEGA_REQ# 9
EV@0.1U/10V_4 C134 NC PEX_TX14 AF24 Q11 PU at page 9
Under GPU PEX_TX14 AE24 EV@2N7002K
NC
D D
PEX_PLLVDD = 130mA NC PEX_RX14 AE21
PEX_RX14 AF21 R147 *EV@0_4
NC
EV@10K/F_4 R116 TESTMODE AD9 TESTMODE
PEX_TX15 AG24
NC
NC PEX_TX15 AG25

NC PEX_RX15 AG21
AG22
Quanta Computer Inc.
NC PEX_RX15

GF117 GF119
PROJECT : Z8C
EV@2.49K/F_4 R493 PEX_TERMP AF25 PEX_TERMP Size Document Number Rev
N15S-GT (PCIE I/F) /NVDD 3A
bga595-nvidia-n13p-gv2-s-a2 COMMON Date: Saturday, November 15, 2014 Sheet 16 of 48
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U43B

17
2/14 FBA VMA_DQ[63:0]
VMA_DQ[63:0] 20,21,22,23
R603 PS_FB_CLAMP F3
EV@10K/F_4 NC GF119 FBA_D0 E18 VMA_DQ0
FBA_D1 F18 VMA_DQ1
FB_CLAMP FBA_D2 E16 VMA_DQ2
GF117
F17 VMA_DQ3
FBA_D3
FBA_D4 D20 VMA_DQ4 FBVDDQ + FBVDD = 3.116A U43F
FBA_D5 D21 VMA_DQ5 13/14 GND
FBA_D6 F20 VMA_DQ6 +1.35V_GFX U43D A2 GND GND M13
FBA_D7 E21 VMA_DQ7 12/14 FBVDDQ AB17 GND GND M15
FBA_D8 E15 VMA_DQ8 AB20 GND GND M17
FBA_D9 D15 VMA_DQ9 C109 EV@0.1U/10V_4 B26 FBVDDQ AB24 GND GND N10
FBA_ODT_L FBA_CMD0 R487 EV@10K/F_4 FBA_D10 F15 VMA_DQ10 C122 EV@0.1U/10V_4 C25 FBVDDQ AC2 GND GND N12
FBA_D11 F13 VMA_DQ11 E23 FBVDDQ AC22 GND GND N14
A FBA_ODT_H FBA_CMD3 R61 EV@10K/F_4 FBA_D12 C13 VMA_DQ12 E26 FBVDDQ AC26 GND GND N16 A
FBA_D13 B13 VMA_DQ13 C1371 2 EV@1U/10V_6 F14 FBVDDQ AC5 GND GND N18
FBA_RST# FBA_CMD16 R34 EV@10K/F_4 FBA_D14 E13 VMA_DQ14 C1131 2 EV@1U/10V_6 F21 FBVDDQ AC8 GND GND P11
FBA_D15 D13 VMA_DQ15 C112 EV@4.7U/6.3V_6 G13 FBVDDQ AD12 GND GND P13
FBA_CKE_L FBA_CMD19 R47 EV@10K/F_4 FBA_D16 B15 VMA_DQ16 C114 EV@4.7U/6.3V_6 G14 FBVDDQ AD13 GND GND P15
FBA_D17 C16 VMA_DQ17 C117 EV@10U/6.3V_6 G15 FBVDDQ A26 GND GND P17
FBA_CKE_H FBA_CMD20 R468 EV@10K/F_4 FBA_D18 A13 VMA_DQ18 C119 EV@22U/6.3V_8 G16 FBVDDQ AD15 GND GND P2
FBA_D19 A15 VMA_DQ19 G18 FBVDDQ AD16 GND GND P23
FBA_D20 B18 VMA_DQ20 G19 FBVDDQ AD18 GND GND P26
FBA_D21 A18 VMA_DQ21 G20 FBVDDQ AD19 GND GND P5
FBA_D22 A19 VMA_DQ22 G21 FBVDDQ AD21 GND GND R10
FBA_D23 C19 VMA_DQ23 H24 FBVDDQ AD22 GND GND R12
FBA_D24 B24 VMA_DQ24 H26 FBVDDQ AE11 GND GND R14
FBA_D25 C23 VMA_DQ25 J21 FBVDDQ AE14 GND GND R16
FBA_D26 A25 VMA_DQ26 K21 FBVDDQ AE17 GND GND R18
FBA_D27 A24 VMA_DQ27 L22 FBVDDQ AE20 GND GND T11
FBA_D28 A21 VMA_DQ28 L24 FBVDDQ AB11 GND GND T13
FBA_D29 B21 VMA_DQ29 L26 FBVDDQ AF1 GND GND T15
FBA_D30 C20 VMA_DQ30 M21 FBVDDQ AF11 GND GND T17
FBA_D31 C21 VMA_DQ31 N21 FBVDDQ AF14 GND GND U10
FBA_D32 R22 VMA_DQ32 R21 FBVDDQ AF17 GND GND U12
C27 FBA_CMD0 FBA_D33 R24 VMA_DQ33 T21 FBVDDQ AF20 GND GND U14
20,21 FBA_CMD0
C26 FBA_CMD1 FBA_D34 T22 VMA_DQ34 V21 FBVDDQ AF23 GND GND U16
21 FBA_CMD1
E24 FBA_CMD2 FBA_D35 R23 VMA_DQ35 W 21 FBVDDQ AF5 GND GND U18
20 FBA_CMD2
F24 FBA_CMD3 FBA_D36 N25 VMA_DQ36 AF8 GND GND U2
20,21 FBA_CMD3
D27 FBA_CMD4 FBA_D37 N26 VMA_DQ37 AG2 GND GND U23
20,21,22,23 FBA_CMD4
D26 FBA_CMD5 FBA_D38 N23 VMA_DQ38 AG26 GND GND U26
20,21,22,23 FBA_CMD5
F25 FBA_CMD6 FBA_D39 N24 VMA_DQ39 AB14 GND GND U5
20,21,22,23 FBA_CMD6
F26 FBA_CMD7 FBA_D40 V23 VMA_DQ40 B1 GND GND V11
20,21,22,23 FBA_CMD7
F23 FBA_CMD8 FBA_D41 V22 VMA_DQ41 B11 GND GND V13
20,21,22,23 FBA_CMD8
B G22 FBA_CMD9 FBA_D42 T23 VMA_DQ42 B14 GND GND V15 B
20,21,22,23 FBA_CMD9
G23 FBA_CMD10 FBA_D43 U22 VMA_DQ43 B17 GND GND V17
20,21,22,23 FBA_CMD10
G24 FBA_CMD11 FBA_D44 Y24 VMA_DQ44 B20 GND GND Y2
20,21,22,23 FBA_CMD11
F27 FBA_CMD12 FBA_D45 AA24 VMA_DQ45 B23 GND GND Y23
20,21,22,23 FBA_CMD12
G25 FBA_CMD13 FBA_D46 Y22 VMA_DQ46 B27 GND GND Y26
20,21,22,23 FBA_CMD13
G27 FBA_CMD14 FBA_D47 AA23 VMA_DQ47 B5 GND GND Y5
20,21,22,23 FBA_CMD14
G26 FBA_CMD15 FBA_D48 AD27 VMA_DQ48 B8 GND
20,21,22,23 FBA_CMD15
M24 FBA_CMD16 FBA_D49 AB25 VMA_DQ49 E11 GND
22,23 FBA_CMD16
M23 FBA_CMD17 FBA_D50 AD26 VMA_DQ50 E14 GND
23 FBA_CMD17
K24 FBA_CMD18 FBA_D51 AC25 VMA_DQ51 E17 GND
22 FBA_CMD18
K23 FBA_CMD19 FBA_D52 AA27 VMA_DQ52 E2 GND
22,23 FBA_CMD19
M27 FBA_CMD20 FBA_D53 AA26 VMA_DQ53 E20 GND
20,21,22,23 FBA_CMD20
M26 FBA_CMD21 FBA_D54 W 26 VMA_DQ54 E22 GND
20,21,22,23 FBA_CMD21
M25 FBA_CMD22 FBA_D55 Y25 VMA_DQ55 E25 GND
20,21,22,23 FBA_CMD22
K26 FBA_CMD23 FBA_D56 R26 VMA_DQ56 E5 GND
20,21,22,23 FBA_CMD23
K22 FBA_CMD24 FBA_D57 T25 VMA_DQ57 E8 GND
20,21,22,23 FBA_CMD24
J23 FBA_CMD25 FBA_D58 N27 VMA_DQ58 H2 GND
20,21,22,23 FBA_CMD25
J25 FBA_CMD26 FBA_D59 R27 VMA_DQ59 H23 GND
20,21,22,23 FBA_CMD26
J24 FBA_CMD27 FBA_D60 V26 VMA_DQ60 H25 GND
20,22 FBA_CMD27
K27 FBA_CMD28 FBA_D61 V27 VMA_DQ61 FB_CAL_PD_VDDQ D22 FB_CAL_PD_VDDQ R172 EV@40.2/F_4 +1.35V_GFX H5 GND
20,21,22,23 FBA_CMD28
K25 FBA_CMD29 FBA_D62 W 27 VMA_DQ62 K11 GND
20,21,22,23 FBA_CMD29 VMA_DM[7:0] 20,21,22,23
J27 FBA_CMD30 FBA_D63 W 25 VMA_DQ63 K13 GND
21,23 FBA_CMD30
J26 FBA_CMD31 FB_CAL_PU_GND C24 FB_CAL_PU_GND R161 EV@42.2/F_4 K15 GND
K17 GND
FBA_DQM0 D19 VMA_DM0 L10 GND
FBA_DQM1 D14 VMA_DM1 FB_CALTERM_GND B25 FB_CAL_TERM_GND R149 EV@51.1/F_4 L12 GND
FBA_DQM2 C17 VMA_DM2 L14 GND
FBA_DQM3 C22 VMA_DM3 L16 GND
FBA_DQM4 P24 VMA_DM4 bga595-nvidia-n13p-gv2-s-a2 L18 GND
FBA_DQM5 W 24 VMA_DM5 COMMON L2 GND
+1.35V_GFX
C
FBA_DQM6 AA25 VMA_DM6 L23 GND C
R174 *EV@60.4_4F22 FBA_DEBUG0 FBA_DQM7 U25 VMA_DM7 L25 GND
R173 *EV@60.4_4J22 FBA_DEBUG1 L5 GND GND AA7
M11 GND GND AB7
VMA_WDQS[7:0] 20,21,22,23
FBA_DQS_WP0 E19 VMA_WDQS0
FBA_DQS_WP1 C15 VMA_WDQS1
D24 FBA_CLK0 FBA_DQS_WP2 B16 VMA_WDQS2
20,21 VMA_CLK0
D25 FBA_CLK0 FBA_DQS_WP3 B22 VMA_WDQS3 bga595-nvidia-n13p-gv2-s-a2 COMMON
20,21 VMA_CLK0#
N22 FBA_CLK1 FBA_DQS_WP4 R25 VMA_WDQS4
22,23 VMA_CLK1
M22 FBA_CLK1 FBA_DQS_WP5 W 23 VMA_WDQS5
22,23 VMA_CLK1#
FBA_DQS_WP6 AB26 VMA_WDQS6
T26 VMA_WDQS7 +1.35V_GFX
FBA_DQS_WP7 For support GC6 2.0
VMA_RDQS[7:0] 20,21,22,23 +3V
D18 FBA_WCK01 FBA_DQS_RN0 F19 VMA_RDQS0
C18 FBA_WCK01 FBA_DQS_RN1 C14 VMA_RDQS1
D17 FBA_WCK23 FBA_DQS_RN2 A16 VMA_RDQS2 EV@100/F_4 R480 FBA_CMD4 EV@100/F_4 R473
D16 FBA_WCK23 FBA_DQS_RN3 A22 VMA_RDQS3 EV@100/F_4 R485 FBA_CMD5 EV@100/F_4 R490 C267
T24 FBA_WCK45 FBA_DQS_RN4 P25 VMA_RDQS4 EV@100/F_4 R436 FBA_CMD6 EV@100/F_4 R435 R201 *EV@0_4 EV@0.1U/10V_4
19,35 EC_FB_CLAMP

5
U24 FBA_WCK45 FBA_DQS_RN5 W 22 VMA_RDQS5 EV@100/F_4 R444 FBA_CMD7 EV@100/F_4 R443
V24 FBA_WCK67 FBA_DQS_RN6 AB27 VMA_RDQS6 EV@100/F_4 R54 FBA_CMD8 EV@100/F_4 R39 R199 2
*EV@SHORT_4 *EV@NL17SZ32DFT2G
10,19 GC6_FB_EN
V25 FBA_WCK67 FBA_DQS_RN7 T27 VMA_RDQS7 EV@100/F_4 R58 FBA_CMD9 EV@100/F_4 R63 4
1 FBVDDQ_EN 43
FB_PLLAVDD = 55mA EV@100/F_4 R53 FBA_CMD10 EV@100/F_4 R42 42 VGPU_PWRGD
EV@100/F_4 R457 FBA_CMD11 EV@100/F_4 R458
EV@100/F_4 R52 FBA_CMD12 EV@100/F_4 R41 U21

3
L13 EV@PBY160808T-300Y-N+FB_PLLAVDD F16 FB_PLLAVDD EV@100/F_4 R51 FBA_CMD13 EV@100/F_4 R49
+1.05V_GFX
EV@100/F_4 R9 FBA_CMD14 EV@100/F_4 R10 R197
C115 EV@22U/6.3VS_6 P22 FB_PLLAVDD EV@100/F_4 R442 FBA_CMD15 EV@100/F_4 R441 EV@100K/F_4
C110 EV@0.1U/10V_4 EV@100/F_4 R478 FBA_CMD21 EV@100/F_4 R469 R218 *EV@SHORT_4
C129 EV@0.1U/10V_4 H22 FB_DLLAVDD GF119 EV@100/F_4 R479 FBA_CMD22 EV@100/F_4 R470
D C116 EV@0.1U/10V_4 EV@100/F_4 R462 FBA_CMD23 EV@100/F_4 R463 D
EV@100/F_4 R5 FBA_CMD24 EV@100/F_4 R4
FB_PLLAVDD GF117 FBA_CMD25 Need Check footprint & PN!
EV@100/F_4 R38 EV@100/F_4 R36
EV@100/F_4 R16 FBA_CMD26 EV@100/F_4 R15
EV@100/F_4 R18 FBA_CMD27 EV@100/F_4 R17
FB_DLLAVDD = 15mA EV@100/F_4 R456 FBA_CMD28 EV@100/F_4 R454
EV@100/F_4 R48 FBA_CMD29 EV@100/F_4 R35

D23
EV@100/F_4 R477 FBA_CMD30 EV@100/F_4 R471 Quanta Computer Inc.
FB_VREF_PROBE
INT PROJECT : Z8C
bga595-nvidia-n13p-gv2-s-a2 COMMON Size Document Number Rev
N15S-GT (MEMORY/GND) 3A

Date: Saturday, November 15, 2014 Sheet 17 of 48


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U43G U43J

AA6
4/14 IFPAB

IFPAB_RSET
GF119 GF117

NC
GF117
NC
NC
GF119
IFPA_TXC
IFPA_TXC
AC4
AC3
7/14 IFPEF

GF119 GF117
GF117

NC
NC
DVI-DL

I2CY_SDA
I2CY_SCL
GF119
DVI-SL/HDMI

I2CY_SDA
I2CY_SCL
DP

IFPE_AUX
IFPE_AUX
J3
J2
18
IFPA_TXD0 Y3 J7 IFPEF_PLLVDD
NC NC
IFPA_TXD0 Y4
NC
IFPE_L3 J1
NC TXC TXC
V7 IFPAB_PLLVDD IFPE_L3 K1
NC NC TXC TXC
NC IFPA_TXD1 AA2 K7 IFPEF_PLLVDD NC
W7 IFPAB_PLLVDD IFPA_TXD1 AA3 IFPE_L2 K3
NC NC NC TXD0 TXD0
A
IFPE_L2 K2 U43K A
NC TXD0 TXD0
3/14 DACA
IFPA_TXD2 AA1 K6 IFPEF_RSET IFPE_L1 M3
NC NC NC TXD1 TXD1 GF119
NC IFPA_TXD2 AB1 IFPE_L1 M2 GF117
GF117 GF119
NC TXD1 TXD1
W5 DACA_VDD I2CA_SCL B7 I2CA_SCL R631 EV@2.2K_4
NC NC
IFPE_L0 M1 I2CA_SDA A7 I2CA_SDA R611 EV@2.2K_4
NC TXD2 TXD2 NC
IFPA_TXD3 AA5 IFPE_L0 N1 AE2 DACA_VREF
NC NC TXD2 TXD2 TSEN_VREF
IFPA_TXD3 AA4
NC
AF2 DACA_RSET NC NC DACA_HSYNC AE3
IFPE NC DACA_VSYNC AE4
IFPB_TXC AB4
NC
IFPB_TXC AB5
NC
NC HPD_E HPD_E GPIO18 C2 DACA_RED AG3
GF119 GF117 NC
W6 IFPA_IOVDD IFPB_TXD4 AB2 DACA_GREEN AF4
NC NC NC
IFPB_TXD4 AB3
NC GF119 GF117
Y6 IFPB_IOVDD DACA_BLUE AF3
NC NC
H6 IFPE_IOVDD NC
NC IFPB_TXD5 AD2 GF119
IFPB_TXD5 AD3 J6 IFPF_IOVDD GF117
NC NC DVI-DL DVI-SL/HDMI DP

NC IFPF_AUX H4 bga595-nvidia-n13p-gv2-s-a2 COMMON


I2CZ_SDA
IFPB_TXD6 AD1 NC I2CZ_SCL IFPF_AUX H3
NC
NC IFPB_TXD6 AE1

NC TXC IFPF_L3 J5
IFPB_TXD7 AD5 IFPF_L3 J4 +3V_GFX
NC NC TXC
IFPB_TXD7 AD4
NC
NC TXD3 TXD0 IFPF_L2 K5
NC IFPF_L2 K4
TXD3 TXD0
B +3V B
NC TXD4 TXD1 IFPF_L1 L4 R70
IFPF NC TXD4 TXD1 IFPF_L1 L3 EV@1.5K/F_4
NC GPIO14 B3
IFPAB NC
NC
TXD5
TXD5
TXD2
TXD2
IFPF_L0
IFPF_L0
M5
M4
R64
EV@4.7K_4
3V_MAIN_PWGD
3V_MAIN_PWGD 42,43

3
bga595-nvidia-n13p-gv2-s-a2 COMMON

R66
U43H 2 *EV@100K/F_4

3
5/14 IFPC
IFPC NC HPD_F GPIO19 F7
+3V_GFX R71 EV@4.7K_4 2
GF119 GF117 C70 Q5

1
T6 IFPC_RSET GF117 GF119 Q6 EV@1000p/50V_4 EV@DTC144EU
NC

1
C85 EV@MMBT3904-7-F
DVI/HDMI DP *EV@1000p/50V_4 +1.05V_GFX and GPU core power EN
M7 IFPC_PLLVDD NC NC I2CW_SDA IFPC_AUX N5 bga595-nvidia-n13p-gv2-s-a2 COMMON

N7 IFPC_PLLVDD NC I2CW_SCL IFPC_AUX N4


NC

IFPC_L3 N3 PLLVDD = 38mA


NC TXC
N2
NC TXC IFPC_L3
L15 EV@PBY160808T-300Y-N NV_PLLVDD
DB-->SI change 10/25
+1.05V_GFX
NC TXD0 IFPC_L2 R3 C167 EV@0.1U/10V_4 Use G-CLK
IFPC_L2 R2 C234 EV@22U/6.3VS_6
NC TXD0

TXD1 IFPC_L1 R1
NC
NC TXD1 IFPC_L1 T1
U43M C656
T3
SP_PLLVDD = 17mA
NC IFPC_L0 9/14 XTAL_PLL
TXD2
C
IFPC_L0 T2 L14 EV@HCB1005KF-181T15(180,1500MA) SP_PLLVDD C
NC TXD2 +1.05V_GFX

4
3
C166 EV@0.1U/10V_4 L6 PLLVDD EV@10P/50V_4
C237 EV@0.1U/10V_4 M6 SP_PLLVDD 27M_XTAL_IN_R Y4
C230 EV@4.7U/6.3V_6 27M_XTAL_OUT EV@27MHZ +-10PPM
P6 IFPC_IOVDD NC GPIO15 C3 C218 EV@22U/6.3VS_6 N6 VID_PLLVDD
NC GF119
C658

1
2
bga595-nvidia-n13p-gv2-s-a2 COMMON
NC GF117
VID_PLLVDD = 41mA
EV@10P/50V_4
U43I
6/14 IFPD R634 EV@10K/F_4 XTAL_SSIN A10 XTALSSIN XTALOUTBUFF C10 BXTALOUT R613 EV@10K/F_4
GF119 GF117
U6 GF117 GF119 27M_XTAL_IN_R C11 B10 27M_XTAL_OUT
IFPD_RSET NC XTALIN XTALOUT
DVI/HDMI DP bga595-nvidia-n13p-gv2-s-a2 COMMON

T7 IFPD_PLLVDD IFPD_AUX P4
DB-->SI change 10/25
NC NC I2CX_SDA
NC I2CX_SCL IFPD_AUX P3 Use G-CLK
R7 IFPD_PLLVDD NC
+3V_GFX
IFPD_L3 R5
NC TXC
IFPD_L3 R4
NC TXC
DGPU_PGOK-1
IFPD_L2 T5 +3V R65
NC TXD0
IFPD_L2 T4 EV@4.7K_4
NC TXD0

TXD1 IFPD_L1 U4
NC
IFPD NC TXD1 IFPD_L1 U3 R59
DGPU_PWROK 10
EV@4.7K_4
D
IFPD_L0 V4 D
NC TXD2

3
IFPD_L0 V3
NC TXD2
2 Q7 R69
3

EV@100K/F_4
R6 IFPD_IOVDD GPIO17 D4 R56 DGPU_POK2 2
EV@4.7K_4 Q4 EV@DTC144EUA
GF119 NC 43 HWPG_1.5VGFX
EV@METR3904-G
Quanta Computer Inc.
1
NC GF117 C77
1

C63 EV@1000P/50V_4
*EV@1000P/50V_4
PROJECT : Z8C
Size Document Number Rev
bga595-nvidia-n13p-gv2-s-a2 COMMON
N15S-GT (DISPLAY) 3A

Date: Saturday, November 15, 2014 Sheet 18 of 48


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

19
+3V_GFX +3V_GFX
U43L Default: HYNIX
10/14 MISC2

R591 R583 R627 R618 4.99k CS24992FB26


TP13 E10 VMON_IN0 R584 *EV@4.99K/F_4*EV@4.99K/F_4 EV@49.9K/F_4R606 *EV@30.1K/F_4R605 R608 10k CS31002FB26
TP18 F10 VMON_IN1 ROM_CS D12 ROM_CS R171 EV@10K/F_4 *EV@10K/F_4 *EV@10K/F_4 *EV@10K/F_4 *EV@10K/F_4 15k CS31502FB24
+3V_GFX
20k CS32002FB29
ROM_SI B12 ROM_SI 24.9k CS32492FB16
ROM_SO A12 ROM_SO ROM_SI STRAP0 30.1k CS33012FB18
STRAP0 D1 STRAP0 ROM_SCLK C12 ROM_SCLK ROM_SO STRAP1 34.8k CS33482FB06
STRAP1 D2 STRAP1 ROM_SCLK STRAP2 45.3k CS34532FB18
STRAP2 E4 STRAP2 STRAP3
A STRAP3 E3 STRAP4 A
STRAP3
STRAP4 D3 STRAP4

2
R590 R585 R589 R607 R626 R623 R625 R628
GF119 GF117
EV@4.99K/F_4 EV@4.99K/F_4EV@4.99K/F_4 *EV@24.9K/F_4*EV@45.3K/F_4 *EV@4.99K/F_4*EV@45.3K/F_4
C1 STRAP5_NC *EV@15K/F_4
NC
BUFRST D11

1
R604 F6
EV@40.2K/F_4 MULTISTRAP_REF0_GND PGOOD D10

GF119 GF117
R170 *EV@10K/F_4 +3V_GFX
F4 MULTISTRAP_REF1_GND NC
CEC E9 SYS_PEX_RST_MON# TP22
F5 MULTISTRAP_REF2_GND NC +3V_GFX N15S-GT only ROM_SI
bga595-nvidia-n13p-gv2-s-a2 COMMON Hynix should be 0x0, R590 4.99K 1%
Q12
5
Dual
U43N
8,35 2ND_MBDATA 2ND_MBDATA 3 4 GPUT_DATA_L Samsung Should be 0x2, R590 15K 1%
8/14 MISC1 R176 EV@4.7K_4 +3V_GFX
I2CS_SCL D9 GPUT_CLK_L 2 R175 EV@4.7K_4

N15V-GM
+3V_GFX
I2CS_SDA D8 GPUT_DATA_L
8,35 2ND_MBCLK 2ND_MBCLK 6 1 GPUT_CLK_L strap0~3
I2CC_SCL A9 DGPU_EDIDCLK R614 EV@2.2K_4
I2CC_SDA B9 DGPU_EDIDDATA R633 EV@2.2K_4
Dual EV@2N7002DW Hynix should be 0x4, R590 24.9K 1%
B TP11 THERM- E12 GF117 GF119 B
THERMDN
NC I2CB_SCL C9 N12E_SCL R632 EV@2.2K_4
TP10 THERM+ F12 THERMDP I2CB_SDA C8 N12E_SDA R612 EV@2.2K_4
NC EC_FB_CLAMP 17,35

GC6_FB_EN 10,17
Logical Strap Bit Mapping
PU-VDD PD
AE5
TP124
TP127
JTAG_TCK
JTAG_TMS AD6
JTAG_TCK
JTAG_TMS
R181 *EV@SHORT_4
+3V_GFX
ROM_SI
TP122 JTAG_TDI AE6 JTAG_TDI
4.99K 1000 0000
TP120 JTAG_TDO AF6 JTAG_TDO 1 3 R184 *EVG@0_4
JTAG_TRST# AG4 JTAG_TRST GPIO0 C6
FB_CLAMP_MON R189 *EV@0_4

10K 1001 0001


GPIO1 B2 Q14 R177 *EV@10K/F_4
GPIO2 D6 *EVG@2N7002K EV@10K/F_4 R178 *EV@0_4 R167 *EVG@0_4 FB_CLAMP_REQ# 35

2
15K 1010 0010
GPIO3 C7 R180 R163 *EV@0_4
DGPU_EVENT# 10
GPIO4 F9 +3V_GFX

20K 1011 0011


GPIO5 A3 +3V_MAIN_EN TP138
GPIO6 A4 GPU_EVENT# 1 3

24.9K 1100 0100


GPIO7 B6
OVERT A6 VGA_OVT# R182 Q13

30.1K 1101 0101


GPIO9 F8 ALERT *EVG@2N7002K

2
GPIO10 C5

34.8K 1110 0110


GPIO11 E7 VGPU_PWMVID 42 *EVG@10K/F_4
GPIO12 D7 GPIO12_ACIN

45.3K 1111 0111


GPIO13 B4 VGPU_PSI 42

GF117 GF119
+3V_GFX VRAM Configuration Table ROM_SI
NC GPIO16 D5 GPU_GPIO16 TP136 RAMCFG
NC GPIO20 E6
GPIO21 C4 GPU_PEX_RST_HOLD# TP137
[3:0] DESCRIPTION Vendor Vendor P/N QCI P/N QBC TOP B/S
NC
0000 ...
0100 DDR3L 256Mx16, 64bit, 4Gb,900MHz Micron MT41J256M16HA-093G:E AKD5PZSTL01 AKD5PZSTL00
C
0011 DDR3L 256Mx16, 64bit, 4Gb,900MHz HYNIX H5TC4G63AFR-11C AKD5PGWTW08 AKD5PGWTW07 C
bga595-nvidia-n13p-gv2-s-a2 COMMON
0101 DDR3L 256Mx16, 64bit, 4Gb,900MHz SAMSUNG K4W4G1646D-BC1A AKD5PGWT500 AKD5PGWT501 AKD5PGWT502
+3V_GFX

16 PEGX_RST#
GPIO12_ACIN R169 EV@10K/F_4

GPIO ASSIGNMENTS
2

VGPU_PSI R629 *EV@10K/F_4

VGA_OVT# 1 3 dGPU_OTP# 35
VGA_OVT# R185 EV@10K/F_4
GPIO I/O PIN USAGE
Q15
EV@2N7002K ALERT R624 EV@10K/F_4 0 IN FB_CLAMP_MON FB Clamp monitor
1 OUT MEM_VDD_CTL Memory VDD VID
GPU_PEX_RST_HOLD# R609 *EV@10K/F_4
2 OUT LCD_BL_PWM Panel Backlight PWM
GPU_EVENT# R630 *EV@10K/F_4
3 OUT LCD_VCC PANEL POWER ENABLE
dGPU_OPP# = EC control 4 OUT LCD_BLEN PANEL BACKLIGHT ENABLE
GPIO12_ACIN 1 3 +3V_MAIN_EN R610 *EV@10K/F_4
dGPU_OPP# 35 5 OUT Reserved --
Q10 GPIO12 AC detect JTAG_TMS R566 *EV@10K/F_4
6 OUT FB_CLAMP_TGL_REQ Active low FB Clamp toggle request
EV@2N7002K AC high
2

JTAG_TDI R552 *EV@10K/F_4


DC low 7 OUT 3D VISION 3D VISION LEFT/RIGHT signal
8 I/O OVERT ACTIVE LOW THERMAL OVER TEMP
+3V_GFX
D 9 I/O ALERT ACTIVE LOW THERMAL ALERT D

10 OUT MEM VREF_CTL MEMMORY VREF CONTROL


JTAG_TRST# R553 EV@10K/F_4
11 OUT PWR_VID GPU CORE_VDD PWM Control signal
JTAG_TCK R567 *EV@10K/F_4
12 IN PWR_LEVEL AC Power detect or power supply overdraw input
13 OUT PSI Phase Shedding Quanta Computer Inc.
PROJECT : Z8C
Size Document Number Rev
N15S-GT (GPIO/STRAPS) 3A

Date: Saturday, November 15, 2014 Sheet 19 of 48


1 2 3 4 5 6 7 8
5 4 3 2 1

20
U44

21 VREFC_VMA1 VREFC_VMA1 M8 E3 VMA_DQ11 17,21


VREFCA DQL0
21 VREFD_VMA1 VREFD_VMA1 H1
VREFDQ DQL1
F7 VMA_DQ13 17,21 HYU 256Mx16, H5TC4G63AFR-11C :AKD5PGWTW08---TOP B/S PN : AKD5PGWTW07
QBC PN:
F2
N3 DQL2 F8
VMA_DQ8 17,21 :AKD5PZSTL01---TOP B/S PN : AKD5PZSTL00
MIC 256Mx16, MT41J256M16HA-093G:E QBC PN:
17,21,22,23 FBA_CMD7 A0 DQL3 VMA_DQ15 17,21 SAM 256Mx16, K4W4G1646D-BC1A :AKD5PGWT501---TOP B/S PN : AKD5PGWT502
QBC PN:
17,21,22,23 FBA_CMD10 P7 H3 VMA_DQ10 17,21
P3 A1 DQL4 H8 U41
17,21,22,23 FBA_CMD24 A2 DQL5 VMA_DQ14 17,21
17,21,22,23 FBA_CMD6 N2 G2 VMA_DQ9 17,21
P8 A3 DQL6 H7 VREFC_VMA1 M8 E3
17,21,22,23 FBA_CMD22 A4 DQL7 VMA_DQ12 17,21 VREFCA DQL0 VMA_DQ5 17,21
17,21,22,23 FBA_CMD26 P2 VREFD_VMA1 H1 F7 VMA_DQ1 17,21
R8 A5 VREFDQ DQL1 F2
17,21,22,23 FBA_CMD5 A6 DQL2 VMA_DQ7 17,21
17,21,22,23 FBA_CMD21 R2 D7 VMA_DQ17 17,21 FBA_CMD7 N3 F8 VMA_DQ0 17,21
T8 A7 DQU0 C3 FBA_CMD10 P7 A0 DQL3 H3
D
17,21,22,23 FBA_CMD8 A8 DQU1 VMA_DQ22 17,21 A1 DQL4 VMA_DQ4 17,21 D
17,21,22,23 FBA_CMD4 R3 C8 VMA_DQ16 17,21 FBA_CMD24 P3 H8 VMA_DQ3 17,21
L7 A9 DQU2 C2 FBA_CMD6 N2 A2 DQL5 G2
17,21,22,23 FBA_CMD25 A10/AP DQU3 VMA_DQ23 17,21 A3 DQL6 VMA_DQ6 17,21
17,21,22,23 FBA_CMD23 R7 A7 VMA_DQ19 17,21 FBA_CMD22 P8 H7 VMA_DQ2 17,21
N7 A11 DQU4 A2 FBA_CMD26 P2 A4 DQL7
17,21,22,23 FBA_CMD9 A12/BC DQU5 VMA_DQ21 17,21 A5
17,21,22,23 FBA_CMD12 T3 B8 VMA_DQ18 17,21 FBA_CMD5 R8
T7 A13 DQU6 A3 FBA_CMD21 R2 A6 D7
17,21,22,23 FBA_CMD14 A14 DQU7 VMA_DQ20 17,21 A7 DQU0 VMA_DQ31 17,21
M7 FBA_CMD8 T8 C3 VMA_DQ25 17,21
A15 FBA_CMD4 R3 A8 DQU1 C8
A9 DQU2 VMA_DQ30 17,21
FBA_CMD25 L7 C2 VMA_DQ24 17,21
M2 B2 FBA_CMD23 R7 A10/AP DQU3 A7
17,21,22,23 FBA_CMD29 BA0 VDD#B2 +1.35V_GFX A11 DQU4 VMA_DQ29 17,21
17,21,22,23 FBA_CMD13 N8 D9 FBA_CMD9 N7 A2 VMA_DQ27 17,21
M3 BA1 VDD#D9 G7 EV@4.7U/6.3V_6C643 FBA_CMD12 T3 A12/BC DQU5 B8
17,22 FBA_CMD27 BA2 VDD#G7 A13 DQU6 VMA_DQ28 17,21
K2 FBA_CMD14 T7 A3 VMA_DQ26 17,21
VDD#K2 K8 EV@0.1U/10V_4 C645 M7 A14 DQU7
VDD#K8 N1 EV@0.1U/10V_4 C642 A15
J7 VDD#N1 N9
17,21 VMA_CLK0 CK VDD#N9
17,21 VMA_CLK0# K7 R1 GND FBA_CMD29 M2 B2 +1.35V_GFX
K9 CK VDD#R1 R9 FBA_CMD13 N8 BA0 VDD#B2 D9
17,21 FBA_CMD3 CKE VDD#R9 BA1 VDD#D9
FBA_CMD27 M3 G7 EV@4.7U/6.3V_6C591
BA2 VDD#G7 K2
K1 A1 VDD#K2 K8 EV@0.1U/10V_4 C579
17,21 FBA_CMD0 ODT VDDQ#A1 +1.35V_GFX VDD#K8
17 FBA_CMD2 L2 A8 N1 EV@0.1U/10V_4 C578
J3 CS VDDQ#A8 C1 EV@4.7U/6.3V_6C55 VMA_CLK0 J7 VDD#N1 N9
17,21,22,23 FBA_CMD11 RAS VDDQ#C1 CK VDD#N9
17,21,22,23 FBA_CMD15 K3 C9 VMA_CLK0# K7 R1 GND
CAS VDDQ#C9 CK VDD#R1
17,21,22,23 FBA_CMD28 L3
WE VDDQ#D2
D2 EV@0.1U/10V_4 C641 162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402) FBA_CMD3 K9
CKE VDD#R9
R9
E9 EV@0.1U/10V_4 C639
VDDQ#E9 F1
CS11622FB15 RES CHIP 162 1/16W +-1%(0402)
F3 VDDQ#F1 H2 GND VMA_CLK0 FBA_CMD0 K1 A1
17,21 VMA_WDQS1 DQSL VDDQ#H2 ODT VDDQ#A1 +1.35V_GFX
17,21 VMA_RDQS1 G3 H9 FBA_CMD2 L2 A8
DQSL VDDQ#H9 R87 FBA_CMD11 J3 CS VDDQ#A8 C1 EV@4.7U/6.3V_6C207
C EV@162_4 FBA_CMD15 K3 RAS VDDQ#C1 C9 C
E7 A9 FBA_CMD28 L3 CAS VDDQ#C9 D2 EV@0.1U/10V_4 C130
17,21 VMA_DM1 DML VSS#A9 WE VDDQ#D2
17,21 VMA_DM2 D3 B3 VMA_CLK0# E9 EV@0.1U/10V_4 C145
DMU VSS#B3 E1 VDDQ#E9 F1
VSS#E1 G8 F3 VDDQ#F1 H2 GND
VSS#G8 17,21 VMA_WDQS0 DQSL VDDQ#H2
17,21 VMA_WDQS2 C7 J2 17,21 VMA_RDQS0 G3 H9
B7 DQSU VSS#J2 J8 DQSL VDDQ#H9
17,21 VMA_RDQS2 DQSU VSS#J8 M1
VSS#M1 M9 E7 A9
VSS#M9 17,21 VMA_DM0 DML VSS#A9
P1 17,21 VMA_DM3 D3 B3
T2 VSS#P1 P9 DMU VSS#B3 E1
17,21,22,23 FBA_CMD20 RESET VSS#P9 VSS#E1
T1 G8
FBA_ZQ0 L8 VSS#T1 T9 C7 VSS#G8 J2
GND ZQ VSS#T9 17,21 VMA_WDQS3 DQSU VSS#J2
17,21 VMA_RDQS3 B7 J8
EV@243_4
R562 DQSU VSS#J8 M1
B1 GND VSS#M1 M9
VSSQ#B1 B9 +1.35V_GFX +1.35V_GFX VSS#M9 P1
VSSQ#B9 D1 FBA_CMD20 T2 VSS#P1 P9
VSSQ#D1 D8 RESET VSS#P9 T1
VSSQ#D8 E2 FBA_ZQ1 L8 VSS#T1 T9
VSSQ#E2 GND ZQ VSS#T9
J1 E8 R563 R122
L1 NC#J1 VSSQ#E8 F9 EV@1.33K/F_4 EV@1.33K/F_4 EV@243_4
R498
J9 NC#L1 VSSQ#F9 G1 B1 GND
L9 NC#J9 VSSQ#G1 G9 VSSQ#B1 B9
NC#L9 VSSQ#G9 VREFC_VMA1 VREFD_VMA1 VSSQ#B9 D1
96-BALL VSSQ#D1 D8
SDRAM DDR3 VSSQ#D8 E2
EV@VRAM _DDR3_HYNIX_256MX16 R564 R123 J1 VSSQ#E2 E8
EV@1.33K/F_4 C649 EV@1.33K/F_4 C200 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1
EV@0.01U/25V_4 EV@0.01U/25V_4 NC#J9 VSSQ#G1
B L9 G9 B
NC#L9 VSSQ#G9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16

+1.35V_GFX

C604 EV@10U/6.3V_6

C644 EV@10U/6.3V_6

C608 EV@10U/6.3V_6
+1.35V_GFX
+1.35V_GFX C646 EV@0.1U/10V_4
C45 EV@0.1U/10V_4
C524 EV@1U/6.3V_4 C573 EV@1U/6.3V_4 C201 EV@0.1U/10V_4
C592 EV@1U/6.3V_4 C68 EV@1U/6.3V_4
C582 EV@1U/6.3V_4 C596 EV@1U/6.3V_4 C76 EV@0.1U/10V_4
C603 EV@1U/6.3V_4 C628 EV@1U/6.3V_4 C577 EV@0.1U/10V_4
C580 EV@0.1U/10V_4

A A

Quanta Computer Inc.


PROJECT : Z8C
Size Document Number Rev
DDR3L - RANK0 3A

Date: Saturday, November 15, 2014 Sheet 20 of 48


5 4 3 2 1
5 4 3 2 1

U16

21
HYU 256Mx16, H5TC4G63AFR-11C :AKD5PGWTW08---TOP B/S PN : AKD5PGWTW07
QBC PN:
VREFC_VMA1 M8 E3
20 VREFC_VMA1
VREFD_VMA1 H1 VREFCA DQL0 F7
VMA_DQ13 17,20 :AKD5PZSTL01---TOP B/S PN : AKD5PZSTL00
MIC 256Mx16, MT41J256M16HA-093G:E QBC PN:
20 VREFD_VMA1 VREFDQ DQL1 VMA_DQ11 17,20 SAM 256Mx16, K4W4G1646D-BC1A :AKD5PGWT501---TOP B/S PN : AKD5PGWT502
QBC PN:
F2 VMA_DQ15 17,20
N3 DQL2 F8 U13
17,20,22,23 FBA_CMD9 A0 DQL3 VMA_DQ8 17,20
17,20,22,23 FBA_CMD24 P7 H3 VMA_DQ12 17,20
P3 A1 DQL4 H8 VREFC_VMA1 M8 E3
17,20,22,23 FBA_CMD10 A2 DQL5 VMA_DQ9 17,20 VREFCA DQL0 VMA_DQ1 17,20
17,20,22,23 FBA_CMD13 N2 G2 VMA_DQ14 17,20 VREFD_VMA1 H1 F7 VMA_DQ5 17,20
P8 A3 DQL6 H7 VREFDQ DQL1 F2
17,20,22,23 FBA_CMD26 A4 DQL7 VMA_DQ10 17,20 DQL2 VMA_DQ0 17,20
17,20,22,23 FBA_CMD22 P2 FBA_CMD9 N3 F8 VMA_DQ7 17,20
R8 A5 FBA_CMD24 P7 A0 DQL3 H3
D
17,20,22,23 FBA_CMD21 A6 A1 DQL4 VMA_DQ2 17,20 D
17,20,22,23 FBA_CMD5 R2 D7 VMA_DQ22 17,20 FBA_CMD10 P3 H8 VMA_DQ6 17,20
T8 A7 DQU0 C3 FBA_CMD13 N2 A2 DQL5 G2
17,20,22,23 FBA_CMD8 A8 DQU1 VMA_DQ17 17,20 A3 DQL6 VMA_DQ3 17,20
17,20,22,23 FBA_CMD23 R3 C8 VMA_DQ23 17,20 FBA_CMD26 P8 H7 VMA_DQ4 17,20
L7 A9 DQU2 C2 FBA_CMD22 P2 A4 DQL7
17,20,22,23 FBA_CMD28 A10/AP DQU3 VMA_DQ16 17,20 A5
17,20,22,23 FBA_CMD4 R7 A7 VMA_DQ20 17,20 FBA_CMD21 R8
N7 A11 DQU4 A2 FBA_CMD5 R2 A6 D7
17,20,22,23 FBA_CMD7 A12/BC DQU5 VMA_DQ18 17,20 A7 DQU0 VMA_DQ25 17,20
17,20,22,23 FBA_CMD14 T3 B8 VMA_DQ21 17,20 FBA_CMD8 T8 C3 VMA_DQ31 17,20
T7 A13 DQU6 A3 FBA_CMD23 R3 A8 DQU1 C8
17,20,22,23 FBA_CMD12 A14 DQU7 VMA_DQ19 17,20 A9 DQU2 VMA_DQ24 17,20
M7 FBA_CMD28 L7 C2 VMA_DQ30 17,20
A15 FBA_CMD4 R7 A10/AP DQU3 A7
A11 DQU4 VMA_DQ26 17,20
FBA_CMD7 N7 A2 VMA_DQ28 17,20
M2 B2 FBA_CMD14 T3 A12/BC DQU5 B8
17,20,22,23 FBA_CMD29 BA0 VDD#B2 +1.35V_GFX A13 DQU6 VMA_DQ27 17,20
17,20,22,23 FBA_CMD6 N8 D9 FBA_CMD12 T7 A3 VMA_DQ29 17,20
M3 BA1 VDD#D9 G7 EV@4.7U/6.3V_6C155 M7 A14 DQU7
17,23 FBA_CMD30 BA2 VDD#G7 A15
K2
VDD#K2 K8 EV@0.1U/10V_4 C189
VDD#K8 N1 EV@0.1U/10V_4 C172 FBA_CMD29 M2 B2
VDD#N1 BA0 VDD#B2 +1.35V_GFX
17,20 VMA_CLK0 J7 N9 FBA_CMD6 N8 D9
K7 CK VDD#N9 R1 GND FBA_CMD30 M3 BA1 VDD#D9 G7 EV@4.7U/6.3V_6C654
17,20 VMA_CLK0# CK VDD#R1 BA2 VDD#G7
17,20 FBA_CMD3 K9 R9 K2
CKE VDD#R9 VDD#K2 K8 EV@0.1U/10V_4 C66
VDD#K8 N1 EV@0.1U/10V_4 C67
K1 A1 VMA_CLK0 J7 VDD#N1 N9
17,20 FBA_CMD0 ODT VDDQ#A1 +1.35V_GFX CK VDD#N9
17 FBA_CMD1 L2 A8 VMA_CLK0# K7 R1 GND
J3 CS VDDQ#A8 C1 EV@4.7U/6.3V_6C640 FBA_CMD3 K9 CK VDD#R1 R9
17,20,22,23 FBA_CMD11 RAS VDDQ#C1 CKE VDD#R9
17,20,22,23 FBA_CMD15 K3 C9
L3 CAS VDDQ#C9 D2 EV@0.1U/10V_4 C69
17,20,22,23 FBA_CMD25 WE VDDQ#D2 E9 EV@0.1U/10V_4 C629 FBA_CMD0 K1 A1 +1.35V_GFX
VDDQ#E9 F1 FBA_CMD1 L2 ODT VDDQ#A1 A8
F3 VDDQ#F1 H2 GND FBA_CMD11 J3 CS VDDQ#A8 C1 EV@4.7U/6.3V_6C92
17,20 VMA_WDQS1 DQSL VDDQ#H2 RAS VDDQ#C1
C G3 H9 FBA_CMD15 K3 C9 C
17,20 VMA_RDQS1 DQSL VDDQ#H9 CAS VDDQ#C9
FBA_CMD25 L3 D2 EV@0.1U/10V_4 C583
WE VDDQ#D2 E9 EV@0.1U/10V_4 C81
E7 A9 VDDQ#E9 F1
17,20 VMA_DM1 DML VSS#A9 VDDQ#F1
17,20 VMA_DM2 D3 B3 17,20 VMA_WDQS0 F3 H2 GND
DMU VSS#B3 E1 G3 DQSL VDDQ#H2 H9
VSS#E1 17,20 VMA_RDQS0 DQSL VDDQ#H9
G8
C7 VSS#G8 J2
17,20 VMA_WDQS2 DQSU VSS#J2
17,20 VMA_RDQS2 B7 J8 17,20 VMA_DM0 E7 A9
DQSU VSS#J8 M1 D3 DML VSS#A9 B3
VSS#M1 17,20 VMA_DM3 DMU VSS#B3
M9 E1
VSS#M9 P1 VSS#E1 G8
T2 VSS#P1 P9 C7 VSS#G8 J2
17,20,22,23 FBA_CMD20 RESET VSS#P9 17,20 VMA_WDQS3 DQSU VSS#J2
T1 17,20 VMA_RDQS3 B7 J8
FBA_ZQ2 L8 VSS#T1 T9 DQSU VSS#J8 M1
GND ZQ VSS#T9 VSS#M1 M9
EV@243_4
R121 VSS#M9 P1
B1 GND FBA_CMD20 T2 VSS#P1 P9
VSSQ#B1 B9 RESET VSS#P9 T1
VSSQ#B9 D1 FBA_ZQ3 L8 VSS#T1 T9
VSSQ#D1 GND ZQ VSS#T9
D8
VSSQ#D8 E2 EV@243_4
R62
J1 VSSQ#E2 E8 B1 GND
L1 NC#J1 VSSQ#E8 F9 VSSQ#B1 B9
J9 NC#L1 VSSQ#F9 G1 VSSQ#B9 D1
L9 NC#J9 VSSQ#G1 G9 VSSQ#D1 D8
NC#L9 VSSQ#G9 VSSQ#D8 E2
96-BALL J1 VSSQ#E2 E8
SDRAM DDR3 L1 NC#J1 VSSQ#E8 F9
EV@VRAM _DDR3_HYNIX_256MX16 J9 NC#L1 VSSQ#F9 G1
B L9 NC#J9 VSSQ#G1 G9 B
NC#L9 VSSQ#G9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16

+1.35V_GFX

C162 EV@10U/6.3V_6

C78 EV@10U/6.3V_6

C88 EV@10U/6.3V_6
+1.35V_GFX
+1.35V_GFX C121 EV@0.1U/10V_4
C120 EV@0.1U/10V_4
C64 EV@1U/6.3V_4 C83 EV@1U/6.3V_4 C203 EV@0.1U/10V_4
C65 EV@1U/6.3V_4 C86 EV@1U/6.3V_4
C204 EV@1U/6.3V_4 C208 EV@1U/6.3V_4 C199 EV@0.1U/10V_4
C198 EV@1U/6.3V_4 C152 EV@1U/6.3V_4 C648 EV@0.1U/10V_4
C647 EV@0.1U/10V_4

A A

Quanta Computer Inc.


PROJECT : Z8C
Size Document Number Rev
DDR3L - RANK0 3A

Date: Saturday, November 15, 2014 Sheet 21 of 48


5 4 3 2 1
5 4 3 2 1

22
U39

23 VREFC_VMA3 VREFC_VMA3 M8
VREFCA DQL0
E3 VMA_DQ34 17,23 HYU 256Mx16, H5TC4G63AFR-11C :AKD5PGWTW08---TOP B/S PN : AKD5PGWTW07
QBC PN:
VREFD_VMA3 H1 F7
23 VREFD_VMA3 VREFDQ DQL1 F2
VMA_DQ38 17,23 :AKD5PZSTL01---TOP B/S PN : AKD5PZSTL00
MIC 256Mx16, MT41J256M16HA-093G:E QBC PN:
DQL2 VMA_DQ35 17,23 SAM 256Mx16, K4W4G1646D-BC1A :AKD5PGWT501---TOP B/S PN : AKD5PGWT502
QBC PN:
17,20,21,23 FBA_CMD7 N3 F8 VMA_DQ39 17,23
P7 A0 DQL3 H3 U38
17,20,21,23 FBA_CMD10 A1 DQL4 VMA_DQ32 17,23
17,20,21,23 FBA_CMD24 P3 H8 VMA_DQ36 17,23
N2 A2 DQL5 G2 VREFC_VMA3 M8 E3
17,20,21,23 FBA_CMD6 A3 DQL6 VMA_DQ33 17,23 VREFCA DQL0 VMA_DQ44 17,23
17,20,21,23 FBA_CMD22 P8 H7 VMA_DQ37 17,23 VREFD_VMA3 H1 F7 VMA_DQ43 17,23
P2 A4 DQL7 VREFDQ DQL1 F2
17,20,21,23 FBA_CMD26 A5 DQL2 VMA_DQ45 17,23
17,20,21,23 FBA_CMD5 R8 FBA_CMD7 N3 F8 VMA_DQ40 17,23
D R2 A6 D7 FBA_CMD10 P7 A0 DQL3 H3 D
17,20,21,23 FBA_CMD21 A7 DQU0 VMA_DQ59 17,23 A1 DQL4 VMA_DQ47 17,23
17,20,21,23 FBA_CMD8 T8 C3 VMA_DQ62 17,23 FBA_CMD24 P3 H8 VMA_DQ42 17,23
R3 A8 DQU1 C8 FBA_CMD6 N2 A2 DQL5 G2
17,20,21,23 FBA_CMD4 A9 DQU2 VMA_DQ58 17,23 A3 DQL6 VMA_DQ46 17,23
17,20,21,23 FBA_CMD25 L7 C2 VMA_DQ63 17,23 FBA_CMD22 P8 H7 VMA_DQ41 17,23
R7 A10/AP DQU3 A7 FBA_CMD26 P2 A4 DQL7
17,20,21,23 FBA_CMD23 A11 DQU4 VMA_DQ57 17,23 A5
17,20,21,23 FBA_CMD9 N7 A2 VMA_DQ60 17,23 FBA_CMD5 R8
T3 A12/BC DQU5 B8 FBA_CMD21 R2 A6 D7
17,20,21,23 FBA_CMD12 A13 DQU6 VMA_DQ56 17,23 A7 DQU0 VMA_DQ52 17,23
17,20,21,23 FBA_CMD14 T7 A3 VMA_DQ61 17,23 FBA_CMD8 T8 C3 VMA_DQ50 17,23
M7 A14 DQU7 FBA_CMD4 R3 A8 DQU1 C8
A15 A9 DQU2 VMA_DQ55 17,23
FBA_CMD25 L7 C2 VMA_DQ51 17,23
FBA_CMD23 R7 A10/AP DQU3 A7
A11 DQU4 VMA_DQ53 17,23
17,20,21,23 FBA_CMD29 M2 B2 +1.35V_GFX FBA_CMD9 N7 A2 VMA_DQ48 17,23
N8 BA0 VDD#B2 D9 FBA_CMD12 T3 A12/BC DQU5 B8
17,20,21,23 FBA_CMD13 BA1 VDD#D9 A13 DQU6 VMA_DQ54 17,23
17,20 FBA_CMD27 M3 G7 EV@4.7U/6.3V_6C576 FBA_CMD14 T7 A3 VMA_DQ49 17,23
BA2 VDD#G7 K2 M7 A14 DQU7
VDD#K2 K8 EV@0.1U/10V_4 C581 A15
VDD#K8 N1 EV@0.1U/10V_4 C609
J7 VDD#N1 N9 FBA_CMD29 M2 B2
17,23 VMA_CLK1 CK VDD#N9 BA0 VDD#B2 +1.35V_GFX
17,23 VMA_CLK1# K7 R1 GND FBA_CMD13 N8 D9
K9 CK VDD#R1 R9 FBA_CMD27 M3 BA1 VDD#D9 G7 EV@4.7U/6.3V_6C530
17,23 FBA_CMD19 CKE VDD#R9 BA2 VDD#G7 K2
VDD#K2 K8 EV@0.1U/10V_4 C550
K1 A1 VDD#K8 N1 EV@0.1U/10V_4 C548
17,23 FBA_CMD16 ODT VDDQ#A1 +1.35V_GFX VDD#N1
17 FBA_CMD18 L2 A8 VMA_CLK1 J7 N9
J3 CS VDDQ#A8 C1 EV@4.7U/6.3V_6C571 VMA_CLK1# K7 CK VDD#N9 R1 GND
17,20,21,23 FBA_CMD11 RAS VDDQ#C1 CK VDD#R1
17,20,21,23 FBA_CMD15 K3 C9 FBA_CMD19 K9 R9
L3 CAS VDDQ#C9 D2 EV@0.1U/10V_4 C653 CKE VDD#R9
17,20,21,23 FBA_CMD28 WE VDDQ#D2 E9 EV@0.1U/10V_4 C652
VDDQ#E9 F1 FBA_CMD16 K1 A1
VDDQ#F1 ODT VDDQ#A1 +1.35V_GFX
17,23 VMA_WDQS4 F3 H2 GND FBA_CMD18 L2 A8
DQSL VDDQ#H2 CS VDDQ#A8
C
17,23 VMA_RDQS4 G3
DQSL VDDQ#H9
H9 162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402) FBA_CMD11 J3
RAS VDDQ#C1
C1 EV@4.7U/6.3V_6C546 C
FBA_CMD15 K3 C9
CS11622FB15 RES CHIP 162 1/16W +-1%(0402) FBA_CMD28 L3 CAS VDDQ#C9 D2 EV@0.1U/10V_4 C525
E7 A9 WE VDDQ#D2 E9 EV@0.1U/10V_4 C534
17,23 VMA_DM4 DML VSS#A9 VDDQ#E9
17,23 VMA_DM7 D3 B3 VMA_CLK1 F1
DMU VSS#B3 E1 F3 VDDQ#F1 H2 GND
VSS#E1 17,23 VMA_WDQS5 DQSL VDDQ#H2
G8 R68 17,23 VMA_RDQS5 G3 H9
C7 VSS#G8 J2 EV@162_4 DQSL VDDQ#H9
17,23 VMA_WDQS7 DQSU VSS#J2
17,23 VMA_RDQS7 B7 J8
DQSU VSS#J8 M1 VMA_CLK1# E7 A9
VSS#M1 17,23 VMA_DM5 DML VSS#A9
M9 17,23 VMA_DM6 D3 B3
VSS#M9 P1 DMU VSS#B3 E1
T2 VSS#P1 P9 VSS#E1 G8
17,20,21,23 FBA_CMD20 RESET VSS#P9 VSS#G8
T1 17,23 VMA_WDQS6 C7 J2
FBA_ZQ4 L8 VSS#T1 T9 B7 DQSU VSS#J2 J8
GND ZQ VSS#T9 17,23 VMA_RDQS6 DQSU VSS#J8 M1
EV@243_4
R466 VSS#M1 M9
B1 GND VSS#M9 P1
VSSQ#B1 B9 FBA_CMD20 T2 VSS#P1 P9
VSSQ#B9 D1 +1.35V_GFX +1.35V_GFX RESET VSS#P9 T1
VSSQ#D1 D8 FBA_ZQ5 L8 VSS#T1 T9
VSSQ#D8 GND ZQ VSS#T9
E2
J1 VSSQ#E2 E8 EV@243_4
R8
L1 NC#J1 VSSQ#E8 F9 R28 R461 B1 GND
J9 NC#L1 VSSQ#F9 G1 EV@1.33K/F_4 EV@1.33K/F_4 VSSQ#B1 B9
L9 NC#J9 VSSQ#G1 G9 VSSQ#B9 D1
NC#L9 VSSQ#G9 VSSQ#D1 D8
96-BALL VREFC_VMA3 VREFD_VMA3 VSSQ#D8 E2
SDRAM DDR3 J1 VSSQ#E2 E8
EV@VRAM _DDR3_HYNIX_256MX16 L1 NC#J1 VSSQ#E8 F9
B R30 R465 J9 NC#L1 VSSQ#F9 G1 B
EV@1.33K/F_4 C48 EV@1.33K/F_4 C569 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9
EV@0.01U/25V_4 EV@0.01U/25V_4
96-BALL
SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16

+1.35V_GFX

FOR EMI Request C541 EV@10U/6.3V_6

+1.35V_GFX C15 EV@10U/6.3V_6

C540 EV@10U/6.3V_6
C19 *EV@120P/50V_4 +1.35V_GFX
C24 *EV@120P/50V_4 +1.35V_GFX C545 EV@0.1U/10V_4
C42 *EV@120P/50V_4 C650 EV@0.1U/10V_4
C529 *EV@120P/50V_4 C527 EV@1U/6.3V_4 C610 EV@1U/6.3V_4 C651 EV@0.1U/10V_4
C536 *EV@120P/50V_4 C79 EV@1U/6.3V_4 C620 EV@1U/6.3V_4
C601 *EV@120P/50V_4 C533 EV@1U/6.3V_4 C535 EV@1U/6.3V_4 C538 EV@0.1U/10V_4
C202 *EV@120P/50V_4 C532 EV@1U/6.3V_4 C531 EV@1U/6.3V_4 C537 EV@0.1U/10V_4
C655 *EV@120P/50V_4 C539 EV@0.1U/10V_4

A A

Quanta Computer Inc.


PROJECT : Z8C
Size Document Number Rev
DDR3L - RANK0 3A

Date: Saturday, November 15, 2014 Sheet 22 of 48


5 4 3 2 1
5 4 3 2 1

U12

22
22

17,20,21,22
17,20,21,22
17,20,21,22
VREFC_VMA3
VREFD_VMA3

FBA_CMD9
FBA_CMD24
FBA_CMD10
VREFC_VMA3
VREFD_VMA3
M8
H1

N3
P7
P3
N2
VREFCA
VREFDQ

A0
A1
A2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
E3
F7
F2
F8
H3
H8
G2
VMA_DQ38
VMA_DQ34
VMA_DQ39
VMA_DQ35
VMA_DQ37
VMA_DQ33
17,22
17,22
17,22
17,22
17,22
17,22
HYU 256Mx16, H5TC4G63AFR-11C

SAM 256Mx16, K4W4G1646D-BC1A


:AKD5PGWTW08---TOP B/S PN : AKD5PGWTW07
QBC PN:
:AKD5PZSTL01---TOP B/S PN : AKD5PZSTL00
MIC 256Mx16, MT41J256M16HA-093G:E QBC PN:
:AKD5PGWT501---TOP B/S PN : AKD5PGWT502
QBC PN:
U11
23
17,20,21,22 FBA_CMD13 A3 DQL6 VMA_DQ36 17,22
17,20,21,22 FBA_CMD26 P8 H7 VMA_DQ32 17,22
P2 A4 DQL7 VREFC_VMA3 M8 E3
17,20,21,22 FBA_CMD22 A5 VREFCA DQL0 VMA_DQ43 17,22
17,20,21,22 FBA_CMD21 R8 VREFD_VMA3 H1 F7 VMA_DQ44 17,22
R2 A6 D7 VREFDQ DQL1 F2
D
17,20,21,22 FBA_CMD5 A7 DQU0 VMA_DQ62 17,22 DQL2 VMA_DQ40 17,22 D
17,20,21,22 FBA_CMD8 T8 C3 VMA_DQ59 17,22 FBA_CMD9 N3 F8 VMA_DQ45 17,22
R3 A8 DQU1 C8 FBA_CMD24 P7 A0 DQL3 H3
17,20,21,22 FBA_CMD23 A9 DQU2 VMA_DQ63 17,22 A1 DQL4 VMA_DQ41 17,22
17,20,21,22 FBA_CMD28 L7 C2 VMA_DQ58 17,22 FBA_CMD10 P3 H8 VMA_DQ46 17,22
R7 A10/AP DQU3 A7 FBA_CMD13 N2 A2 DQL5 G2
17,20,21,22 FBA_CMD4 A11 DQU4 VMA_DQ61 17,22 A3 DQL6 VMA_DQ42 17,22
17,20,21,22 FBA_CMD7 N7 A2 VMA_DQ56 17,22 FBA_CMD26 P8 H7 VMA_DQ47 17,22
T3 A12/BC DQU5 B8 FBA_CMD22 P2 A4 DQL7
17,20,21,22 FBA_CMD14 A13 DQU6 VMA_DQ60 17,22 A5
17,20,21,22 FBA_CMD12 T7 A3 VMA_DQ57 17,22 FBA_CMD21 R8
M7 A14 DQU7 FBA_CMD5 R2 A6 D7
A15 A7 DQU0 VMA_DQ50 17,22
FBA_CMD8 T8 C3 VMA_DQ52 17,22
FBA_CMD23 R3 A8 DQU1 C8
A9 DQU2 VMA_DQ51 17,22
17,20,21,22 FBA_CMD29 M2 B2 +1.35V_GFX FBA_CMD28 L7 C2 VMA_DQ55 17,22
N8 BA0 VDD#B2 D9 FBA_CMD4 R7 A10/AP DQU3 A7
17,20,21,22 FBA_CMD6 BA1 VDD#D9 A11 DQU4 VMA_DQ49 17,22
17,21 FBA_CMD30 M3 G7 EV@4.7U/6.3V_6C108 FBA_CMD7 N7 A2 VMA_DQ54 17,22
BA2 VDD#G7 K2 FBA_CMD14 T3 A12/BC DQU5 B8
VDD#K2 A13 DQU6 VMA_DQ48 17,22
K8 EV@0.1U/10V_4 C197 FBA_CMD12 T7 A3 VMA_DQ53 17,22
VDD#K8 N1 EV@0.1U/10V_4 C107 M7 A14 DQU7
J7 VDD#N1 N9 A15
17,22 VMA_CLK1 CK VDD#N9
17,22 VMA_CLK1# K7 R1 GND
K9 CK VDD#R1 R9 FBA_CMD29 M2 B2
17,22 FBA_CMD19 CKE VDD#R9 BA0 VDD#B2 +1.35V_GFX
FBA_CMD6 N8 D9
FBA_CMD30 M3 BA1 VDD#D9 G7 EV@4.7U/6.3V_6C542
K1 A1 BA2 VDD#G7 K2
17,22 FBA_CMD16 ODT VDDQ#A1 +1.35V_GFX VDD#K2
17 FBA_CMD17 L2 A8 K8 EV@0.1U/10V_4 C563
J3 CS VDDQ#A8 C1 EV@4.7U/6.3V_6C73 VDD#K8 N1 EV@0.1U/10V_4 C32
17,20,21,22 FBA_CMD11 RAS VDDQ#C1 VDD#N1
17,20,21,22 FBA_CMD15 K3 C9 VMA_CLK1 J7 N9
L3 CAS VDDQ#C9 D2 EV@0.1U/10V_4 C11 VMA_CLK1# K7 CK VDD#N9 R1 GND
17,20,21,22 FBA_CMD25 WE VDDQ#D2 CK VDD#R1
E9 EV@0.1U/10V_4 C101 FBA_CMD19 K9 R9
VDDQ#E9 F1 CKE VDD#R9
F3 VDDQ#F1 H2 GND
17,22 VMA_WDQS4 DQSL VDDQ#H2
17,22 VMA_RDQS4 G3 H9 FBA_CMD16 K1 A1 +1.35V_GFX
C DQSL VDDQ#H9 FBA_CMD17 L2 ODT VDDQ#A1 A8 C
FBA_CMD11 J3 CS VDDQ#A8 C1 EV@4.7U/6.3V_6C16
E7 A9 FBA_CMD15 K3 RAS VDDQ#C1 C9
17,22 VMA_DM4 DML VSS#A9 CAS VDDQ#C9
17,22 VMA_DM7 D3 B3 FBA_CMD25 L3 D2 EV@0.1U/10V_4 C587
DMU VSS#B3 E1 WE VDDQ#D2 E9 EV@0.1U/10V_4 C12
VSS#E1 G8 VDDQ#E9 F1
C7 VSS#G8 J2 F3 VDDQ#F1 H2 GND
17,22 VMA_WDQS7 DQSU VSS#J2 17,22 VMA_WDQS5 DQSL VDDQ#H2
17,22 VMA_RDQS7 B7 J8 17,22 VMA_RDQS5 G3 H9
DQSU VSS#J8 M1 DQSL VDDQ#H9
VSS#M1 M9
VSS#M9 P1 E7 A9
VSS#P1 17,22 VMA_DM5 DML VSS#A9
20,21,22 FBA_CMD20 T2 P9 17,22 VMA_DM6 D3 B3
RESET VSS#P9 T1 DMU VSS#B3 E1
FBA_ZQ6 L8 VSS#T1 T9 VSS#E1 G8
GND ZQ VSS#T9 VSS#G8
17,22 VMA_WDQS6 C7 J2
EV@243_4
R46 B7 DQSU VSS#J2 J8
17,22 VMA_RDQS6 DQSU VSS#J8
B1 GND M1
VSSQ#B1 B9 VSS#M1 M9
VSSQ#B9 D1 VSS#M9 P1
VSSQ#D1 D8 FBA_CMD20 T2 VSS#P1 P9
VSSQ#D8 E2 RESET VSS#P9 T1
J1 VSSQ#E2 E8 FBA_ZQ7 L8 VSS#T1 T9
NC#J1 VSSQ#E8 GND ZQ VSS#T9
L1 F9
J9 NC#L1 VSSQ#F9 G1 EV@243_4
R43
L9 NC#J9 VSSQ#G1 G9 B1 GND
NC#L9 VSSQ#G9 VSSQ#B1 B9
96-BALL VSSQ#B9 D1
SDRAM DDR3 VSSQ#D1 D8
EV@VRAM _DDR3_HYNIX_256MX16 VSSQ#D8 E2
J1 VSSQ#E2 E8
B L1 NC#J1 VSSQ#E8 F9 B
J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16
+1.35V_GFX

C21 EV@10U/6.3V_6

C22 EV@10U/6.3V_6

C139 EV@10U/6.3V_6
+1.35V_GFX
+1.35V_GFX C26 EV@0.1U/10V_4
C25 EV@0.1U/10V_4
C46 EV@1U/6.3V_4 C98 EV@1U/6.3V_4 C17 EV@0.1U/10V_4
C27 EV@1U/6.3V_4 C56 EV@1U/6.3V_4
C526 EV@1U/6.3V_4 C18 EV@1U/6.3V_4 C37 EV@0.1U/10V_4
C13 EV@1U/6.3V_4 C20 EV@1U/6.3V_4 C10 EV@0.1U/10V_4
C23 EV@0.1U/10V_4

A A

Quanta Computer Inc.


PROJECT : Z8C
Size Document Number Rev
DDR3L - RANK1 3A

Date: Saturday, November 15, 2014 Sheet 23 of 48


5 4 3 2 1
1 2 3 4 5 6 7 8

Q36 C543 *0.1u/10V_4


CRT +5V 3
IN OUT
1
2
GND CRTVDD5 CN3

16
AP2331SA-7

6
CRT_RED L2 BLM15BB470SN1D CRT_R1 1 11 CRT_11 TP1
+5V 7
1C-1 2014/01/10 Remove U29 and add U40 and U41. CRT_GRE L3 BLM15BB470SN1D CRT_G1 2 12 DDCDAT
8
CRT_BLU L4 BLM15BB470SN1D CRT_B1 3 13 CRTHSYNC
C14 9
4 14 CRTVSYNC
U5 0.1u/10V_4 C38 C39 C40 C30 C29 C28 10
R11 R12 R13 5 15 DDCCLK
1 5 75/F_4 75/F_4 75/F_4 5.6p/16V_4 5.6p/16V_4 5.6p/16V_4 5.6p/16V_4 5.6p/16V_4 5.6p/16V_4
OE# VCC
A A
CRT CONN

17
HSYNC 2 4 CRTHSYNC
A Y

3 DDCDAT 2.2K_4 R448 CRTVDD5


GND +5V DDCCLK 2.2K_4 R3

M74VHC1GT125DF2G U3
CRTHSYNC 1 10 CRTHSYNC C36 *0.22u/6.3V_4
C41 CRTVDD5 2 1 10 9 CRTVDD5
3 2 9 C547 *220p/50V_4
CRTVSYNC 4 GND_3/8 7 CRTVSYNC
U6 0.1u/10V_4
DDCCLK 5 4 7 6 DDCCLK C31 0.1u/10V_4 CRTVDD5
Power trace tracking
1 5 5 6
OE# VCC 2,5,7,8,9,10,11,13,14,15,16,17,18,25,26,27,28,29,30,31,33,34,35,37,38,39,40,41,42,43 +3V
*RClamp0524P C34 10p/50V_4 CRTVSYNC 25,26,28,30,31,34,37,41 +5V
VSYNC 2 4 CRTVSYNC U2 C33 10p/50V_4 CRTHSYNC
A Y CRT_R1 1 10 CRT_R1
CRT_G1 2 1 10 9 CRT_G1 C35 *10p/50V_4 DDCCLK
3 3 2 9
GND DDCDAT 4 GND_3/8 7 DDCDAT C544 *10p/50V_4 DDCDAT
CRT_B1 5 4 7 6 CRT_B1
M74VHC1GT125DF2G 5 6
*RClamp0524P

DP TO VGA +3V

1A-1 2013/10/15 Change VGA ITE soltion to NXP. L25 80ohm@100MHz

1A-5 2013/10/18 Change VGA NXP soltion to ITE. C565 C564 20mils
B C567 B
1u/6.3V_4 0.1u/10V_4 0.1u/10V_4

L29 80ohm@100MHz

1C1-2 link L29 to +3V directly 20mils


C589
(meet IVDDO vs OVDD sequence) RX_DVDD18
10u/6.3V_6

C570
15mils C561 0.1u/10V_4 C568
0.1u/10V_4 0.1u/10V_4

ISPSCL

IVDDO
ISPSDA

13
48

35
36

38
39

12
14
44
46
U40

1
2 DDCSCL

IVDD33
IVDD33
OVDD
OVDD

IVDD
IVDD
IVDD
IVDD
IVDDO
IVDDO
DDCSDA
2 CRT_HPD CRT_HPD 40
HPD 20mils
+5VMCU +5V
45 80ohm@100MHz L27
C600 0.1u/10V_4 CRT_TXP0_C 26 MCUVDDH
2 CRT_TXP0 RX0P
C599 0.1u/10V_4 CRT_TXN0_C 27
2 CRT_TXN0 RX0N
C598 0.1u/10V_4 CRT_TXP1_C 29 47
2 CRT_TXP1 RX1P MCURSTN TP103
C597 0.1u/10V_4 CRT_TXN1_C 30
2 CRT_TXN1 RX1N
28 URDBG
URDBG TP105
+3V
15 ISPSCL R467 22/J_4 DDCCLK
C ISPSCL 16 ISPSDA R472 22/J_4 DDCDAT C

*1M_4 R482 CRT_AUXP CRT_AUXP C575 0.1u/10V_4 CRT_AUXP_C 20 ISPSDA


2 CRT_AUXP RXAUXP
CRT_AUXN C574 0.1u/10V_4 CRT_AUXN_C 19 23 R488 22/J_4 DDCCLK
2 CRT_AUXN RXAUXN VGADDCCLK 21
*1M_4 R476 CRT_AUXN R483 22/J_4 DDCDAT
VGADDCSDA
18 3 VSYNC
DCAUXP VSYNC
17
DCAUXN HSYNC
4 HSYNC 20mils
DAC_VDDC 80ohm@100MHz L8 IVDDO_18

C53 C54
IVDDO 30mils C52
20mils 10mils 25
AVCC VDDC
10 0.1u/10V_4 0.1u/10V_4
L9 80ohm@100MHz IVDDO_18 31 0.1u/10V_4
0.1u/10V_4 C72 AVCC

C80
10u/6.3V_6 C75
10mils
22
IT6513FN
0.1u/10V_4 C61 PVCC 11 CRT_RED
1u/6.3V_4 IORP

9 CRT_GRE
IOGP
10mils
L28 80ohm@100MHz RX_DVDD18 24
0.1u/10V_4 C588 DVDD18 8 CRT_BLU
C585 IOBP
15mils NC/VGADETECT
41
TP104
4.7u/6.3V_6
10mils RSET
5 VGA_RST R459 100/F_4
32
0.1u/10V_4 C71 ASPVCC
7 DAC_VDDC
VDDA C562 C551
20mils
6 VGA_COMP 0.1u/10V_4 0.1u/10V_4
2.2K_4 R475 43 COMP
+5VMCU PCSDA
2.2K_4 R481 42
PCSCL 34 27M_CRT_IN
D D
XTALIN 33 27M_CRT_OUT Y2
XTALOUT 1 3
PWDNB

1B-1 20131108 Change +5V to +5VMCU. 2 4


GND

C594 *27MHZ C593


IT6513N-QFN-48 *10p/50V_4 *10p/50V_4
37

49

+5VMCU R489 10K_4

Quanta Computer Inc.


1B-1 20131108 Change TP to +5VMCU and 10kohm.
PROJECT : Z8C
Size Document Number Rev
1A
CRT/DP TO VGA IC
Date: Saturday, November 15, 2014 Sheet 24 of 48
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CN7
eDP Power eDP
25
+3V

G_5
VIN R205 *SHORT_6 LCD_VIN
R200 *SHORT_6 40
39
C662 U46 LCDVCC 38
LCDVCC 37
LCDVCC 36
1u/6.3V_4 6 1 LCDVCC_1 R229 *SHORT_8
IN OUT 35
A 4 2 C287 C663 C676 C675 C286 R186 *SHORT_6 CCD_PWR 34 A
IN GND +3V 33
R217 *SHORT_4 3 5 *0.1u/10V_4 *2.2u/6.3V_6 0.1u/10V_4 0.01u/16V_4 22u/6.3V_8 R230 *TPL@0_6 TP_PWR 32
2 PCH_VDDEN ON/OFF GND +5V 31 G_4
30
R216 G5243AT11U R670 *0_4 29
35 COLOR_ENG 28
100K_4 R671 *SHORT_4 LVDS_BRIGHT
2 PCH_BRIGHT 27
C674 0.1u/10V_4 BL_ON
R672 *100K_4 EDP_HPD 26
2 EDP_HPD 25
C666 0.1u/10V_4 EDP_TXP3_C 24
2 EDP_TXP3 23
MP confirm 2 or 4 Lane C667 0.1u/10V_4 EDP_TXN3_C
2 EDP_TXN3 22
C668 0.1u/10V_4 EDP_TXP2_C 21
2 EDP_TXP2 20
C669 0.1u/10V_4 EDP_TXN2_C
Backlight Control eDP
2

2
EDP_TXN2

EDP_TXP1 C670 0.1u/10V_4 EDP_TXP1_C


19
18
C671 0.1u/10V_4 EDP_TXN1_C 17
+3V 2 EDP_TXN1 16
C672 0.1u/10V_4 EDP_TXP0_C 15
B 2 EDP_TXP0 14 B
C673 0.1u/10V_4 EDP_TXN0_C
2 EDP_TXN0 13
R668 100K_4
C680 0.1u/10V_4 EDP_AUXP_C 12
2 EDP_AUXP 11
R192 R190 LID#,EC intrnal PU 2 EDP_AUXN
C681 0.1u/10V_4 EDP_AUXN_C
10 G_1
10K_4 10K_4 +3V R669 100K_4
USBP6+_R 9
BL# BL_ON 2 1 USBP6-_R 8
2 PCH_BLON LID# 32,35 7
D5 RB500V-40 9 USBP6+ R685 *SHORT_4
6
35 PCH_BLON_EC R193 0_4 CCD 9 USBP6- R682 *SHORT_4 USBP5+_R
5
5

3
R191 USBP5-_R
4
100K_4
2
Touch Panel 9 USBP5+
R675
R667
*0_4
*0_4
TP_GND
3
Follow ZQ0 EC_FPBACK# 35 9 USBP5- 2
1

G_0
Q16 EDP_TXP3_C EDP_TXN3_C EDP_TXP2_C EDP_TXN2_C
Q18 DTC144EU R194

1
2N7002DW TPL@0_6
4

50398-04071-001
C278 C279 C280 C281 Reserve for GND noise

C *5.6p/16V_4 *5.6p/16V_4 *5.6p/16V_4 *5.6p/16V_4 C

TP_INT
Inform BIOS that it is touch panel or not
Lid Switch (HSR)(move to USB/B) FingerPrint Conn
10 GPIO8

VIN CCD_PWR TP_PWR

EDP_TXP1_C EDP_TXN1_C EDP_TXP0_C EDP_TXN0_C

+3V C258 C259 C262 C261 C274 C277

4.7u/25V_8 1000p/50V_4 *10p/50V_4 1000p/50V_4 *TPL@10p/50V_4 *TPL@1000p/50V_4


C766 C282 C283 C284 C285
CN17
0.1u/10V_4 *5.6p/16V_4 *5.6p/16V_4 *5.6p/16V_4 *5.6p/16V_4 +3V
1 7
2 8
3
9 USBP7+ 4
D 9 USBP7- 5 D
Touch Panel interrupt R187
6
*TPL@10K_4
Quanta Computer Inc.

2
FingerPrint/B

3 1
10 TP_INT_PCH TP_INT
PROJECT : Z8C
Q17 Size Document Number Rev
*TPL@2N7002K 3A
R188 *TSI@0_4 eDP/CAMERA/FP
Date: Saturday, November 15, 2014 Sheet 25 of 48
1 2 3 4 5 6 7 8
5 4 3 2 1

HDMI Cost Reduced level shift (HDM) HDMI connector (HDM)


2
2
INT_HDMITX2N
INT_HDMITX2P
C556
C555

C558
0.1u/10V_4
0.1u/10V_4

0.1u/10V_4
INT_HDMITX2N_C
INT_HDMITX2P_C

INT_HDMITX1N_C
INT_HDMITX2P_C

INT_HDMITX2N_C
INT_HDMITX1P_C
1
2
3
4
CN2
SHELL1
D2+SHELL3
D2 Shield
D2-
20
22 26
2 INT_HDMITX1N D1+
C557 0.1u/10V_4 INT_HDMITX1P_C 5
D 2 INT_HDMITX1P D1 Shield D
INT_HDMITX1N_C 6
C554 0.1u/10V_4 INT_HDMITX0N_C INT_HDMITX0P_C 7 D1-
2 INT_HDMITX0N D0+
C553 0.1u/10V_4 INT_HDMITX0P_C 8
2 INT_HDMITX0P D0 Shield
INT_HDMITX0N_C 9
C559 0.1u/10V_4 INT_HDMICLK+_C INT_HDMICLK+_C 10 D0-
2 INT_HDMICLK+ CK+
C560 0.1u/10V_4 INT_HDMICLK-_C 11
2 INT_HDMICLK- CK Shield
INT_HDMICLK-_C 12
13 CK-
CE Remote

1
14
Layout Notes: R26 R25 R19 R20 R23 R24 R21 R22 +5V HDMI_DDCCLK_MB 15 NC
DDC CLK
Place decoupling CAPs close to Connector HDMI_DDCDATA_MB 16
DDC DATA
470_4 470_4 470_4 470_4 470_4 470_4 470_4 470_4 Q37 17
3 1 HDMI_5V 18 GND
IN OUT +5V

2
2 HDMI_MB_HP R14 *SHORT_4 HP_DET_CN 19 23
GND HP SHELL4
DET 21
SHELL2

3
AP2331SA-7
ABA-HDM-022-P05

1
Q1
2 C549 D27 RV1 C44 C43
+3V
C *220p/50V_4 *14V/100p_4 *5V/0.2p_4 C
2N7002K *1000p/50V_4 *1000p/50V_4
R40

2
*100K/F_4

1
HDMI DDC (HDM) +5V EMI (EMC) HDMI-detect (HDM)
D2
+3V +3V RB500V-40
INT_HDMITX2P_C +3V +3V

R451 100/F_4
R60 Q3 R50

2
B B
2.2K_4 BSN20 2.2K_4 INT_HDMITX2N_C
R55

2
R57 *SHORT_4 HDMI_DDCCLK_COM 1 3 HDMI_DDCCLK_MB INT_HDMITX1P_C 1M_4
2 HDMI_DDCCLK_SW
Follow CRB 1.0 change to 2.2K R452 100/F_4 2 INT_HDMI_HPD 1 3 HDMI_MB_HP
+5V

1
INT_HDMITX1N_C Q2
2N7002K
D28 INT_HDMITX0P_C R37
RB500V-40 20K_4
R450 100/F_4

2
+3V +3V
INT_HDMITX0N_C

Q38 INT_HDMICLK+_C
R486 R474
2

2.2K_4 BSN20 2.2K_4 R453 100/F_4

R492 *SHORT_4 HDMI_DDCDATA_COM 1 3 HDMI_DDCDATA_MB INT_HDMICLK-_C


2 HDMI_DDCDATA_SW
A A
Follow CRB 1.0 change to 2.2K
Quanta Computer Inc.
PROJECT : Z8C
Size Document Number Rev
3A
HDMI (PS8101)
Date: Saturday, November 15, 2014 Sheet 26 of 48
5 4 3 2 1
1 2 3 4 5 6 7 8

27
Q41 AO3413
20111122 change to PMOS
WIFI/BT COMBO (NGFF E KEY) +3VPCU
1 3

R741 Low Mini card +3V power enable


*100K_4

2
35 IOAC_WLANPWR#
High Mini card +3V power disable
20120217 reserve R648 PU 100k.
A A

+WL_VDD

+3V R721 *0_6 +3V_WLAN R713 *SHORT_8 +WL_VDD

C714 C701 C689 C690


0_4 R790 10u/6.3V_6 0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
CLK_PCIE_WIGIGN 9
0_4 R791
CLK_PCIE_WIGIGP 9
WIGIG_PE_waken

WIGIG_PE_CLKREQ
PLTRST# R694 *0_4
+WL_VDD
CN12 High Mini card +3V power disable
WIGIG_RST
35 WIGIG_RST#
PCIERST#
R707
R706
0_4
*0_4
NGFF 75
74 GND 73 A_LFRAME#_R *0_4 R270
72 3.3Vaux RESERVED 71 CLK_PCI_LPC_R *0_4 R275
LPC_LFRAME# 8,28,35 Debug
3.3Vaux RESERVED CLK_PCI_LPC 9
*0_4 R691 A_LAD3_R 70 69
8,28,35 LPC_LAD3 NC GND
*0_4 R693 A_LAD2_R 68 67
8,28,35 LPC_LAD2 NFC_ANT_N PETn1 WIGIG_RX1-_WLAN 9
Debug *0_4 R695 A_LAD1_R 66 65
8,28,35 LPC_LAD1 NFC_ANT_P PETp1 WIGIG_RX1+_WLAN 9
*0_4 R696 A_LAD0_R 64 63
8,28,35 LPC_LAD0 NFC_VDDANT GND
62 61
ALERT PERn1 WIGIG_TX1-_WLAN 9
TP148 WLAN_CLK_SCLK 60 59
WLAN_OFF_L POWER DOWN LAN CHIP from EC? I2C_CLK PERp1 WAKE/REQ 53, 55 OD WIGIG_TX1+_WLAN 9
WLAN_CLK_SDATA 58 57
WIFI_DISABLE_L disable Antenna from PCH? TP149 I2C_DATA GND
RF_EN PIN56: disable Antenna 56 55 PCIE_WAKE#_R
35 RF_EN PIN54: power down CHIP 54 W_DISABLE# PEWake0#
B R701 *Short_4 PDN# 53 CLK_PCIE_WLAN_REQ#_R B
35 BT_POWERON PDN# CLKREQ0#
R702 *0_4 WLAN_RST 52 51
7,13,16,28,29,35 PLTRST# PERST0# GND
R704 0_4 50 49
29,35 IOAC_RST# SUSCLK_32KHz REFCLKN0 CLK_PCIE_WLANN 9
R703 *0_4 48 47
29,35 PCIERST# LTE_SOUT REFCLKP0 CLK_PCIE_WLANP 9
46 45 LAYOUT NOTE:
7 PCH_WIFI_SUSCLK# LTE_SIN GND
44 43
42 NC PETn0 41
PCIE_RX4-_WLAN 9 CLOSE TO CONNECTOR
NFC_WI_IN PETp0 PCIE_RX4+_WLAN 9
40 39
38 NFC_SWP2_IO GND 37
NC PERn0 PCIE_TX4-_WLAN 9
36 35
34
32
UART_CTS
UART_RTS
PERp0
GND
33
PCIE_TX4+_WLAN 9
Leakage circuit (MPC)
UART_Rx
31
30
SLOT A-SD KEY 29
28 KEY KEY 27
26 KEY KEY 25
24 KEY
KEY
KEY
Remove SMBUS for NGFF
23
22 SDIO_RESET 21
20 UART_Tx SDIO_WAKE 19
18 UART_Wake SDIO_DAT3 17
BT_LED 16 GND SDIO_DAT2 15
TP150 LED#2 SDIO_DAT1
14 13
12 PCM_IN SDIO_DAT0 11
C PCM_OUT SDIO_CMD C
10 9
8 PCM_SYNC SDIO_CLK 7
TP151 PCM_CLK GND
WLAN_LED1# 6 5 20120105 Change power plant for leakage issue.
TP152 LED#1 USB_D- USBP4- 9 20111117 change mose footprint to dual type.
4 3
+WL_VDD
2 3.3Vaux USB_D+ 1
USBP4+ 9 BT +3V_S5 +WL_VDD
GND
GND

3.3Vaux GND
76
77

WLAN_NGFF CONN(Type 2230)_51745-0750P-005 R245 R265


+WL_VDD R700 *10K_4 PDN#
S0
Q21
5
4.7K_4 4.7K_4 IOAC
4 3 CLK_PCIE_WLAN_REQ#_R
+3V_S5 +WL_VDD
9 PCIE_CLKREQ_WLAN#
2

R251 R269 R259


S5
0_4 1 6 PCIE_WAKE#_R
35 WLAN_WAKE#
S0
Q22
5
4.7K_4 4.7K_4 WIGIG
R258 *0_4 2N7002DW
7,29 PCIE_LAN_WAKE#
4 3 WIGIG_PE_CLKREQ
R250 *0_4
9 PCIE_CLKREQ_WIGIG#
2 R246 *0_4
D WLAN_WAKE# R266
S5
0_4 1 6 WIGIG_PE_waken
20111118 change mose footprint to dual type. D

PCIE_LAN_WAKE# R267 *0_4 2N7002DW

R252 *0_4 Quanta Computer Inc.


R248 *0_4
20111118 change mose footprint to dual type.
PROJECT : ZRQ
Size Document Number Rev
3A
WIFI/BT COMBO (NGFF E KEY)
Date: Sunday, November 16, 2014 Sheet 27 of 48
1 2 3 4 5 6 7 8
1 2 3 4

MAIN SATA HDD (HDD)


TPM

A
CN11

1
1
2 SATA_TXP0_C
Layout Notes:
Place decoupling CAPs close to Connector
C687 0.01u/16V_4 SATA_TXP0 8
1C-4
2014/01/15 TPM CO-lay nuvoton
+3V

R782 TPM@0_4 +3V_TPM_VDD


R767

R765
TPM@0_4
+3V_S5

*TPMI@0_4 +3V_TPM_VDD
28 A

1
3 SATA_TXN0_C C686 0.01u/16V_4 SATA_TXN0 8

1
4 C778 C775 C770
5 SATA_RXN0_C C685 0.01u/16V_4 TPM@0.1u/10V_4
SATA_RXN0 8

2
6 SATA_RXP0_C C684 0.01u/16V_4 TPMN@10u/6.3V_4 TPM@0.1u/10V_4
SATA_RXP0 8

2
7
8
9 R289 *0_4 DEVSLP0 10
10

1
11
12 +5V_HDD R708 *SHORT_8 C772 C776
+5V
13 TPM@10u/6.3V_4 TPM@0.1u/10V_4

2
14 C354 C361 C358 C338 C344 C340 2013/10/23 add R5335 Isolate SLB9660 NC.
15 + 1A-9
16 0.01u/16V_4 0.01u/16V_4 *0.1u/10V_4 *0.1u/10V_4 10u/6.3V_6 *100u/6.3V_3528

24
19

5
17 U56
18

VSB
VDD
VDD
19
19
28
LPCPD# TP154
8,27,35 LPC_LAD0
26 TPMI@-->for SLB9655
LAD0
8,27,35 LPC_LAD1
23 9 R784 *TPMI@0_4 PLTRST#_TPM TPMN@-->for Nuvoton
B 20 LAD1 TESTB1/BADD B
SATA_HDD 8,27,35 LPC_LAD2 LAD2
8,27,35 LPC_LAD3
17 8 R781 TPM@10K_4 SLB 9655 NPCT65x
LAD3 TEST1
R767 Un-stuff stuff
TPM 14
PCLK_TPM 21 SLB 9655 TT 1.2 XTALO 13
9 PCLK_TPM LCLK XTALI
8,27,35 LPC_LFRAME# LPC_LFRAME# 22 R765 stuff Un-stuff
R785 *SHORT_4 PLTRST#_TPM 16 LFRAME# 2
7,13,16,27,29,35 PLTRST# LRESET# GPIO2 6 R775 *20K/F_4 +3V_TPM_VDD
GPIO
10,35 IRQ_SERIRQ
R769 *SHORT_4 27 C775 Un-stuff stuff
SERIRQ 1
R787 TPMN@0_4 15 NC 3
7,35 CLKRUN# CLKRUN# NC
1A-11 12 R787 Un-stuff stuff
LED(UIF)

GND
GND
GND
GND
2013/10/28 U5013 Pin8,15,28 left NC. 7 NC 10 +3V_TPM_VDD
PP NC
TPM@NPCT650AA0WX_TSSOP28 R778 stuff Un-stuff

4
11
18
25
R44 *1M_4 +3V_S5
+3V_TPM_VDD 2 1
R45 *1M_4 +3VPCU
1A-11 R780 *TPM@4.7K R784 stuff Un-stuff
+3V_S5 +3VPCU 2013/10/28 Change U5013.7 from +3V_S5 to +3V.

2
C Power LED Blue R778 C
*TPMI@4.7K R781 Un-stuff stuff
R31 300_4 3 2
35 PWRLED#

1
R32 680_4 4 1
35 SUSLED#
LED1 POWER LED
Amber

3/5VPCU reset switch (CLG)


SW2 SWITCH_1.5

R439 *1M_4 +3VPCU 2 3 SYS_SHDN# 10,37,41


4 1
TP156 TP155

1
R440 *1M_4
+3VPCU C769 D35
Battery

6
Blue 0.1u/10V_4 *14V/100p_4

2
D D
R432 300_4 3 2
35 BATLED0#

35 BATLED1#
R433 680_4 4 1 Quanta Computer Inc.
LED2 BATTERY LED
PROJECT : Z8C
Amber Size Document Number Rev
3A
SATA-HDD/ TPM
Date: Saturday, November 15, 2014 Sheet 28 of 48
1 2 3 4
5 4 3 2 1

LAN/Card reader (LAN) R324 *0_8

29
+3V_S5
Q28 AO3413
High Transformer (LAN)
(1.5A) 60 mils
+3VPCU
1 3 R319 *SHORT_6
40 mils
C405
VDD33 GDDR5
R338 R320 *SHORT_6
Mfr PN RTL8411AAR RTL8411BA-CG R1 *SHORT_4
VDDREG
1u/6.3V_4 100K_4 50 mils

2
U4 L5
C302 12p/50_4 35 IOAC_LANPWR# R330 10K_4
R295 POP DEPOP MDI0+ TX0P_R 1 6 X-TX0P 4 3 RJ45-TX0+
MDI0- TX0N_R 2 TD+ MX+ 5 X-TX0N 1 4 3 2 RJ45-TX0-
SP13 8 TD- MX- 3 1 2
R271
X'tal 25MHz VDD33
LAN_XTALI VDD33_18 R285 *0_4 VDD33/18 7 TCT MCT 4 MCT1 HCMC0805-371MFS/0.1A/370ohm
*1M_4 LAN_XTAL2 R2 *SHORT_4 TCT MCT
R1 VDD10 10/31 modify
VDD10 TRANSFORMER
R247 2.49K/F_4 LAN_RESET LED0/SPICSB TP91
D VDD33 GPO_NC R287 10K_4 R27 *SHORT_4 U7 D
C301 12p/50_4 LED1/SPICLK/EESK TP90 6 1 MCT2
5 TCT MCT 2 L7
MDI1+ TX1P_R 3 TCT MCT 8 X-TX1P 4 3 RJ45-TX1+
MDI1- TX1N_R 4 TD+ MX+ 7 X-TX1N 1 4 3 2 RJ45-TX1-

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
LAN_XTALI U24 TD- MX- 1 2
65 TRANSFORMER HCMC0805-371MFS/0.1A/370ohm

RSET

SD_CD#/MS_D5/xD_ALE

LED0/SPICSB

LED1/SPISCK
AVDD33
AVDD33

AVDD10
CKXTAL2
CKXTAL1
AVDD33
XD_CD#
MS_D0/xD_D1
MS_D4/xD_D0

VDD33/18
DVDD10

GPO
GND
4
3

Power source mode: R29 *SHORT_4


Y1
25MHz_XTAL Pin45 :Pull-up VDD33 for SWR mode
Pull-down for LDO mde R464 *SHORT_4
2
1

LAN_XTAL2 U36 L26


(1.5A) 70 mils MDI3- TX3N_R 1 6 X-TX3N 4 3 RJ45-TX3-
MDI3+ TX3P_R 2 TD+ MX+ 5 X-TX3P 1 4 3 2 RJ45-TX3+
MDI0+ 1 48 REGOUT 8 TD- MX- 3 1 2
MDI0- 2 MDIP0 REGOUT 47 +3V 7 TCT MCT 4 MCT3 HCMC0805-371MFS/0.1A/370ohm
MDIN0 VDDREG VDDREG TCT MCT
VDD10 3 46 R460 *SHORT_4
MDI1+ 4 AVDD10 VDDREG 45 ENSWREG R291 *SHORT_4 TRANSFORMER
MDIP1 ENSWREG_H VDD33
MDI1- 5 44 SDA/SPIDI TP94
MDI2+ 6 MDIN1 SDA/SPIDI 43 LED3/SPIDO/EEDO R438 *SHORT_4 U35
MIDP2 LED3/SPIDO TP92
MDI2- 7 42 SCL/LED_CR_NC R293 6 1 MCT4
VDD10 8 MDIN2 RTL8411BA-CG SCL/LED_CR 41
TP93
VDD10 1K_4 5 TCT MCT 2 L23
MDI3+ 9 AVDD10 DVDD10 40 LANWAKE# MDI2- TX2N_R 3 TCT MCT 8 X-TX2N 4 3 RJ45-TX2-
MDI3- 10 MDIP3 LANWAKEB 39 R292 *SHORT_6 VDD33 MDI2+ TX2P_R 4 TD+ MX+ 7 X-TX2P 1 4 3 2 RJ45-TX2+
11 MDIN3 DVDD33 38 ISOLATEB TD- MX- 1 2
VDD33 AVDD33 ISOLATEB
VDD33 R253 *SHORT_612 37 TRANSFORMER HCMC0805-371MFS/0.1A/370ohm
CARD_3V3 13 DVDD33 PERSTB 36 PCIE_REQ_LAN# R434 *SHORT_4
30 CARD_3V3 Card_3V3 CLKREQB
14 35 SP12 R290
15 SD_D7/xD_RDY SD_WP/MS_D1/xD_WP# 34
C300 16 SD_D6/MS_INS#/xD_RE# MS_BS/xD_CLE 33 VDD33/18 15K/F_4 C8 R449 R455 R7 R6

SD_CMD/MS_D6/xD_D3
SD_D5/xD_CE# SD_D1/MS_CLK/xD_D6

SD_CLK/MS_D3/xD_D4
VDD33/18 75_4 75_4 75_4 75_4
0.01u/16V_4
SD_D0/MS_D7/xD_D5

SD_D3/MS_D2/xD_D2
0.1u/10V_4
SD_D4/xD_WE#

TERM0
SD_D2/xD_D7
C C

REFCLK_N
REFCLK_P

EVDD10

HSON
HSOP
R740 *0_4 C552 *6.8p/50V_4 MDI3+
HSIN
HSIP
GND

GND
PLTRST# 7,13,16,27,28,35

2
C566 *6.8p/50V_4 MDI3-
R724 0_4 C521 *6.8p/50V_4 MDI2+
IOAC_RST# 27,35
C522 *6.8p/50V_4 MDI2- D1 C528
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
R732 *0_4 C50 *6.8p/50V_4 MDI1+ *B88069X9231T203 220p/3KV_1808
PCIERST# 27,35
C49 *6.8p/50V_4 MDI1-
C9 *6.8p/50V_4 MDI0+

1
SP5 C7 *6.8p/50V_4 MDI0-
30 SP5
SP6 PCIE_RXN3_C C332 0.1u/10V_4
30 SP6 PCIE_RX3-_LAN 9
30 SP7
SP7 PCIE_RXP3_C C330 0.1u/10V_4
PCIE_RX3+_LAN 9 Reserver for EMI
SP8 EVDD10
30 SP8
SP9
30 SP9 CLK_PCIE_LANN 9
SP10
30 SP10 CLK_PCIE_LANP 9

30 SP12
SP12
SP13
PCIE_TX3-_LAN
PCIE_TX3+_LAN
9
9
RJ45 CONNECTOR (LAN)
30 SP13
Layout Notes:
CN1
Place decoupling CAPs close to LAN Chip

RJ45-TX0+ 1
RJ45-TX0- 2 0+
RJ45-TX1+ 3 0-
RJ45-TX2+ 4 1+
RJ45-TX2- 5 2+
+3V RJ45-TX1- 6 2-
VDD33 RJ45-TX3+ 7 1- 9
RJ45-TX3- 8 3+ GND 10
B S5 IOAC S0 IOAC 3- GND
GND
11
12
B

GND
2

R303 R306
*1K_4 *10K_4
2

Q27 Q26
*DTC144EU *2N7002K RJ45
R309 0_4 3 1 LANWAKE# 1 3 PCIE_REQ_LAN#
7,27 PCIE_LAN_WAKE# 9 CLK_PCIE_LAN_REQ#
R308 *0_4
35 LAN_WAKE#
R294 *SHORT_4
R307 *SHORT_4
SURGE (LAN)
201201009: CLKREQ use S0 power domain by FAE
U8 U9

10 mils 10 mils MDI1- 1 8 RJ45-TX1- 1 8


MDI1+ 2 1 8 7 RJ45-TX1+ 2 1 8 7
VDD33 3 2 7 6 3 2 7 6
Power-on Strapping VDD33/18 VDD33_18 MDI3-
3 6
RJ45-TX0-
3 6
MDI3+ 4 5 RJ45-TX0+ 4 5
VDD10 4 5 4 5
C1 C2
C333 C334 C325 C314 *UCLAMP2512T.TCT *UCLAMP2512T.TCT
REGOUT L17 4.7uH/680mA
SDA/SPIDI R295 1.5K/F_4 4.7u/6.3V_6 0.1u/10V_4 *4.7u/6.3V_6 0.1u/10V_4 (1.5A) 60 mils C352 C342
4.7u/6.3V_6 0.1u/10V_4

Place close to pin 33 Place close to pin 53


U1 U37
C1 and C2 only for RTL8411AAR,
Place Close pins-- 48 MDI2+ 1 8 RJ45-TX3- 1 8
RTL8411BAR remove. MDI2- 2 1 8 7 RJ45-TX3+ 2 1 8 7
MDI0- 3 2 7 6 RJ45-TX2- 3 2 7 6
MDI0+ 4 3 6 5 RJ45-TX2+ 4 3 6 5
VDDREG EVDD10 4 5 4 5
A VDD33 40 mils 30 mils A
40 mils (1.5A) 60 mils VDD10 *UCLAMP2512T.TCT *UCLAMP2512T.TCT

R286
*SHORT_6
C309 C298 C294 C293 C295 C311 C341 C336 C297 C335 C303 C329 C296 C323
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 C324 0.1u/10V_4

0.1u/10V_4 4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 1u/6.3V_4

Quanta Computer Inc.


PROJECT : Z8C
Size Document Number Rev
Place Close to LAN chip, for VDD33 pins-- 11, 12, 39, 58, 63, 64 Place connect to Pin46/47 Place Close to LAN chip, for VDD33 pins-- 3, 8, 41, 52, 61 Close to Pin29 3A
LAN-RTL8411/CARD READER
Date: Saturday, November 15, 2014 Sheet 29 of 48
5 4 3 2 1
A B C D E

30
SD/MMC CARD READER CONNECTOR (MMC) Stitching cap (EMC)
R786 *SHORT_4 SD_DAT1 CN19
29 SP5 R783 *SHORT_4 SD_DAT0 SD_CD# 11
29 SP6 R779 *SHORT_4 SD_CLK SD_WP 10 CARD/DET +1.05V_S5 +1.35V_GFX +3V
29 SP7 R762 *SHORT_4 SD_CMD SD_DAT2 9 W/P
29 SP8 R758 *SHORT_4 SD_DAT3 SD_DAT1 8 DATA2
29 SP9 R753 *SHORT_4 SD_DAT2 SD_DAT0 7 DATA1
29 SP10 6 DATA0 C326 C102 C590 C584
4 SD_CLK 5 VSS2 C273 4
R788 *SHORT_4 SD_WP CARD_3V3 4 CLK *0.1u/10V_4 *1000p/50V_4 *0.1u/10V_4 *1000p/50V_4
29 SP12 R748 *SHORT_4 SD_CD# 3 VDD *1000p/50V_4
29 SP13 SD_CMD 2 VSS1

GND

GND
CARD_3V3 SD_DAT3 1 CMD
29 CARD_3V3 CD/DATA3
SD-CARD

12

13
+VCCIN +V1.05M_VCCASW +3V_S5

C82 C62 C659 C657 C264 C265

*0.1u/10V_4 *1000p/50V_4 *0.1u/10V_4 *1000p/50V_4 *0.1u/10V_4 *1000p/50V_4

EMI 10 mils +1.35V_SUS +3VPCU +WL_VDD


CARD_3V3
SD_DAT0

3 Share Pin SD_CLK C382 C359 C391 C381 C699 C688 3


C773 C771 C774
SP1 SD_D7 xD_RDY C779
*0.1u/10V_4 *1000p/50V_4 *0.1u/10V_4 *1000p/50V_4 *0.1u/10V_4 *1000p/50V_4
SP2 SD_D6 MS_INS# xD_RE# C777 10u/6.3V_6
SP3 SD_D5 xD_CE# 10p/50V_4
0.1u/10V_4 *4.7u/6.3V_6
SP4 SD_D4 xD_WE# 10p/50V_4
SP5 SD_D1 MS_CLK xD_D6
SP6 SD_D0 MS_D7 xD_D5
SP7 SD_CLK MS_D3 xD_D4 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +5V +5V +5V +5V
SP8 SD_CMD MS_D6 xD_D3
SP9 SD_D3 MS_D2 xD_D2
SP10 SD_D2 xD_D7
SP11 MS_BS xD_CLE Place close to connector
SP12 SD_WP MS_D1 xD_WP# C1 C58 C47 C6 C523 C3 C4 C74
SP13 SD_CD# MS_D5 xD_ALE
SP14 MS_D4 xD_D0 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
SP15 MS_D0 xD_D1
SP16 xD_CD#

HOLE(OTH) +1.35V_GFX +1.35V_GFX +1.35V_GFX +1.35V_GFX

HOLE8 HOLE16 HOLE20 HOLE5 HOLE6 HOLE4


2 HOLE21 *hg-c236d118p2 *hg-c236d118p2 *hg-c236d118p2 *HG-ZRQ-1 *HG-C276D118P2 *H-C236D157P2 C2 C5 C57 C226 2
*HG-C276D118P2 7 6 7 6 7 6 7 6 7 6
7 6 8 5 8 5 8 5 8 5 8 5 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
8 5 9 4 9 4 9 4 9 4 9 4
9 4
1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

1
1
2
3

HOLE7 HOLE10 HOLE11 HOLE14 HOLE13 HOLE18


*HG-C236D118P2 *hg-c236d118p2 *O-Z8C-1 *hg-c236d118p2 *HG-C236D118P2 *H-C236D165P2
7 6 7 6 7 6 7 6 7 6
8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4

BATT Enable short pad(Remove)


1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

GPU BKT CPU BKT


HOLE9 HOLE17 HOLE19
*hg-c276d118p2 *hg-c276d118p2 HOLE12 HOLE15 HOLE1 HOLE2 HOLE3 *H-TC197BC142D142P2 PAD1
7 6 7 6 *h-c217d138p2 *h-c197d138p2 *h-c150d150n *h-c150d150n *h-c150d150n *spad-e858x1268
1 8 5 8 5 1
9 4 9 4
1
2
3

1
2
3

1
1

1
2
3
4
5
6 Quanta Computer Inc.
PROJECT : Z8C
Size Document Number Rev
3A
CARD READER CONNECTOR
Date: Saturday, November 15, 2014 Sheet 30 of 48
A B C D E
5 4 3 2 1

HEADPHONE/Mic combo (AMP)


Codec (ADO) +5VA

R404
*10K_4
EAPD#

HP-L 20120910: ALC3225 has a internal MOSFET COMBO MIC JD R425 22K/F_4
31
HP HP-R MIC2-VREFO

C515
10u/6.3V_6
R407
C501 C500 C505 MIC2-VREFO
*10K_4
2.2u/6.3V_6 0.1u/10V_4 *10u/6.3V_6
R421 ADOGND
MIC2-R C511 2.2u/6.3V_6 MIC2_MIC 2.2K_4
D C496 Place next to pin 28 D

R403

R406
ADOGND
+
2.2u/6.3V_6 MIC2-L C510 2.2u/6.3V_6 R420 1K_4 COMBO_MIC

*0_4

0_4
+3V R774 *SHORT_6 ADOGND

1
R424

+3VCPVDD
C504 10u/6.3V_6 ADOGND 22K/F_4 D25
*14V/100p_4
close to pin 27

2
+5VA
+1.5V C490
+
C491 ANALOG Combo Jack
0.1u/10V_4 ADOGND ADOGND
2.2u/6.3V_6 CN21
R392 C506 C507 4
*SHORT_6 Layout Note: 3
Place close to Codec HP-L R419 56_4 HP-L-1 R423 *SHORT_6 HPL_SYS 1

36

35

34

33

32

31

30

29

28

27

26

25
U34 ADOGND 0.1u/10V_4 10u/6.3V_6
+1.5VAVDD2 DIGITAL HP-R R418 56_4 HP-R-1 R422 *SHORT_6 HPR_SYS 2

CPVEE

HP-OUT-L

MIC1-VREFO-L

MIC2-VREFO

LDO1-CAP

AVDD1

AVSS1
CPVDD

CBN

HP-OUT-R

MIC1-VREFO-R

VREF
ADOGND ADOGND Place next to pin 26 5
HPOUT_JD 6 7
C479 C488 ADOGND

1
10u/6.3V_6 0.1u/10V_4 37 24 L_SPK2 SIT_2SJ3052-005111F
CBP LINE2-L TP101
C486 D26
Place next to pin 40 10u/6.3V_6 38
AVSS2 LINE2-R
23 R_SPK2
TP102
SPK-2 D24 D23
*14V/100p_4
*14V/100p_4 *14V/100p_4

2
ADOGND 39 22 ADOGND
LDO2-CAP LINE1-L
ANALOG
40 21
AVDD2 LINE1-R ADOGND ADOGND ADOGND
R393 *SHORT_6 +5VPVDD1 41 20
+5V PVDD1 MIC1-R
C471 C472 C482 C487 L_SPK+ 42 19
SPK-L+ MIC1-L
10u/6.3V_6 0.1u/10V_4 10u/6.3V_6 0.1u/10V_4
SPK-1
L_SPK-

R_SPK-
43

44
SPK-L- MIC2-R
18

17
MIC2-R

MIC2-L Combo MIC Internal Speaker (AMP) Remove


SPK-R- MIC2-L
C
Place next to pin 41 R_SPK+ 45
SPK-R+ MONO-OUT
16 Pin1 - Pin6: DGND C

+5V R395 *SHORT_6 +5VPVDD2 46


PVDD2 JDREF
15 R411 20K/F_4 ADOGND
Pin7 - Pin12: AGND

GPIO0/DMIC-DATA
close to pin 15
Thermal Pad: DGND

GPIO1/DMIC-CLK
C477 C473 C484 C489 PD# 47 14
PDB Sense B

SDATA-OUT
10u/6.3V_6 0.1u/10V_4 10u/6.3V_6 0.1u/10V_4 COMBO MIC JD 48 13 SENSEA R410 39.2K/F_4 HPOUT_JD
SPDIFO/GPIO2 Sense A

LDO3-CAP

SDATA-IN

DVDD-IO

PCBEEP
RESET#
BIT-CLK
close to pin 13
DVDD

SYNC
DVSS
DIGITAL 49 ANALOG
GND
Place next to pin 46 Spilt by DGND
ALC3225
1

10

11

12
PCBEEP dont coupling any signals if possible
DIGITAL 8/17 separate PCBEEP to Digital from Realtek suggestion
1.6Vrms
+3V R398 *SHORT_6 +3VDVDD C497
10u/6.3V_6 PCBEEP C508 1u/16V_6 BEEP_1 R409 47K_4 BEEP_2
SPKR 8,10
close to pin 7 D19 RB500V-40 CN22
C495 C494 C509 R412 R_SPK+ R431 0_6 R_SPK+_1 1
0.1u/10V_4 10u/6.3V_6 4.7K_4 R_SPK- R430 0_6 R_SPK-_1 2
PCBEEP_EC 35
100p/50V_4 D20 RB500V-40 L_SPK- R429 0_6 L_SPK-_1 3
L_SPK+ R428 0_6 L_SPK+_1 4
C503 *100p/50V_4 5
Place next to pin 1 6
PCH_AZ_CODEC_RST# 8
PCH_AZ_CODEC_SYNC 8
+3VDVDDIO R408 *SHORT_6+3V SPK CN
C519 C520 C517 C518
DMIC_DATA C502 C499 *68p/50V_4 *68p/50V_4 *68p/50V_4 *68p/50V_4

DMIC DMIC_CLK 0.1u/10V_4 10u/6.3V_6

Place next to pin 9


B B
ACZ_SDIN0_R R405 33_4
PCH_AZ_CODEC_SDIN0 8
C498 22p/50V_4

PCH_AZ_CODEC_BITCLK 8

PCH_AZ_CODEC_SDOUT 8

INT DMIC(AMP) +3V_DMIC R426 *SHORT_6


+3V

C516 C781
R789 *0_4
1000p/50V_4 0.1u/10V_4
Power(ADO) R413 *0_4
Mute(ADO)
R396 *SHORT_4
DIGITAL ANALOG
R383 *SHORT_4 CN20
L21 HCB2012KF220T60/6A/22ohm_8 R417 *SHORT_4 DMIC_DATA_R R416 *SHORT_4 DMIC_DATA
+5V +5VA R427 *SHORT_4 +3V 4
3

1
U33 R414 *SHORT_4
3 4 C483 *1000p/50V_4 62 D22 C513
IN OUT C514 *1000p/50V_4 51
A 2 0V : Power down Class D SPK amplifer AMIC *14V/100p_4 22p/50V_4 A

2
GND C480 C478 R397 3.3V : Power up Class D SPK amplifer
1 5 R391 *29.4K/F_4 ADOGND *10K_4
SHDN SET *10u/6.3V_6 *0.1u/10V_4
*G923-330T1UF PD# D18 RB500V-40 AMP_MUTE# DMIC_CLK_R R415 *SHORT_4 DMIC_CLK
AMP_MUTE# 35
C427 C426 R390 Tied at one point only under

1
*10K/F_4
*0.1u/10V_4 *10u/6.3V_6 ADOGND
the codec or near the codec D21 C512
D17 RB500V-40 PCH_AZ_CODEC_RST#
R381 *0_4 *14V/100p_4 22p/50V_4

2
ADOGND
Quanta Computer Inc.
PROJECT : Z8C
Size Document Number Rev
C730, C787 close U37 pin3 and L65 REALTEK ALC3225 3A

Date: Saturday, November 15, 2014 Sheet 31 of 48


5 4 3 2 1
5 4 3 2 1

+5VPCU
USB3.0
32
C717 1u/6.3V_4
Active High:
U49
USB Charger to 3.0
5 1 USBPWR1
IN OUT
CB SELCDP Funcion

1
3 C707
9 USB_OC0# OC# DCP autodetect with mouse/keyboard wakeup
C706 0 X
USB_BC_EN 4 2 1000p/50V_4
EN GND S0 charging with SDP only
100u/6.3V_1206 1 0

2
G524A1T11U 1 1 S0 charging with CDP or SDP only (depending on external device)
R792
*100K_4

U25 R326 *SHORT_4 USB_CHARGE_ON 35


BC_CEN 1 8 R328 *0_4
CEN CB1 MAINON 35,38,39,41
USBP0-_C 2 7
DM TDM USBP0- 9
R712 *SHORT_4 USBP0+_C 3 6
DP TDP USBP0+ 9
4 5 C378 0.1u/10V_4
USBP0-_C SELCDP VDD 9
USBP0+_C
USB 3.0 Connector Thermal Pad
D D
SLG55584A
CN13
R711 *SHORT_4 1 R318 10K_4 +5VPCU
2 1 VBUS
USBP0-_R
2 D-
R296 *SHORT_4 USBP0+_R 3
4 3 D+
USB3_RXN0 USB3_RXN0_R 5 4 GND
9 USB3_RXN0 6 5 SSRX-
USB3_RXP0 USB3_RXP0_R
9 USB3_RXP0 7 6 SSRX+
USB3_TXN0_R 8 7 GND
R302 *SHORT_4 USB3_TXP0_R 9 8 SSTX-
9 SSTX+

13
12
11
10
R311 *SHORT_4 USB3.0 CONN CEN:SLG55584A----pull up +3VPCU

13
12
11
10
SLG55584----pull low
C370 0.1u/10V_4 USB3_TXN0_C
9 USB3_TXN0
C377 0.1u/10V_4 USB3_TXP0_C R331 47K_4 C400 *0.1u/10V_4
9 USB3_TXP0
D32 1 2 *5V/0.2p_4

5
USBP0-_R
R321 *SHORT_4 BC_CEN 2
D31 1 2 *5V/0.2p_4 4
USBP0+_R USB_BC_EN
USB_BC_ON 1
D10 1 2 *5V/0.2p_4 35 USB_BC_ON
USB3_RXN0_R
U26
D11 *5V/0.2p_4

3
USB3_RXP0_R 1 2 TC7SH08FU
D12 1 2 *5V/0.2p_4
USB3_TXN0_R R329 *0_4

USB3_TXP0_R D13 1 2 *5V/0.2p_4

USB2.0 +5V_S5 I/O board


C263 1u/6.3V_4 +5V_S5

U19
5 1 USBPWR2 C209 1u/6.3V_4
IN OUT
1

2 C163 U18
GND C127 5 1 USBPWR4
4 3 1000p/50V_4 IN OUT
35 USBON# EN /OC 100u/6.3V_1206 2 C256
2

G524B2T11U GND
USB_OC1# USBON# 4 3 0.1u/10V_4
EN /OC
G524B2T11U CN6
C 1 13 C
2 1 13 14
3 2 14
4 3
9 USB_OC1# 5 4
R73 *SHORT_4 6 5
USBP2-_R 7 6
USBP2+_R 8 7
9 USBP3- USB 2.0 Connector 9 8
9 USBP3+ 9
CN5 10
13,35 NBSWON# 11 10
25,35 LID# 11
R72 *SHORT_4 1 6 +3VPCU 12
USBP3-_R 2 VDD GND6 5 12
USBP3+_R 3 D- GND5 USB/B CONN
4 D+ 7
GND1 GND7 8
GND8 R617 *SHORT_4
USB2.0 CONN

9 USBP2- USBP2-_R
9 USBP2+ USBP2+_R

R621 *SHORT_4

D4 1 2 *5V/0.2p_4
USBP3-_R

USBP3+_R D3 1 2 *5V/0.2p_4

+5V_S5
B B
C693 1u/6.3V_4

U48
5 1 USBPWR3
IN OUT
1

2 C692
GND C691
USBON# 4 3 1000p/50V_4
EN /OC 100u/6.3V_1206
2

G524B2T11U

USB_OC0#

R692 *SHORT_4

9 USBP1- USB 3.0 Connector


9 USBP1+
CN8
R690 *SHORT_4 1
2 1 VBUS
USBP1-_R
USBP1+_R 3 2 D-
R249 *SHORT_4
4 3 D+
USB3_RXN1 USB3_RXN1_R 5 4 GND
9 USB3_RXN1 6 5 SSRX-
USB3_RXP1 USB3_RXP1_R
9 USB3_RXP1 7 6 SSRX+
USB3_TXN1_R 8 7 GND
R256 *SHORT_4 USB3_TXP1_R 9 8 SSTX-
9 SSTX+
13
12
11
10

R276 *SHORT_4 USB3.0 CONN


13
12
11
10

C305 0.1u/10V_4 USB3_TXN1_C


9 USB3_TXN1
C308 0.1u/10V_4 USB3_TXP1_C
9 USB3_TXP1
D30 *5V/0.2p_4
USBP1-_R 1 2
R281 *SHORT_4
D29 1 2 *5V/0.2p_4
USBP1+_R
D6 1 2 *5V/0.2p_4
USB3_RXN1_R

USB3_RXP1_R D7 1 2 *5V/0.2p_4
A A

D8 1
USB3_TXN1_R 2 *5V/0.2p_4
D9 1
USB3_TXP1_R 2 *5V/0.2p_4

Quanta Computer Inc.


PROJECT : Z8C
Size Document Number Rev
INT&EXT USB 3A
Date: Saturday, November 15, 2014 Sheet 32 of 48
5 4 3 2 1
5 4 3 2 1

G-sensor
mDP USB3.0 re-driver IC(Remove)

R749 *GS@SHORT_6 +3V

D +G_SEN_PW D

U54
C724 C722 1 2
GS@0.1U/10V_4 GS@10u/6.3V_6 14 Vdd_IO NC 3
VDD NC

10
GS@RB500V-40 D33 ACCEL_INTA_R 11 RESERVED 15
10 ACCEL_INTA INT1 RESERVED
TP153 9
INT2
ACCEL_INTA R759 *GS@SHORT_4 7
CLK_SDATA R761 *GS@SHORT_4G_MBDATA_R 6 SA0 5
8,13,14,15 CLK_SDATA SDA GND
8,13,14,15 CLK_SCLK CLK_SCLK R755 *GS@SHORT_4G_MBCLK_R 4 12
SCL GND 13
C721 +G_SEN_PW 8 GND 16
+G_SEN_PW CS GND
GS@22P/50V_4
CLK_SDATA C763 GS@33P/50V_4
GS@LIS3DHTR
CLK_SCLK C757 GS@33P/50V_4

C +G_SEN_PW R760 *GS@4.7K_4 G_MBDATA_R C


R754 *GS@4.7K_4 G_MBCLK_R

B B

A A

Quanta Computer Inc.


PROJECT : Z8C
Size Document Number Rev
G-Sensor A1A

Date: Saturday, November 15, 2014 Sheet 33 of 48


5 4 3 2 1
5 4 3 2 1

34
K/B (KBC) 7 8 MY17
TOUCHPAD BOARD CONN (TPD)
5 6 MY16
3 4 MX2 L32 *SHORT_6
+3V
1 2 MX3
CN15 CP4 *100p/50Vx4 +5V L31 *0_6
MY0 26 7 8 MX4
35 MY0 25 28 5 6
MY1 MX5 R389 *SHORT_4
35 MY1 +3V
MY2 24 27 3 4 MX6 C761
35 MY2 23 1 2
MY3 MX7 +5V R388 *0_4 0.1u/10V_4
35 MY3 MY4 22 CP5 *100p/50Vx4
35 MY4
MY5 21 7 8 MY0 R387 R386
35 MY5 20 5 6
MY6 MY1
D 35 MY6 MY7 19 3 4 MY2 D
10K_4 10K_4 50mil CN18
35 MY7
MY8 18 1 2 MY3 +TPVDD 1
35 MY8 MY9 17 2
CP6 *100p/50Vx4
35 MY9 16 7 8 3
MY10 MY4 R385 *SHORT_4 TPCLK_R
35 MY10 35 TPCLK
MY11 15 5 6 MY5 R384 *SHORT_4 TPDATA_R 4
35 MY11 MY12 14 3 4 MY6 35 TPDATA 5 8
35 MY12 13 1 2 6 7
MY13 MY7
35 MY13 12
MY14 CP1 *100p/50Vx4
35 MY14 11 7 8
MY15 MY8 TP CN
35 MY15 10 5 6
MY16 MY9
35 MY16 9 3 4
MY17 MY10
35 MY17
MX7 8 1 2 MY11
35 MX7 MX6 7 CP2 *100p/50Vx4 C475 C474
35 MX6 6 7 8
MX5 MY12 *0.1u/10V_4 *0.1u/10V_4
35 MX5 5 5 6
MX4 MY13
35 MX4 MX3 4 3 4 MY14
35 MX3 3 1 2
MX2 MY15
35 MX2 MX1 2 CP3 *100p/50Vx4
35 MX1 1
MX0
35 MX0 C481 *100p/50V_4 MX1
C476 *100p/50V_4 MX0
KB_CONN

+3VPCU

C RP1 *10K_10P8R C
10 1 MX3
MX6 9 2 MX2
MX7 8 3 MX1
MX5 7 4 MX0
MX4 6 5

KB_BL LED (KBC) CPU FAN1 (THM) +5V +5V


+3V +3V
B B

R705 R697 R699 R698


1K_4 *SHORT_8
10K_4 10K_4
+5V
+5V CN10
35 FANSIG
+5V_FAN1 CPU
4 6

2
C485 KBL@2.2u/6.3V_6
R394 3 5
2
1

1 3 FAN_PWM_CN1
BL@10K_4 Q32 35 FAN1_PWM 1
KBL@AO3413 Q40 30mil FAN1
2 MMBT3904-7-F
3

CPU FAN2 (THM)


3

2 +5V_KB R382 *KBL@SHORT_4 +5V_KB_R


35 KB_BL_LED
Q31 C468 C470
KBL@DTC144EU CN16
1

KBL@4.7u/6.3V_6 KBL@0.01u/16V_4 +3V +5V +3V +5V


4
3 6
2 5
1 R446 R445 R447 R437
KBL@KB_backlight EV@1K_4 *EV@SHORT_8
EV@10K_4 EV@10K_4
A A
CN4
35 FAN2SIG
+5V_FAN2 GPU
4 6
2

3 5
1 3 FAN_PWM_CN2 2
35 FAN2_PWM 1
Q35
EV@MMBT3904-7-F
30mil EV@FAN2 Quanta Computer Inc.
PROJECT : Z8C
Size Document Number Rev
KB/TP/FAN 3A

Date: Saturday, November 15, 2014 Sheet 34 of 48


5 4 3 2 1
5 4 3 2 1

L20 +A3VPCU +3VPCU

35
EC(KBC) BLM11A05S/0.2A/120ohm_6
C430
+3VPCU_ECPLL L18
BLM11A05S/0.2A/120ohm_6
+3VPCU_EC
0.1u/10V_4 C369 (For PLL Power) S5_ON R315 10K_4

ECAGND 12 mils 0.1u/10V_4


+3VPCU
+3V_RTC
R337 2.2_6 12 mils HWPG
+3VPCU 1 2 +3VPCU_EC C397
SUSC# 7,13
NBSWON# R310 10K_4
SUSB# 7,13
C402 C399 C767 C372 C429 C371 0.1u/10V_4
+3VPCU_EC and +3V_RTC IOAC_LANPWR# 29
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
minimum trace width 12mils. R316 *SHORT_4 +3V_GFX
R317 *SHORT_4 WLAN_WAKE# 27
LAN_WAKE# 29 dGPU_OTP# R361 EV@10K_4
D R332 2.2_6 +3V_EC TP97 dGPU_OPP# R362 EV@10K_4 D
+3V USB_BC_ON 32
USB_CHARGE_ON 32
C407 FB_CLAMP_REQ# R380 EV@10K_4
CLKRUN# 7,28
0.1u/10V_4

114
121

127
MAINON R347 100K_4

11
26
50
92

74

84
83
82

19
20

99
98
97
96
93
3
U32
10 110 MBCLK SUSON R312 100K_4

VBAT
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

VSTBY
VCC

AVCC

EGCLK/WUI27/GPE3(Dn)
EGCS#/WUI26/GPE2(Dn)
EGAD/WUI25/GPE1(Dn)

WUI42/GPH6/ID6(Dn)
WUI41/GPH5/ID5(Dn)
WUI40/GPH4/ID4(Dn)
WUI19/GPH3/ID3(Dn)
L80HLAT/BAO/WUI24/GPE0(Dn)
L80LLAT/WUI7/GPE7(Up)

CLKRUN#/WUI16/GPH0/ID0(Dn)
8,27,28 LPC_LAD0 LAD0/GPM0(X) SMCLK0/GPB3(X) MBCLK 36
9 111 MBDATA
8,27,28 LPC_LAD1 LAD1/GPM1(X) SMDAT0/GPB4(X) MBDATA 36
8 115 2ND_MBCLK 2ND_MBCLK 8,19 VRON R491 100K_4
8,27,28 LPC_LAD2 LAD2/GPM2(X) SMCLK1/GPC1(X)
7 116 2ND_MBDATA 2ND_MBDATA 8,19
8,27,28 LPC_LAD3 LAD3/GPM3(X) SMDAT1/GPC2(X)
PLTRST# 22 117 EC_PECR_R R298 43_4 H_PECI 4 PCH_SPI_SI_EC R314 *10K_4
7,13,16,27,28,29 PLTRST# LPCRST#/WUI4/GPD2(Up) PECI/SMCLK2/WUI22/GPF6(Up)

SM BUS
+3VPCU 13 118 PCH_SPI_SO_EC R720 *10K_4
9 CLK_PCI_EC LPCCLK/GPM4(X) SMDAT2/WUI23/GPF7(Up) EC_FPBACK# 25
6
8,27,28 LPC_LFRAME# LFRAME#/GPM5(X) 85
PS2CLK0/TMB0/CEC/GPF0(Up) IOAC_RST# 27,29
PROCHOT_EC 17 86
LPCPD#/WUI6/GPE6(Dn) PS2DAT0/TMB1/GPF1(Up) LID# 25,32
2

89
PS2CLK2/WUI20/GPF4(Up) TPCLK 34
D16 126 90
27 WIGIG_RST# GA20/GPB5(X) PS2DAT2/WUI21/GPF5(Up) TPDATA 34

PS/2
R353 SDMK0340L-7-F 5
100K_4
10,28
10
IRQ_SERIRQ
SIO_EXT_SMI#
15
23
SERIRQ/GPM6(X)
ECSMI#/GPD4(Up)
SM BUS PU(KBC)
10 SIO_EXT_SCI# ECSCI#/GPD3(Up) LPC
1

WRST# 14 GPIO
4 WRST#
10 SIO_RCIN# KBRST#/GPB6(X)
16
5 HWPG_1.05V_EC# PWUREQ#/BBO/SMCLK2ALT/GPC7(Up)/SMCLK2ALT
C416
1u/6.3V_4 24 +3VPCU
PWM0/GPA0(Up) PWRLED# 28
25

25 PCH_BLON_EC
39 SUSON
Follow ZQ0
119
123 CRX0/GPC0(Dn)
CTX0/TMA0/GPB2(Dn) CIR
IT8587 PWM1/GPA1(Up)
PWM2/GPA2(Up)
PWM3/GPA3(Up)
PWM4/GPA4(Up)
28
29
30
SUSLED#
BATLED1#
SUSLED#
BATLED0#
APWORK
28
28
28
5,7
MBCLK
MBDATA
R301
R313
4.7K_4
4.7K_4

31
PWM5/GPA5(Up) FAN2_PWM 34
+3V_S5
PWM
CLK_PCI_EC 80 2ND_MBCLK R300 4.7K_4
C 32,38,39,41 MAINON DAC4/DCD0#/GPJ4(X) C
BT_POWERON 104 47 2ND_MBDATA R299 4.7K_4
27 BT_POWERON DSR0#/GPG6(X) TACH0A/GPD6(Dn) FANSIG 34
33 48
7 EC_PWROK GINT/CTS0#/GPD5(Up) TACH1A/TMA1/GPD7(Dn) FAN2SIG 34
88
34 KB_BL_LED PS2DAT1/RTS0#/GPF3(Up)
R348 81 120
27 IOAC_WLANPWR# DAC5/RIG0#/GPJ5(X) TMRI0/WUI2/GPC4(Dn) DNBSWON# 7
87 124
25 COLOR_ENG PS2CLK1/DTR0#/GPF2(Up) TMRI1/WUI3/GPC6(Dn) DPWROK 7
*22_4 109
36 AC_Protect TXD/SOUT0/GPB1(Up)
108
31 AMP_MUTE# RXD/SIN0/GPB0(Up) H_PROCHOT# 4,36,40

3
71 125 NBSWON#
7 PCH_SLP_SUS# ADC5/DCD1#/WUI29/GPI5(X) PWRSW/GPE4(Up) NBSWON# 13,32
72 18
ADC6/DSR1#/WUI30/GPI6(X) UART port
C409 dGPU_OPP# Q29
36 ACIN RI1#/WUI0/GPD0(Up) dGPU_OPP# 19
*10p/50V_4 73 21
36 TEMP_MBAT ADC7/CTS1#/WUI31/GPI7(X) RI2#/WUI1/GPD1(Up) SB_ACDC 36
TP98 35 WAKE UP PROCHOT_EC 2
34 RTS1#/WUI5/GPE5(Dn)
31 PCBEEP_EC PWM7/RIG1#/GPA7(Up)
107 112
36 D/C# DTR1#/SBUSY/GPG1/ID7(Dn) RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn) RSMRST# 7
TP95 G_MBDATA 95 R367 2N7002K
G_MBCLK 94 CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn)
TP96

1
CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn) 100K_4
105
8 PCH_SPI_CLK_EC FSCK/GPG7
101
8 SPI_CS0#_UR_ME FSCE#/GPG3 RF_EN 27
102 EXTERNAL SERIAL FLASH ICMNT
8 PCH_SPI_SI_EC FMOSI/GPG4 ICMNT 36
103 66
8 PCH_SPI_SO_EC FMISO/GPG5 ADC0/GPI0(X) 67 C469 10u/6.3V_6 ECAGND
56 ADC1/GPI1(X) 68 TPD_INT#
34 MY16 KSO16/SMOSI/GPC3(Dn) ADC2/GPI2(X)
57 69
34 MY17 KSO17/SMISO/GPC5(Dn) ADC3/GPI3(X) VRON 40
32 70 FB_CLAMP_REQ#
34 FAN1_PWM PWM6/SSCK/GPA6(Up) ADC4/WUI28/GPI4(X) FB_CLAMP_REQ# 19
Please do not place any
S5_ON 100 A/D D/A
pull-up resistor 37,38,41 S5_ON
106 SSCE0#/GPG2(X)
on GPG0, GPG2, and GPG6 8 ME_WR# SSCE1#/GPG0(X) SPI ENABLE +3V
76
TACH2/GPJ0(X) dGPU_OTP# 19
(Reserved 34 MY0
36
KSO0/PD0 GPJ1(X)
77 EC_FB_CLAMP
EC_FB_CLAMP 17,19
hardware strapping). 37 78
34 MY1 KSO1/PD1 DAC2/TACH0B/GPJ2(X) PCH_PWROK 5,7

2
38 79
34 MY2 KSO2/PD2 DAC3/TACH1B/GPJ3(X) USBON# 32
39
34 MY3 KSO3/PD3
B 40 KBMX TPD_INT# 3 1 TPD_INT#_D B
34 MY4 KSO4/PD4 TPD_INT#_D 2
41
34 MY5 KSO5/PD5
42 Q30
34 MY6 KSO6/PD6
43 *2N7002K
34 MY7 KSO7/PD7
44
34 MY8 KSO8/ACK#
45
34 MY9 KSO9/BUSY
46
34
34
MY10
MY11
51 KSO10/PE
KSO11/ERR# CK32KE/GPJ7
2
PCH_SUSACK# 7
HWPG(KBC)
KSI3/SLIN#
KSI1/AFD#

52
KSI0/STB#

128
KSI2/INIT#

+3V
34 MY12 KSO12/SLCT CK32K/GPJ6 PCH_SUSPWARN# 7
53 R323 *0_4
VCORE

34 MY13 KSO13
54 CLOCK DDR=1.5V, D1 DNP and D2 POP
AVSS
KSI4
KSI5
KSI6
KSI7

34 MY14
VSS

VSS
VSS
VSS
VSS
VSS

55 KSO14
34 MY15 KSO15 DDR=1.35V, D1 POP and D2 DNP R344
IT8587E/FX 10K_4
SM BUS ARRANGEMENT TABLE
58
59
60
61
62
63
64
65

27
49
91
113
122

75

12

SSCE0# D1
D38 RB500V-40 HWPG
41 HWPG_1.5V
34 MX0 SM Bus 1 Battery D2
C410 D14 *RB500V-40
34 MX1 5 HWPG_1.05V
ECAGND

34 MX2
0.1u/10V_4 SM Bus 2 PCH/VGA D36 *RB500V-40
34 MX3 39 HWPG_VDDR
34 MX4
D34 RB500V-40
34 MX5 13,38 HWPG_1.05V_S5
34 MX6 SM Bus 3 N/A
L19 D37 RB500V-40
34 MX7 37 SYS_HWPG
BLM11A05S/0.2A/120ohm_6
SM Bus 4

+3V
For test only iRST
SW1

A 3 2 NBSWON# C387 A
4 1 *0.1u/10V_4
TP100 TP99
5
5

6
IOAC_RST# 2
*Power Switch 4 PCIERST# PCIERST# 27,29
1
7 PCI_PLTRST#
U27
Quanta Computer Inc.
3

*TC7SH08FU
R341 R335
*100K_4 *100K_4
PROJECT : Z8C
Size Document Number Rev
3A
KBC IT8587
Date: Saturday, November 15, 2014 Sheet 35 of 48
5 4 3 2 1
5 4 3 2 1

36
VA2 PR69
VA1 PQ9 PD2 0.02/F_0612 PQ22
AOL1413 SBR1045SP5-13 7/16 CHANGE VIN AOL1413
PJ1 1 1 1
2 5 3 1 2 2 5
1 3 2 3
2
3 DEL PR192

1
PL5,PL6 *SHORT_4
4 PC21 PC31 PR43 24737_ACN PC43 PC54 PR95
12/7

4
Power conn 0.1u/50V_6 0.1u/50V_6 220K_4 0.1u/50V_6 2200p/50V_6 33K/F_4
PD9
SMAJ20A 24737_ACP

2
D D
PC24 PC22 PR188
0.1u/50V_6 2200p/50V_6 1 6 *SHORT_4

PD1 PR45 2 5 PR100


D/C# 35
1N4148WS 220K_4 10K_4
recommend 200mA at least. 3 4 PR44
*SHORT_4
PQ11

3
IMD2AT108

2
24737_ACP
PQ20
2N7002K
24737_ACN

1
PR48
*SHORT_6 PC53 PC121 PC55
0.1u/50V_6 0.1u/50V_6 0.1u/50V_6

PR189
+3VPCU 63.4K/F_4

1
VIN
PR196 PC129

ACP

ACN
10K/F_4 1u/16V_6
C 24737_ACDET 6 16 24737_REGN C
ACDET REGN
PR59 PR49 PR55 PC35
*10K_4 100K_4 100K_4 0.1u/25V_4 PD5
24737_VCC 20 RB500V-40
VCC PR201 PC48 PC50
PR73 PC58 *SHORT_6 2200p/50V_6 4.7u/25V_8
20_1206 0.47u/25V_6 17 24737_BST
35 ACIN BTST

5
PC125
47n/50V_6
7 ACPRESENT
PQ17
PR58 18 24737_DH 4 AON7410
HIDRV
6

*0_4 5
35 SB_ACDC ACOK#
PR54 19 24707_LX
PHASE

3
2
1
*SHORT_4 PR207
0.01/F_0612
MBDATA 8 PU9 PL7
PQ13 SDA BQ24737RGRR 6.8uH_7X7X3
2N7002DW PR200 15 24737_DL 1 2 BAT-V
1

*SHORT_4 LCDRV
MBCLK 9
SCL

5
PC77 +3VPCU PR202
0.1u/50V_6 PR94 *SHORT_4 14 PR93
10K_4 PGND PQ48 *4.7_6
DEL 24737_BM# 11
BM#
4 AON7410 PR208 PR209
PC79 *SHORT_4
B
*100p/50V_4
PL7,PL8 PR193 PR206 PC131
*SHORT_4 B
12/7 10K_4 24737_CMPOUT 3 10/F_6 0.1u/25V_4
CMPOUT

3
2
1
13 24737_SRP 24737_SRP PC78 PC137 PC134
SRP PC63 2200p/50V_6 10u/25V_1206 10u/25V_1206
BAT-V 24737_ILIM 10 PC133 *680p/50V_6 24737_SRN
PJ2 ILIM 0.1u/25V_4
50458-00801-V01

PR97
9 8 316K/F_4 24737_CMPIN 4 12 24737_SRN
7 BATT_EN# CMPIN SRN
6 PR98 100_4 TEMP_MBAT PR205

IOUT

GND
GND
GND
GND
GND
5 TEMP_MBAT 35
7.5_6 PC132
4
3 For battery reverse 0.1u/25V_4
PR101 1M_4 PR102 PR194
+3VPCU

21
22
23
24
25
2
10 1 100K_4
*100K_4

PC59 PC62
*47p/50V_4 *47p/50V_4 +1.05V

PR203 PC130
100K/F_4 0.01u/25V_4 10/29 REGN MAX voltage 6.5V
3

9/5 BATT Enable PR81


short pad Z8C PR103
*SHORT_4
PR87
100_4
PR96
100_4 PR88
*100K_4 V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
del function
24737_BM# 2
BATT_EN# need to
MBCLK 35
127K/F_4 PR89
*0_4
=0.793V for 3.965A current limit
GND PQ21
H_PROCHOT# 4,35,40

3
A MBDATA 35
*2N7002K
35 ICMNT Pin10 ILIM=0.793V A
Rsr = 0.01ohm
1
PD4

PD3

24737_CMPOUT 2
1

PC124 PQ18
BZT52-B5V6S(5.6V)

BZT52-B5V6S(5.6V)

100p/50V_4 PR90 2N7002K


PR88 Value *SHORT_4 Quanta Computer Inc.
1
2

65W-DIS CS41272FB19 127K PROJECT : Z8C


35 AC_Protect Limit set on 60W/3.16A Size Document Number Rev
2A
45W-UMA CS33902FB16 39K
Charger(BQ24737RGRR)
Date: Saturday, November 15, 2014 Sheet 36 of 48
5 4 3 2 1
5 4 3 2 1

MAIND
MAIND 38,39,41
SYS_SHDN#
SYS_SHDN# 10,28,41
37
PR204
*SHORT_6

+3VPCU VL 3V_LDO
PR191
D D
10K/F_4
35 SYS_HWPG
VIN VIN
SYS_SHDN#

10u/6.3V_6

0.1u/25V_4

4.7u/6.3V_6
1
+ PC144
33u/25V_6X4.5 PR197 PR85
PC126 PC123 *SHORT_4 *100K/F_4
2

PC65

PC64
4.7u/25V_8 2200p/50V_6 PR199 PC120 PC122

51225_VIN

PC52
*SHORT_4 2200p/50V_6 4.7u/25V_8

+5VPCU +5VPCU

5
5 Volt +/- 5% +3VPCU

5
PQ46
TDC : 5.4A +3VPCU
AON7410
PEAK : 7.2A

13

12

3
4 3.3 Volt +/- 5%
OCP : 9A PQ50 4

VREG5

VIN

VREG3
AON7410 TDC : 4.7A
Width : 220mil 7 6 SYS_SHDN#
PEAK : 6.2A

3
2
1
PGOOD EN2

1
2
3
51225_EN1 20
EN1 DRVH2
10 51225_DH2
PR91 PC56
OCP : 7.5A
PL9 51225_DH1 16
DRVH1 VBST2
9 51225_VBST2 PL6 Width : 200mil
2.2uH_7X7X3 PC57 PR92 2.2uH_7X7X3
51225_VBST1 17 8 51225_SW2 1/F_6 0.1u/50V_6
VBST1 PU5 SW 2
0.1u/50V_6 1/F_6 51225_SW1 18 TPS51225RUKR 11 51225_DL2
SW 1 DRVL2

5
C C
PR186 51225_DL1 15 4 51225_FB2 PR80
15.4K/F_4 PQ51 DRVL1 VFB2 PQ49 6.81K/F_4
AON7752 51225_FB1 2 21 AON7752 PR83
+ PR106 4 VFB1 GND 4 *4.7_6 +
*4.7_6 14 22
PC146 PC141 VO1 GND PC128 PC127

VCLK

GND

GND

GND

GND
CS1

CS2
220u/6.3V_6X4.2 0.1u/50V_6 0.1u/50V_6 220u/6.3V_6X4.2
1
2
3

3
2
1
PC51
PR187 *680p/50V_6 PR190

19

26

25

24

23
10K/F_4 PC76 10K/F_4
*680p/50V_6

51225_CS1

51225_CS2
51225_VCLK

84.5K/F_4

69.8K/F_4
PC60
2 0.1u/50V_6 OCP:7.5A
PD6 L(ripple current)
OCP:9A 1PS302 3
L(ripple current) PR86 =(9-3.3)*3.3/(2.2u*0.355M*9)
1
=(9-5)*5/(2.2u*0.3M*9)
*SHORT_6 ~2.676A

PR82

PR195
PC71 Iocp=7.5-(2.676/2)=6.16A
=3.367A 0.1u/50V_6 PC61
0.1u/50V_6 PR198 Vth=6.16A*14mOhm+1mV=87.27mV
Iocp=9-(3.367/2)=7.32A 2 *SHORT_6 R(Ilim)=(87.27mV*8)/10uA
B Vth=7.32A*14mOhm+1mV=103.43mV PD7 B
3 ~69.81K
R(Ilim)=(103.43mV*8)/10uA 1PS302
=82.774K 1

+15V_ALWP
+15V
PR107
22_8 PC70
0.1u/50V_6

VIN +3V_S5 +5V_S5 +15V VIN +5VPCU +5VPCU


+3VPCU +3VPCU

PR124 PR84 PR117 PR122 PR121


5

1M_6 22_8 22_8 1M_6 *1M_6

3
S5D 4 MAIND 4 MAIND 2 S5D 2
A PQ53 PQ55 A
3

AON7408 AON7408
PQ47 PQ45
3
2
1

3
2
1

2 AO3404 AO3404
38,41 S5_ON
1

1
2 2 2
+5V_S5 +5V +3V +3V_S5
PQ26 PR125 PQ16 PQ24 PQ29
Quanta Computer Inc.
1

DTC144EU 1M_6 2N7002K 2N7002K 2N7002K


PC84
TDC : 1.5A TDC : 2.4A TDC : 1.4A TDC : 1.2A
1

*2.2n/50V_4
PEAK : 2A PEAK : 3.2A PEAK : 1.8A PEAK : 1.6A PROJECT : Z8C
Size Document Number Rev
Width : 80mil Width : 100mil Width : 110mil Width : 60mil SYSTEM 5V/3V (TPS51225) 2A

Date: Saturday, November 15, 2014 Sheet 37 of 48


5 4 3 2 1
5 4 3 2 1

38
VIN
D D
+5VPCU

+3V

PC41 PC118 PC117


1u/10V_4 2200p/50V_6 4.7u/25V_8

5
PR72
*100K/F_4 PQ44

7
AON7410

V5IN
51211V_DRVH 4
1 9 PR71 PC42 +1.05V_S5
13,35 HWPG_1.05V_S5 PGOOD DRVH *SHORT_6 0.1u/50V_6
51211V_EN 3 10 51211V_VBST PL5
32,35,39,41 MAINON

3
2
1
PR171 *0_4 EN VBST 2.2uH_7X7X3
51211V_TRIP 2 PU4 8 51211V_SW
PR68 105K/F_4 TRIP TPS51211DSCR SW
35,37,41 S5_ON
PR175 *SHORT_4 51211V_TST 5 6 51211V_DRVL
PR165 470K/F_4 TST DRVL

5
12 11
C PR172 GND GND PR53 PR61 +1.05V C

GND

GND

GND

GND
*100K/F_4 *4.7_6 5.1K/F_4 1.05 Volt +/- 5%

FB
+
4 TDC : 6.7A

13

14

15

16

4
PC113 PC110
51211V_FB 0.1u/50V_6 330u/2.5V_6X4.2 PEAK : 8A
PQ41 PC37 OCP : 10A

3
2
1
AON7752 *680p/50V_6 PR63
10K/F_4 Width : 280mil

OCP=10A
L ripple current
=(19-1.05)*1.05/(2.2u*290k*19)
=1.555A +1.05V_S5
Vtrip=10-(1.555/2)*14mohm
B =0.129V B
Rlimit=0.129/10uA*8=103.293Kohm

5
MAIND 4
37,39,41 MAIND
PQ32
AON7408

3
2
1
+1.05V

TDC : 2.4A
PEAK : 3.2A
Width : 100mil
A A

Quanta Computer Inc.


PROJECT : Z8C
Size Document Number Rev
+1.05V(TPS51211) 2A

Date: Saturday, November 15, 2014 Sheet 38 of 48


5 4 3 2 1
5 4 3 2 1

TDC : 0.75A
PEAK : 1A
Width : 40mil
+DDR_VTT_RUN

39
PC73 PC75
10u/6.3V_6 10u/6.3V_6
D TDC : 0.38A D

PEAK : 0.5A DDR_VTTREF

Width : 20mil
Close to IC
Greater than or equal 40mil
PC68
0.22u/10V_4

+5VPCU

+3V

PC135 PC72

22

21
10u/6.3V_6 1u/10V_4

2
PR114
VIN
*100K/F_4

PAD

PAD

VTTGND

VLDOIN
VTTSNS
VTTREF

VTT
10/29 +1.35V_SUS
20 12
1.35 Volt +/- 5%
C
35 HWPG_VDDR PGOOD V5IN TDC : 12.6A C

2
PR110 51216_S3 17 14 51216_DRVH
PEAK : 16.8A

D1
D1
D1
32,35,38,41 MAINON
*0_4 S3 DRVH PR108 PC74 OCP : 20A
2/F_6 0.1u/50V_6 PC140 PC139
35 SUSON
PR111 51216_S5 16 15 51216_VBST 2200p/50V_4 4.7u/25V_8 Width : 520mil
*SHORT_4 S5 PU6 VBST 1 G1
TPS51216RUKR
PR113 51216_MODE 19 13 51216_SW S1/D2 9 51216_SW +1.35V_SUS
200K/F_4 MODE SW
PL8
PR112 51216_TRIP 18 11 51216_DRVL 8 G2 0.68uH_7X7X3
TRIP DRVL +1.35V_SUS 4,5,14,15,30,43
15.4K/F_4
PR105 10/12 change
VDDQSNS

PQ52
26 10 AON6970 *4.7_6

S2
S2
S2
PAD PGND
REFIN

GND
PAD

PAD

PAD
REF

+ +

7
6
5
PC138
VREF=1.8V PC66 0.1u/50V_6 PC136 PC80
6

25

24

23

7 *680p/50V_6 330u/2.5V_6X4.2 *330u/2V_7343


51216_REF
51216_REFIN

PC67 PR210
B 0.1u/10V_4 *SHORT_6 RDSon=3.2mohm B

PR104
51216_S3 PR211 51216_S5 10K/F_4 Close to output cap +1.35V_SUS
*0_4

stuff for C8 ODT power off

3
PR212 *SHORT_4 51216_S3 TDC : 0.56A
4 DDR_VTTT_PG_CTRL
MAIND 2
PEAK : 0.75A
PR99 PC69
30.1K/F_4 0.01u/25V_4 Mode Frequency Discharge mode 37,38,41 MAIND Width : 20mil
PQ54
200K 400K Tracking Discharge *AO3404

1
OCP=10A
L ripple current +1.5V
=(19-1.35)*1.35/(0.68u*400k*19) 100K 300K Tracking Discharge
=4.611A 10/12 reserve
Vtrip=10-(4.611/2)*2.5mohm DDR=1.35V DDR=1.5V,PC9032 & PQ9016 POP
A =0.01923V OCP=10A A
Rlimit=0.01923/10uA*8=15.389Kohm PR95=15.4K/F_4 S3 S5 +1.35VSUS REF VTT
PR97=30.1K/F_4
OCP=20A S0 1 1 ON ON ON
L ripple current DDR=1.5V
Quanta Computer Inc.
=(19-1.5)*1.5/(0.68u*400k*19) OCP=20A
=5.079A PR95=35.7K/F_4
S3 (mainon off) 0 1 ON ON OFF PROJECT : Z8C
Vtrip=20-(5.079/2)*2.5mohm Size Document Number Rev
PR97=51K/F_4 2A
=0.04365V S4/S5 0 0 OFF OFF OFF DDR 1.35V(TPS51216)
Rlimit=0.04365/10uA*8=34.92Kohm Date: Saturday, November 15, 2014 Sheet 39 of 48
5 4 3 2 1
5 4 3 2 1

IMON offset

VIN

+3V_S5 51624_VREF
Place NTC close to the
VCORE Hot-Spot.
+5V_S5 +5V_S5
VIN
40

2200p/50V_4

1
0.1u/50V_6

4.7u/25V_8

4.7u/25V_8
PC96 + PC105

PC5
PR22
2M/F_4

PC89

PC92

PC90
100K/F_4_4250NTC
1u/10V_4 33u/25V_6X4.5

2
665K/F_4
36.5K/F_4

*90.9K/F_4

*39.2K/F_4

2
PR14
PR133

PR144

PR142

PR148

PR147

20/F_6

10K/F_4
1_6
PR17

PR19
PR132

VDD
51624_OCP-I 51624_SKIP# 1 5 PL1
SKIP# VIN 0.15uH_7X7X4
8 4 1 2
DCR= 0.66mOhm
2M/F_4 51624_VRON 51624_PWM1 CS_SW1 +VCCIN
D PWM VSW D
30K/F_4

CS_BSTR1 6 3
PR20

4
PC3 BOOT_R PGND

PC6

PR10
20K/F_4

39K/F_4
1u/6.3V_4

100K/F_4

150K/F_4
0.33u/6V_4

1000p/50V_4

2.26K/F_4
PR141 2.2u/10V_4 CS_BST1 7 9 +

PR16

2.2_6
PR143

PR149

9.09K/F_4
BOOT PAD

PC2

PR15

PC11
PR146
100K/F_4

*330u/2V_7343
8/4 Change

PR13 *SHORT_4

0.1u/10V_4

22u/6.3V_8

22u/6.3V_8
PR134 PC93 PU7

PC94

PC86

PC98

PC99
1000p/50V_6
2.2/F_6 CSD97374CQ4M

PC8
0.22u/25V_6
Add 11 GND VIAs
for thermal pad

PR12
51624_CSP1

2.94K/F_4
PR151
51624_B-RAMP
+1.05V_VCCST

51624_SLEWA
51624_THERM PC9

51624_F-IMAX
Close to VR

51624_O-USR
HW/BW-U 15W(1 phase)

51624_VREF
*0.1u/25V_4

51624_VDD

0.12u/10V_4
51624_V5A
+VCCIN

PC95
TDC : 14A

10K/F_4_3435KNTC
51624_VBAT
Icc TDC PL2:14A
56_4

PEAK : 32A
PR6

PR2

PR3

*56_4
PR129
130/F_4

*75/F_4
0.1u/10V_4

16.9K/F_4
51624_CSN1
PC91

PR150

PR140
Icc Max:32A OCP : 37A

27

10

11

15

14

28

16
2

9
PC7
*0.1u/25V_4

VDD

O-USR
VREF

VBAT
F-IMAX

B-RAMP

SLEWA

V5A
THERM
OCP:37A VCORE Load Line :
4,35,36 H_PROCHOT# 30
VR_HOT PWM1
6 51624_PWM1 -2mV/A
5 VR_SVID_CLK VR_SVID_CLK 31
VCLK PWM2
5 51624_PWM2 Fsw:1.2MHz Close to the Close with
VR side. phase1 inductor
VR_SVID_ALERT# 32 4 51624_NC
5 VR_SVID_ALERT# ALERT MODE

5 VR_SVID_DATA VR_SVID_DATA 1
VDIO CSP1
17 51624_CSP1 :
VCORE L/L:
3 PU1 18 51624_CSN1

+3V +3V_S5
PGOOD TPS51624RSM CSN1 R_DC_LL:- 2.0mV/A
C 51624_SKIP# 7 19 51624_CSN2 C
SKIP CSN2
51624_VRON 8 20 51624_CSP2
VR_ON CSP2 R_AC_LL:- 7.0mV/A
51624_VFB 24 21
VFB NC
*100K/F_4

*100K/F_4

51624_GFB 23 22
PR18
PR136

GFB N/C PR137


DROOP
COMP

OCP-I

IMON
150K/F_4
GND

PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
51624_VREF
26

25

12

13

29

33
34
35
36
37
38
39
40
41
42
5,10 IMVP_PWRGD
PR130 *SHORT_4
51624_DROOP

51624_OCP-I

51624_IMON
4.75K/F_4

8/4 Change
51624_COMP

35 VRON
PR9 *0_4 PR135
*SHORT_8
*SHORT_4

*SHORT_4

5 VRON_CPU
PR11 *SHORT_4
+VCCIN
PC4

PR131

PR139
10K/F_4

348K/F_4
*100p/50V_4

PC87
PR126

4700p/25V_4

PR127 *330p/50V_4
PR5

PR4

PC10

*10_4
1500p/50V_4
PR1

PC1

PR145
39K/F_4
4.75K/F_4

5 VCC_SENSE

12 VSS_SENSE

Parallel 9/5 Change 4.7K to 4.75k


PR128
*10_4 PC88
B B
*0.01u/50V_4

Close to the
CPU side.
+3V_S5

PR8
*SHORT_4

51624_CSP2

51624_PWM2

51624_CSN2

PR138 PR7
*SHORT_4 *0_4

A A

Quanta Computer Inc.


PROJECT : Z8C
Size Document Number Rev
2A
+VCCIN(TPS51624)
Date: Saturday, November 15, 2014 Sheet 40 of 48
5 4 3 2 1
1 2 3 4 5

+3VPCU

+1.5V
1.5Volt +/- 5%
+1.5V
41
+3V
PC145 TDC : 0.6A
10u/6.3V_6 PC83
0.1u/25V_6 PU10 TPS54318RTER
PEAK : 0.8A
PR217 16
VIN PH
10 Width : 40mil
A
*100K/F_4 A
1 11 PL10
10/29 VIN PH 1uH_7X7X3
2 12
VIN PH *SHORT_6
14 13 PR216
35 HWPG_1.5V PW RGD BOOT
MAINON 15 6 PC150
EN VSNS 0.1u/50V_6 PR214
7 3
R1
PR218 100K/F_4
*SHORT_4 COMP GND PC147 PC148 PC149
8 4 0.1u/10V_4 10u/6.3V_6 10u/6.3V_6
RT/CLK GND 1.5V_VSNS

PAD
PAD
PAD
PAD
PAD
PAD
PC85 9 5
1000p/50V_4 PR116 PR215 SS AGND
8.06K/F_4 121K/F_4 R2 PR213

22
21
20
19
18
17
113K/F_4
V0=0.8*(R1+R2)/R2
PC142 PC81 PC143
*100p/50V_4 1500p/50V_4 0.01u/25V_4

DDR=1.5V ,This block DNP

B B

VIN

PD8
DA2J10100L

VIN +3V +5V +1.05V +1.5V +15V

PR161 PR115 PR79 PR120 PR160 PR123 PR118


Thermal protection 1M_6 1M_4 22_8 22_8 22_8 *22_8 1M_4
1

PQ36
AO3409 MAINON_ON_G MAIND
2 MAIND 37,38,39

3
3
3

PQ23 PR119
2 DTC144EU 1M_4 2 2 2 2 2
3

S5_ON 2 32,35,38,39 MAINON PC82


35,37,38 S5_ON
PQ19 PQ27 PQ33 PQ28 PQ25 *2200p/50V_4
2N7002K 2N7002K 2N7002K *2N7002K 2N7002K

1
PQ37 PR156 PR109
1

1
DTC144EU *SHORT_6 *100K/F_6
C C

Need fine tune VL VL


for thermal protect point SYS_SHDN# 10,28,37
10/12 reserve
DDR=1.5V POP

Note placement position PR159 PC102 PR152


PR158 200K/F_4 0.1u/50V_6 200K_6
3

1.33K/F_4
8

PR157 2.469V 3
10K/F_4_3435NTC + 1 2
LM393_PIN2 2
- PQ34
3

PU8A 2N7002K
4

BA10393F PC103
1

0.1u/50V_6
S5_ON 2
PR155
PQ35 200K/F_4
2N7002K
1

D 5 D
+ 7
6
-
PU8B
BA10393F

Quanta Computer Inc.


For EC control thermal protection (output 3.3V) PROJECT : Z8C
Size Document Number Rev
2A
+1.5V/+1.8V/Thermal protect
Date: Saturday, November 15, 2014 Sheet 41 of 48
1 2 3 4 5
5 4 3 2 1

+3V +5V_S5
42 VIN
PQ38

5
*EV@10K_4
EV@AON6414AL

EV@10u/25V_8

EV@10u/25V_8
EV@66.5K/F_4
PR164
EV@2.2_6

PR177

PC112

PC115
EV@0.1u/50V_6

EV@4.7u/25V_8

EV@4.7u/25V_8
12/7

PR66

PC107

PC106

PC111
D D
PR170 4
*EV@0_4 PR56 PC40
47/25V
8 VGPU_EN EV@2.2/F_6 EV@0.22u/25V_6 PR46 change to

1
2
3
10U/25V_8*2
18,43 3V_MAIN_PWGD PR166 EV@0_4 PL3

EV@100K_4
EV@10K/F_4 EV@0.36uh_LDCR DRC=0.76mohm

EV@0.1u/25V_4
PR70

*EV@0.1u/25V_4
+VGACORE

PC38

PC119
12/7

PR41
PU3
change to

EV@1000p/50V_6EV@2.2_6
EV@ UP1642RQAG
10x10 +VGPU_CORE
4 + 1 Volt +/- 5%

EV@330u/2V_7343
+3V_S5 +3V

EV@0.1u/10V_4

EV@10u/6.3V_6
9 2 TDC : 40A

PC23

PC25

PC28
1642_TON 1642_UGATE1

1
2
3
TON UGATE1

PC27
PQ40
EV@AON6752 PEAK : 58A
1642_PVCC 21 1 1642_BOOT1 RDSon 2.2mohm OCP : 70A

*EV@1K/F_4
PVCC BOOT1

EV@10K_4
Width : 1800mil
PR178

PR167
1642_EN 3 24 1642_PHASE1
0815 PSI PU 10K at GPU side arealdy EN PHASE1 VIN

19 VGPU_PSI PR174 *EV@SHORT_4 1642_PSI 4 15 1642_ISEN1


PSI DSBL/ISEN1 PQ12
EV@AON6414AL

1
C 17 VGPU_PWRGD PR57 *EV@SHORT_4 1642_PGOOD 16 23 1642_LGATE1 C
PGOOD LGATE1 + PC114

EV@10u/25V_8

EV@10u/25V_8
EV@0.1u/50V_6

EV@4.7u/25V_8

EV@4.7u/25V_8
PC32

PC34

PC33
12/7 add

PC109

PC108
EV@33u/25V_6X4.5
PR74 *EV@SHORT_4 1642_VID 5 17 1642_UGATE2 4
19 VGPU_PWMVID 10U/25V_8*2

2
VID UGATE2 PR50 PC36
EV@2.2/F_6 EV@0.22u/25V_6 PR47

1
2
3
1642_VREF 8 18 1642_BOOT2 EV@10K/F_4
VREF BOOT2 PL4
EV@0.36uh_LDCR DRC=0.76mohm
EV@1u/6.3V_4

1642_REFADJ 6 19 1642_PHASE2
EV@20K/F_4

REFADJ PHASE2 +VGACORE


PR77

PC47

R2
12/7

5
7 14

PR42
1642_REFIN GPU_THAL#
REFIN TALERT#/ISEN2 change to

EV@2.2_6
10x10
R1 1642_COMP 12 20 1642_LGATE2 4 +

EV@330u/2V_7343
PR76 COMP LGATE2

EV@0.1u/10V_4

EV@10u/6.3V_6
0816 remove GPU_STDBY from NV reply

PC26

PC29
PC104
EV@20K/F_4

1
2
3
11 22

PC30
R3
PR182

1642_FB PQ39
EV@2K/F_4

EV@4700p/25V_4 EV@16.2K/F_4

FB GND/PW M3
PR75

PR184 EV@AON6752

EV@1000p/50V_6
*EV@0.1u/25V_4

EV@5.1K/F_4 RDSon 2.2mohm


10 13
PC44

1642_TSNS
FBRTN TSNS/ISEN3

PAD
R6
EV@18K/F_4
3

PR181

PQ15 R4

25
PC49

EV@2N7002K Add 3 GND VIAs


B
2 for thermal pad B
EV@2700p/50V_4

16 +VGACORE

9/5 change
PC45

EV@0_4
PR180

PR64 C1 R5 to open
EV@10K_4
printfoot
1

0402
+3V PR65
EV@10K/F_4
1642_FBRTN GPU_THAL# GPU_THAL#
+VGACORE PR62
N15V-GM-S-A2 (820M) Value N15S-GT-S-A2 (840M) Value EV@10K/F_4
1642_PVCC 1642_ISEN1
PC46
EV@33p/50V_4 PR76 (R1) CS32702FB16 27K PR76 (R1) CS32002FB29 20K PR173
PR183 EV@15.8K/F_4
EV@100_4 1642_VREF 1642_TSNS
PR185 PR78 PR77 (R2) CS27502FB11 7.5K PR77 (R2) CS32002FB29 20K
*EV@SHORT_4 EV@1K/F_4
16 GPU_VCCP_SENSE
PR182 (R3) CS00002JB38 0 PR182 (R3) CS22002FB19 2K PR169 PR168
EV@100K/F_4_4250NTC*EV@1.33K/F_4
1642_FBRTN Place NTC close to the
16 GPU_VSSP_SENSE
PR181 (R4) CS26202FB17 6.2K PR181 (R4) CS31802FB10 18K VGPU Hot-Spot.
PR179
A *EV@SHORT_4 PR176 A
EV@100_4 PR180 (R5) CS21742FB00 1.74K PR180 (R5) CS00002JB38 0

PC45 (C1) CH25604KB18 5600P PC45 (C1) CH22706KB14 2700P


Quanta Computer Inc.
PROJECT : Z8C
Size Document Number Rev
2A
+VGPU_CORE(UP1642PQAG)
Date: Saturday, November 15, 2014 Sheet 42 of 48
5 4 3 2 1
5 4 3 2 1

+5V_S5
VIN 43
0815 stuff PR177 to enable +3V
+1.05V_GFX 16,17,18 +1.05V_GFX
PC18 PC15 PC16 17,20,21,22,23,30 +1.35V_GFX
EV@1u/10V_4 EV@2200p/50V_6 EV@4.7u/25V_8 16,18,19,35 +3V_GFX

5
D D
PR33
EV@100K/F_4 PQ31

7
EV@AON7410

V5IN
1.5GFX_DRVH 4
HWPG_1.5VGFX 1 9 PR30 PC17 +1.35V_GFX
18 HWPG_1.5VGFX PGOOD DRVH *EV@SHORT_6 EV@0.1u/50V_6
1.5GFX_EN 3 10 1.5GFX_VBST PL2
EN VBST

3
2
1
17 FBVDDQ_EN PR34 *EV@SHORT_4 EV@2.2uH_7X7X3
1.5GFX_TRIP 2 PU2 8 1.5GFX_SW
modify +1.5V_GPU enable pin 0814 PR35 EV@100K/F_4 TRIP EV@TPS51211DSCR
SW
1.5GFX_TST 5 6 1.5GFX_DRVL
PC101 PR32 EV@470K/F_4 TST DRVL

5
*EV@1u/10V_4 12 11
GND GND PR29 PR154 +1.5V_GFX

GND

GND

GND

GND
*EV@4.7_6 EV@9.31K/F_4 1.5 Volt +/- 5%

FB
+
4 TDC : 6.3A

13

14

15

16

4
PC100 PC97
OCP=10A 1.5GFX_FB EV@0.1u/50V_6 EV@330u/2V_7343
PEAK : 8.4A
L ripple current PQ30 PC14 OCP : 10A

3
2
1
EV@AON7752 *EV@680p/50V_6 PR153
=(19-1.5)*1.5/(2.2u*290k*19) EV@10K/F_4 Width : 250mil
=2.165A
Vtrip=10-(2.165/2)*14mohm
=0.1248V
Rlimit=0.1248/10uA*8=99.87Kohm
DDR=1.5V ,This block DNP
C C

VIN +1.05V_GFX +15V +1.05V_S5

5
PR26 PR23 PR24
EV@1M_4 EV@22_8 EV@1M_4

modify +1.05V_GFX enable pin 0814 dGPU_D1 4


PQ4

3
EV@AON7408
3

PR28
+1.05V_GFX

3
2
1
*EV@SHORT_4 PR25
18,42 3V_MAIN_PWGD 2 EV@1M_4 2 2
PC12 +1.05V_GFX
TDC : 2.3A
PEAK : 3A
1

PQ2 PQ3 *EV@2.2n/50V_4


PQ1 EV@2N7002K EV@2N7002K
Width : 100mil
1

PR27 EV@PDTC143TT
1

1
PC13 EV@100K_4
*EV@1u/10V_4
2

+3VPCU
VIN +3V_GFX +15V

B B
PR39 PR40 PR31

3
EV@1M_4 EV@22_8 EV@1M_4

dGPU_D 2
3

3
3

PR37 PQ5
*EV@SHORT_4 PR38 EV@AO3404 +3V_GFX

1
10 DGPU_PWR_EN
2 EV@1M_4 2 2
PC19
+3V_GFX
TDC : 0.76A
PEAK : 1A
1

PQ8 PQ6 *EV@2.2n/50V_4


PQ7 EV@2N7002K EV@2N7002K
Width : 40mil
1

PC20 PR36 EV@PDTC143TT


1

*EV@1u/10V_4 EV@100K_4
2

VIN +1.35V_GFX +15V +1.35V_SUS

PR52 PR162 PR163


5

*EV@1M_4 *EV@22_8 *EV@1M_4


PQ10
*EV@RJK03K5DPA
dGPU_D2 4
+1.5V_GFX
3

A A
1
2
3
3

PR60
*EV@0_4 PR51
TDC : 6.3A
FBVDDQ_EN 2 *EV@1M_4 2 2 +1.35V_GFX PEAK : 8.4A
PC116
OCP : 10A
1

PQ43 PQ42 *EV@2.2n/50V_4


PQ14 *EV@2N7002K *EV@2N7002K Width : 250mil
Quanta Computer Inc.
1

PC39 PR67 *EV@PDTC143TT


1

*EV@1u/10V_4 *EV@100K_4
PROJECT : Z8C
2

10/12 reserve
DDR=1.5V ,This block POP Size Document Number Rev
2A
+1.5V_GFX/+1.05V_GFX/+3V_GFX
Date: Saturday, November 15, 2014 Sheet 43 of 48
5 4 3 2 1
1 2 3 4 5 6 7 8

VGA power up sequence


44
+3VPCU

PCH MOSFET +3V_GFX


A A
dGPU_PWR_EN

VGA_VID

VIN
+VGPU_CORE

VGPU_EN VIN +1.35V_GFX


PWM
+1.05V_S5
PWM
VGPU_PWRGD
OR FBVDDQ_EN DGPU_PWROK
Gate MOSFET +1.05V_GFX
HWPG_1.5VGFX
1.05V_GFX_EN
VGPU_PWRGD
EC_FB_CLAMP
EC

B B

VGA Reset Power States


Thermal Follow Chart
CONTROL
POWER PLANE VOLTAGE DESCRIPTION SIGNAL ACTIVE IN

PLTRST# VIN +10V~+19V MAIN POWER ALWAYS ALWAYS


PEGX_RST# CPU NTC
PCH DGPU_HOLD_RST#
+3V_RTC +3V~+3.3V RTC POWER ALWAYS ALWAYS Thermal
+3VPCU +3.3V EC POWER ALWAYS ALWAYS Protection

PEX_RST timing +5VPCU +5V USB CHARGE POWER ALWAYS ALWAYS

+15V +15V CHARGE PUMP POWER ALWAYS ALWAYS


CPU H_PROCHOT# PM_THRMTRIP# SYS_SHDN# 3V/5 V
I/O 3.3V +3V_S5 +3.3V LAN/BT POWER S5_ON S0-S5 CORE PWR H/W Throttling WIRE-AND SYS PWR
PEX_RST +5V_S5 +5V USB POWER S5_ON S0-S5
HSW ULT
+5V +5V HDD/SPK/HDMI POWER MAINON S0
C Trise >= 1uS Tfail <=500nS C
+3V +3.3V PCH/GPU/Peripheral component POWER MAINON S0

+1.35VSUS +1.35V CPU/SODIMM/MD POWER SUSON S0-S3

+DDR_VTT_RUN +0.675V SODIMM/MD Termination POWER MAINON S0 GPU NTC


Thermal SM-Bus1
LCDVCC +3.3V LCD POWER LVDS_VDDEN S0 Protection CPU FAN
FAN1_PWM
+1.5V +1.5V MINI CARD/NEW CARD POWER MAINON S0

+1.05V +1.05V PCH CORE VCCST POWER MAINON S0

+VCCIN variation CPU CORE POWER VRON S0 EC


GPU FAN2_PWM GPU FAN
+VGPU_CORE variation External GPU POWER VGPU_EN S0 CORE PWR
+3V_GFX +3.3V External GPU POWER dGPU_PWR_EN S0

dGPU_OPP#

dGPU_OTP#

dGPU_ALT#

SM-Bus1
+1.35V_GFX +1.35V External GPU POWER FBVDDQ_EN S0

GPU_THAL#
+1.05V_GFX +1.05V External GPU POWER 1.05V_GFX_EN S0
GPIO12 HW throttle
over power protect

GPIO12_ACIN
D
dGPU D

Quanta Computer Inc.


dGPU_OPP# EC notify HW throttle over power protect PROJECT : Z8C
dGPU_ALT# for ADPS circuit to infrom EC NV dGPU VPS Alert Size Document Number Rev
dGPU_OTP# VGA thrmtrip# => inform EC over temperature protect PWR Status & GPU PWR CRL & THRM 3A

Date: Saturday, November 15, 2014 Sheet 44 of 48


1 2 3 4 5 6 7 8
5 4 3 2 1

Battery Mode
Support Deep Sx
3
+3VPCU
VIN 1
+5VPCU

VL
3 3
+3VPCU

5b
+3.3V_DSW
1
VIN BAT-V
45
3V_LDO 3V/5V 2
11 2 VR depend on A measure +3.3V_DSW
3 +5VPCU +5V_S5
+15V
result to implement EN CHARGER Battery

EN2

EN1
D
+3VPCU S5 PWR +3V_S5 10 4 for B test D

3
3
S5_ON 8 NBSWON# 5a DSW_ON +3VPCU or +3.3V_DSW

1 VIN Delay DSW power well 10ms DSW PWR


+3VCC_S5
PWR 6 DPWROK DPWROK
SUS PWR
DDR VDDQ +1.35V_SUS 18 BTN 13 RSMRST# +1.05V
RSMRST#
VR 7 14 SB_ACDC ASW PWR
DDR_VTTREF 19 EC ACPRESENT +3V_S5
30 DNBSWON#
15 PWRBTN#
HWPG SUSC# 16 SPI PWR
+DDR_VTT_RUN 23 SLP_S4# +V1.05DX_MODPHY
SUSB# 20 SLP_S3#
HSIO PWR
PCH_SUSACK# SUSACK +1.05V
HWPG_VDDR 24
PG PCH_SUSPWARN# SUSWRAN
PLL PWR
S5

S3

PCH_SLP_SUS# SLP_SUS# +1.05V


PCH
DDR_PG_CTRL APWROK CORE PWR
C
22 +3V C

31 EC_PWROK PCH_PWROK
MAINON
21 PCH_CLK SDIO PWR
35 +3V_S5

VRON

SUSON

S5_ON
MAINON
EC_PWROK
HWPG_1.05V_EC#
+0.75V_ON PLTRST#

+0.75V_ON
? PLTRST#
38 SYS_PWROK HDA PWR
SUSON SYS_PWROK
17 34 IMVP_PWRGD
+3VPCU 24 HWPG_VDDR
3 36
26 HWPG_1.05V 31 EC_PWROK 38
+1.5V 12 30a 31 32b 21 17 8
1.5V

PLTRST#
HWPG_1.5V
VR 29 29
HWPG_1.5V ?
PG
EN

+VCCIN

MAINON CORE PWR


21 +1.35V_SUS

RESET#
CPU
VDDQ PWR
+1.05V_VCCST
RUN PWR +1.05V
+1.05V_VCCST PROCPWRGD
B
3 +5VPCU +5V 28 VCCST PWR B

MOS1

SM_PG_CNTL1

VCCST_PWRGD
0 ohm
3 +3VPCU +3V 27

VR_READY
MOS2

VR_EN
10K ohm

SVID
+1.05V_S5 +1.05V
9 25
MOS3
G

HWPG_1.05V
1 VIN 12
MAINON

VRON_CPU
DDR_PG_CTRL
21

IMVP_PWRGD
33

VCCST_PWRGD_EN
SVID
+VCCIN EC_PWROK VCCST_PWRGD_EN
IMVP 31
VIN
1 9 VR
SYS_PWROK
+1.05V_S5 36
+1.05V_S5
VR 34
12 IMVP_PWRGD HWPG_1.05V_EC# 37 22 34 32a
HWPG_1.05V PG 30a
EN

PG
EN

A A

8 SVID VRON_CPU 32a HWPG+1ms


S5_ON
37 VRON 32b
PCH MAINON 21
CPU Quanta Computer Inc.
PROJECT : Z8C
Size Document Number Rev
3A
Power Sequence
Date: Saturday, November 15, 2014 Sheet 45 of 48
5 4 3 2 1
1 2 3 4 5 6 7 8

+3V_S5 +3V 46
SDRAM
2.2K 2.2K 4.7K 4.7K
+3.3V_RUN
AP2 SMB_PCH_CLK CLK_SCLK
A 2N7002DW A

AH1 SMB_PCH_DAT Level shift CLK_SDATA Touch PAD

+WL_VDD

XDP
4.7K 4.7K
+3V_S5
WLAN_CLK_SCLK
2N7002DW
Haswell Level shift WLAN_CLK_SDATA WLAN
ULT
+3V_S5

2.2K 2.2K
B B

AN1 SMB_ME0_CLK

AK1 SMB_ME0_DAT

+3V_S5

*2.2K *2.2K
+3V_S5
AU3 SMB_ME1_CLK
*2N7002DW
AH3 SMB_ME1_DAT Level shift

+3V_S5 3V3MISC

C C

10K 10K 4.7K 4.7K

+3V_GFX
116 2ND_MBDATA
2N7002DW
115 2ND_MBCLK Level shift dGPU

SIO +3VPCU
100
ITE8587
10K 10K Battery
D 100 D
110 MBCLK

111 MBDATA Charger

Quanta Computer Inc.


PROJECT : Z8C
Size Document Number Rev
3A
Block Diagram
Date: Saturday, November 15, 2014 Sheet 46 of 48
1 2 3 4 5 6 7 8
5 4 3 2 1

實實實defult
虛實實reserve

SYS_HWPG S5D
MDV1528Q +5V_S5 47
2 VGPU_PWRGD
9
3V_LDO PWRGD
1 +5VPCU MDV1528Q +5V
D
PWR EN! PWRGD
D
S5_Vout
3V/5V MAIND
VIN Vin
VGPU Core Vout
+VGPU_CORE
4 uP1642
TPS51225
3V_LDO EN
1 EN2 VGPU_EN
Vin S3_Vout +3VPCU 7
AO3404 +3V_S5 PCH
VIN
S5D
2

HWPG_1.5VGFX
AO3404 +3V 10

MAIND PWRGD
4
VIN Vin
+1.35V_GFX Vout
TPS51211
+1.35V_GFX
EC_FB_CLAMP EN

C
AO3404 +3V_GFX EC OR Gate FBVDDQ_EN
C

VGPU_PWRGD
dGPU_PWR_EN 9
PCH
VGPU_EN
7

HWPG_1.05V

MDV1528Q +1.05V
PWRGD

VIN +1.05V_S5 MAIND


Vin Vout +1.05V_S5 4
TPS51211
IMVP_PWRGD
EN
S5_ON MDV1528Q +1.05V_GFX
2 EC PWRGD
HWPG_1.5VGFX
10 1.05V_GFX_EN VIN CPU VCCIN +VCCIN
B B
AND Gate Vin Vout
MAINON TPS51622
4 EC VGPU_PWRGD EN
9 VRON_CPU

VRON

HWPG_VDDR

HWPG_1.5V
SUSON PWRGD
3 EC S5 EN
+1.35V_SUS
S5_Vout
+1.35V_SUS DDR_VTTREF PWRGD

TPS51216
+3VPCU Vin
+1.5V Vout
DDR_VTTT_PG_CTRL TPS54318
+1.5V
PCH S3 EN EN
Vin S3_Vout +DDR_VTT_RUN
MAINON MAINON
A 4 A

+0.75V_ON
EC
Quanta Computer Inc.
VIN
PROJECT : Z8C
Size Document Number Rev
3A
ULT PWR CONTROL
Date: Saturday, November 15, 2014 Sheet 47 of 48
5 4 3 2 1
5 4 3 2 1

Model Version CHANGE LIST


Z8C A BA42_HB
1. Remove DP and 1 USB 2.0 , TPM Connect (reserve on board) (Page 23,27,31)
2. Add 2 USB 3.0 and CRT on MB . (Page 31)
3. Change Y7 to small size crystal. (Page 08)
4. Reserve C486 for DMIC power. (Page 30)
5. Add ODT1,CS1,CKE1.ZQ1 to supoort 512MX16. (Page 14)
6. Change USB 3.0 , TP , FP , NGFF , SPK connect.
7. Remove Lid SW SW6 and Screw Pad fo 2014 Acer spec. (Page 29)
8. Modify EC pin define to follow ZQ0. (Page 34)
D D

9. Add GC6_FB_EN and resever DGPU_EVENT# for GC6 funtion. (Page 19,20)
10. Remove U34 EC ROM. (Page 08)
11 Chagne Z8C GPIO pin define same as. ZQ0. (Page 02~13)
12 Remove U40 LDO circuit and change to PR233. (Page 11)
13 Remove SMBUS Q66 for NGFF. (Page 26)

14 Change WIGIG PCIE from port 1 to port 2. (Page 09)


B 15 Change CN6,CN7,CN8,CN13,CN15,CN16,CN17,JDIM1 footprint for SMT request.
16 Correct L18,L19,L20 footprint from 0603 to 0402. (Page 35)
17 Add R790,R791_0 ohm (CS00002JB38) for wigig CLK and swap USB4 D+/D-. (Page 27)
18 Change U18,U19,U48 to SOT23 type AL000524007,and U49 to SOT23 type AL000524003. (Page 32)
19 PR103 Change from 0 ohm to shorpad , PR180 from short pad to 0 ohm. (Page 36, 42)
20 PR126 change to 4.75K CS24752FB12. (Page 40)
21 pop C512,C513_22p (CH02206JB08)for DMIC EMI request.
pop C486_1000p (CH21006JB10) and add C781_0.1u(CH41002KB93) for DMIC EMI request. (Page 31)
22 pop R450,R451,R452,R453_100 ohm (CS11002FB22)f or HMDI EMI request. (Page 26)
23 Change CN3 CRT Connect to DFDS15FR425 for SMT request . (Page 24)
24 Change R70 from 4.7K to 1.5K(CS21502FB14)for GPU Core not turn on issue.. (Page 18)
25 Non stuff R754,R760. (Page 33)
26 Hole19 change to MBZRQ002010.
Hole12,Hole15 change to MBZRQ001010 .

27 Change Q21 ,Q22,Pin 2 ,5 from +WL_VDD to +3V_S5. (Page 27)


C
28 Change R332 from shoart pad to 2.2 ohm. (Page 35)
29 unstuff Q39. (Page 05)
C C
30 Cancle Colay L1, L6,L22,L24. (Page 29)
31 Short Pad 0402: R85,R377,R497,R601,R616,R679,R183,R124,R218,R181,R217,R759,R755,R761,R316,R317,R711,R712,R296,R302,R311,R321,R72,R73,R692,R690,R249,R256,R276,R281,R518
Short Pad 0603: R273,R494,R319,R320,

32 Remove J1. (Page 08)


33 Stuff KB Backlight funtion -R394,Q31,C485,C468,C470,CN16 (Page 34)
34 PR139 change from 365k(CS43652FB10) to 348k(CS43482FB16). (Page 40)
35 Unstuff RP1,it is internal pu high from EC. (Page 34)
36 Remove R714,R715. (Page 34)
37 Change PU5 from TPS51225BRUKR to TPS51225RUKR. (Page 37)
38 UnStuff R177 and R182 . (Page 19)
39 UnStuff Q30 . (Page 35)
40 Change PR154 from 11.5k to 9.31k for 1.35GFX . (Page 43)

41 Short Pad 0402: R1,R2,R27,R29,R199,R294,R307,R383,R389,R396,R414,R417,R427,R434,R438,R460,R464,R769,R785


D
Short Pad 0603: R79,R84,R113,R145,R168,R186,R200,R205,R211,R426,R749,L32,
Short Pad 0805: PR21,R117,R128,R133,R144,R165,R229,R232,R437,R698,R708,R713

42 Remove JP1,JP2,JP3

B B

A A

PROJECT MODEL Quanta Computer Inc.


DOC NO. ZRQ APPROVED BY: DATE:
: PROJECT : Z8C
Size Document Number Rev
3A
PART NUMBER: DRAWING BY: REVISON: Change list-2
Date: Saturday, November 15, 2014 Sheet 48 of 48
5 4 3 2 1

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