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01
ZAJ/Z8P/Z8PA SYSTEM BLOCK DIAGRAM
BOM
D TPM@ : TPM D
USB3-0 + USB2-0
USB3.0 Port P19
C EMMC EMMC5.0
C
32GB/64GB P12
USB2-4 PCIE-3
Blue Tooth PCIE-0/1
PCI-E M.2 NGFF
P17
WLAN+BT
P17
USB2-5
Touch Screen
P12 RTL8411B-CG
X'TAL PCIE-2
USB2-6
32.768KHz 10/100/1G RJ45
CCD(Camera) P15 P15
P12 Integrated PCH
X'TAL 19.2MHz
B USB2-7 B
HP JACK Speaker K/B Con. SPI ROM 1M Touch PAD Fan module
(PWM signal)
P14 P14 P18 P20 P18 P18 Quanta Computer Inc.
PROJECT : ZAJ
Size Document Number Rev
3A
Block Diagram
Date: Thursday, February 23, 2017 Sheet 1 of 34
5 4 3 2 1
5 4 3 2 1
DRAMRST-MA DRAMRST-MB
+1.35VSUS +1.35VSUS
R106 R105
A A
CPU CPU
1K_1%_4 1K_1%_4
MA_DRAMRST# MB_DRAMRST#
MA_DRAMRST# [10] MB_DRAMRST# [11]
C103 C101
R366
D D
10K_5%_4
U21C APL_BGA_1296P
[19] USB3_0_TXP J1 N62
J2 USB3_P0_TXP PCIE_W AKE3_N P61 PCIE_LAN_WAKE#
[19] USB3_0_TXN USB3_P0_TXN PCIE_W AKE2_N PCIE_LAN_WAKE# [15]
MB USB3.0 [19] USB3_0_RXP K9 P62
K10 USB3_P0_RXP PCIE_W AKE1_N R62
[19] USB3_0_RXN USB3_P0_RXN PCIE_W AKE0_N
[20] USB3_1_TXP
K3
K2 USB3_P1_TXP F6 PCIE_RCOMPP
[20] USB3_1_TXN USB3_P1_TXN PCIE2_USB3_SATA3_RCOMP_P
MB TYPE C [20] USB3_1_RXP F2 R37
G2 USB3_P1_RXP 402_1%_4
[20] USB3_1_RXN USB3_P1_RXN F5 PCIE_RCOMPN
AC16 PCIE2_USB3_SATA3_RCOMP_N
USB2_VBUS_SNS P3 PCIE_TX3+ 0.1u/16V_4 C332
PCIE_P3_USB3_P4_TXP PCIE_TX3+_WLAN [17]
R64 137_1%_4 USB_SSIC_RCOMP AB15 P2 PCIE_TX3- 0.1u/16V_4 C333
USB_SSIC_RCOMP PCIE_P3_USB3_P4_TXN PCIE_TX3-_WLAN [17]
P12 PCIE_RX3+_WLAN [17] WIFI
R75 113_1%_4 USBCOMP Y15 PCIE_P3_USB3_P4_RXP P10
USB2_RCOMP PCIE_P3_USB3_P4_RXN PCIE_RX3-_WLAN [17]
USB2COMP: 4-8mils trace width with <1000 mils
R382 *0_5%_4 USB_OTG_ID AC15 N2
USB2_OTG_ID PCIE_P4_USB3_P3_TXP M2
AH13 PCIE_P4_USB3_P3_TXN H5
R377 *10K_5%_4 AH12 USB_SSIC_0_TX_P PCIE_P4_USB3_P3_RXP H6
+1.8V_S5 USB_SSIC_0_TX_N PCIE_P4_USB3_P3_RXN
AG16
R328 10K_5%_4 AG15 USB_SSIC_0_RX_P L2
USB_SSIC_0_RX_N PCIE_P5_USB3_P2_TXP USB3_2_TXP [20]
R327 10K_5%_4 L1 USB3_2_TXN [20]
B55 PCIE_P5_USB3_P2_TXN K7
[20] USB_OC0#
C55 USB2_OC0_N PCIE_P5_USB3_P2_RXP M7
USB3_2_RXP [20] MB TYPE C
[19] USB_OC1# USB2_OC1_N PCIE_P5_USB3_P2_RXN USB3_2_RXN [20]
V3 PCIE_TX0+_SSD [16]
V12 PCIE_P0_TXP V2
C [19] USBP0+ PCIE_TX0-_SSD [16] C
V10 USB2_DP0 PCIE_P0_TXN P7
MB USB3.0 CONN [19] USBP0-
V16 USB2_DN0 PCIE_P0_RXP P6
PCIE_RX0+_SSD [16]
[20] USBP1+ USB2_DP1 PCIE_P0_RXN PCIE_RX0-_SSD [16]
MB TYPE C [20] USBP1-
V15 M.2 SSD
Y13 USB2_DN1 R1
[19] USBP2+ USB2_DP2 PCIE_P1_TXP PCIE_TX1+_SSD [16]
USB 2.0 [19] USBP2- V13 R2 PCIE_TX1-_SSD [16]
V9 USB2_DN2 PCIE_P1_TXN T10
[19] USBP3+ USB2_DP3 PCIE_P1_RXP PCIE_RX1+_SSD [16]
USB 2.0 V7 T12 PCIE_RX1-_SSD [16]
[19] USBP3- USB2_DN3 PCIE_P1_RXN
Y9 T2 PCIE_TX2+ 0.1u/16V_4 C335
[17] USBP4+ USB2_DP4 PCIE_P2_TXP PCIE_TX2+_LAN [15]
Y10 T3 PCIE_TX2- 0.1u/16V_4 C334
BT [17] USBP4-
AB6 USB2_DN4 PCIE_P2_TXN M5
PCIE_TX2-_LAN [15]
[12] USBP5+
AB7 USB2_DP5 PCIE_P2_RXP M6
PCIE_RX2+_LAN [15] LAN
Touch Screen [12] USBP5-
AC12 USB2_DN5 PCIE_P2_RXN R398 10K_5%_4
PCIE_RX2-_LAN [15]
[12] USBP6+ USB2_DP6
CCD AC10 AK62 CLK_PCIE_SSD_REQ# [16]
[12] USBP6- USB2_DN6 PCIE_CLKREQ0_N
[16] USBP7+
V5 AH62 R391 10K_5%_4
V6 USB2_DP7 PCIE_CLKREQ1_N AH61
ODD bridge [16] USBP7- USB2_DN7 PCIE_CLKREQ2_N AJ62
CLK_PCIE_LAN_REQ# [15]
PCIE_CLKREQ3_N PCIE_CLKREQ_WLAN# [17]
R397 10K_5%_4
W1 C11 R392 *10K_5%_4 +1.8V_S5
[16] SATA_TXP1 SATA_P1_USB3_P5_TXP PCIE_CLKOUT0P
W2 B11
[16] SATA_TXN1 SATA_P1_USB3_P5_TXN PCIE_CLKOUT0N
M.2 SATA T5 C10 CLK_PCIE_SSDP [16]
[16] SATA_RXP1 SATA_P1_USB3_P5_RXP PCIE_CLKOUT1P
[16] SATA_RXN1
T6
SATA_P1_USB3_P5_RXN PCIE_CLKOUT1N
A10 CLK_PCIE_SSDN [16] M.2 SSD
Y3 A7 CLK_PCIE_LANP [15]
[16] SATA_TXP0 SATA_P0_TXP PCIE_CLKOUT2P
[16] SATA_TXN0
Y2
SATA_P0_TXN PCIE_CLKOUT2N
B8 CLK_PCIE_LANN [15] LAN
HDD T9 B7 CLK_PCIE_WLANP [17]
[16] SATA_RXP0 SATA_P0_RXP PCIE_CLKOUT3P
[16] SATA_RXN0
T7
SATA_P0_RXN PCIE_CLKOUT3N
B5 CLK_PCIE_WLANN [17] WIFI
PCH_SPI_SI A58 C1
B PCH_SPI_SO B58 FST_SPI_MOSI_IO0 RSVD_C1 F1 B
PCH_SPI_IO3 B61 FST_SPI_MISO_IO1 RSVD_F1 B4
PCH_SPI_IO2 B60 FST_SPI_IO3 RSVD_B4 A4
C57 FST_SPI_IO2 RSVD_A4 CLK_PCIE_LAN_REQ# R485 *0_5%_4
PCH_SPI_CS0# B57 FST_SPI_CS1_N A18
PCH_SPI_CLK C56 FST_SPI_CS0_N RSVD_A18 C19 PCIE_CLKREQ_WLAN# R486 *0_5%_4
FST_SPI_CLK Section 3 of 12 RSVD_C19
VSTBY_FSPI
VSTBY_FSPI
R352 R326
C5
3.3K_5%_4 *3.3K_5%_4 R354
0.1u/16V_4
U1
3.3K_5%_4
PCH_SPI_CS0# 1 8
PCH_SPI_CLK R302 33_5%_4 SPI_CLK_A 6 CE# VCC
PCH_SPI_SI 5 SCLK
PCH_SPI_SO 2 SI 7 PCH_SPI_IO3
SO IO3
PCH_SPI_IO2 3 4
IO2 VSS
GD25LB64CSIGR
A A
Apollolake (DISPLAY,eDP)
04
U21D APL_BGA_1296P
AF2 AP7 MDSI_RCOMP R87 150_1%_4 +3V
AF3 DDI1_TXP_0 MDSI_RCOMP
AD3 DDI1_TXN_0
D
AD2 DDI1_TXP_1 AK7 D
AC1 DDI1_TXN_1 MDSI_C_DP_0 AK6
AC2 DDI1_TXP_2 MDSI_C_DN_0 AM5
AB3 DDI1_TXN_2 MDSI_C_DP_1 AM6 R297 R336
AB2 DDI1_TXP_3 MDSI_C_DN_1 AM12
DDI1_TXN_3 MDSI_C_DP_2 AM10 10K_5%_4 10K_5%_4
AK16 MDSI_C_DN_2 AK13
AK15 DDI1_AUXP MDSI_C_DP_3 AM13
DDI1_AUXN MDSI_C_DN_3 EDP_VDD_EN [12]
AM9
MDSI_C_CLKP
6
AK3 AM7 +3V
[13] INT_HDMITX2P DDI0_TXP_0 MDSI_C_CLKN
AK2
[13] INT_HDMITX2N DDI0_TXN_0
HDMI
1
AL2 DDI0_TXN_2 MDSI_A_DN_1 AP15 Q27A Q27B
[13] INT_HDMICLK+ DDI0_TXP_3 MDSI_A_DP_2
AL1 AP13 R299 R332
[13] INT_HDMICLK- DDI0_TXN_3 MDSI_A_DN_2 AP6
AM16 MDSI_A_DP_3 AP5 10K_5%_4 10K_5%_4
AM15 DDI0_AUXP MDSI_A_DN_3
DDI0_AUXN AP2
MDSI_A_CLKP PCH_BLON [12]
B51 AP3
C51 MIPI_I2C_SDA MDSI_A_CLKN
MIPI_I2C_SCL F27MCSI_DPHY1.2_RCOMP R40 150_1%_4
MCSI_DPHY1.2_RCOMP
6
R385 402_1%_4 DDI0_RCOMP_P AG1
DDI0_RCOMP_N AG2 DDI0_RCOMP_P M23
DDI0_RCOMP_N MCSI_RX_DATA0_P P23 PCH_BKLTEN 5 2
INT_HDMI_HPD# C50 MCSI_RX_DATA0_N L23 SSM6N43FU
[13] INT_HDMI_HPD# GPIO_200 MCSI_RX_CLK0_P
C A50 J23 C
[20] TypeC_HPD# GPIO_199 MCSI_RX_CLK0_N +3V
J21
1
EDP_TXP0 AG7 MCSI_RX_DATA1_P H21 Q26A Q26B
[12] EDP_TXP0 EDP_TXN0 EDP_TXP_0 MCSI_RX_DATA1_N
AG9 M25
[12] EDP_TXN0 EDP_TXN_0 MCSI_RX_DATA2_P
EDP_TXP1 AG12 L25
[12] EDP_TXP1 EDP_TXN1 EDP_TXP_1 MCSI_RX_DATA2_N
AG10 F25
[12] EDP_TXN1 EDP_TXP2 EDP_TXN_1 MCSI_RX_CLK1_P
AC6 E25
eDP Panel [12]
[12]
EDP_TXP2
EDP_TXN2
EDP_TXN2 AC5 EDP_TXP_2 MCSI_RX_CLK1_N H25 R298 R337
EDP_TXP3 AC7 EDP_TXN_2 MCSI_RX_DATA3_P J25
[12] EDP_TXP3 EDP_TXN3 EDP_TXP_3 MCSI_RX_DATA3_N
AC9 10K_5%_4 10K_5%_4
[12] EDP_TXN3 EDP_TXN_3 H27MCSI_DPHY1.1_RCOMP R44 150_1%_4
R74 402_1%_4 EDP_RCOMP_P AG6 MCSI_DPHY1.1_RCOMP
EDP_RCOMP_P PCH_BRIGHT [12]
EDP_RCOMP_N AG5 P17
EDP_RCOMP_N MCSI_DP_0 M17
MCSI_DN_0
6
EDP_AUXP AH10 P21
[12] EDP_AUXP EDP_AUXN EDP_AUXP MCSI_DP_1
AH9 R21
[12] EDP_AUXN EDP_AUXN MCSI_DN_1 PCH_BKLTCTL
L17 5 2
C54 MCSI_DP_2 J17 SSM6N43FU
A54 DDI1_DDC_SDA MCSI_DN_2 F17
DDI1_DDC_SCL MCSI_DP_3 E17
1
HDMI_DDCDATA_SW C49 MCSI_DN_3 Q28A Q28B
[13] HDMI_DDCDATA_SW HDMI_DDCCLK_SW B49 DDI0_DDC_SDA M19
[13] HDMI_DDCCLK_SW DDI0_DDC_SCL MCSI_CLKP_0 L19
C52 MCSI_CLKN_0 H19
B53 PNL1_VDDEN MCSI_CLKP_2 F19
C53 PNL1_BKLTEN MCSI_CLKN_2
PNL1_BKLTCTL L37
PCH_VDDEN C47 GP_CAMERASB0 P34
PCH_BKLTEN B47 PNL0_VDDEN GP_CAMERASB1 J34
PCH_BKLTCTL C46 PNL0_BKLTEN GP_CAMERASB2 H30
B PNL0_BKLTCTL GP_CAMERASB3 M37 B
AG62 GP_CAMERASB4 F30
AF61 OSC_CLK_OUT_0 GP_CAMERASB5 R35
AG63 OSC_CLK_OUT_1 GP_CAMERASB6 L34
AE60 OSC_CLK_OUT_2 GP_CAMERASB7 M34
AF62 OSC_CLK_OUT_3 GP_CAMERASB8 M35
OSC_CLK_OUT_4 GP_CAMERASB9 R34
GP_CAMERASB10 E30
C309 15p/50V_4 XTAL192_OUT P29 GP_CAMERASB11
R27 OSCOUT M45
OSCIN MDSI_A_TE M43
Section 4 of 12 MDSI_C_TE
4
3
Y3 R301
19.2MHZ/20ppm 200K_1%_4
2
1
A A
3
GPIO_111 F58 E39
[9] GPIO_111 SIO_SPI_1_CLK GPIO_12
GPIO_112 K55 C30
[9] GPIO_112 SIO_SPI_1_FS0 GPIO_13
GPIO_113 F61 C38 2 5
[9] GPIO_113 SIO_SPI_1_FS1 GPIO_14
H57 F39
GPIO_117 H58 SIO_SPI_1_RXD GPIO_15 C36 Q4B Q4A +3V
[9] GPIO_117 SIO_SPI_1_TXD GPIO_16 C35
4
SOC_OVRIDE F62 GPIO_17 J39 2N7002KDW
SIO_SPI_2_CLK GPIO_18 PCH_TPD_INT# [18]
D61 C33
GPIO_120 E56 SIO_SPI_2_FS0 GPIO_19 B27
EMI [9]
[9]
GPIO_120
GPIO_121
GPIO_121 D59 SIO_SPI_2_FS1
SIO_SPI_2_FS2
GPIO_20
GPIO_21
C26 R487 R289
C62 A26
LPC_CLKOUT1 GPIO_123 SIO_SPI_2_RXD GPIO_22 GPIO_23 TP32
[9] GPIO_123 E62 B25 *10K_5%_4 *10K_5%_4
SIO_SPI_2_TXD GPIO_23 C25 GPIO_24
GPIO_24 C27 GPIO_25
LPC_LAD0_R GPIO_25 RAM_ID0 SATA_DEVSLP0 [16]
R374 20_1%_4 Y61 C31
[16,17,21] LPC_LAD0 LPC_AD0 GPIO_26
6
C336 R375 20_1%_4 LPC_LAD1_R Y62 C29 RAM_ID1
[16,17,21] LPC_LAD1 LPC_LAD2_R LPC_AD1 GPIO_27 RAM_ID2
R370 20_1%_4 W62 B37
[16,17,21] LPC_LAD2 LPC_LAD3_R LPC_AD2 GPIO_28 RAM_ID3 GPIO_24
*10p/50V_4 R372 20_1%_4 W63 H35 5 2
[16,17,21] LPC_LAD3 LPC_AD3 GPIO_29 RAM_ID4
C37
R379 20_1%_4 LPC_CLKOUT0 AB61 GPIO_30 H34 eMMC_ID0
[21] CLK_PCI_EC LPC_CLKOUT0 GPIO_31
[16] PCLK_TPM R376 TPM@20_1%_4 LPC_CLKOUT1AA62 F35 eMMC_ID1 Q25A Q25B
1
C
R380 *DBG@20_1%_4 LPC_CLKOUT1 GPIO_32 F34 RAM_ID5 C
[17] CLK_PCI_LPC GPIO_33
R371 20_1%_4 CLKRUN#_R V62
[16,21] CLKRUN#
[16,17,21] LPC_LFRAME# R369 20_1%_4 LPC_LFRAME#_R V61 LPC_CLKRUN_N HDA *SSM6N43FU
R386 20_1%_4 SOC_SERIRQ_R AB62 LPC_FRAME_N AM48 HDA_BCLK_R R98 33_5%_4
[16] SOC_SERIRQ LPC_SERIRQ ISH_GPIO_0 AZ_CODEC_BITCLK [14] +3V
AK58 HDA_SYNC_R R399 33_5%_4 AZ_CODEC_SYNC [14]
Section 5 of 12 ISH_GPIO_1 AK51
ISH_GPIO_2 AZ_CODEC_SDIN0 [14]
GPIO_39 B45 AM54 HDA_SDO_R R95 33_5%_4
[9] GPIO_39 LPSS_UART0_TXD ISH_GPIO_3 AZ_CODEC_SDOUT [14]
C45 AM51
GPIO_40 LPSS_UART0_RXD ISH_GPIO_4 TP9
A46 AM49
[9] GPIO_40
C44 LPSS_UART0_RTS_N
LPSS_UART0_CTS_N
ISH_GPIO_5
ISH_GPIO_6
AM57
TP7
TP8
EMI R488 R300
AM55 C245 *10p/50V_4
GPIO_43 ISH_GPIO_7 TP10
[9] GPIO_43 B43 AM52 10K_5%_4 10K_5%_4
C43 LPSS_UART1_TXD ISH_GPIO_8 AK57
GPIO_44 LPSS_UART1_RXD ISH_GPIO_9 SPKR [14]
[9] GPIO_44 A42
LPSS_UART1_RTS_N SATA_DEVSLP1 [16]
C42
LPSS_UART1_CTS_N
6
AR62
GPIO_47 H41 LPSS_I2C0_SDA AR63
[9] GPIO_47 LPSS_UART2_TXD LPSS_I2C0_SCL
J41 GPIO_25 5 2
TP1 GPIO_48 LPSS_UART2_RXD
[9] GPIO_48 L41 AN62
M41 LPSS_UART2_RTS_N LPSS_I2C1_SDA AM61
TP2 LPSS_UART2_CTS_N LPSS_I2C1_SCL Q24A Q24B
1
AP59
P51 LPSS_I2C2_SDA AP58
T52 SDIO_PWR_DWN_N LPSS_I2C2_SCL *SSM6N43FU +1.8V_S5
P57 SDIO_D0 AM62
T54 SDIO_D1 LPSS_I2C3_SDA AL62
T55 SDIO_D2 LPSS_I2C3_SCL
T57 SDIO_D3 AP52 I2C4_SDA
SDIO_CMD LPSS_I2C4_SDA I2C4_SDA [18]
P58 AP54 I2C4_SCL I2C4_SDA R90 2K_1%_4
SDIO_CLK LPSS_I2C4_SCL I2C4_SCL [18] Touch PAD I2C4_SCL R92 2K_1%_4
AB55 AP49
AC49 SDCARD_LVL_WP LPSS_I2C5_SDA AP51
SDCARD_D0 LPSS_I2C5_SCL
I2C standard/fast mode:
AC48 I2C total lenght is about 4500 mils = 4.5inchs
AC51 SDCARD_D1 AL63
B AB51 SDCARD_D2 LPSS_I2C6_SDA AK61
Cb = 4.5*5pF +7pF = 29.5pF B
AC52 SDCARD_D3 LPSS_I2C6_SCL PU resistor = 2K ohm
AB58 SDCARD_CMD AP62 +1.8V_S5
SDCARD_CLK LPSS_I2C7_SDA
SERIRQ is 1.8V_S5 at EC side but AB54
SDCARD_CD_N LPSS_I2C7_SCL
AP61
R381
0 = UMA 0 0 1 Miron-2GB AKD59GSTL12 IC SDRAM(96P)MT41K256M16TW-107:P STNBSQ
A Board_ID8 1 = GPU A
2.2K_5%_4
0 1 0 Hynix-2GB AKD5PGSTW29 IC SDRAM(96P)H5TC4G63EFR-PBA(FBGA)STNBSQ
0 = Single channel (A only)
RAM_ID0 1 = Dual channel (A & B) 0 1 1 Samsung-2GB AKD5JG0T504 IC SDRAM(96P)K4B4G1646E-BYK0(FBGA)STNBSQ
SOC_OVRIDE
0 = Channel A 2GB
RAM_ID1 1 = Channel A 4GB
3
2 Q30
0 = Channel B 2GB
RAM_ID2
[21] ME_WR# 1 = Channel B 4GB eMMC_ID1 eMMC_ID0 Vender
Quanta Computer Inc.
2N7002K 0 0 Samsung 32/64GB
1
Apollolake (PMU/PMIC/HDA)
colsed to CPU pin within 100 mils
06
C50 0.1u/16V_4 R61 10_5%_4
U21F APL_BGA_1296P
RTC_TEST# AH49 AC55 RTC_RST#
AC57 RTC_TEST_N RTC_RST_N AC63 PCH_SUSPWRDNACK
[21] RSMRST# RSM_RST_N SUSPWRDNACK PCH_SUSPWRDNACK [21]
[21,22,26] H_PROCHOT# E47 AG58
PMU_WAKE# PROCHOT_N SUS_STAT_N TP6
AG55
PMU_SUSCLK AE62 PMU_WAKE_N J62
TP37 PMU_SUSCLK AVS_I2S1_WS_SYNC GPIO_78
[21] SUSC# AK54 K62 GPIO_78 [9]
AC62 PMU_SLP_S4_N AVS_I2S1_SDO K61
[21] SUSB# PMU_SLP_S0# AD61 PMU_SLP_S3_N AVS_I2S1_SDI G62
D TP38 PMU_SLP_S0_N AVS_I2S1_MCLK D
PMU Block
PMU_RSTBTN# AD62 H63
TP36 PMU_RSTBTN_N AVS_I2S1_BCLK
R73 200_1%_4 PMU_RCOMP AG59
AK55 PMU_RCOMP M58 GPIO_88
[21] DNBSWON# PCI_PLTRST# PMU_PWRBTN_N AVS_I2S2_SDO GPIO_88 [9]
AG57 K59
PCH_BATLOW# AH51 PMU_PLTRST_N AVS_I2S2_SDI K58 HDA_RST#_R R52 33_5%_4
PMU_BATLOW_N AVS_I2S2_MCLK AZ_CODEC_RST# [14]
ACPRESENT AK49 H59
+1.8V_S5 PMU_AC_PRESENT AVS_I2S2_BCLK M57
AG49 AVS_I2S2_WS_SYNC
[21] EC_PWROK SOC_PWROK M61
THERMTRIP#_SOC J47 AVS_I2S3_WS_SYNC L63 GPIO_92
PMIC_THERMTRIP_N AVS_I2S3_SDO GPIO_92 [9]
C79 J45 L62
R384 *10K_5%_4 PCH_SUSPWRDNACK M47 PMIC_STDBY AVS_I2S3_SDI M62
R17 1K_1%_4 H_PROCHOT# 0.1u/16V_4 F48 PMIC_SDWN_B_GPIO_213 AVS_I2S3_BCLK
R23 *10K_5%_4 THERMTRIP#_SOC H48 PMIC_RESET_N M52
F47 PMIC_PWRGOOD AVS_DMIC_DATA_2 M54
R83 H45 PMIC_I2C_SDA AVS_DMIC_DATA_1 P52
+3V_S5 PMIC_I2C_SCL AVS_DMIC_CLK_B1 GPIO_82
10_5%_4
L47
P47 GPIO_214 AVS_DMIC_CLK_AB2
M55
P54
GPIO_82 [9] Folllow APL MOW31:
GPIO_215 AVS_DMIC_CLK_A1
R82
R71
*100K_5%_4
1K_1%_4
PCH_BATLOW#
PMU_WAKE# H50 AG51 C58 0.1u/16V_4
un-stuff 51 ohm pull down resistor on
colsed to CPU pin within 100 mils
R85
R389
10K_5%_4
10K_5%_4
ACPRESENT
PMU_RSTBTN#
J50
M48
PMC_SPI_TXD
PMC_SPI_RXD
VCC_RTC_EXTPAD
RTC_X2
AC58
AC59
RTC_X2
RTC_X1
+1.8V_S5 TRST_N pin
R67 *100K_5%_4 RSMRST# INT_EDP_HPD# P48 PMC_SPI_FS2 RTC_X1
EC_PWROK [12] INT_EDP_HPD# PMC_SPI_FS1 XDP_PREQ#
R81 20K_1%_4 L48 C20 R307 100_1%_4
E52 PMC_SPI_FS0 JTAG_PREQ_N C21 XDP_PRDY# R306 100_1%_4
PMC_SPI_CLK JTAG_PRDY_N B19 +1.05V
GPIO_34 B41 JTAG_PMODE C24 XDP_TRST# R322 *51_5%_4
[9] GPIO_34 GPIO_35 PWM0 JTAG_TRST_N XDP_TMS
[9] GPIO_35 C41 C23 R303 51_5%_4
GPIO_36 F41 PWM1 JTAG_TMS A22 XDP_TDO R304 100_1%_4
[9] GPIO_36 PWM2 JTAG_TDO XDP_TDI
E41 C22 R305 51_5%_4
PWM3 JTAG_TDI B23 XDP_TCK R335 51_5%_4 R323 R324 C313
B21 JTAG_TCK
R62 330K_5%_4 INTRUDER# AC54 JTAGX L30 169_1%_4 68_1%_4 1000p/50V_4
+3V_RTC INTRUDER GPIO_219 M30
PCH_MBDAT0_R T61 GPIO_218 M29 H_CPU_SVIDDAT
PCH_MBCLK0_R T62 SMB_DATA GPIO_217 P30 VR_SVID_ALERT#_VCORE
R63 SMB_CLK GPIO_216
SMB_ALERT_N E21 CLKDRV_RCOMP R42 60.4_1%_4
C
PLTRST# Buffer H43 PCIE_REF_CLK_RCOMP
C
Q5 10K_5%_4
2
10_5%_4
1
SMBus(PCH) Trace length < 1000 mils Y1 R60
10M_5%_4
+3V_S5 +3V 32.768KHZ/20ppm
C34 15p/50V_4 RTC_X2
2
B B
3 RTC_RST#
Q29B R463 1K_1%_4 +3V_RTC_1 1
1
1
PCH_MBCLK0_R 6 1 20K_1%_4
CLK_SCLK [18] 2
Trace width = 20 mils C253
2N7002KDW BAT54CW J1
DDR_GS/S0
4
2
R246
RTC_TEST#
20K_1%_4
C254
1u/6.3V_4
+5V_S5
20MIL
VCCRTC_2 1 3 VCCRTC_3 VCCRTC_4 R474 EJ@4.7K_5%_4
[21,22] SB_ACDC R88 *S_4 ACPRESENT R475 EJ@4.7K_5%_4
1
3 4
EJ@68.1K_1%_4
-
EJ@53014-00201-V09
2
A A
R469
5 2
[21] CLR_CMOS
Q11A Q11B
Quanta Computer Inc.
PROJECT : ZAJ
4
2N7002KDW
Size Document Number Rev
3A
BXTP (PMU/PMIC/HDA/RTC)
Date: Thursday, February 23, 2017 Sheet 6 of 34
5 4 3 2 1
5 4 3 2 1
Apollolake (POWER)
+VCC_VCCGI
07
+VNN U21H APL_BGA_1296P
AJ44 AA36
RSVD_AJ44 VCC_VCGI_1 AA37
AJ37 VCC_VCGI_2 AA39 + C3
AJ39 VNN_SVID_1 VCC_VCGI_3 AC36 C4 C296 C300
AJ41 VNN_SVID_2 VCC_VCGI_4 AC37 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 330u/2V_7343H1.9
D C65 C87 C85 C64 C304 C302 C293 C297 C301 C292 C298 AJ42 VNN_SVID_3 VCC_VCGI_5 AE36 D
22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 AJ46 VNN_SVID_4 VCC_VCGI_6 AE37
AK37 VNN_SVID_5 4.8A VCC_VCGI_7 AG36
AK39 VNN_SVID_6 VCC_VCGI_8 E43
AK41 VNN_SVID_7 VCC_VCGI_9 E45
AK42 VNN_SVID_8 VCC_VCGI_10 E48
AK44 VNN_SVID_9 VCC_VCGI_11 E50 C8 C33 C41 C66 C81 C46 C7 C6
C73 C78 C76 AK46 VNN_SVID_10 VCC_VCGI_12 R45 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 AM44 VNN_SVID_11 VCC_VCGI_13 R47
+3V_S5 VNN_SVID_12 VCC_VCGI_14 U36
AG48 VCC_VCGI_15 U37
[26] VNN_SENSE VNN_SENSE VCC_VCGI_16 U39
BG63 21A VCC_VCGI_17 U41
RSVD_BG63 VCC_VCGI_18 U42
R84 *S_6 +VCC_3.3V AC41 VCC_VCGI_19 U44 C24 C14 C13 C27 C23 C12 C39 C31 C16 C15 C11 C29
AA42 VCC_3P3V_A_1 VCC_VCGI_20 U46 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
Y44 VCC_3P3V_A_2 VCC_VCGI_21 U47
C38 C77 C37 C48 C92 V44 VCC_3P3V_A_3 0.15A VCC_VCGI_22 U48
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 V46 VCC_3P3V_A_4 VCC_VCGI_23 V36
AJ25 VCC_3P3V_A_5 VCC_VCGI_24 V37
+1.24V_S5 AK25 VCC_3P3V_A_USB_1 VCC_VCGI_25 V39
VCC_3P3V_A_USB_2 VCC_VCGI_26 V41
R395 *S_4 +VCC_1.24V_USB2 AC22 VCC_VCGI_27 Y36
RSVD_AC22 VCC_VCGI_28 Y37
R394 *S_6 +VCC_1.24V_AUD_ISH_PLL C67 AC20 VCC_VCGI_29 Y39
1u/6.3V_4 RSVD_AC20 VCC_VCGI_30 Y41
C72 C74 C348 AG20 VCC_VCGI_31 AA28
1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 VCC_1P24V_1P35V_A_USB2 VCC_VCGI_32 AA30
AJ20 VCC_VCGI_33 AA32
AJ22 VCC_1P24V_1P35V_A_PLL_1 VCC_VCGI_34 AC28
R387 *S_6 +VCC_1.24V_MPHY VCC_1P24V_1P35V_A_PLL_2 VCC_VCGI_35 AC30
AE18 VCC_VCGI_36 AC32
C AE20 VCC_1P24V_1P35V_A_MPHY_1 1.3A VCC_VCGI_37 AE28 C
C56 C71 C49 C68 AE22 VCC_1P24V_1P35V_A_MPHY_2 VCC_VCGI_38 AE30
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 AG22 VCC_1P24V_1P35V_A_MPHY_3 VCC_VCGI_39 AE32
VCC_1P24V_1P35V_A_MPHY_4 VCC_VCGI_40 AG28
AM20 VCC_VCGI_41 AG30
R396 *S_6 +VCC_1.24V_GLM AM28 VCC_1P24V_1P35V_A_GLML2LDO_1 VCC_VCGI_42 AG32
AM37 VCC_1P24V_1P35V_A_GLML2LDO_2 VCC_VCGI_43 AJ28
AK20 VCC_1P24V_1P35V_A_GLML2LDO_3 VCC_VCGI_44 AJ30
C86 C82 C83 C80 C351 VCC_1P24V_1P35V_A_GLML2 VCC_VCGI_45 AJ32
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 AA18 VCC_VCGI_46 AK28
AA20 VDD2_1P24_DSI_CSI#1 VCC_VCGI_47 AK30
R388 *0_5%_6 +VCC_1.24V_DSI_CSI VDD2_1P24_DSI_CSI#2 VCC_VCGI_48 AK32
+VCC_1.24V_AUD_ISH_PLL AK22 VCC_VCGI_49 AK34
VCC_1P24V_1P35V_A_AUD_ISH VCC_VCGI_50 AM30
C57 C60 C69 V48 VCC_VCGI_51 E29
*1u/6.3V_4 *1u/6.3V_4 *22u/6.3V_6 RSVD_V48 VCC_VCGI_52 E35
+1.8V_S5 VCC_VCGI_53 E37
AA46 VCC_VCGI_54 F29
AC46 VCC_1P8V_A_1 VCC_VCGI_55 U28
AE44 VCC_1P8V_A_2 VCC_VCGI_56 U30
R86 *S_6 +VCC_1.8V AE42 VCC_1P8V_A_3 VCC_VCGI_57 U32
AC42 VCC_1P8V_A_4 0.4A VCC_VCGI_58 V28
AC44 VCC_1P8V_A_5 VCC_VCGI_59 V30
C62 C59 C63 C61 C91 AE46 VCC_1P8V_A_6 VCC_VCGI_60 V32
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 AG25 VCC_1P8V_A_7 VCC_VCGI_61 Y28
VCC_1P8V_A_8 VCC_VCGI_62 Y30
VCC_VCGI_63 Y32
BJ3 VCC_VCGI_64 +VCC_1.05V_IO
BJ61 RSVD_BJ3
RSVD_BJ61
Section 8 of 12
+1.35VSUS
U21I APL_BGA_1296P
BJ62
AN18 RSVD_BJ62
AN20 VDDQ_1 R41
VDDQ_2 VCC_VCGI_SENSE_P VCCGI_SENSE [26]
AN22
C84 C99 C88 C94 C95 C89 C98 C100 AN23 VDDQ_3 R43
VDDQ_4 VCC_VCGI_SENSE_N VCCGISS_SENSE [26]
22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 AN41
AN42 VDDQ_5
AN44 VDDQ_6
AN46 VDDQ_7
A AR17 VDDQ_8 2.8A A
AR47 VDDQ_9
C104 C96 AT13 VDDQ_10 +VNN
1u/6.3V_4 1u/6.3V_4 AT17 VDDQ_11
AT47 VDDQ_12 AM23
AT51 VDDQ_13 VCCIOA_1 AM25
AV14 VDDQ_14 VCCIOA_2 AM41
AV50 VDDQ_15 VCCIOA_3 AM42 C305 C303 C93 C90
AM32
VDDQ_16 VCCIOA_4
AN32
22u/6.3V_6 22u/6.3V_6 1u/6.3V_4 1u/6.3V_4 Quanta Computer Inc.
RSVD_AM32 Section 9 of 12 RSVD_AN32
PROJECT : ZAJ
Size Document Number Rev
3A
BXTP (POWER)
Date: Thursday, February 23, 2017 Sheet 7 of 34
5 4 3 2 1
5 4 3 2 1
HARDWARE STRAPS
+1.8V_S5
Folllow APL WoW36:
Enable boot from SPI
Hardware Strap
GPIO_36
Strap Description
VCC_1P24V_1P35V_A voltage select
0 = 1.24V
1 = 1.35V
09
GPIO_43=0;GPIO_44=1
Enable CSE(TXE3.0) ROM Bypass
D D
GPIO_39 0 = Disable bypass
1 = Enable Bypass
Allow eMMC as a boot source
R27 R310 R311 R312 R28 R360 R19 R363 R16 R26 R18 GPIO_43 0 = Disable
1 = Enable
*4.7K_5%_4 *4.7K_5%_4 *4.7K_5%_4 4.7K_5%_4 *4.7K_5%_4 *10K_5%_4 *10K_5%_4 *4.7K_5%_4 *4.7K_5%_4 *10K_5%_4 *4.7K_5%_4
Allow SPI as a boot source
GPIO_44 0 = Disable
GPIO_36 1 = Enable
GPIO_36 [6]
GPIO_39 Force DNX FW Load
GPIO_39 [5]
GPIO_47 0 = Do not force
GPIO_43 1 = Force
GPIO_43 [5]
GPIO_44 SMBus 1.8V/3.3V mode select
GPIO_44 [5]
GPIO_78 0=buffers set to 3.3V
GPIO_47 1=buffers set to 1.8V
GPIO_47 [5]
GPIO_78 PMU 1.8V/3.3V mode select
GPIO_78 [6]
GPIO_88 0=buffers set to 3.3V mode
GPIO_88 1=buffers set to 1.8V mode
C
GPIO_88 [6] C
GPIO_92 SMBus No Re-Boot
GPIO_92 [6]
GPIO_92 0 = Disable (default)
GPIO_110 1 = Enable
GPIO_110 [5]
GPIO_111 LPC 1.8V/3.3V mode select
GPIO_111 [5]
GPIO_110 0=buffers set to 3.3V mode
1=buffers set to 1.8V mode
GPIO_120 Boot BIOS Strap
GPIO_120 [5]
GPIO_111 0 = Boot from SPI
1 = Do not boot from SPI
R33 R343 R344 R345 R32 R364 R31 R367 R36 R29 R30
10K_5%_4 10K_5%_4 10K_5%_4 *10K_5%_4 10K_5%_4 10K_5%_4 10K_5%_4 10K_5%_4 4.7K_5%_4 4.7K_5%_4 10K_5%_4
B B
+1.8V_S5
On board memory(OBM)
BYTE0_0-7
DDR3L MEMORY CHANNEL A
BYTE2_16-23 BYTE7_56-63 BYTE4_32-39
10
BYTE1_8-15
U24 U8 BYTE3_24-31 U25 BYTE5_40-47 U9 BYTE6_48-55
+SMDDR_VREF_CA_A M8 E3 +SMDDR_VREF_CA_A M8 E3 +SMDDR_VREF_CA_A M8 E3 +SMDDR_VREF_CA_A M8 E3
+SMDDR_VREF_DQ_A VREFCA DQL0/DQ0 M_A_DQ7 [2] +SMDDR_VREF_DQ_A VREFCA DQL0/DQ0 M_A_DQ19 [2] +SMDDR_VREF_DQ_A VREFCA DQL0/DQ0 M_A_DQ62 [2] +SMDDR_VREF_DQ_A VREFCA DQL0/DQ0 M_A_DQ38 [2]
H1 F7 H1 F7 H1 F7 H1 F7
VREFDQ DQL1/DQ1 M_A_DQ3 [2] VREFDQ DQL1/DQ1 M_A_DQ18 [2] VREFDQ DQL1/DQ1 M_A_DQ60 [2] VREFDQ DQL1/DQ1 M_A_DQ35 [2]
F2 F2 F2 F2
[2] M_A_A[15:0] M_A_A0 DQL2/DQ2 M_A_DQ2 [2] M_A_A0 DQL2/DQ2 M_A_DQ23 [2] M_A_A0 DQL2/DQ2 M_A_DQ56 [2] M_A_A0 DQL2/DQ2 M_A_DQ37 [2]
N3 F8 N3 F8 N3 F8 N3 F8
M_A_A1 A0 DQL3/DQ3 M_A_DQ4 [2] M_A_A1 A0 DQL3/DQ3 M_A_DQ17 [2] M_A_A1 A0 DQL3/DQ3 M_A_DQ61 [2] M_A_A1 A0 DQL3/DQ3 M_A_DQ32 [2]
P7 H3 P7 H3 P7 H3 P7 H3
M_A_A2 A1 DQL4/DQ4 M_A_DQ6 [2] M_A_A2 A1 DQL4/DQ4 M_A_DQ21 [2] M_A_A2 A1 DQL4/DQ4 M_A_DQ57 [2] M_A_A2 A1 DQL4/DQ4 M_A_DQ39 [2]
P3 H8 P3 H8 P3 H8 P3 H8
M_A_A3 A2 DQL5/DQ5 M_A_DQ0 [2] M_A_A3 A2 DQL5/DQ5 M_A_DQ20 [2] M_A_A3 A2 DQL5/DQ5 M_A_DQ59 [2] M_A_A3 A2 DQL5/DQ5 M_A_DQ33 [2]
D
N2 G2 N2 G2 N2 G2 N2 G2
M_A_A4 A3 DQL6/DQ6 M_A_DQ1 [2] M_A_A4 A3 DQL6/DQ6 M_A_DQ22 [2] M_A_A4 A3 DQL6/DQ6 M_A_DQ58 [2] M_A_A4 A3 DQL6/DQ6 M_A_DQ36 [2] D
P8 H7 P8 H7 P8 H7 P8 H7
M_A_A5 A4 DQL7/DQ7 M_A_DQ5 [2] M_A_A5 A4 DQL7/DQ7 M_A_DQ16 [2] M_A_A5 A4 DQL7/DQ7 M_A_DQ63 [2] M_A_A5 A4 DQL7/DQ7 M_A_DQ34 [2]
P2 P2 P2 P2
M_A_A6 R8 A5 M_A_A6 R8 A5 M_A_A6 R8 A5 M_A_A6 R8 A5
M_A_A7 R2 A6 D7 M_A_A7 R2 A6 D7 M_A_A7 R2 A6 D7 M_A_A7 R2 A6 D7
M_A_A8 A7 DQU0/DQ8 M_A_DQ10 [2] M_A_A8 A7 DQU0/DQ8 M_A_DQ28 [2] M_A_A8 A7 DQU0/DQ8 M_A_DQ40 [2] M_A_A8 A7 DQU0/DQ8 M_A_DQ55 [2]
T8 C3 T8 C3 T8 C3 T8 C3
M_A_A9 A8 DQU1/DQ9 M_A_DQ12 [2] M_A_A9 A8 DQU1/DQ9 M_A_DQ31 [2] M_A_A9 A8 DQU1/DQ9 M_A_DQ43 [2] M_A_A9 A8 DQU1/DQ9 M_A_DQ51 [2]
R3 C8 R3 C8 R3 C8 R3 C8
M_A_A10 A9 DQU2/DQ10 M_A_DQ9 [2] M_A_A10 A9 DQU2/DQ10 M_A_DQ30 [2] M_A_A10 A9 DQU2/DQ10 M_A_DQ46 [2] M_A_A10 A9 DQU2/DQ10 M_A_DQ50 [2]
L7 C2 L7 C2 L7 C2 L7 C2
M_A_A11 A10/AP DQU3/DQ11 M_A_DQ8 [2] M_A_A11 A10/AP DQU3/DQ11 M_A_DQ24 [2] M_A_A11 A10/AP DQU3/DQ11 M_A_DQ41 [2] M_A_A11 A10/AP DQU3/DQ11 M_A_DQ52 [2]
R7 A7 R7 A7 R7 A7 R7 A7
M_A_A12 A11 DQU4/DQ12 M_A_DQ13 [2] M_A_A12 A11 DQU4/DQ12 M_A_DQ27 [2] M_A_A12 A11 DQU4/DQ12 M_A_DQ44 [2] M_A_A12 A11 DQU4/DQ12 M_A_DQ48 [2]
N7 A2 N7 A2 N7 A2 N7 A2
M_A_A13 A12/BC DQU5/DQ13 M_A_DQ11 [2] M_A_A13 A12/BC DQU5/DQ13 M_A_DQ26 [2] M_A_A13 A12/BC DQU5/DQ13 M_A_DQ47 [2] M_A_A13 A12/BC DQU5/DQ13 M_A_DQ54 [2]
T3 B8 T3 B8 T3 B8 T3 B8
M_A_A14 A13 DQU6/DQ14 M_A_DQ14 [2] M_A_A14 A13 DQU6/DQ14 M_A_DQ29 [2] M_A_A14 A13 DQU6/DQ14 M_A_DQ45 [2] M_A_A14 A13 DQU6/DQ14 M_A_DQ49 [2]
T7 A3 T7 A3 T7 A3 T7 A3
M_A_A15 A14 DQU7/DQ15 M_A_DQ15 [2] M_A_A15 A14 DQU7/DQ15 M_A_DQ25 [2] M_A_A15 A14 DQU7/DQ15 M_A_DQ42 [2] M_A_A15 A14 DQU7/DQ15 M_A_DQ53 [2]
M7 M7 M7 M7
A15/NC +1.35VSUS A15/NC +1.35VSUS A15/NC +1.35VSUS A15/NC +1.35VSUS
[2] M_A_BS#[2:0] M_A_BS#0 M_A_BS#0 M_A_BS#0 M_A_BS#0
M2 B2 M2 B2 M2 B2 M2 B2
M_A_BS#1 N8 BA0 VDD#B2 D9 M_A_BS#1 N8 BA0 VDD#B2 D9 M_A_BS#1 N8 BA0 VDD#B2 D9 M_A_BS#1 N8 BA0 VDD#B2 D9
M_A_BS#2 M3 BA1 VDD#D9 G7 M_A_BS#2 M3 BA1 VDD#D9 G7 M_A_BS#2 M3 BA1 VDD#D9 G7 M_A_BS#2 M3 BA1 VDD#D9 G7
BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
M_A_CLK0 J7 VDD#N1 N9 M_A_CLK0 J7 VDD#N1 N9 M_A_CLK0 J7 VDD#N1 N9 M_A_CLK0 J7 VDD#N1 N9
[2] M_A_CLK0 M_A_CLK0# CK VDD#N9 M_A_CLK0# CK VDD#N9 M_A_CLK0# CK VDD#N9 M_A_CLK0# CK VDD#N9
K7 R1 K7 R1 K7 R1 K7 R1
[2] M_A_CLK0# M_A_CKE0 CK VDD#R1 M_A_CKE0 CK VDD#R1 M_A_CKE0 CK VDD#R1 M_A_CKE0 CK VDD#R1
K9 R9 K9 R9 K9 R9 K9 R9
[2] M_A_CKE0 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9
C
E7 A9 E7 A9 E7 A9 E7 A9 C
D3 DML VSS#A9 B3 D3 DML VSS#A9 B3 D3 DML VSS#A9 B3 D3 DML VSS#A9 B3
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
M_A_DQS#0 G3 VSS#G8 J2 M_A_DQS#2 G3 VSS#G8 J2 M_A_DQS#7 G3 VSS#G8 J2 M_A_DQS#4 G3 VSS#G8 J2
[2] M_A_DQS#0 M_A_DQS#1 DQSL VSS#J2 [2] M_A_DQS#2 M_A_DQS#3 DQSL VSS#J2 [2] M_A_DQS#7 M_A_DQS#5 DQSL VSS#J2 [2] M_A_DQS#4 M_A_DQS#6 DQSL VSS#J2
B7 J8 B7 J8 B7 J8 B7 J8
[2] M_A_DQS#1 DQSU VSS#J8 [2] M_A_DQS#3 DQSU VSS#J8 [2] M_A_DQS#5 DQSU VSS#J8 [2] M_A_DQS#6 DQSU VSS#J8
M1 M1 M1 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
MA_DRAMRST# T2 VSS#P1 P9 MA_DRAMRST# T2 VSS#P1 P9 MA_DRAMRST# T2 VSS#P1 P9 MA_DRAMRST# T2 VSS#P1 P9
[2] MA_DRAMRST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
M_A_ZQ1 L8 VSS#T1 T9 M_A_ZQ2 L8 VSS#T1 T9 M_A_ZQ3 L8 VSS#T1 T9 M_A_ZQ4 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
B1 B1 B1 B1
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R414 VSSQ#B9 D1 R149 VSSQ#B9 D1 R412 VSSQ#B9 D1 R162 VSSQ#B9 D1
VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8
240_1%_4 VSSQ#D8 E2 240_1%_4 VSSQ#D8 E2 240_1%_4 VSSQ#D8 E2 240_1%_4 VSSQ#D8 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3L SDRAM DDR3L SDRAM DDR3L SDRAM DDR3L
H5TC4G63EFR-PBA H5TC4G63EFR-PBA H5TC4G63EFR-PBA H5TC4G63EFR-PBA
A R147 A
C367 C373 C360 C379 C140 C142 C147
M_A_ODT0 R152 1K_1%_4 3.65K_1%_4 470p/50V_4 0.1u/16V_4 2.2u/10V_4
+1.35VSUS
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
On board memory(OBM)
BYTE0_0-7
DDR3L MEMORY CHANNEL B
BYTE1_8-15 BYTE5_40-47 BYTE6_48-55
11
U26 BYTE2_16-23 U10 BYTE3_24-31 U11 BYTE7_56-63 U27 BYTE4_32-39
+SMDDR_VREF_CA_B M8 E3 M_B_DQ0 +SMDDR_VREF_CA_B M8 E3 M_B_DQ12 +SMDDR_VREF_CA_B M8 E3 M_B_DQ47 +SMDDR_VREF_CA_B M8 E3 M_B_DQ53
+SMDDR_VREF_DQ_B VREFCA DQL0/DQ0 M_B_DQ4 M_B_DQ0 [2] +SMDDR_VREF_DQ_B VREFCA DQL0/DQ0 M_B_DQ15 M_B_DQ12 [2] +SMDDR_VREF_DQ_B VREFCA DQL0/DQ0 M_B_DQ43 M_B_DQ47 [2] +SMDDR_VREF_DQ_B VREFCA DQL0/DQ0 M_B_DQ48 M_B_DQ53 [2]
H1 F7 H1 F7 H1 F7 H1 F7
VREFDQ DQL1/DQ1 M_B_DQ5 M_B_DQ4 [2] VREFDQ DQL1/DQ1 M_B_DQ13 M_B_DQ15 [2] VREFDQ DQL1/DQ1 M_B_DQ42 M_B_DQ43 [2] VREFDQ DQL1/DQ1 M_B_DQ51 M_B_DQ48 [2]
F2 F2 F2 F2
[2] M_B_A[15:0] M_B_A0 DQL2/DQ2 M_B_DQ6 M_B_DQ5 [2] M_B_A0 DQL2/DQ2 M_B_DQ14 M_B_DQ13 [2] M_B_A0 DQL2/DQ2 M_B_DQ41 M_B_DQ42 [2] M_B_A0 DQL2/DQ2 M_B_DQ52 M_B_DQ51 [2]
N3 F8 N3 F8 N3 F8 N3 F8
M_B_A1 A0 DQL3/DQ3 M_B_DQ1 M_B_DQ6 [2] M_B_A1 A0 DQL3/DQ3 M_B_DQ9 M_B_DQ14 [2] M_B_A1 A0 DQL3/DQ3 M_B_DQ40 M_B_DQ41 [2] M_B_A1 A0 DQL3/DQ3 M_B_DQ50 M_B_DQ52 [2]
P7 H3 P7 H3 P7 H3 P7 H3
M_B_A2 A1 DQL4/DQ4 M_B_DQ3 M_B_DQ1 [2] M_B_A2 A1 DQL4/DQ4 M_B_DQ11 M_B_DQ9 [2] M_B_A2 A1 DQL4/DQ4 M_B_DQ44 M_B_DQ40 [2] M_B_A2 A1 DQL4/DQ4 M_B_DQ55 M_B_DQ50 [2]
P3 H8 P3 H8 P3 H8 P3 H8
M_B_A3 A2 DQL5/DQ5 M_B_DQ2 M_B_DQ3 [2] M_B_A3 A2 DQL5/DQ5 M_B_DQ10 M_B_DQ11 [2] M_B_A3 A2 DQL5/DQ5 M_B_DQ46 M_B_DQ44 [2] M_B_A3 A2 DQL5/DQ5 M_B_DQ54 M_B_DQ55 [2]
D
N2 G2 N2 G2 N2 G2 N2 G2
M_B_A4 A3 DQL6/DQ6 M_B_DQ7 M_B_DQ2 [2] M_B_A4 A3 DQL6/DQ6 M_B_DQ8 M_B_DQ10 [2] M_B_A4 A3 DQL6/DQ6 M_B_DQ45 M_B_DQ46 [2] M_B_A4 A3 DQL6/DQ6 M_B_DQ49 M_B_DQ54 [2] D
P8 H7 P8 H7 P8 H7 P8 H7
M_B_A5 A4 DQL7/DQ7 M_B_DQ7 [2] M_B_A5 A4 DQL7/DQ7 M_B_DQ8 [2] M_B_A5 A4 DQL7/DQ7 M_B_DQ45 [2] M_B_A5 A4 DQL7/DQ7 M_B_DQ49 [2]
P2 P2 P2 P2
M_B_A6 R8 A5 M_B_A6 R8 A5 M_B_A6 R8 A5 M_B_A6 R8 A5
M_B_A7 R2 A6 D7 M_B_DQ16 M_B_A7 R2 A6 D7 M_B_DQ27 M_B_A7 R2 A6 D7 M_B_DQ56 M_B_A7 R2 A6 D7 M_B_DQ34
M_B_A8 A7 DQU0/DQ8 M_B_DQ22 M_B_DQ16 [2] M_B_A8 A7 DQU0/DQ8 M_B_DQ28 M_B_DQ27 [2] M_B_A8 A7 DQU0/DQ8 M_B_DQ58 M_B_DQ56 [2] M_B_A8 A7 DQU0/DQ8 M_B_DQ39 M_B_DQ34 [2]
T8 C3 T8 C3 T8 C3 T8 C3
M_B_A9 A8 DQU1/DQ9 M_B_DQ23 M_B_DQ22 [2] M_B_A9 A8 DQU1/DQ9 M_B_DQ30 M_B_DQ28 [2] M_B_A9 A8 DQU1/DQ9 M_B_DQ60 M_B_DQ58 [2] M_B_A9 A8 DQU1/DQ9 M_B_DQ36 M_B_DQ39 [2]
R3 C8 R3 C8 R3 C8 R3 C8
M_B_A10 A9 DQU2/DQ10 M_B_DQ21 M_B_DQ23 [2] M_B_A10 A9 DQU2/DQ10 M_B_DQ25 M_B_DQ30 [2] M_B_A10 A9 DQU2/DQ10 M_B_DQ63 M_B_DQ60 [2] M_B_A10 A9 DQU2/DQ10 M_B_DQ33 M_B_DQ36 [2]
L7 C2 L7 C2 L7 C2 L7 C2
M_B_A11 A10/AP DQU3/DQ11 M_B_DQ18 M_B_DQ21 [2] M_B_A11 A10/AP DQU3/DQ11 M_B_DQ26 M_B_DQ25 [2] M_B_A11 A10/AP DQU3/DQ11 M_B_DQ62 M_B_DQ63 [2] M_B_A11 A10/AP DQU3/DQ11 M_B_DQ38 M_B_DQ33 [2]
R7 A7 R7 A7 R7 A7 R7 A7
M_B_A12 A11 DQU4/DQ12 M_B_DQ17 M_B_DQ18 [2] M_B_A12 A11 DQU4/DQ12 M_B_DQ31 M_B_DQ26 [2] M_B_A12 A11 DQU4/DQ12 M_B_DQ59 M_B_DQ62 [2] M_B_A12 A11 DQU4/DQ12 M_B_DQ32 M_B_DQ38 [2]
N7 A2 N7 A2 N7 A2 N7 A2
M_B_A13 A12/BC DQU5/DQ13 M_B_DQ19 M_B_DQ17 [2] M_B_A13 A12/BC DQU5/DQ13 M_B_DQ29 M_B_DQ31 [2] M_B_A13 A12/BC DQU5/DQ13 M_B_DQ61 M_B_DQ59 [2] M_B_A13 A12/BC DQU5/DQ13 M_B_DQ37 M_B_DQ32 [2]
T3 B8 T3 B8 T3 B8 T3 B8
M_B_A14 A13 DQU6/DQ14 M_B_DQ20 M_B_DQ19 [2] M_B_A14 A13 DQU6/DQ14 M_B_DQ24 M_B_DQ29 [2] M_B_A14 A13 DQU6/DQ14 M_B_DQ57 M_B_DQ61 [2] M_B_A14 A13 DQU6/DQ14 M_B_DQ35 M_B_DQ37 [2]
T7 A3 T7 A3 T7 A3 T7 A3
M_B_A15 A14 DQU7/DQ15 M_B_DQ20 [2] M_B_A15 A14 DQU7/DQ15 M_B_DQ24 [2] M_B_A15 A14 DQU7/DQ15 M_B_DQ57 [2] M_B_A15 A14 DQU7/DQ15 M_B_DQ35 [2]
M7 M7 M7 M7
A15/NC +1.35VSUS A15/NC +1.35VSUS A15/NC +1.35VSUS A15/NC +1.35VSUS
[2] M_B_BS#[2:0] M_B_BS#0 M_B_BS#0 M_B_BS#0 M_B_BS#0
M2 B2 M2 B2 M2 B2 M2 B2
M_B_BS#1 N8 BA0 VDD#B2 D9 M_B_BS#1 N8 BA0 VDD#B2 D9 M_B_BS#1 N8 BA0 VDD#B2 D9 M_B_BS#1 N8 BA0 VDD#B2 D9
M_B_BS#2 M3 BA1 VDD#D9 G7 M_B_BS#2 M3 BA1 VDD#D9 G7 M_B_BS#2 M3 BA1 VDD#D9 G7 M_B_BS#2 M3 BA1 VDD#D9 G7
BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
M_B_CLK0 J7 VDD#N1 N9 M_B_CLK0 J7 VDD#N1 N9 M_B_CLK0 J7 VDD#N1 N9 M_B_CLK0 J7 VDD#N1 N9
[2] M_B_CLK0 M_B_CLK0# CK VDD#N9 M_B_CLK0# CK VDD#N9 M_B_CLK0# CK VDD#N9 M_B_CLK0# CK VDD#N9
K7 R1 K7 R1 K7 R1 K7 R1
[2] M_B_CLK0# M_B_CKE0 CK VDD#R1 M_B_CKE0 CK VDD#R1 M_B_CKE0 CK VDD#R1 M_B_CKE0 CK VDD#R1
K9 R9 K9 R9 K9 R9 K9 R9
[2] M_B_CKE0 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9
C
E7 A9 E7 A9 E7 A9 E7 A9 C
D3 DML VSS#A9 B3 D3 DML VSS#A9 B3 D3 DML VSS#A9 B3 D3 DML VSS#A9 B3
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
M_B_DQS#0 G3 VSS#G8 J2 M_B_DQS#1 G3 VSS#G8 J2 M_B_DQS#5 G3 VSS#G8 J2 M_B_DQS#6 G3 VSS#G8 J2
[2] M_B_DQS#0 M_B_DQS#2 DQSL VSS#J2 [2] M_B_DQS#1 M_B_DQS#3 DQSL VSS#J2 [2] M_B_DQS#5 M_B_DQS#7 DQSL VSS#J2 [2] M_B_DQS#6 M_B_DQS#4 DQSL VSS#J2
B7 J8 B7 J8 B7 J8 B7 J8
[2] M_B_DQS#2 DQSU VSS#J8 [2] M_B_DQS#3 DQSU VSS#J8 [2] M_B_DQS#7 DQSU VSS#J8 [2] M_B_DQS#4 DQSU VSS#J8
M1 M1 M1 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
MB_DRAMRST# T2 VSS#P1 P9 MB_DRAMRST# T2 VSS#P1 P9 MB_DRAMRST# T2 VSS#P1 P9 MB_DRAMRST# T2 VSS#P1 P9
[2] MB_DRAMRST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
M_B_ZQ1 L8 VSS#T1 T9 M_B_ZQ2 L8 VSS#T1 T9 M_B_ZQ3 L8 VSS#T1 T9 M_B_ZQ4 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
B1 B1 B1 B1
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R413 VSSQ#B9 D1 R155 VSSQ#B9 D1 R159 VSSQ#B9 D1 R411 VSSQ#B9 D1
VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8
240_1%_4 VSSQ#D8 E2 240_1%_4 VSSQ#D8 E2 240_1%_4 VSSQ#D8 E2 240_1%_4 VSSQ#D8 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3L SDRAM DDR3L SDRAM DDR3L SDRAM DDR3L
H5TC4G63EFR-PBA H5TC4G63EFR-PBA H5TC4G63EFR-PBA H5TC4G63EFR-PBA
A R150 A
C358 C363 C378 C375 C149 C152 C156
M_B_ODT0 R160 1K_1%_4 3.65K_1%_4 470p/50V_4 0.1u/16V_4 2.2u/10V_4
+1.35VSUS
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
eMMC (MMC)
12
+1.8V
EC@Hynix 32GB
+VIN
[6] INT_EDP_HPD#
R6 VL@0_5%_6 VOUT_BACKLIGHT 100K_5%_4 GMT:AL005245000
+12V_Panel 40 NVT:AL003522001
39
Reserve for 4K2K panel 38
3
R274 *0_5%_6
Q1 2 EDP_HPD R1 33_5%_4 EDP_HPD_R R275 *S_6 LCDVCC_R 37
LCDVCC 36
35
PJA138K R2 R276 *S_4 CCD+DMIC_PWR 34
1
+3V 33
C1
100K_5%_4 180p/50V_4 32
1
EDP_TXP2 EDP_TXP2_C 15 LID591#,EC intrnal PU
C291 0.1u/16V_4 10K_5%_4 10K_5%_4 D1
[4] EDP_TXP2 EDP_TXN2 EDP_TXN2_C 14
C294 0.1u/16V_4
[4] EDP_TXN2 13 BL# 1N4148WS
EDP_TXP3 C295 0.1u/16V_4 EDP_TXP3_C 12
[4] EDP_TXP3
2
EDP_TXN3 C299 0.1u/16V_4 EDP_TXN3_C 11 BL_ON
[4] EDP_TXN3 10 PCH_BLON_R
R10 *S_4
9 [4] PCH_BLON
A A
[3] USBP6+ 8
3
R9 *S_4
CCD-USB [3] USBP6- 7 [21] PCH_BLON_EC
R8
6
3
2
[3] USBP5+ 5 EC_FPBACK# [21]
Touch Panel-USB [3] USBP5- 100K_5%_4
4 5 2 Q2
3 DDTC144EUA-7-F
[14] DMIC_DAT
1
1
41
196538-40041-3 2N7002KDW
2
D14 D13
*AZ5725-01F.R7G *AZ5725-01F.R7G
1
D12 D11
*AZ5725-01F.R7G *AZ5725-01F.R7G Quanta Computer Inc.
1
PROJECT : ZAJ
Size Document Number Rev
3A
eDP/ CCD/eMMC
Date: Thursday, February 23, 2017 Sheet 12 of 34
5 4 3 2 1
5 4 3 2 1
HDMI (HDM)
+3V
D D
HDMI_HPD_ROUT
DDCDATA_ROUT
DDCCLK_ROUT
+3V
+3V
C105
*0.1u/16V_4 C109
*0.1u/16V_4
C131 C129 C127 C126 C128 C137 C130
*0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4
20
22
CN6
24
23
22
21
20
19
18
17
U6 INT_HDMITX2P_C 1 D2+
2
NC#3
NC#2
VDD#2
DDC_EN
OE_N
HPD_SINK
SDA_SINK
SCL_SINK
D2_shield
INT_HDMITX2N_C 3
D2-
INT_HDMITX1P_C 4
D1+
5
D1_shield
INT_HDMITX1N_C 6
D1-
INT_HDMITX0P C124 *0.1u/16V_4 INT_HDMITX0P_C_RIN 25 16 INT_HDMITX0P_C_ROUT R142 *0_5%_4 INT_HDMITX0P_C INT_HDMITX0P_C 7
IN_D1- OUT_D1- D0+
INT_HDMITX0N C122 *0.1u/16V_4 INT_HDMITX0N_C_RIN 26 15 INT_HDMITX0N_C_ROUT R140 *0_5%_4 INT_HDMITX0N_C 8
INT_HDMITX1P C118 *0.1u/16V_4 INT_HDMITX1P_C_RIN 27 IN_D1+ OUT_D1+ 14 INT_HDMITX1P_C_ROUT R137 *0_5%_4 INT_HDMITX1P_C INT_HDMITX0N_C 9
D0_shield
INT_HDMITX1N C116 *0.1u/16V_4 INT_HDMITX1N_C_RIN 28 IN_D2- OUT_D2- 13 INT_HDMITX1N_C_ROUT R135 *0_5%_4 INT_HDMITX1N_C INT_HDMICLK+_C 10
D0-
INT_HDMITX2P C114 *0.1u/16V_4 INT_HDMITX2P_C_RIN 29 IN_D2+ OUT_D2+ 12 INT_HDMITX2P_C_ROUT R132 *0_5%_4 INT_HDMITX2P_C 11
CLK+
IN_D3- OUT_D3- CLK_shield
INT_HDMITX2N C112 *0.1u/16V_4 INT_HDMITX2N_C_RIN 30 11 INT_HDMITX2N_C_ROUT R130 *0_5%_4 INT_HDMITX2N_C INT_HDMICLK-_C 12
IN_D3+ OUT_D3+ CLK-
INT_HDMICLK+ C110 *0.1u/16V_4 INT_HDMICLK+_C_RIN 31 10 INT_HDMICLK+_C_ROUT R125 *0_5%_4 INT_HDMICLK+_C 13
INT_HDMICLK- INT_HDMICLK-_C_RIN IN_D4- OUT_D4- INT_HDMICLK-_C_ROUT INT_HDMICLK-_C +5V CEC
HPD_SOURCE
SDA_SOURCE
C107 *0.1u/16V_4 32 9 R123 *0_5%_4 14
SCL_SOURCE
IN_D4+ OUT_D4+ HDMI_DDCCLK 15
NC
DDC CLK
33 37 U5 HDMI_DDCDATA 16
GND#1 GND#5 36 17
DDC DATA
VDD#1
GND#4 35 GND
REXT
1 HDMI_5V 18
NC#1
EQ1
EQ0
GND#3 34 OUT HDMI_HPD 19
+5V
C GND#2 3
HP DET C
1
2
3
4
5
6
7
8
2 *220p/50V_4
21
23
+3V GND *VARISTOR
HDMI_HPD_RIN
DDCDATA_RIN
DDCCLK_RIN
*12.4K_1%_4
HDMI_EQ1
GMT:AL005250003
HDMI_EQ0
BCD:AL002802002
C106 ESD7
*0.1u/16V_4 INT_HDMITX0P_C 1 10 INT_HDMITX0P_C
Line-1 NC#4
INT_HDMITX0N_C 2 9 INT_HDMITX0N_C
R117
Line-2 NC#3
3
GND#1
INT_HDMITX1P_C 4 7 INT_HDMITX1P_C
INT_HDMITX0P C125 0.1u/16V_4 INT_HDMITX0P_NOR R410 *S_4 INT_HDMITX0P_C Line-3 NC#2
[4] INT_HDMITX0P INT_HDMITX0N INT_HDMITX0N_NOR INT_HDMITX0N_C INT_HDMITX1N_C INT_HDMITX1N_C
C123 0.1u/16V_4 R409 *S_4 5 6
[4] INT_HDMITX0N Line-4 NC#1
INT_HDMITX1P C119 0.1u/16V_4 INT_HDMITX1P_NOR R408 *S_4 INT_HDMITX1P_C *AZ1045-04F.R7G
[4] INT_HDMITX1P INT_HDMITX1N INT_HDMITX1N_NOR INT_HDMITX1N_C
C117 0.1u/16V_4 R407 *S_4
[4] INT_HDMITX1N
INT_HDMITX2P C115 0.1u/16V_4 INT_HDMITX2P_NOR R406 *S_4 INT_HDMITX2P_C
[4] INT_HDMITX2P INT_HDMITX2N INT_HDMITX2N_NOR INT_HDMITX2N_C ESD6
C113 0.1u/16V_4 R405 *S_4
[4] INT_HDMITX2N INT_HDMITX2P_C 1 10 INT_HDMITX2P_C
INT_HDMICLK+ C111 0.1u/16V_4 INT_HDMICLK+_NOR R404 *S_4 INT_HDMICLK+_C Line-1 NC#4
[4] INT_HDMICLK+ INT_HDMICLK- INT_HDMICLK-_NOR INT_HDMICLK-_C INT_HDMITX2N_C INT_HDMITX2N_C
C108 0.1u/16V_4 R403 *S_4 2 9
[4] INT_HDMICLK- HDMI_HPD_RIN Line-2 NC#3
3
GND#1
INT_HDMICLK+_C 4 7 INT_HDMICLK+_C
Q12 Line-3 NC#2
2
B B
R122 R126 R129 R133 R134 R138 R139 R143 INT_HDMICLK-_C 5 6 INT_HDMICLK-_C
R100 *0_5%_4 HDMI_HPD_RIN_Q 3 1 Line-4 NC#1
470_1%_4 470_1%_4 470_1%_4 470_1%_4 470_1%_4 470_1%_4 470_1%_4 470_1%_4 *AZ1045-04F.R7G
*PJA138K
2
co-layout HDMI_HPD_ROUT
3
+3V R401 *0_5%_4
Q13 Q9 2 HDMI_HPD_NOR-1 R402 *S_4 HDMI_HPD
2N7002K
1
1
+1.8V R400 D29
R103 R110
5
*2.2K_5%_4 2.2K_5%_4
R120 *0_5%_4 DDCCLK_RIN DDCCLK_ROUT R107 *0_5%_4
Hall Sensor (HSR) [4] HDMI_DDCCLK_SW
R104 *S_4 DDCCLK_NOR 4 3 DDCCLK_NOR-1 R108 *S_4 HDMI_DDCCLK
2.2_5%_6 SSM6N43FU
2
D4 D5
LID# [12,21]
*AZ5725-01F.R7G *AZ5725-01F.R7G
1
2
Q14
S VCC
OUTPUT
C138
4.7u/6.3V_4 YB8251ST23 PROJECT : ZAJ
3
Codec(ADO)
HP-R2
HP-L2
14
LINE1-VREFO-L
LINE1-VREFO-R
MIC2-VREFO
C228
C231
C237
R251 100K_5%_4
10u/6.3V_4
2.2u/10V_4
2.2u/10V_4
C259 C428
0.1u/16V_4 10u/6.3V_4
+AZA_VDD
Place next to pin 26
36
35
34
33
32
31
30
29
28
27
26
25
+1.5VA
U15
ADOGND
CPVEE
HP-OUT-L
LINE1-VREFO-L
MIC2-VREFO
LDO1-CAP
AVDD1
AVSS1
CPVDD
CBN
HP-OUT-R
LINE1-VREFO-R
VREF
C401 C220
10u/6.3V_4 0.1u/16V_4
ADOGND 37 24
CBP LINE2-L
38 23
ADOGND AVSS2 LINE2-R
Place next to pin 40 C223 10u/6.3V_4 39 22 LINE1-L
LDO2-CAP LINE1-L
Analog 40 21 LINE1-R
L9 AVDD2 LINE1-R
Digital 1 2 +5V_PVDD 41 20
+5V PVDD1 VD33 STB +3VPCU
PBY160808T-600Y-N
L_SPK+ 42 19 C443 10u/6.3V_4
SPK-L+ MIC-CAP ADOGND
C412 C213 L_SPK- 43 18 SLEEVE
SPK-L- MIC2-R/SLEEVE trace width of SLEEVE & RING2
10u/6.3V_4 0.1u/16V_4
R_SPK- 44 17 RING2 are required at least 40mil and
SPK-R- MIC2-L/RING2 its length should be asshort as possible
R_SPK+ 45 16
Low is power down SPK-R+ MONO-OUT
amplifier output 46 15
PVDD2 SPDIFO/FRONT JD/GPIO3
GPIO0/DMIC-DATA
PD# 47 14
GPIO1/DMIC-CLK
Placement near Audio Codec
C
PDB MIC2/LIN2 JD C
C411 C214 48 13 SENSEA R257 200K_1%_4
TP19 SPDIF-OUT SDATA-OUT HP/LINE1 JD HP_JD# [19]
LDO3-CAP
10u/6.3V_4 0.1u/16V_4
SDATA-IN
DVDD-IO
PCBEEP
RESETB
DC DET
SYNC
49 BCLK
DGND
Analog
Digital
1
10
11
12
ALC255-CG
10u/6.3V_4
1.6Vrms
R238 *S_4 +AZA_VDD
+3V
PCBEEP C264 0.1u/16V_4 BEEP_1 R255 20K_1%_4 1 2
[5]
SPKR
DMIC_DAT_R
DMIC_CLK_R
D25 1N4148WS
C250
R262 1 2
PCBEEP_EC [21]
C229 C230 C268 D23 1N4148WS
0.1u/16V_4 10u/6.3V_4 100p/50V_4 10K_5%_4
+1.5V
[12] DMIC_DAT
DMIC_DAT R240 *S_4
AZ_CODEC_RST#
AZ_CODEC_SYNC [5]
[6]
Universal Audio Jack HEADPHONE/MIC/LINE combo (ADO)
Tied at one point only under DMIC_CLK R243 22_5%_4 DVDD_IO
[12] DMIC_CLK
the codec or near the codec MIC2-VREFO R478 2.2K_5%_4
C260 *0.1u/16V_4
Close to Codec AZ_CODEC_SDOUT [5]
HP-R2 R244 62_1%_4 HP-R3
HP-L3 [19]
HP-R3 [19]
B B
ADOGND
R232
1K_1%_4
2
D21 Q32
PD# 2 1 3 1 AZ_CODEC_RST#
DIGITAL ANALOG
+5V +5VA R228 *PJA138K
1
L11
2 *10K_5%_4
C219
*1u/6.3V_4
*RB500V-40
Codec PWR 1.5V(ADO)
D22
PBY160808T-600Y-N 2 1
AMP_MUTE# [21]
DIGITAL ANALOG
A A
PBY160808T-600Y-N
40mil for each signal CN19 C397
5
1u/6.3V_4
R_SPK+
R_SPK- 1
L_SPK- 2
L_SPK+ 3
4
Quanta Computer Inc.
6
2
1
Y2 SP8=SD_CD#
25MHZ/30ppm
SP1=SD_D1 C232 *10p/50V_4
4
3
SP2=SD_D0=MS_D1 C238 *10p/50V_4
C179 10p/50V_4 LAN_XTAL2
D PCIE_LAN_WAKE#_R SP4=SD_CMD=MS_D2 C445 *10p/50V_4 D
TP40
TP11
TP13
VDD10 TP12 SP6=SD_D2=MS_CLK C447 *10p/50V_4
14
13
15
TP14
R173 2.49K_1%_4 RSET CN2
GND#2
10 mils
Hole#2
Hole#1
LANVCC
VCC_XD
48
47
46
45
44
43
42
41
40
39
38
37
U13
LED1/GPO
RSET
LED_CR
AVDD33
AVDD10
CKXTAL2
CKXTAL1
MS_CD#
SD_CD#
LED0
LED3
LANWAKEB
49 SP5=SD_D3=MS_D3 1
E_PAD CD/DAT3
SP4=SD_CMD=MS_D2 2
CMD
+3V C262 C263 3
4.7u/6.3V_4 0.1u/16V_4 VSS
VCC_XD 4
MDI_0+ 1 36 VDD
MDI_0- MDIP0 REGOUT REGOUT SP3=SD_CLK=MS_D0 SD_CLK_R
2 35 LANVCC R224 R247 *S_4 5
3 MDIN0 VDDREG 34 ENSWREG reserve for EMI CLK
VDD10 MDI_1+ AVDD10#1 ENSWREG_H
4 33 VDD10 1K_1%_4 6
MDI_1-
MDI_2+
5
6
MDIP1
MDIN1
DVDD10
DVDD33
32
31 ISOLATEB
LANVCC SP2=SD_D0=MS_D1 7
VSS#2
TAI - SOL
MDI_2- 7 MDIP2 ISOLATEB 30 DAT0
MDIN2 PERSTB PLTRST# [6,12,16,17,21]
8 29 CLK_LAN_REQ# SP1=SD_D1 8
VDD10 MDI_3+ AVDD10#2 CLKREQB SP7=SD_WP=MS_BS
9 28 C212 1000p/50V_4 R225 DAT1
MDI_3- 10 MDIP3 SD_WP/MS_BS 27 VDD33/18 SP6=SD_D2=MS_CLK 9
11 MDIN3 VDD33/18 26 PCIE_RX2-_LAN_C C225 0.1u/16V_4 15K_1%_4 DAT2
LANVCC +3V_CR AVDD33#1 HSON PCIE_RX2+_LAN_C PCIE_RX2-_LAN [3] SP8=SD_CD#
+3V R234 *S_6 12 25 C224 0.1u/16V_4 10
DVDD33_CR HSOP PCIE_RX2+_LAN [3]
CD
SP7=SD_WP=MS_BS 11
SD_CMD/MS_D2
SD_CLK/MS_D0
SD_D2/MS_CLK
C C
WP
SD_D0/MS_D1
SD_D3/MS_D3
REFCLK_N
CARD_3V3
REFCLK_P
EMI
EVDD10
SD_D1
HSIN
HSIP
GND#1
SP3=SD_CLK=MS_D0
RTL8411B-CG
13
14
15
16
17
18
19
20
21
22
23
24
C246 156-1001902602
12
VCC_XD
10p/50V_4
C448 0.1u/16V_4
SP1=SD_D1
SP2=SD_D0=MS_D1
SP3=SD_CLK=MS_D0 CLK_PCIE_LANN [3]
SP4=SD_CMD=MS_D2 CLK_PCIE_LANP [3]
SP5=SD_D3=MS_D3 PCIE_TX2-_LAN [3]
SP6=SD_D2=MS_CLK PCIE_TX2+_LAN [3]
VDD10
25
signal should have 30 10
9
VDD33/18 U20
mil trace CN4
GND
R168 C215 C176 C202 C200 C186 1 24 LAN_MCT0
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 4.7u/6.3V_4 0.1u/16V_4 C226 C227 MDI_0+ 2 TCT1 NC #4 23 LAN_MX0+
TD1+ MX1+
5
EJ@75_1%_8
EJ@75_1%_8
EJ@75_1%_8
EJ@75_1%_8
JMP1H01-R3401-7H
SSM6N43FU RTL8411B (LDO mode) close to each VDD10 pin-- 3, 8, 33, 46 Close to Pin20
11
12
NS892407
REGOUT C10
VDD10 0.01u/50V_4
40 mils (Iout=1A) 40 mils (Iout=1A)
R174 *S_6 TF height limit = 4mm
EJ series Vender Descripiton
R12
R13
R14
R15
C178 C210 C189 C177 C386 C403 C407
DB0LL1LAN00 FCE TRANSFORMER LL1 LAN 24P(NS892407)
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 1u/6.3V_4 0.1u/16V_4
DB0X81LAN01 PSK TRANSFORMER X81 GIGA LAN (A-8300G)
TERM9
DB0Z06LAN00 BOT TRANSFORMER Z06 LAN 24P(GST5009B LF)
A A
TF height limit = 2.4mm
Descripiton C307
Cloudbook Vender EJ@1000p/3KV_1808
LANVCC 60 mils +3V_S5
DB0Z8PLAN00 PSK TRANSFORMER Z8P LAN (A-8300G-SLIM)
R209 *S_6
20
CN12
25
co-layout CN16
23
21
18
R252 CB@0_5%_8 +3V
17
1 SATA_DEVSLP0 [5] 16
2 HDD+M2_PWR 60mil R260 EJ@0_5%_8 15 +5V_ODD 60mil R461 *S_8
3 +5V +5V
14
4 13
5 C409 C244 C239 C235 C248 C399 12 C439 C430 C438 C429 C418
6 0.01u/50V_4 0.01u/50V_4 0.1u/16V_4 0.1u/16V_4 10u/6.3V_4 *100u/6.3V_12 11 ODD@0.01u/50V_4 ODD@0.01u/50V_4 ODD@0.1u/16V_4 ODD@10u/6.3V_4 *ODD@100u/6.3V_12
7 10
D 8 9 D
9 8
10 7
11 R242 w/o GS@0_5%_4 6 ODD_RXP_C C424 ODD@0.01u/50V_4 ODD_RXP
12 5 ODD_RXN_C C427 ODD@0.01u/50V_4 ODD_RXN
13 ACCEL_INT2 [18]
4
14 SATA_RXP0_CN C199 EJ@0.01u/50V_4 SATA_RXP0_RD 3 ODD_TXN_C C431 ODD@0.01u/50V_4 ODD_TXN
15 SATA_RXN0_CN C191 EJ@0.01u/50V_4 SATA_RXN0_RD 2 ODD_TXP_C C437 ODD@0.01u/50V_4 ODD_TXP
16 1
17 SATA_TXN0_CN C184 EJ@0.01u/50V_4 SATA_TXN0_RD
18 SATA_TXP0_CN C181 EJ@0.01u/50V_4 SATA_TXP0_RD
19 ODD@18 pin conn
20 +3V_ASM
19
Close to ASM1153
26 24
22
R241
VCC1.2O
GS12201-1011-7H co-layout Internal 1.2V voltage (Switching) *S_4
>40mil R472
TP41
TP42
1 2
+1.2V_ASM
+1.2V_ASM
CN11 L10 ODD@4.7uH_3.2x2.5x1.55 ODD@100K_5%_4
12
PGND
C426 ODD@1u/6.3V_4
10 SATA_TXP0_M2 R175 CB@0_5%_4 SATA_TXP0_RD C421
9 SATA_TXN0_M2 R203 CB@0_5%_4 SATA_TXN0_RD ODD@10u/6.3V_4 R470 ODD@4.7K_5%_4
8 PGND
7 SATA_RXN0_M2 SATA_RXN0_RD +3V_ASM
6
C192 CB@0.01u/50V_4 Close to ASM1153
SATA_RXP0_M2 C198 CB@0.01u/50V_4 SATA_RXP0_RD
49
48
47
46
45
44
43
42
41
40
39
38
37
5 U32
4 SATA_DEVSLP0 C391 ODD@0.1u/16V_4
VDD#3
GPIO1
GPIO0
UART_TX
UART_RX
VCC#2
RST#
GPIO6
EPAD
PGND
HDDPC
LXI
TEST_EN
3 C419 ODD@0.1u/16V_4
2 HDD+M2_PWR
1 C389 ODD@0.1u/16V_4
C398 ODD@0.1u/16V_4 PGND C413 ODD@4.7u/6.3V_4
C414 ODD@0.1u/16V_4
11
GNDA#1
VDDU#1
VCCU#1
VCCU#2
VDDU#2
C405 C390
URXN
SPI_CS0
URXP
UTXN
1 8
UTXP
REXT
ODD@2.2u/10V_4 ODD@1u/6.3V_4
UDM
UDP
R216 *4.7K_5%_4 EN R451 4.7K_5%_4 SPI_CLK 6 CS VCC
SPI_DO 5 CLK
SPI_DI 2 DI 7
DEW1
ODD@ASM1153 C385
13
14
15
16
17
18
19
20
21
22
23
24
DO HOLD
EQ2
EQ1
ODD@0.1u/16V_4
EQ2 DE1 3 4
H - 14dB H - -2dB +3V_ASM +3V_ASM WP GND
+601_VCC X - 0dB X - -4dB ASM_XIN ODD@W25X10CLSNIG
L - 7dB L - 0dB
+1.2V_ASM
2
1
C400
20
19
18
17
16
U12 Y4 ODD@0.1u/16V_4
EQ1 DE2 C395 R449
VCC#2
EQ2
GND#3
EQ1
DEW1
4
3
C185 0.01u/50V_4 SATA_TXN0_C 2 RX1P 15 SATA_TXP0_RD L - 7dB L - 0dB
[3] SATA_TXN0 RX1N TX1P
3 14 SATA_TXN0_RD ASM_XOUT
SATA_RXN0_C GND#1 TX1N
[3] USBP7-
[3] USBP7+
C193 0.01u/50V_4 4 13
[3] SATA_RXN0 SATA_RXP0_C 5 TX2N GND#2 12 SATA_RXN0_RD DEW2
C197 0.01u/50V_4
[3] SATA_RXP0 TX2P RX2N 11 SATA_RXP0_RD H - Long Duration
DEW2 6 RX2P X - NC (Long)
EN 7 DEW2 22 L - Short Duration
DE2 8 EN GND#4 23
DE1 9 DE2 GND#5 24
10 DE1 GND#6 25 DEW1 SW7 - EN
+601_VCC VCC#1 GND#7 H - Long Duration H - Enabled
26
GND#8 X - NC (Long)
L - Short Duration
L - Standby Mode
M.2 PCPIE & SATA SSD (NGF)
SN75LVCP601RTJR
B B
+3V +3V_M2
TPM NPCT650 (TPM) 20mil
R393 *S_4 C339 10u/6.3V_4
C337 0.1u/16V_4
C338 0.1u/16V_4 +1.8V_S5 +3V_M2
R236 *S_4 +3V_S5 C345 0.1u/16V_4
C346 0.1u/16V_4
U4
C217 TPM@10u/6.3V_4 CN5 1 6
76
78
C234 TPM@0.1u/16V_4 C190 TPM@10u/6.3V_4 VCCA VCCB
C201 TPM@0.1u/16V_4 C196 TPM@0.1u/16V_4 1 2
C222 TPM@0.1u/16V_4 3 4 2 5 R93 PSD@10K_5%_4
5 6 GND EO +1.8V_S5
7 8
9 10 TP35 3 4 CLKREQ_SSD#
22
14
11 12 [3] CLK_PCIE_SSD_REQ# A B
8
U14
13 14 PSD@NTS0101GW
VHIO#2
VHIO#1
VDD1
VSB
15 16
17
19
18
20
S5 S0
LPC_LAD3 15 4 TPM_PP 21 22 +3V_M2
[5,17,21] LPC_LAD3 LPC_LAD2 LAD3 PP TP16 23 24
18 3
[5,17,21] LPC_LAD2 LPC_LAD1 LAD2/SPI_IRQ GPX/GPIO2 25 26
21 30
[5,17,21] LPC_LAD1 LPC_LAD0 LAD1/MOSI GPIO1/SCL PCIE_RX1-_SSD_R 27 28
[5,17,21] LPC_LAD0
24 R351 PSD@0_5%_4
LPC_LFRAME# 20 LAD0/MISO 29 [3] PCIE_RX1-_SSD PCIE_RX1+_SSD_R 29 30
[5,17,21] LPC_LFRAME# R333 PSD@0_5%_4 R70 *10K_5%_4
SOC_SERIRQ 27 LFRAME/SCS SDA/GPIO0 6 TPM_BADD [3] PCIE_RX1+_SSD 31 32
[5] SOC_SERIRQ R221 *10K_5%_4
PCLK_TPM 19 SERIRQ GPIO3/BADD 5 C314 PSD@0.01u/50V_4 PCIE_TX1-_SSD_C 33 34 R490 R484
[5] PCLK_TPM LCLK/SCLK TEST [3] PCIE_TX1-_SSD 35 36
C312 PSD@0.01u/50V_4 PCIE_TX1+_SSD_C
[3] PCIE_TX1+_SSD 37 38 SATA_DEVSLP1 [5]
13 2 *PSD@10K_5%_4 *PSD@10K_5%_4
[5,21] CLKRUN# CLKRUN/GPIO04/SINT NC1 SATA_RXP1_R 39 40
17 7 R361 SSD@0_5%_4
[6,12,15,16,17,21] PLTRST# LRESET/SPI_RST/SRESET NC2 [3] SATA_RXP1 SATA_RXN1_R 41 42 CLK_PCIE_SSD_REQ#
28 10 R362 SSD@0_5%_4
LPCPD NC3 11 [3] SATA_RXN1 43 44
NC4 45 46
3
26 12 C325 SSD@0.01u/50V_4 SATA_TXN1_C
NC7 Reserved [3] SATA_TXN1 47 48
31 25 C326 SSD@0.01u/50V_4 SATA_TXP1_C
NC8 NC6 [3] SATA_TXP1 49 50 PLTRST# [6,12,15,16,17,21]
CLKREQ_SSD# CLKREQ_SSD#
GND1
GND2
GND3
GND4
2 5
EPAD
A BADD SELECTION A
0 EEh - EFh R358 PSD@0_5%_4 51 52
[3] PCIE_RX0-_SSD [3] CLK_PCIE_SSDN 53 54
1 7Eh - 7Fh R359 PSD@0_5%_4
[3] PCIE_RX0+_SSD [3] CLK_PCIE_SSDP 55 56 TP34
TPM@NPCT650ABBYX Q36B Q36A
33
9
16
23
32
4
57 58 TP33
[3] PCIE_TX0-_SSD C323 PSD@0.01u/50V_4
3/4 EMI request add 33p near TPM IC '1' - pin is left open. [3] PCIE_TX0+_SSD C324 PSD@0.01u/50V_4 *PSD@SSM6N43FU
'0' - pin is pulled down.
co-layout +3V_M2
CLKRUN#
C233 TPM@33p/50V_4 67 68
[5] NGFF_SATA_DET# 69 70
71 72
R47 73
75
74 Quanta Computer Inc.
77
79
*0_5%_4 NASM0-S6701-TS40
PROJECT : ZAJ
Size Document Number Rev
3A
HDD/ODD/TPM NPCT650/Hole
Date: Thursday, February 23, 2017 Sheet 16 of 34
5 4 3 2 1
5 4 3 2 1
+1.8V_S5 +WL_VDD
2
VCCA
U29
VCCB
6
76
78
CN9 NTS0101GW
76
78
1 2 +WL_VDD
USBP4+ 3 1 2 4
[3] USBP4+ USBP4- 5 3 4 6
[3] USBP4- 7 5 6 8
9 7 8 10
11 9 10 12
13 11 12 14 R489 R483
15 13 14 16
17 15 16 18 *10K_5%_4 *10K_5%_4
19 17 18 20
21 19 20 22
23 21
23
22 [3] PCIE_CLKREQ_WLAN#
S0
3
C
32
S5 2 5 CLKREQ_WLAN# C
33 32 34
PCIE_TX3+_WLAN 35 33 34 36 Q35B Q35A
4
[3] PCIE_TX3+_WLAN PCIE_TX3-_WLAN 37 35 36 38
[3] PCIE_TX3-_WLAN 39 37 38 40 *SSM6N43FU
PCIE_RX3+_WLAN 41 39 40 42
[3] PCIE_RX3+_WLAN PCIE_RX3-_WLAN 43 41 42 44
[3] PCIE_RX3-_WLAN 45 43 44 46 C221 180p/50V_4
CLK_PCIE_WLANP 47 45 46 48
[3] CLK_PCIE_WLANP CLK_PCIE_WLANN 47 48
49 50
[3] CLK_PCIE_WLANN 49 50
51 52
CLKREQ_WLAN# 53 51 52 54 BT_EN PLTRST# [6,12,15,16,21]
53 54 BT_EN [21]
55 56 RF_EN
55 56 RF_EN [21]
57 58
59 57 58 60
61 59 60 62
63 61 62 64
65 63 64 66 LPC_LAD0 [5,16,21]
67 65 66 68 LPC_LAD1 [5,16,21]
B
69 67 68 70 LPC_LAD2 [5,16,21] B
CLK_PCI_LPC 71 69 70 72 LPC_LAD3 [5,16,21]
[5] CLK_PCI_LPC 71 72
[5,16,21] LPC_LFRAME# R464 *DBG@0_5%_4 LPC_LFRAME#_C 73 74
+WL_VDD
75 73 74
75
77
79
APCI0076-P001A
77
79
R163 *S_6
CN14
TPD->100kHz,TS=400Khz
Intel design guide suggestion
MCP PIN 10u.
Per inch 3u TS=3x5inch
18
29
+3V_S5 R263 *S_4
400kHz10~100u =2.4~0.4k. +3V_S5
MX0
1 MX1
MX0 [21] 100Khz 10~100u=9k~1k.
2 MX1 [21]
MX2 C266 C270 C269
3 MX2 [21]
MX3 0.1u/16V_4 0.22u/10V_4 0.1u/16V_4
4 MX3 [21]
MX4
5 MX4 [21]
MX5 R258 R259
D 6 MX6
MX5 [21] 10 mils CN15
D
9
7 MX6 [21]
MX7 10K_5%_4 10K_5%_4
8 MX7 [21]
MY17 +TPVDD
9 MY17 [21] 1
MY16 TPCLK
10 MY16 [21] [21] TPCLK 2
MY15 TPDATA
11 MY15 [21] [21] TPDATA 3 ESD4
MY14
12 MY14 [21] I2C4_SDA_C 4 I2C4_SDA_C I2C4_SCL_C
MY13 1 6
MY13 [21]
2
13 MY12 I2C4_SCL_C 5 2 1 6 5 +TPVDD
14 MY12 [21] 6 TPD_INT# GND VDD TPD_EN
MY11 D28 D27 3 4
15 MY11 [21] [21] TPD_INT# 7 3 4
MY10 *AZ5725-01F.R7G *AZ5725-01F.R7G
16 MY10 [21] [21] TPD_EN 8
MY9 *TVL ST23 04 AD0
MY9 [21]
1
17 MY8
10
18 MY8 [21]
MY7 51653-0080N-001
19 MY7 [21]
MY6
20 MY5
MY6 [21] Touch PAD level shift I2C(TPD)
21 MY5 [21]
MY4
22 MY4 [21] +3V_S5
MY3
23 MY3 [21]
MY2 +3V_S5
24 MY2 [21]
MY1 +1.8V_S5
25 MY1 [21]
MY0
26 MY0 [21]
27 R267 R261
28 R253 33_5%_4
NBSWON# [21]
R268 R264 10K_5%_4 10K_5%_4
30
50584-0280N-V02
5
Q21A 2K_1%_4 2K_1%_4 TPD_INT#
[5] PCH_TPD_INT#
C258
3
180p/50V_4 4 3 I2C4_SCL_C
[5] I2C4_SCL
C Prevent ESD/EOS Layout near connector 2 5 C
2
Q21B Q20B Q20A
4
1 6 I2C4_SDA_C 2N7002KDW
[5] I2C4_SDA
SSM6N43FU
20mil
C352 R222 R229
CB@0.01u/50V_4 R223 R230
EJ@1K_1%_4 EJ@10K_5%_4
EJ@10K_5%_4 *S_4
4 CN10
5
U23 [21] FAN1_RPM
2
+Vs Q16 +5V_FAN1
1
1 3 FAN_PWM_Q 2
2ND_MBDATA [21] FAN_PWM 3
5
[21] 2ND_MBDATA 4
SMBDATA 3 ALERT# EJ@METR3904-G
2ND_MBCLK ALERT# TP39
1
[21] 2ND_MBCLK
6
SMBCLK EJ@50278-00401-V01
C218 C216
B For EMI *EJ@220p/50V_4 *EJ@220p/50V_4
B
GND
CB@G753T11U
2
KBL@10K_5%_4 ACCEL_INT1 10
[5] ACCEL_INTA RES
Q22 to CPU ACCEL_INT1 D7 1 2
GS@RB500V-40 ACCEL_INT1_R 11 15
2 1 2 ACCEL_INT2_R 9 INT1 ADC2
to SATA HDD [16] ACCEL_INT2 INT2
KBL@PJA3413 C242 D8 GS@RB500V-40
6
*GS@22p/50V_4 7
3
CN18 6 SDO/SA0 5
20mil
6
[6] CLK_SDATA
3
KBL@50591-00401-001
Quanta Computer Inc.
PROJECT : ZAJ
Size Document Number Rev
KB/TP/FAN/G-sensor 3A
11
12
R165 *S_4 CN8
C135
trace midth:100 mils *MCM2012B900GBE
R158 0_5%_4
USBPWR1
1
9
StdA_SSTX-
VBUS
C370
3
NC#1
GND#1
8
StdA_SSTX+ USBP0-_R NC#2
1u/6.3V_4 U7 0.1u/16V_4 4
5 3 Shield Shield I/O-2 7 USBP0+_R
IN OCB USB_OC1# [3] USB3_0_RXP_R I/O-5
R157 *S_4 2UB4008-390101F 5
GND#2
10
13
USBPWR1 I/O-3 6 USB3_0_RXN_R
L1 I/O-4
USBON# 4 1 C159 0.1u/16V_4 USB3_0_TXN_C 3 4 USB3_0_TXN_R
[21] USBON# EN GND OUT [3] USB3_0_TXN
C154 0.1u/16V_4 USB3_0_TXP_C 2 1 USB3_0_TXP_R
[3] USB3_0_TXP
11
2 G524B2T11U
*MCM2012B900GBE AZ1065-06F.R7G
C145 C144 C359 R153 *S_4 C161 C155
470p/50V_4 0.1u/16V_4 100u/6.3V_12 *1.6p/50V_4 *1.6p/50V_4
USB protection diodes for ESD.
as close as possible to USB connector pins.
Enable: Low Active /2.5A
GMT:AL000524007
EMS:AL005203001
C278 U18
1u/6.3V_4 5 3 USB_OC1#
IN OCB USBPWR2 ESD5 USBPWR2
1 6
2 1 6 5
USBON# 4 1 3 GND VDD 4
EN GND OUT 3 4
2 G524B2T11U *TVL ST23 04 AD0
C275 C274 C271
470p/50V_4 0.1u/16V_4 *100u/6.3V_12
R272 *S_4
Enable: Low Active /2.5A L7
GMT:AL000524007 2 1 USBP2+_R
[3] USBP2+
EMS:AL005203001 [3] USBP2-
3 4 USBP2-_R
*MCM2012B900GBE
R273 *S_4
USBPWR2
HOLE2 HOLE12 HOLE11 HOLE8 HOLE5 HOLE15 HOLE14 HOLE13
*HG-EJ-AP-1 *HG-C354D220P2 *HG-C354D220P2 *HG-C315D165P2 *HG-Z8P-1 *HG-C354D126P2 *HG-C315D165P2 *HG-TC315BC236D95P2
CN17 7 6 7 6 7 6 7 6 7 6 7 6 7 6 7 6
35
8 5 8 5 8 5 8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4 9 4 9 4 9 4
1
2
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
3
4
5
6
7 +3VPCU
8 PWRLED# [21]
9 SUSLED# [21] HOLE1
[21] SPAD1 SPAD3 SPAD2 SPAD4 SPAD5 SPAD6 HOLE6 HOLE10
10 BATLED0# *H-C236D94P2
[21] *SPAD-C315NP *SPAD-C236NP *SPAD-C236NP *SPAD-C236NP *SPAD-C177NP *SPAD-C177NP
11 BATLED1# *O-EJ-KBL-1 *H-C122D122N
12
13 USBP3+_R
14 USBP3-_R
15
1
1
16
1
17 USBP2+_R
18 USBP2-_R
19
20
21 HOLE9 HOLE3 HOLE7 HOLE4
22 HP_JD# [14] WLAN nut CPU nut CPU nut CPU nut
23
24
25 SLEEVE [14]
26
A 27 A
RING2 [14]
1
28
29
30
31 HP-L3 [14]
32
33 HP-R3 [14]
34
196332-34041-3
ADOGND
PROJECT : ZAJ
Size Document Number Rev
3A
USB/CARDREADER/LED
Date: Thursday, February 23, 2017 Sheet 19 of 34
5 4 3 2 1
5 4 3 2 1
TPC@TPS25810RVCR
C C
+TYPEC_VBUS
trace midth:150 mils +TYPEC_VBUS C343 TPC@0.1u/25V_4
C344 TPC@0.1u/25V_4
1
+TYPEC_VBUS_C Q7 +TYPEC_VBUS
D3 C350 TPC@100p/50V_4
3 C342 TPC@1000p/50V_4
D
5 2 TPC@AZ5725-01F.R7G
2
1
+5V_S5 EMI
G
TPC@AON7401 R97
4
TPC@10K_5%_4
R96 25810_UFP#_G2R94 TPC@100K_5%_4
CN1
TPC@10K_5%_4
C75 Close to connector
3
TPC@0.1u/25V_4
25810_UFP#_G1 2
Q8 C28 TPC@0.1u/16V_4 USB3_1_TXP_CN A2
[3] USB3_1_TXP USB3_1_TXN_CN SSTXp1 +TYPEC_VBUS
B C36 TPC@0.1u/16V_4 A3 A4 C340 TPC@0.47u/25V_6 B
[3] USB3_1_TXN USB3_1_RXP SSTXn1 VBUS#1
3
Amazing:BC104508Z00 *TPC@AUSB0181-P101A
PJT :BC605S8QZ00 Quanta Computer Inc.
INPAQ :BC38109LZ00
PROJECT :ZAJ
Size Document Number Rev
3A
USB_Type C_25810
Date: Thursday, February 23, 2017 Sheet 20 of 34
5 4 3 2 1
5 4 3 2 1
PU/PD (KBC)
EC(KBC)
21
+3V_LDO_EC
1 2 +A3VPCU
L12 BLM15AG121SN1D +3VPCU_ECPLL 1 2 +3VPCU_EC SPIVCC_ON
L4 BLM15AG121SN1D R213 10K_5%_4
C267 (For PLL Power)
+3VPCU_EC and +3V_RTC 0.1u/16V_4 VSTBY_FSPI_R C208 NBSWON# R212 10K_5%_4
VSTBY_FSPI
minimum trace width 12mils. ECAGND R205 2.2_5%_6 0.1u/16V_4
MBCLK R206 4.7K_5%_4
12 mils MBDATA R211 4.7K_5%_4
+3VPCU_EC VccDSW SB_ACDC [6,22] GPC6
+3V_LDO_EC R459 2.2_5%_6 R202 *10K_5%_4
BT_EN TP23
BT_EN [17]
R207 CB@10K_5%_4
C410 C209 C440 C415 C408 C205 C206 PCH_SLP_SUS#
TP25
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 MAINON R480 100K_5%_4
D/C# [22] Prevent ESD/EOS Layout near EC
SUSON R215 100K_5%_4
USBON# [19]
R214 33_5%_4
+3V_EC TPD_EN [18]
D +3V_S5 R248 2.2_5%_6 RSMRST# R210 100K_5%_4 D
EC_TypeC_CHG_HI [20]
C194 EC_PWROK R481 100K_5%_4
CLKRUN# [5,16]
C251 180p/50V_4
[5,16,17] LPC_LAD0 CLR_CMOS
0.1u/16V_4 R254 100K_5%_4
[5,16,17] LPC_LAD1
114
121
106
127
11
26
50
92
74
84
83
82
19
20
99
98
97
96
93
[5,16,17] LPC_LAD2
3
U16 S5_ON R265 10K_5%_4
[5,16,17] LPC_LAD3 10 110 MBCLK
VSTBY#1
VSTBY#2
VSTBY#3
VSTBY#4
VSTBY#5
EGCLK/GPE3
EGCS#/GPE2
VSTBY(PLL)
EGAD/GPE1
L80HLAT/BAO/GPE0
L80LLAT/GPE7
GPH7
ID6/GPH6
ID5/GPH5
ID4/GPH4
ID3/GPH3
CLKRUN#/ID0/GPH0
VCC
AVCC
VSTBY_FSPI
+3V_LDO_EC 9 LAD0/GPM0(3) SMCLK0/GPB3 111 MBCLK [22]
MBDATA
8 LAD1/GPM1(3) SMDAT0/GPB4 115 2ND_MBCLK MBDATA [22]
C425 180p/50V_4 SM BUS +3V
7 LAD2/GPM2(3) SMCLK1/GPC1 116 2ND_MBDATA 2ND_MBCLK [18]
22 LAD3/GPM3(3) SMDAT1/GPC2 117 SLP_S0IX# 2ND_MBDATA [18]
[6,12,15,16,17] PLTRST# 13 LPCRST#/GPD2 PECI/SMCLK2/GPF6(3) 118 TP15
R204 33_5%_4
[5] CLK_PCI_EC 6 LPCCLK/GPM4(3) SMDAT2/PECIRQT#/GPF7(3) LID# [12,13] 2ND_MBCLK R177 CB@4.7K_5%_4
[5,16,17] LPC_LFRAME# LFRAME#/GPM5(3) 2ND_MBDATA
C195 180p/50V_4 Prevent ESD/EOS Layout near EC R176 CB@4.7K_5%_4
PROCHOT_EC 17
LPCPD#/GPE6
1
3
C416
1u/6.3V_4 24 PROCHOT_EC 2
PWM0/GPA0 25 PWRLED# [19]
Q17
PWM1/GPA1 BATLED1# [19]
113
LQFP PWM2/GPA2
28
29 SUSLED# [19]
R233 2N7002K
1
[18] KB_BL_LED CRX0/GPC0 PWM3/GPA3 BATLED0# [19]
123 CIR 30
[6] DNBSWON# CTX0/TMA0/GPB2(3) PWM4/GPA4 31 MAINON [23,24,25,28,29]
100K_5%_4
CLK_PCI_EC PWM5/GPA5
Output for type-c Apling ridge
reset timming"Low " Active PWM
80
[20] EC_TypeC_EN 119 DAC4/DCD0#/GPJ4(3) 47
[6] SUSB# DSR0#/GPG6 TACH0A/GPD6(3) FAN1_RPM [18]
R467 33 48
[6] EC_PWROK 88 GINT/CTS0#/GPD5 TACH1A/TMA1/GPD7(3) TP28
[12] PCH_BLON_EC TS_EN_C 81 PS2DAT1/RTS0#/GPF3 120
*22_5%_4
87 DAC5/RIG0#/GPJ5(3) TMRI0/GPC4(3) 124 SUSON [25]
GPC6
TP22 PS2CLK1/DTR0#/GPF2 TMRI1/GPC6(3)
C 109 C
[5] ME_WR# 108 TXD/SOUT0/GPB1
Pin124 is a board ID for Cloud book (PD) , EC has internal PU for EJ series
C420
*10p/50V_4
[14] AMP_MUTE#
TP26
71
RXD/SIN0/GPB0
107 NBSWON#
NBSWON# [18]
Battery Disable (FSW)
72 ADC5/DCD1#/GPI5(3) PWRSW/GPE4 18
[22] ACIN ADC6/DSR1#/GPI6(3) UART port RI1#/GPD0(3) SUSC# [6]
73 WAKE UP 21 HWPG
[22] TEMP_MBAT# 35 ADC7/CTS1#/GPI7(3) RI2#/GPD1
TP43 RTS1#/GPE5
34
[14] PCBEEP_EC 122 PWM7/RIG1#/GPA7 112
[6] THERMTRIP# AC_Protect DTR1#/SBUSY/GPG1/ID7 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 RSMRST# [6] +3V_RTC +3VPCU
95
[22] AC_Protect CTX1/SOUT1/GPH2/SMDAT3/ID2
94 C449 0.1u/16V_4 R493 10_5%_4 Prevent ESD/EOS Layout near EC
TP18 CRX1/SIN1/SMCLK3/GPH1/ID1
R250 33_5%_4 TS_EN_C PCH_SPI_CLK_EC 105 colsed to EC pin within 100 mils R269 33_5%_4 [22] BI#
[12] TS_EN SPI_CS0#_UR_ME 101 FSCK/GPG7 RF_EN [17]
FSCE#/GPG3
2
1
C256 180p/50V_4 PCH_SPI_SI_EC 102 EXTERNAL SERIAL FLASH ICMNT
PCH_SPI_SO_EC FMOSI/GPG4 ICMNT [22]
103 66 C276 6 R455 R454
FMISO/GPG5 ADC0/GPI0(3) 67 C272 10u/6.3V_4 ECAGND 180p/50V_4 SW2
Prevent ESD/EOS Layout near EC ADC1/GPI1(3)
56 68 *0_5%_4 *0_5%_4
[18] MY16 57 KSO16/SMOSI/GPC3(3) ADC2/GPI2(3) 69
[18] MY17 KSO17/SMISO/GPC5(3) ADC3/GPI3(3) S5_ON [23,28]
32 70 5
[18] FAN_PWM PWM6/SSCK/GPA6 ADC4/GPI4(3) TP27
SPIVCC_ON 100 JTE1CQR +3V_RTC
A/D D/A
3
4
125 SSCE0#/GPG2 R457
SSCE1#/GPG0 SPI ENABLE
76
TACH2/GPJ0(3) VNN_ON [26]
36 77 *10K_5%_4
[18] MY0 KSO0/PD0 GPJ1(3) SYS_HWPG [23]
37 78 R446
[18] MY1 KSO1/PD1 DAC2/TACH0B/GPJ2(3) PANEL_LED_EN [30]
38 79 C402 *0.1u/16V_4 WRST#
[18] MY2 39 KSO2/PD2 DAC3/TACH1B/GPJ3(3) CLR_CMOS [6]
100K_5%_4
[18] MY3 40 KSO3/PD3
3
[18] MY4 KSO4/PD4 2 BI_GATE
41 Q31
[18] MY5 KSO5/PD5
42 KBMX
[18] MY6 43 KSO6/PD6
[18] MY7 KSO7/PD7
3
4
6
44 PJA138K
1
[18] MY8 45 KSO8/ACK# 5
[18] MY9 KSO9/BUSY
46 C384 5 2
[18] MY10 51 KSO10/PE 2 SYS_SHDN#_R R237 *S_4 *0.1u/16V_4
[18] MY11 KSO11/ERR# GPJ7 SYS_SHDN# [23,29]
KSI3/SLIN#
KSI1/AFD#
52 128
KSI0/STB#
KSI2/INIT#
[18] MY13
1
KSO13
VSS#1
VSS#2
VSS#3
VSS#4
VSS#5
54
AVSS
2
1
KSO15 180p/50V_4
IT8987E/CX
SM BUS ARRANGEMENT TABLE
58
59
60
61
62
63
64
65
27
49
91
104
ECAGND 75
12
SM Bus 1 Battery
[18] MX0
[18] MX1
C252 SM Bus 2 Thermal sensor
[18] MX2
0.1u/16V_4
[18] MX3
[18] MX4
2 1 SM Bus 3
[18] MX5
L5 BLM15AG121SN1D
[18] MX6
[18] MX7
SM Bus 4
VSTBY_FSPI
15 mils 20 mils
R443
R450 *S_4 R448 *S_4
Reserve power on switch for test R445 R415
680_LDO 1.8V_LDO
10K_5%_4
(MP remove)
3.3K_5%_4 3.3K_5%_4 R417 1 2 HWPG
[28] HWPG_1.5V
C380 D20 RB500V-40
U28
3.3K_5%_4 0.1u/16V_4 [28] HWPG_1.8V_S5 1 2
SW3 SPI_CS0#_UR_ME 1 8 D18 *RB500V-40
PCH_SPI_CLK_EC 6 CS VCC 680_LDO 1.8V_LDO 1 2
PCH_SPI_SI_EC CLK [25] HWPG_1.35VSUS
5 D15 *RB500V-40
NBSWON# 3 2 PCH_SPI_SO_EC 2 SI 7 SPI_HOLD# U30 1 2
4 1 DO HOLD 20 mils [24] HWPG_1.05V
20 mils D17 *RB500V-40
SPI_WP# 3 4 1 5 1 2
WP GND VIN VOUT [26] IMVP_PWRGD
D16 *RB500V-40
5
A A
*TME-532W-Q-T/R W25Q80BWSSIG 2 1 2
GND [28] HWPG_1.24V_S5
D19 *RB500V-40
SPIVCC_ON 3 4
EN NC
G9090-180T11U C393
C396 1u/6.3V_4
2.2u/10V_4
SP@ socket P/N: DFHS08FS023 only for A-TEST
SPI ROM Vender Size Quanta P/N Vender P/N Quanta Computer Inc.
WND 1M AKE5GGN0N00 W25Q80EWSSIG PROJECT : ZAJ
1.8V 1M Size Document Number Rev
GGD AKE5GZN0Q00 GD25LQ80BSIGR 3A
KBC IT8987E_CX
Date: Thursday, February 23, 2017 Sheet 21 of 34
5 4 3 2 1
5 4 3 2 1
D
3 1 3
4 2 5 3 2 5
3 1 2 1
2 PR45
G
D D
1
1 *S_4
EJ@CI2504P1H02-RB-NH PC190 PR187 24737_ACN PC206 PC49 PR49
4
PC55 PD2 0.1u/50V_6 220K_1%_4 0.1u/50V_6 2200p/50V_4 33K_1%_4
0.1u/50V_6 P4SMAFJ20A
24737_ACP
2
PC37 PC38 PR46
0.1u/50V_6 2200p/50V_6 3 4 *S_4 PC213
2
PR188 PR51 *10u/25V_8
220K_1%_4 2 5 10K_5%_4
D/C# [21]
PD4
VA1 1N4148WS 1 6 PR189
PJ2 *S_4
8
1
recommend 200mA at least. PQ16
IMD2AT108
6
5
3
4 2
3 24737_ACP PQ7
2 2N7002K
1
1
24737_ACN
7
CB@50278-006T1-001
PR71
*S_6 PC46 PC50 PC45
0.1u/50V_6 0.1u/50V_6 0.1u/50V_6
PR67
63.4K_1%_4
+3VPCU
1
+VIN
PR68 PC59
ACP
ACN
11K_1%_4 1u/16V_6
C 24737_ACDET 6 24737_REGN C
100K_5%_4
100K_5%_4
16
*10K_5%_4
0.1u/25V_4
ACDET REGN
PC42
2
PR56
PR63
PR60
1
20_5%_12 PC51 17 24737_BST PQ20
[21] ACIN BTST
0.47u/25V_6 AON7410
5
PC54 D
[6,21] SB_ACDC
0.047u/50V_6 G
PR57 18 24737_DH 4
*0_5%_4 5 HIDRV S
6
ACOK
1
2
3
PU2 19 24707_LX
2 5 PR70 BQ24737RGRR PHASE
*S_4 PR78
MBDATA 8 PL10 0.01_1%_0612
PQ9B PQ9A SDA 6.8uH_7x7x3
1
5
+3VPCU PR76 AON7410 PR69
PR81 *S_4 14 D *4.7_5%_6
PC43 10K_5%_4 GND#1
G
*100p/50V_4 24737_BM# 11 4 PR83 PR82
BM S *S_4 *S_4
PR62 PC61
1
2
3
10K_5%_4 24737_CMPOUT 3 0.1u/25V_4
BAT-V CMPOUT 13 24737_SRP PC52 24737_SRP PC44 PC204 PC201 PC214
SRP PR202 10_5%_6 *680p/50V_6 2200p/50V_4 10u/25V_8 10u/25V_8 *10u/25V_8
B PJ5 24737_ILIM 10 24737_SRN B
10
GND#2
GND#3
GND#4
GND#5
GND#6
6 PR73 100_1%_4 TEMP_MBAT# PC62
5 TEMP_MBAT# [21] IOUT 0.1u/25V_4
4
3 PR201 PR61 SRP/SRN
+3VPCU
7
21
22
23
24
25
2 PR79 1M_5%_4 *100K_5%_4 100K_5%_4
1
Check PU High with HW side
4-Cells Others
9
R2 +1.8V_S5
PR75 PR74
PR200 PC58 bq24707A 0/0 10/7.5
100_1%_4 100_1%_4 100K_1%_4 0.01u/50V_4
50458-00801-V02 PR50
*100K_5%_4
bq24737 10/7.5 10/7.5
3
PR54
24737_BM# 2 51K_1%_4 PR66
MBCLK [21] R1 *0_5%_4 H_PROCHOT# [6,21,26]
PQ10
1
[21] ICMNT
MBDATA [21] *2N7002K
REGN MAX voltage 6.5V
3
1
24737_CMPOUT 2
PQ8
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
PC57 PC56 PC53 2N7002K
*47p/50V_4 *47p/50V_4 100p/50V_4
1
=0.793V for 3.965A current limit
2
PR55
Pin10 ILIM=0.793V
A PD6 PD5 *S_4 Rsr = 0.01ohm A
PDZ5.6B PDZ5.6B
R1 R2
UMA-45W 51K 100K [21] AC_Protect For BATT Only
PC63
4
10u/25V_8
10u/25V_8
0.1u/25V_4
2200p/50V_4
0.1u/25V_4
IN#3 +5VPCU +5VPCU
PC64
PC69
PC65
PC68
LDO=3.3V/100mA 5
IN#4 +3VPCU
7
PR88 10K_1%_4 GND#1
+3VPCU
SYS_HWPG PR87 *S_4 SY8286BPG 9
[21] SYS_HWPG PG JP4 TDC : 5.25A TDC : 2.25A
PR3 100K_1%_4
1 SY8286BBST
PR102 PC88
SY8286BBST_S
*S_3720 PEAK : 7A PEAK : 3A
+VIN
11
EN2
BS PL3 Width : 220mil Width : 100mil
Vih=0.8V *S_6 0.1u/25V_4 2.2uH_7x7x3
PR93 6 SY8286BSW 1 2 +3VPCU_SRC PC177 PC178
499K_1%_4 PR98 LX#1 19 1u/25V_4 1u/25V_4
LX#2
7
20
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
0.1u/16V_4
*22u/6.3V_8
*22u/6.3V_8
150K_1%_4
LX#3 +5V_S5 +5V
PC107
PC123
PC112
PC122
PC121
PC102
PR17
VIN1#1
VIN1#2
VIN2#1
VIN2#2
*4.7_5%_6 Idc=8A
10 PR125
SYS_SHDN# SY8286BEN 12 NC#1 16 *S_4 13
[21,29] SYS_SHDN# EN1 NC#3 14 VOUT1#1 8
PC179 PC181 PC182 PC180
PR4 PC13 10u/6.3V_6 0.1u/16V_4 VOUT1#2 OUT2#1 9 0.1u/16V_4 10u/6.3V_6
*S_4 PC2 *680p/50V_6 OUT2#2
*0.1u/16V_4 PU13
PR173 4 AOZ1331DI 11
+5VPCU VBIAS GND#1
14 SY8286BVOUT *S_4 PC174
OUT 15
15 GND#2 PR174
C
NC#2 0.1u/16V_4 *S_4 C
13 SY8286BFB S5_ON 3 5 MAINON MAINON [21,24,25,28,29]
GND#2
GND#3
GND#4
FF [21,28] S5_ON ON1 ON2
CT1
CT2
PR99 PC84 PR172
1K_1%_4 470p/50V_4 *S_4 PC176 PC175
12
10
SY8286BRAC *0.1u/16V_4 *0.1u/16V_4
8
18
21
Freq=600KHZ
PC183 PC184
1000p/50V_4 1000p/50V_4
680_LDO
PR15 Soft-Start
*S_6
680_LDO SY8286BLDO
+3VPCU +3VPCU
[21] 680_LDO
+5VPCU
+VIN 5 Volt +/- 5% TDC : 0.28A TDC : 3.345A
LDO=5V/100mA PU11
JP7
*S_3720 TDC : 7.5A PEAK : 0.21A PEAK : 4.46A
VL SY8288CRAC
PEAK : 10A Width : 20mil Width : 140mil
2 5VPCU_VIN PC116 PC136
B IN#1 B
VL 15 3 Width : 300mil 1u/25V_4 1u/25V_4
*33u/25V_D6.3H4.5
LDO IN#2
7
4
10u/25V_8
10u/25V_8
2200p/50V_4
0.1u/25V_4
0.1u/25V_4
IN#3 +3V_S5 +3V
PC151
PC152
PC157
PC155
PC154
PC165
5 +
VIN1#1
VIN1#2
VIN2#1
VIN2#2
PC162 IN#4 +5VPCU
4.7u/6.3V_4 7
GND#1
13
SYS_HWPG SY8288CPG 9 PC111 PC115 14 VOUT1#1 8 PC135 PC139
PR157 *S_4 PG JP8 10u/6.3V_6 0.1u/16V_4 VOUT1#2 OUT2#1 9 0.1u/16V_4 10u/6.3V_6
PR169 PC164 *S_3720 OUT2#2
1 SY8288CBST SY8288CBST_S PU7
Vih=0.8V 11 BS 4 11
+VIN PL8 +5VPCU AOZ1331DI
EN2 *S_6 0.1u/25V_4 1.5uH_7x7x3 PR137 *S_4 PC120 VBIAS GND#1
PR158 6 SY8288CSW 1 2 +5VPCU_SRC 15
499K_1%_4 PR162 LX#1 19 GND#2 PR138
LX#2 20
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
0.1u/16V_4
*22u/6.3V_8
*22u/6.3V_8
150K_1%_4 0.1u/16V_4 *S_4
LX#3 S5_ON
PC170
PC169
PC168
PC172
PC173
PC171
PR40 3 5 MAINON
ON1 ON2
CT1
CT2
*4.7_5%_6 Idc=9A
PR136
10 PR171 *S_4 PC117 PC125
12
10
SYS_SHDN# SY8288CEN 12 NC#1 16 *S_4 *0.1u/16V_4 *0.1u/16V_4
EN1 NC#2
PR164 PC33
*S_4 *680p/50V_6
PC32
*0.1u/16V_4 PC119 PC124
14 SY8288CVOUT 1000p/50V_4 1000p/50V_4
OUT
17
A
VCC A
13 SY8288CFB
Soft-Start
GND#2
GND#3
GND#4
FF PR168 PC34
PC163 1K_1%_4 470p/50V_4
2.2u/10V_4
8 1821
24
D [6,12,13,14,19,21,22,23,28] +3VPCU D
[6,7,26] +1.05V
[4,5,6,12,13,14,15,16,17,18,21,23,25,26,28,29] +3V +1.05V
1.05Volt +/- 5%
TDC : 2.025A
PEAK : 2.7A
Width : 100mil
+3V
+1.05V
Z
H
P
C
h
a
n
g
e
+
1
.
0
5
V
_
S
5
t
o
+
1
.
0
5
V
PR144
100K_1%_4 PC148 PR148
C C
PR145 JP5
*S_4 *2200p/50V_4 *2.2_5%_6 *S_3720
8068PG_1.05V PU8 PL5
[21] HWPG_1.05V 1uH_7x7x3
4 1 8068LX_1.05V1 2
POK NC#1 8068FB_1.05V_S
22u/6.3V_6
0.1u/25V_4
+3VPCU 9 2 PR146 *S_4
VIN#1 SW#1
PC147
PC143
PC137
10 3 *22p/50V_4 PR141
JP6 VIN#2 SW#2 7.5K_1%_4
*S_3720 PR147 7 8068NC_1.05V
PC141
R1
10_5%_6 NC#2 *68p/50V_4
8068SVIN_1.05V 8 6 8068FB_1.05V
VCC FB
8068EN_1.05V
0.01u/50V_4
11 5 PR142
GND EN Vo=0.6*(R1+R2)/R2
PC144
*S_4 PR143
PC149 PC142 R2 10K_1%_4
B
10u/6.3V_6 1u/6.3V_4 M5671RE1U PC140 =1.05V B
*0.1u/16V_4
MAINON [21,23,25,28,29]
A A
Quanta Computer Inc.
PROJECT :
Size Document Number Rev
3A
+1.05V (M5671RE1U)
Date: Thursday, February 23, 2017 Sheet 24 of 34
5 4 3 2 1
1 2 3 4 5
+3V
+VIN
+1.35VSUS
+VDDQ_VTT
+5V_S5
[12,22,23,26,27,29,30]
[2,7,10,11]
[10,11]
[6,19,20,23,26,27,30]
25
PR197 +3V [4,5,6,12,13,14,15,16,17,18,21,23,24,26,28,29]
100K_1%_4
PR196
A *S_4 A
[21] HW PG_1.35VSUS
[21] SUSON
PR59
*S_4 PC47 Ilimit=13A
*0.1u/16V_4
+1.35VSUS
PR193
*S_4
PR199
340K_1%_4 +VIN
1.35 Volt +/- 5%
1P35V_PGOOD
[21,23,24,28,29] MAINON Fsw=500KHz TDC : 7.875A
JP9
PEAK : 10.5A
1P35V_CS
1P35V_S3
1P35V_S5
*S_3720
PC41
1P35V_TON
PR194
1.35VSUS_VIN
OCP : 13A
*0.1u/16V_4
Width : 320mil
10u/25V_8
10u/25V_8
0.1u/25V_4
2200p/50V_4
0.1u/25V_4
499K_1%_4
PC192
PC193
PC196
PC191
PC199
10
13
7
9
PQ18 +1.35VSUS
TDC : 0.75A AON7410
S3
S5
PGOOD
TON
CS
5
PEAK : 1A +VDDQ_VTT
D
B
Width : 40mil 20
VTT G B
17 1P35V_UGATE 4
2 UGATE S JP10
PC197 VTTSNS PR195 PC207 *S_3720
1
2
3
10u/6.3V_6 18 1P35V_BOOT
1 BOOT PL9
+VDDQ VTTGND 2.2_5%_6 0.1u/50V_6 1uH_7x7x3
PR48 PU15 16 1P35V_PHASE 1 2 +1.35VSUS_SRC
100_1%_4 RT8231BGQW PHASE
TDC : 0.375A 4 15 1P35V_LGATE
0.1u/16V_4
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
*22u/6.3V_8
*22u/6.3V_8
VTTREF LGATE
5
PEAK : 0.5A PR52
PC208
PC198
PC212
PC211
PC205
PC203
PC194
19 12 1P35V_VDD D *4.7_5%_6 PR190
Width : 20mil PC39 PC195 VLDOIN VDD PR64
+5V_S5
*S_4
*10u/6.3V_6
G
0.1u/16V_4 0.033u/16V_4 *S_4 4
PC202
S
PC210
1
2
3
VDDQ
PGND
PAD
VID
AON7752 *680p/50V_6
FB
+1.35VSUS
3
11
14
21
PR47
*S_4
1P35V_VID
1P35V_FB
PR198 *0_5%_4
R1
PR191
10K_1%_4
VID Ref. Voltage R2 PR192
10K_1%_4
High 0.675V
Low 0.75V
S3 S5 VDDQ VTTREF VTT
OCP=13A
L ripple current S0 1 1 ON ON ON
=(19-1.35)*1.35/(1u*500k*19)
=2.508A S3 (mainon off) 0 1 ON ON OFF
Vtrip=13-(2.508/2)*14.5mohm DDR=1.35V
=170.317mV R1=10K/F_4
D S4/S5 0 0 OFF OFF OFF D
Rlimit=170.317mV/5uA*10=340.63Kohm R2=10K/F_4
+5V_S5
IMVP8 VR Controller
26
PR122 PR27 +VIN
86.6_1%_4 169_1%_4
Rail A(1 phase):+VCCGI
1_1%_6
*S_6
PR24 20_1%_4 ISL95857_SDA
[6] H_CPU_SVIDDAT
D
[6] VR_SVID_ALERT#_VCORE
95.3_1%_4 ISL95857_SCLK
Rail C(1 phase):+VNN D
PR117
PR114
[6] PR123
H_CPU_SVIDCLK
+3V
Check PU High with HW
PR129
10K_1%_4
1u/25V_4
1u/25V_4
63.4K_1%_4
63.4K_1%_4
*S_4 ISL95857_VR_READY
PR18
PR20
PC92
PC95
[21] IMVP_PWRGD PR130
2200p/50V_4 1K_1%_4
ISL95857_PROG1
ISL95857_PROG2
ISL95857_VCC
ISL95857_VIN
Close to
ISL95857_VR_EN
[21] VNN_ON VNN Choke
PR133 *S_4 PR14 332_1%_4 ISUMN_C [27]
PR33
*S_4
2
PR131
Check VR Sequence *10K_1%_4
PR110
41
40
39
38
37
36
35
34
33
32
31
10K_NTC_4_1%
+3V
0.1u/25V_4
0.01u/50V_4
Rail C
VR_HOT#
ALERT#
PROG1
PROG2
VCC
VIN
EP
VR_ENABLE
VR_READY
SCLK
SDA
1
PC6
PC11
PC86 PR100
ISL95857_PSYS 1 30 ISL95857_PWM_C PR112 *S_4 0.047u/16V_4 11K_1%_4
TP30 PSYS PWM_C PWM_C [27]
29 ISL95857_FCCM_C PR108 *S_4
2 FCCM_C FCCM_C [27] PR6
IMON_B 2.61K_1%_4
28 ISL95857_ISUMN_C
C ISUMN_C C
3
NTC_B
4 27 ISUMP_C [27]
COMP_B ISUMP_C
PU6
Double Check Rail B Non-Usage Pin ISL95859AHRTZ-T
RTN_C
26 ISL95857_RTN_C
5 25 ISL95857_FB_C
FB_B FB_C
6
301_1%_4
+5V_S5 RTN_B ISL95857_COMP_C
PR107
24
*2K_1%_4
7 COMP_C
402_1%_4
ISUMP_B
4.02K_1%_4
ISL95857_IMON_C
PR105
PR106
8 23
68p/50V_4
PR132 *S_4
ISUMN_B IMON_C +VNN
127K_1%_4
330p/50V_4
9
ISEN1_B 22 ISL95857_PWM_A
2200p/50V_4
PC3
PWM_A
PC83
10
ISEN2_B ISL95857_FCCM_A
PR13
21
8200p/50V_4
PR95
*680p/50V_4
ISUMN_A
ISUMP_A
PWM1_B
PWM2_B
COMP_A
FCCM_A
FCCM_B
IMON_A
PC10
NTC_A *0.01u/50V_4 100_1%_4
RTN_A
PC9
FB_A
PR11
PC81
PC82
Rail A
11
12
13
14
15
16
17
18
19
20
PR104 *S_4 PR12 *S_4
ISL95857_ISUMN_A
ISL95857_COMP_A
PC4
ISL95857_NTC_A
ISL95857_RTN_A
PC91 PR115
2
0.1u/25V_4
PC89
PR116
10K_NTC_4_1%
0.1u/25V_4
1
PC90
APL VR (1+1 Phase) PC12
0.022u/50V_4
PR19
11K_1%_4
470K_NTC_4_5%
PR22
2.61K_1%_4
+VCCGI +VNN
2K_1%_4
2K_1%_4
27.4K_1%_4
PR113
PR120
PR118
2.55K_1%_4
ISUMP_A [27]
PR23
499_1%_4
Icc Max:21A Icc Max:4.8A
1
330p/50V_4
PC19
PR26
97.6K_1%_4
Vboot:0V Vboot:1.05V
2
PR128
68p/50V_4
8200p/50V_4
1200p/50V_4
PC15
1000p/50V_4 *0.01u/50V_4 PR30
100_1%_4
OCP:25A OCP:8A
PC100
Close to
VCCGI MOS
10K_1%_4
Fsw:750KHZ Fsw:750KHZ
PR31
A PR124 *S_4 A
VCCGI_SENSE [7]
PC18
PC96
PC94
+VIN
+VCC_VCCGI
[12,22,23,25,26,29,30]
[7,26]
30
+VNN [7,26]
+5V_S5 [6,19,20,23,25,26,30]
VCCGI D
JP3
*S_3720
PR1
*S_6
+VCCGI
*33u/25V_D6.3H4.5
+VIN
+5V_S5
10u/25V_8
10u/25V_8
2200p/50V_4
0.1u/50V_6
Icc Max:21A
PC70
PC71
PC73
PC72
PC80
4.7u/6.3V_4
+
PC67
+VCC_VCCGI
Icc TDC:18A
5
PU4 ISL95808HRZ-T PR86 D
*S_6 PQ13
6
VCC BOOT
2 4
G
S
AON6414AL Vboot:0V
PC75
Rail A 0.1u/50V_6
OCP:25A
1
2
3
[26] PWM_A PR84 *S_4 3 1
PWM UGATE
PL4 Fsw:750KHZ
0.15uH_7x7x4
[26] FCCM_A PR90 *S_4 7
FCCM PHASE
8 PHASE_A 1 2 DCR=0.66mOhm +VCC_VCCGI
*330u/2V_7343H1.9
VCCGI L/L:
0.1u/16V_4
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
PR5
GND#2
PC30
PC134
PC105
PC103
PC132
PC108
PC20
4 5 D 2.2_5%_6 +
GND#1 LGATE
PC109
PC129
PQ14
4
G
S
AON6752 R_DC_LL:6mV/A
9
R_AC_LL:6mV/A
1
2
3
C PC1 C
1000p/50V_4
+VCC_VCCGI
PR121 3.65K_1%_6
[26] ISUMP_A
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
*22u/6.3V_8
*22u/6.3V_8
*22u/6.3V_8
PC24
PC99
PC22
PC25
PC21
PC114
PC118
PC131
PC128
PC133
PC130
PC126
PC113
[26] ISUMN_A PR126 *S_6
VNN
JP2
*S_3720
B B
+VIN
PR2
10u/25V_8
10u/25V_8
0.1u/50V_6
2200p/50V_4
*S_6
PC77
PC78
PC76
PC74
+5V_S5
4.7u/10V_6
PC66
+VNN
5
D +VNN
PU3 ISL95808HRZ-T PR92 G PQ11
*S_6 4 AON7410
6
VCC BOOT
2 S Icc Max:4.8A
Rail C
1
2
3
PC79
0.1u/50V_6 Icc TDC:N/A
[26] PWM_C PR85 *S_4 3 1
PWM UGATE
PL2 Vboot:1.05V
0.47uH_7x7x3
PR89 *S_4 7 8 PHASE_C 1 2 DCR=4.2mOhm
[26] FCCM_C FCCM PHASE OCP:8A
0.1u/16V_4
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
5
PC93
PC26
PC110
PC97
PC23
PC106
PC101
PC104
PR16
Fsw:750KHZ
GND#2
4 5 D 2.2_5%_6
GND#1 LGATE PQ12
G
4 AON7752
S
9
1
2
3
PC14
1000p/50V_4
A PR91 3.65K_1%_6 A
[26] ISUMP_C
[6,12,13,14,19,21,22,23,24]
[3,5,6,7,9,15,16,17,18,22]
[7]
[12,13,29]
+3VPCU
+1.8V_S5
+1.24V_S5
+1.8V
[5,6,7,15,16,18,20,21,23]
[23]
[4,5,6,12,13,14,15,16,17,18,21,23,24,25,26,29]
+3V_S5
+5VPCU
+3V
28
[14] +1.5V
+1.8V_S5
1.8Volt +/- 5%
D TDC : 0.514A D
ZHP change +1.8V_S5 PG pull up to +3V_S5 PEAK : 0.685A
+3V_S5 +3VPCU Width : 40mil +1.8V_S5
PR41
*S_6 PC161 +1.8V_S5
4.7u/6.3V_4
PR160
100K_1%_4
3
JP11
4
PR165 *S_3720
*S_4 PL7 MAIND 2 PQ4
VIN
5 3 G5719LX1.8V 1 2 [29] MAIND AO3404
[21] HWPG_1.8V_S5 PG LX 2.2uH_2.5x2.0x1.2
PU12
1
G5719CTB1U
10u/6.3V_6
0.1u/16V_4
*10u/6.3V_6
1 2
[21,23] S5_ON EN GND
PC35
PC36
PC166
PR161 +1.8V
VFB
PR170 *S_4
100K_5%_4 PC167
0.1u/16V_4
TDC : 0.173A
6
R1 PEAK : 0.23A
Width : 20mil
PR166
Check RC delay time with HW 30K_1%_4
(follow ZHP RC dealy time) R2 PR167
15K_1%_4 Vo=(0.6(R1+R2)/R2)
=1.8V
C C
+1.24V_S5
1.24Volt +/- 5%
TDC : 0.975A
PEAK : 1.3A
+3V_S5 +3VPCU Width : 40mil
PR150
*S_6 PC150 +1.24V_S5
4.7u/6.3V_4
PR149
100K_1%_4
JP12
4
PR152 *S_3720
*S_4 PL6
VIN
[21] 5 3 G5719LX1.24V1 2
HWPG_1.24V_S5 PG LX 2.2uH_2.5x2.0x1.2
PU10
G5719CTB1U
HWPG_1.8V_S5
10u/6.3V_6
0.1u/16V_4
*10u/6.3V_6
1 2
EN GND
PC156
PC153
PC159
PR151
VFB
PR163 *S_4
*S_4 PC158
*0.1u/16V_4
6
R1
PR154
Check RC delay time with HW 16K_1%_4
(follow ZHP RC dealy time) R2 PR155
15K_1%_4 Vo=(0.6(R1+R2)/R2)
B =1.24V B
+3VPCU
10u/6.3V_6
0.1u/50V_6
PC187
PC188
PR180
*S_8
+1.5V
PU14
1.5Volt +/- 5%
G9661MF11U TDC : 0.39A
MAINON 3 5
[21,23,24,25,29] MAINON VIN NC PEAK : 0.52A
Width : 20mil
100K_5%_4
*0.1u/50V_6
PR182
PR184
PC189
*S_4 PR181
*S_8
6 +1.5V
VO
2
VEN
+5VPCU 4 8 PC186
VPP GND#1 10u/6.3V_6
ADJ
PR179 1 9
*S_4 PC185 [21] HWPG_1.5V POK GND#2
1u/25V_4 +3V PR183
7
30K_1%_4
PR186 R1
100K_5%_4
A A
0.8V Vo =0.8(1+R1/R2)
=1.506V
PR185
34K_1%_4
R2
Quanta Computer Inc.
PROJECT :
Size Document Number Rev
3A
+1.8V_S5 / +1.24V_S5 / +1.5V
Date: Thursday, February 23, 2017 Sheet 28 of 34
5 4 3 2 1
5 4 3 2 1
[4,5,6,12,13,14,15,16,17,18,21,23,24,25,26,28]
[23]
[12,22,23,25,26,27,30]
[12,13,14,16,18,23]
[12,13,28]
VL
+VIN
+3V
+5V
+1.8V
29
D Thermal Protection D
5
VCC
3 SYS_SHDN#
OT SYS_SHDN# [21,23]
PU9 PR156
PR153 TMP708AIDBVR *S_4
24K_1%_4
1
SET
HYST
GND
C C
Rset(Kohm)=0.0012T*T-0.9308T+96.147
4
=25.69 K ohm HYST=VCC for 10
degree Hys.
HYST=GND for 30
degree Hys.
MAINON_ON_G MAIND
MAIND [28]
3
3
PR37
2 1M_5%_6 2 2 2 2
[21,23,24,25,28] MAINON PC31
PQ5 PQ15 PQ3 PQ1 *2200p/50V_4
2N7002K *2N7002K 2N7002K 2N7002K
1
1
1
PR38
*100K_1%_6
PQ2
DDTC144EUA-7-F
A A
30
Panel Spec (TFT-LCD 14'')
D
VLED : 6V~21V (Tpy:12V) D
+5V_S5
40V, 2A
PR204 PQ22 PU1 VL@TPS61087DRCR
VL@0_5%_8 S VL@AO3415 D PD1
1 3 8 6 61087SW 2 1
IN SW #1
VL@10u/25V_8
VL@10u/25V_8
VL@1u/6.3V_4
C VL@DFLS240-7 C
PC28
PC27
PC29
G
2
PC216 PR205 PR28 *VL@0_5%_4 61087EN 3 7 PR9 R1 PC138 PC127 PC145 PC146
*VL@0.1u/25V_4 VL@100K_1%_4 EN SW #2 *VL@22u/25V_8 *VL@22u/25V_8 VL@22u/25V_8 VL@22u/25V_8
VL@174K_1%_4
61087FREQ 9 2 61087FB
VFB=1.238V
PR29
FREQ FB
VGS=-4.5V
VL@0_5%_4
EPAD#1
EPAD#2
EPAD#3
EPAD#4
EPAD#5
EPAD#6
PR10
PC7 PR25 5 10 61087SS
VL@0.1u/16V_4 PGND SS VL@100K_5%_4
PR207 *VL@0_5%_4
3
VL@0_5%_4
11
12
13
14
15
16
PANEL_LED_EN 2 PQ23 PC16
VL@2N7002K VL@0.1u/25V_4
PC8 Vo =1.238*(1+R1/R2)
VL@820p/50V_4 =12V
1
B B
BL Discharge Circuit
+VIN +12V_Panel
PR209 PR210
VL@1M_5%_6 VL@22_5%_8
PQ24
VL@DDTC144EUA-7-F
3
PR208
3
VL@0_5%_4 PR211
PANEL_LED_EN 2 VL@1M_5%_6 2
A PQ25 A
VL@2N7002K
1
1
PR212
*VL@100K_1%_6 Quanta Computer Inc.
PROJECT : ZAJ
Size Document Number Rev
3A
LED Panel (TPS61087)
Date: Thursday, February 23, 2017 Sheet 30 of 34
5 4 3 2 1
5 4 3 2 1
+VNN
25mil
D D
200 mil
PU3
LAN RTL8411B-CG
55mil +1.35VSUS 40mil U13
RTC
420 mil
PU15 20mil CN13
TPM
5mil U14
105mil +3VPCU LED
310mil 10mil
PU5
Touch Pad
10mil CN15
+3V_S5
EC
70mil PU7
12mil U16
Audio codec
C
10mil U15 C
WIFI
30mil CN9
M.2 SSD
20mil CN5
eMMC
15mil U2
+1.8V_S5 +1.8V
B B
+1.05V
110mil PU8
+1.24V_S5
55mil PU10
+1.5V
20mil PU14
305mil +5VPCU +5V Codec panel boost +5V_FAN1 HDD+M2_PWR +5V_ODD TP_PWR
590mil 240mil PU13 40mil U15 40mil PU1 20mil CN10 60mil CN12 60mil CN16 10mil CN3
PU11
A A
VCCRTC
RTC_RST#
31
VCC_RTC_3P3V power to RTC_TEST# > 9 ms
RTC_TEST#
D D
Adaptor in +3VPCU/+5VPCU
From PWM to EC SYS_HWPG
POWER BUTTON NBSWON#
S5_ON
+5V_S5/+3V_S5
From EC to PWM VNN_ON
+VNN
C
Delay S5_ON (6.34ms) +1.8V_S5 C
10ms
From SOC to EC SUSB#/SUSC#
From EC to PWM SUSON
+1.35VSUS 10ms
MAINON
B B
+1.05V/+1.5V
HWPG_1.5V HWPG >100ms
From PW to MOS MAIND
+1.8V
From EC to SOC EC_PWROK boot up by SVID
+VCC_VCCGI
PLTRST#
A A
32
A A
B B
C C
D D
1.Unstuff SW3
ZAJ REV.D 2.Update SW2 FP to "sw-ds-a40e-4p-smt" by SMT request
02/18 3.Update CN2 FP to "sdcard-156-1001902602-11p-smt" by SMT request
4.Update CN9 FP to "ngff-apci0076-p001a-75p-ke-smt" by SMT request
C C
B B
A A
5 4 3 2 1