Professional Documents
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MINISTRY OF RAILWAYS
Handbook on
Interlocking & Functional Testing
of
Panel, Route Relay & Electronic Interlocking
CAMTECH/S/PROJ/2021-22/SP5/1.0
September 2021
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ii
Handbook on
Interlocking & Functional Testing
of
Panel, Route Relay & Electronic Interlocking
CAMTECH/S/PROJ/2021-22/SP5/1.0
September 2021
iii
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iv
Foreword
Signal interlocking is supposed to be the brain of a signalling system and it is
highly important in terms of safety in train operation. All the commands for the
operation of signalling gears are processed through the complex network of
interlocking. However, safety to the train movements is not ensured unless
safety and integrity checks for signal interlocking are performed, whether it is
Mechanical, Electro-mechanical or Electronic Interlocking. Testing of
Interlocking and correspondence with field gears is crucial during
commissioning of a signalling installation. Hence it becomes essential that
before any signal interlocking is connected to the field gears and commissioned,
it should be tested at every stage to eliminate the possibility of any unsafe
situation arising at a later stage.
I hope that this handbook will guide the S&T engineers of Indian Railways
through the process of performing interlocking and functional tests of signalling
installations. I wish them all the success.
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vi
Preface
Interlocking and Functional testing are mandatory stages before commissioning
as well as after alteration work of a signalling installation. Signal Interlocking if
not tested thoroughly may lead to unsafe conditions. Testing of Interlocking
ensures integrity of wiring as per circuits in PI/RRI and integrity of Application
logic (Software) in Electronic Interlocking. By performing functional testing,
correspondence of actual gears and devices connected with PI/RRI/EI is
physically verified. The basis of all these tests is Selection Table or Control
Table, irrespective of the type of interlocking. Apart from these tests, certain
other tests which are also important for example Negative Test, Square Sheet
Test, One Signal One Train Test etc., should also be performed.
This handbook covers procedures for interlocking and functional testing of PI,
RRI and EI with references to Railway Board and Zonal Railways. As EI
installations are progressively being commissioned on Indian Railways,
guidelines for Factory Acceptance Test (FAT) and Site Acceptance Test (SAT)
for Electronic Interlocking are also added in the handbook.
We are sincerely thankful to Northern Railway, IRISET Secunderabad, M/s
Siemens Rail Automation Pvt. Ltd., Mumbai. and M/s Kyosan India Pvt. Ltd.,
Chennai, who have provided valuable inputs for preparing this handbook. Since
technological upgradation and learning is a continuous process, you may feel
the need for some addition/modification in this handbook. If so, please give
your comments on email address dirsntcamtech@gmail.com or write to us at
Indian Railways Centre for Advanced Maintenance Technology, In front of
Adityaz Hotel, Airport Road, Near DD Nagar, Maharajpur, Gwalior (M.P.)
474005.
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viii
Table of Contents
Foreword ...................................................................................................................................iv
Preface .......................................................................................................................................vi
Table of Contents .................................................................................................................. viii
Issue of correction slips ......................................................................................................... xii
Disclaimer .............................................................................................................................. xiii
Our Objective .........................................................................................................................xiv
CAMTECH Publications ....................................................................................................... xv
List of Figures .........................................................................................................................xvi
List of Tables ....................................................................................................................... xviii
Abbreviations .........................................................................................................................xix
Section I...................................................................................................................................... 1
Interlocking & Functional Testing of Signalling Installation ............................................... 1
1.1 Introduction ............................................................................................................................. 3
1.1.1 Interlocking Test ................................................................................................................... 3
1.1.2 Functional Test...................................................................................................................... 4
1.1.3 Periodical Tests ...................................................................................................................... 4
1.2 Table of Control ........................................................................................................................ 5
Section II .................................................................................................................................. 13
Testing of Panel Interlocking/Route Relay Interlocking ..................................................... 13
2.1 Testing arrangements for PI/RRI ........................................................................................... 15
2.2 Tests carried out during Interlocking testing ......................................................................... 15
2.3 Connecting Simulation Panel ................................................................................................ 17
2.4 Preparations for Testing of Interlocking before commissioning............................................... 19
Section III ................................................................................................................................ 21
Testing of Panel Interlocking/Route Relay Interlocking (Metal to Metal Contact Relays)21
3.1 Introduction ............................................................................................................................. 23
3.2 Procedure for making the Panel functional ............................................................................. 23
3.3 Testing of Main Signal............................................................................................................ 30
3.3.1 Back Locking ...................................................................................................................... 30
3.3.2 Aspect Control, Cascading & Red Lamp Protection .......................................................... 33
3.3.3 Route indicator testing ......................................................................................................... 34
3.3.4 Proving of Points in the Route ............................................................................................ 36
ix
The correction slips to be issued in future for this report will be numbered as follows:
Where “XX” is the serial number of the concerned correction slip (starting from 01
onwards).
CORRECTION SLIPS ISSUED
Table of Contents
xiii
Disclaimer
It is clarified that the information given in this handbook does not
supersede any existing provisions laid down in the Signal
Engineering Manual, Railway Board and RDSO publications. This
document is not statuary and instructions given are for the purpose
of guidance only. If at any point contradiction is observed, then
Signal Engineering Manual, Telecom Engineering Manual,
Railway Board/RDSO guidelines may be referred or prevalent
Zonal Railways instructions may be followed.
xiv
Our Objective
If you have any suggestion & any specific comments, please write to us:
Contact person : Director (Signal & Telecommunication)
Postal Address : Centre for Advanced Maintenance Technology,
Opposite Hotel Adityaz, Near DD Nagar,
Maharajpur, Gwalior (M.P.) Pin Code – 474 005
Table of Contents
xv
CAMTECH Publications
CAMTECH is continuing its efforts in the documentation and up-gradation of information on
maintenance practices of Signalling & Telecom assets. Over the years a large number of
publications on Signalling & Telecom subjects have been prepared in the form of handbooks,
pocket books, pamphlets and video films. These publications have been uploaded on the
internet as well as railnet.
For downloading these publications
On Internet:
Visit www.rdso.indianrailways.gov.in
Go to Directorates → CAMTECH Gwalior → Other Important links → Publications for
download - S&T Engineering
or click on link
https://rdso.indianrailways.gov.in/view_section.jsp?lang=0&id=0,2,17,6313,6321,6326
On Railnet:
Visit RDSO website at 10.100.2.19
Go to Directorates → CAMTECH → Publications → S&T Engineering
Or click on the link
http://10.100.2.19/camtech/Publications/CAMTECH%20Publications%20Online/SntPub.htm
A limited number of publications in hard copy are also available in CAMTECH library which
can be got issued by deputing staff with official letter from controllong officer. The letter
should be addressed to Director (S&T), CAMTECH, Gwalior.
For any further information regarding publications please contact:
Director (S&T) – 0751-2470185 (O)(BSNL)
SSE/Signal - 7024141046 (CUG)
Or
Email at dirsntcamtech@gmail.com
Or
FAX to 0751-2470841 (BSNL)
Or
Write at
Director (S&T)
Indian Railways Centre for Advanced Maintenance Technology,
In front of Hotel Adityaz, Airport Road, Maharajpur,
Gwalior (M.P.) 474005
xvi
List of Figures
Figure 1 : Signal Interlocking Plan ........................................................................................................... 9
Figure 2 : Front Plate Diagram of a Control Cum Indication Panel/VDU .............................................. 10
Figure 3 :Simulation Panel with Lamps & Switches .............................................................................. 18
Figure 4 :Interlocking Test Setup ........................................................................................................... 18
Figure 5 : Bell Test Arrangement........................................................................................................... 19
Figure 6 : Control cum Indication Panel diagram of a 2 line station with Panel Interlocking ............... 31
Figure 7 : Signalling Plan of a 2 line station with Panel Interlocking .................................................... 32
Figure 8 : Aspect Control of 3 Aspect Signals ........................................................................................ 33
Figure 9 : Panel Indications during testing of cascading of a signal ..................................................... 34
Figure 10 : Panel Indication during testing of Red Lamp Protection..................................................... 34
Figure 11 :Panel Indication during Route Indicator Testing .................................................................. 34
Figure 12 : UECR Testing when initially Signal is OFF ........................................................................... 35
Figure 13 : UECR Testing when initially Signal is ON (Cold Start) ......................................................... 35
Figure 14 : Panel Indication for S1 cleared for loop line ....................................................................... 36
Figure 15 : Approach Track dropped for Approach Locking Testing ..................................................... 38
Figure 16 : (i) Track Circuit 4AT dropped with Point Normal. (ii) Track Circuit 4AT dropped with point
operated to Reverse (iii) Track Circuit 4BT dropped with Point Normal (iv) Track Circuit 4BT dropped
with Point operated to Reverse............................................................................................................. 40
Figure 17 : Crank Handle Interlocking Circuit........................................................................................ 47
Figure 18 : Numbering of contacts in switch pedestal of point machine .............................................. 48
Figure 19 : Design & Testing Flowchart for Electronic Interlocking (Courtesy: M/s Kyosan India Pvt.
Ltd.) ....................................................................................................................................................... 69
Figure 20 : A FAT setup (Courtesy: M/s Siemens Rail Automation Pvt. Ltd.) ........................................ 74
Figure 21: K5BMC EI FAT Set up using Interlocking Simulation Software (ISS) (Courtesy: M/s Kyosan
India Pvt. Ltd.) ....................................................................................................................................... 76
Figure 22 : Block Diagram of FAT procedure for Siemens WESTRACE Mark II EI .................................. 77
Figure 23 : Display of Graphical Configuration Sub-System (GCSS) for Siemens WESTRACE EI system 78
Figure 24 : Graphical Simulator (GSIM) for Siemens WESTRACE EI system .......................................... 79
Figure 25 : Operator VDU Screen for Thalwara station (ECR) ............................................................... 81
Figure 26 : Graphical Simulator (GSIM) Tool display for Thalwara Station (ECR)................................. 82
Figure 27 : Various menu for operation available on VDU ................................................................... 83
Figure 28 : CANCEL SIGNAL Menu enabled during SM's Key OFF ......................................................... 88
Figure 29 : All options available when SM's Key ON ............................................................................. 88
Figure 30 : Crank Handle Key Transmit/Receive Menu ......................................................................... 91
Figure 31 : LC Gate Transmit/Receive Menu ......................................................................................... 92
Figure 32 : Soft Counters on VDU Panel ................................................................................................ 92
Figure 33 : Alarm Indication on VDU Panel ........................................................................................... 93
Figure 34 : Emergency Point Operation Menu ...................................................................................... 93
Figure 35 : Confirmation & Authentication for Emergency Point Operation ........................................ 93
Figure 36 : Sudden dropping of Track Circuit in the Route.................................................................... 94
Figure 37 : Emergency Route Cancellation (EUYN) Menu ..................................................................... 94
Figure 38 : Authentication for RRBU Key .............................................................................................. 94
xvii
List of Tables
Table 1: Approach Locking distances ...................................................................................................... 7
Table 2: Table of Control ....................................................................................................................... 11
Table 3 : Contact numbering in Switch Pedestal of Siemens Point Machine ....................................... 48
Table 4 : List of interlocking Logic/Circuit Tests for EI ...................................................................... 69
Table 5: Route Control Chart for Thalwara Station ECR ...................................................................... 84
Table 6 : Cross Sheet ............................................................................................................................ 97
xix
Abbreviations
Abbreviation Description
ADSTE Assistant Signal & Telecom Engineer
CAMTECH Centre for Advanced Maintenance Technology
CCIP Control Cum Indication Panel
CH Crank Handle
CRC Cyclic Redundancy Check
CRS Commissioner of Railway Safety
CT Cable Termination
DSTE Divisional Signal & Telecom Engineer
ECR Lamp Proving Relay
EI Electronic Interlocking
FAT Factory Acceptance Test
FMEA Failure Mode Effective Analysis
ICC Inter Cabin Control
IDF Intermediate Distributory Frame
I/O Input/Output
IRISET Indian Railways Institute of Signal Engineering &
Telecommunications
JE Junior Engineer
LC Level Crossing
LSS Last Stop Signal
MDF Main Distributory Frame
MoM Minutes of Meeting
OEM Original Equipment Manufacturer
OV Overlap
PI Panel Interlocking
RCC Route Control Chart
RDSO Research Designs & Standards Organisation
RRI Route Relay Interlocking
SAT Site Acceptance Test
S&T Signal and Telecommunication
SEM Signal Engineering Manual
SIP Signal Interlocking Plan
SM Station Master
SPI Shunting Permitted Indicator
SSE Senior Section Engineer
STLT Selection Table /Locking Table
TPR Track Proving Relay
TSAA Technical System Application Approval
VDU Visual Display Unit
Note : Relay Nomenclatures have not been included in the above table
Table of Contents
CAMTECH/S/PROJ/2021-22/SP5/1.0 1
Section I
Interlocking & Functional Testing of
Signalling Installation
Contents
Section I- Contents
1.1 Introduction 3
1.1 Introduction
The following tests are performed during commissioning of a new installation or after
making any alteration to the existing installations:
For these tests to be carried out, the points at site are not connected to the new interlocking
control panel since they are frequently required to be operated from the existing
cabin/control. In PI/RRI, the temporary connections are provided on the point groups to
simulate the operation of the point from normal to reverse and vice-versa and detection
without disturbing the existing interlocking.
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Interlocking & Functional Testing of PI/RRI/EI September 2021
CAMTECH/S/PROJ/2021-22/SP5/1.0 4
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CAMTECH/S/PROJ/2021-22/SP5/1.0 5
(b). These tests shall be planned carefully with men, material, Tools, public address system,
Walkie-Talkie Sets, Transport vehicles & other logistics. In a working installation, Non-
interlocking/Disconnection duration shall be reasonable and commensurate with yard
complexity and to be decided in consultation with Operating department and planned
much in advance. All required sanctions/approvals shall be ensured before hand.
(c). Requisite number of staff considered essential for carrying out such tests shall be
mobilized at site, briefed suitably as per planning made and working protocols explained
and deputed to concerned locations with relevant wiring diagrams & Tools. They should
be equipped with requisite tools, meters, portable telephones and/or walkie talkie sets, so
that they are in contact with the official incharge of testing and other testing parties and
take such action as directed.
(d). Complete System Integrity testing shall be initiated only after all the field functions are
connected to the Relay Interlocking/Electronic Interlocking (during Non-
interlocking/Disconnection period in a working installation) and simulation testing is
completed and all errors removed.
(e). Complete tests shall be carried out against approved Selection Table/Control
Table/Route Control Chart. Checks against signalling plans for main signal routes and a
few spot checks of the remaining routes shall also be carried out.
(f). Field Correspondence Tests: Full correspondence of field gears such as aspects of
Signals, Condition of Points, Status of Track circuits, LC gates etc. with that of Control
Panel/Control Terminal/VDU with respective position of knobs, switches, and
indications, must be verified and corrected to obtain 1:1 correspondence, before signing
safety certificate (and ending Non-interlocking/disconnection in a working installation)
and allowing any signalling installation being opened to Train traffic.
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Interlocking & Functional Testing of PI/RRI/EI September 2021
CAMTECH/S/PROJ/2021-22/SP5/1.0 6
Different Railways have different formats for the Selection Table. The columns provided in
selection table and details to be furnished are discussed below.
Column No. 6, 7 &8: Points required Normal, Reverse & Track Circuits free in Route
Column number 6 refers to the Points required to be set and locked in Normal, Column
number 7 refers to the Points required to be set and locked in Reverse and Column
number 8 refers to the track circuits free in Route for clearing a signal.
Column No. 9, 10 &11: Points required Normal, Reverse & Track Circuits free in
Overlap
Column number 9 refers to the Points required to be set and locked in Normal, Column
number 10 refers to the Points required to be set and locked in Reverse and Column
number 11 refers to the track circuits free in Overlap for clearing a signal.
For Main line starter From the berthing track to first control track circuit
of the Home signal, if Points are set to Main Line for
the Home signal otherwise Berthing track. Dead
approach if Main Home is cleared for Main Line.
For LSS (Advanced Starter) Free (No approach locking required as there are no
points ahead of LSS)
Column No. 19 and 20: Occupation & Clearance of Track Circuits for overlap release
Column No. 19 indicates Track Circuits required occupied for release of overlap
automatically after 120 seconds.
Column No. 20 indicates Track Circuits required free for release of overlap
automatically after 120 seconds.
Column Nos. 24, 25, 26 & 27: Signal Aspect Controlled by aspect of Signal ahead
Column No. 24 indicates the aspect of the Signal ahead required to display Yellow with
Route aspect.
Column No. 25 indicates the aspect of the Signal ahead required to display Yellow
aspect.
Column No. 26 indicates the aspect of the Signal ahead required to display Double
Yellow aspect.
Column No. 27 indicates the aspect of the Signal ahead required to display Green aspect.
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Interlocking & Functional Testing of PI/RRI/EI September 2021
CAMTECH/S/PROJ/2021-22/SP5/1.0 9
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Interlocking & Functional Testing of PI/RRI/EI September 2021
CAMTECH/S/PROJ/2021-22/SP5/1.0 10
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Interlocking & Functional Testing of PI/RRI/EI September 2021
CAMTECH/S/PROJ/2021-22/SP5/1.0 11
(Please see Fig. 2: Front plate diagram of a Control Cum Indication Panel/VDU on Page No. 10 above)
SIGNAL REPLACED BY
RELEASED BY OTHER
ROUTE RELEASES CONTROLLED BY
APPROCH LOCK BY
SLOTTED BY GATE
TRACK CIRCUITS
TRACK CIRCUITS
TO DESTINATION
FOULING TRACK
CRANK HANDLE
AFTER
LOCKS ROUTES
BACK LOCK BY
POINT POINT POINT
DOUBLE YELLOW
120 SEC. BY
SIGNAL BUTTON
CONTROLS
SIGNAL No.
TRACK CIRCUIT
TRACK CIRCUIT
ROUTE BUTTON
YELLOW WITH
CIRCUITS
NORMAL
T.CKTS.
CLEARANCE OF
Sr. No.
OCCUPIED BY
YELLOW
REMARKS
GREEN
ROUTE
CIRCUITS
CIRCUITS
TRACK
TRACK
N R N R N R
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
DG CONTROLLED BY S01
S01 S01
2 ID01 S01 - - - - - - - - - - - - - - - - - - - - - - DG WITH POINTS NO. 101N.
HG DG
105N
S0
01T. CH01
3
101BT. 104 BT. . 01T.
DN 101. 104. 02AT. C01-02. RG S03
3 S01 S01 02 - 105T. - 102BT. - - CH03 - DA 101BT. 01T 105T - - - - TIME RELEASE 120 SEC.
MAIN 105 102 02BT SH42-02 /H DG
02AT. 03/05/07T . 105T
G/
02BT CH04
DG
01T.
DN CH01
101BT. 01T.
LOOP . 01AT. C01-01-1. S05
4 S01 S01 01-2 101 105 105T. 104 - 104AT - - - DA 101BT. 01T 105T - - - - - TIME RELEASE 120 SEC.
SET CH03 01BT SH42-02 RG
01AT. 105T
TO BS .
01BT
DN 01T. CH01
104AT.
LOOP 101BT. . 01T. S05
104BT. 01AT. C01-01-1.
5 S01 SET S01 01-1 101 105 105T. 102 104 - - CH03 - DA 101BT. 01T 105T - - RG/ - - - TIME RELEASE 120 SEC.
102BT. 01BT SH42-01-1
TO 01AT. . 105T HG
03/05/07T
MAIN 01BT CH04
01T.
COM 101BT. CH01 01T.
C01-04-1.
MON 101AT. . 101BT.
101. 04BT. 103A C02-03. S07 TIME RELEASE 120 SEC. 'A'
6 S01 LOOP S01 04-2 - 103BT. 106 - 106AT 105 - CH02 - DA 101AT. 01T - - - - -
103 04AT T SH42-02. RG KEY IN
SET 103AT. . 103BT.
SH42-03
TO BS 04BT. CH03 103AT
04AT
01T. CH01
COM
101BT. 106AT. . 01T.
MON
101AT. 106BT. CH02 101BT. S07
LOOP 101. 106. 04BT. 103A C01-04-1. TIME RELEASE 120 SEC. 'A'
7 S01 S01 04-1 - 103BT. - 102AT. 105 - . - DA 101AT. 01T - - RG/ - - -
SET 103 102 04AT T SH42-04-1 KEY IN
103AT. 102BT. CH04 103BT. HG
TO
04BT. 03/05/07T . 103AT
MAIN
04AT CH03
S01-02. S03-
03-07.
C01T CH01 01T. S05-03-07.
DN 101. TIME RELEASE 120 SEC.
8 C01 C01 02 - OCCU - - - - - . - DA 101BT. - - - - - S07-03-07. - - - -
MAIN 105 HG CLEARS AFTER 60 SEC.
PIED CH03 105T SH42-01-1.
SH42-02.
SH42-03.
SIGNAL REPLACED BY
RELEASED BY OTHER
ROUTE RELEASES CONTROLLED BY
APPROCH LOCK BY
SLOTTED BY GATE
TRACK CIRCUITS
TRACK CIRCUITS
TO DESTINATION
FOULING TRACK
CRANK HANDLE
AFTER
LOCKS ROUTES
BACK LOCK BY
POINT POINT POINT
DOUBLE YELLOW
120 SEC. BY
SIGNAL BUTTON
CONTROLS
SIGNAL No.
TRACK CIRCUIT
TRACK CIRCUIT
ROUTE BUTTON
YELLOW WITH
CIRCUITS
NORMAL
T.CKTS.
CLEARANCE OF
Sr. No.
OCCUPIED BY
YELLOW
REMARKS
GREEN
ROUTE
CIRCUITS
CIRCUITS
TRACK
TRACK
N R N R N R
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
SH42-04-1.
SH43-03-07
(104W
SH42-
S01-01-1.
C01T 03. CH01 01T.
DN S05-03-07. TIME RELEASE 120 SEC.
9 C01 C01 01-1 101 105 OCCU - - - SH42- - . - DA 101BT. - - - - - - - - -
LOOP SH42-01-1. HG CLEARS AFTER 60 SEC.
PIED 04-1. CH03 105T
SH42-02
SH43-
03-07)
C02-03.
CH01 01T. C02-04-1.
COM C01T . 101BT. S01-04-01. TIME RELEASE 120 SEC.
101.
10 C01 MON C01 04-1 - OCCU - - - 105 - CH02 - DA 101AT. - - - - - S07-03-07. - - - - HG CLEARS AFTER 60 SEC.
103
LOOP PIED . 103BT. SH42-02. 'A' KEY IN
CH03 103AT SH42-03.
SH42-04-1
02
AT
. S0
104BT.
CH03 02 9
DN 03- 104. 102BT. 104BT. 104 C01-02. S09
11 S03 S03 - - - - - - . - BT - - - - - RG - TIME RELEASE 120 SEC.
MAIN 07 102 03/05/0 102BT BT SH42-02 DG
CH04 . /
7T
S0 DG
1-
02
SH42-01-1.
CONTROLLED BY DN LINE
SH42-02.
DN BLOCK INSTRUMENT 'LINE
14 S09 S09 09 - - 09T - - - - - - - - 09T - - 302 - SH42-03. - - - -
MAIN CLEAR' CONDITION. DN
SH42-04-1.
LINE BPAC CLEAR.
SH43-03-07
S01-01-1.
03/
102BT. CH04 102BT. C01-01-1.
DN SH4 05/ 102
15 SH42 01-1 102 104 104BT. - - - - - . - 104BT. - - - - C01-02. S05- - - - - TIME RELEASE 120 SEC.
LOOP 2 07 BT
104AT CH03 104AT 03-07. S09-
T
09
S01-01-2.
S01-02.
03/ S01-04-2.
CH04 102BT.
DN SH4 102. 102BT. 05/ 102 C01-01-1.
16 SH42 02 - - - - - - . - 104BT. - - - - - - - - TIME RELEASE 120 SEC.
MAIN 2 104 104BT 07 BT C01-02.
CH03 104AT
T C01-04-1.
S03-03-07.
S09-09
Section II
Testing of Panel Interlocking/Route Relay
Interlocking
Section II – Contents
Testing
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Interlocking & Functional Testing of PI/RRI/EI September 2021
CAMTECH/S/PROJ/2021-22/SP5/1.0 15
Points testing
Operation of point circuits.
Locking of points in the run, overlap and isolation.
Proving of points detection in the signal clearance circuits.
Overlap Testing
Proving of overlap (if applicable) in Signal clearance.
Locking Testing
Testing of Signal with conflicting signals mentioned in “Locks Signal”.
General Tests
Simulation of Run through movements on main line and loop lines.
Overlap Timer testing.
Testing of SM’s Key.
Testing of Auto Key.
Testing of Main & Shunt Signal on same post.
Releasing of first sub route after the signal by train on fusing of Red lamp.
Releasing of first sub route by train with ZR relay dropped.
Any other tests considered essential.
(B) BOARD No.2 -To simulate the signals the following bulbs are used as dummy loads for
the ECRs to pick up and also to observe the aspect of the signals during testing.
ON aspect: 110V 40 W, OFF aspect: 110V 25 W, ROUTE aspect: 110V 75 W (Jn. Type
route indicator)
Please see Figure 3 and Figure 4
(C) Wiring simulation panel to the relay room side at Main Distribution Frame (MDF):
Disconnect all the links on outdoor cable termination rack. Wires from the switches are
connected to the relay room side termination. Similarly the wires from simulation panel
Board No.2 consisting of lamps are connected to the relay room side termination. Multi
core 0.6mm dia cable is used for wiring the simulation boards. To reduce the voltage
drop, more conductors are used for supply taken to the test panel and also to the negative
since common return is used.
If more than two wires are drawn to any receptacle/tag block terminal, while soldering itself,
the mistake can be found out. If two wires are drawn in place of one wire or vice versa, it is
not possible to find out the mistake while soldering. This type of faults can be identified
while doing Bell Test. However, if Bell Test is not done correctly, it is quite possible that the
some of the wiring mistakes can still remain. This type of wiring mistakes can be found out
while energizing the circuit, but not all - some mistakes are left unattended which may cause
failure after commissioning of the panel.
The circuit is read by a supervisor giving the particulars of the each end of the wire drawn.
The wireman after verifying the Relay Base receptacle/Tag block terminal shall loudly
announce.
(a) The relay name
(b) The relay location
(c) The number of wires and
(d) The colour of the wires
The supervisor shall compare the circuit with the particulars given by the wireman and satisfy
himself that the wires are drawn correctly. Otherwise, these are to be rectified.
Circuit wise test using simulation panel and as per control table is explained in the following
sections.
Section III
Testing of Panel Interlocking/Route Relay
Interlocking (Metal to Metal Contact
Relays)
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Interlocking & Functional Testing of PI/RRI/EI September 2021
CAMTECH/S/PROJ/2021-22/SP5/1.0 22
3.1 Introduction 23
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CAMTECH/S/PROJ/2021-22/SP5/1.0 23
3.1 Introduction
This section explains the procedure for testing of Panel Interlocking/Route Relay Interlocking
using Metal to Metal contact Relays (Siemens type) with the help of Table of Control. It is
desirable that one should be familiar with the functions of various relays/groups used in the
Siemens Relay Interlocking and have basic knowledge of circuitry to understand the
procedure of functional testing.
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Interlocking & Functional Testing of PI/RRI/EI September 2021
CAMTECH/S/PROJ/2021-22/SP5/1.0 24
4. Now turn the switch to OFF position and check whether TPR & all its repeater relays
drop.
5. Check the Point track down indication on the Point group.
When all the TPRs are picked up insert the fuse for ATR circuit, verify that the ATR relay
picks up.
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Interlocking & Functional Testing of PI/RRI/EI September 2021
CAMTECH/S/PROJ/2021-22/SP5/1.0 25
In this way check that ZDUCR and GZR picks up for all the routes / movements mentioned
in Table.
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Interlocking & Functional Testing of PI/RRI/EI September 2021
CAMTECH/S/PROJ/2021-22/SP5/1.0 26
4. Now concerned DUCR in the Route Group should be picked up and on releasing the
buttons the route should get locked. i.e. U(R)LR should pick up.
5. Check the DUCR and U(R)LR indication on the Route group and Point lock indication on
the Point group.
Repeat one by one for other routes.
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Note:
During panel through process the timers may be looped.(i.e. terminal no 3 & 5 of the timer)
(n) Indications
1. Check the route setting indications on the Indication Panel by lowering the various
signals.
2. One by one make all the tracks down and check the track down indications.
3. Then make the train movement on a set route and check the track down indications.
The following indications are also to be checked:
Normal and Reverse indication of all the Points.(with track UP, Down )
Point Normal & Reverse Steady and Flashing indication.(with detection ON & OFF)
Track UP and Down indication for berthing tracks.
ON and OFF (both steady and flashing) of all the Signals.
Steady and flashing Timer indication.
Steady and flashing indication of Crank Handle, UECR, SPI / F Marker.
Slot indications, Distant Signal indications, G(R)LR indication, etc
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6. One by one make the signals blank and check, after time delay, whether the bell
activates, with the Signal failure indication on the Operating Panel.
7. Acknowledge the alarm by pressing the GXYN button and the bell should mute, but the
signal failure indication will remain until the fault is rectified.
8. Now one by one break the Point detection and check that the WXJR relay drops after the
time delay.
9. On dropping of the WXJR relay the bell should activate and the Point failure indication
should appear on the Operating Panel.
10. Acknowledge the bell by pressing the WXYN button. The bell will mute but the Point
failure indication will remain until the fault is rectified.
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After all the Signals / functions are cleared from the Panel once again clear all the Signals
/function as per the Selection Table / Route Chart.
Now the Panel is ready for Functional Testing.
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Figure 6 : Control cum Indication Panel diagram of a 2 line station with Panel Interlocking
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(Please see Fig. 6: Control Cum Indication Panel diagram of a 2 line station with Panel Interlocking on Page No 31 above)
(Please see Fig. 7: Signalling Plan of a 2 line station with Panel Interlocking on Page No.
32 above)
First clear all the signals and change the aspects of Last Stop Signal and ultimately make it
blank. Check the aspect of all the signals in rear and cascading of signals and it should be
seen that these signal aspects are being changed as per aspect control chart given. Change the
aspects of the signal in rear of the LSS till we reach the First Stop Signal.
In the second step we clear one signal at a time starting from the FSS and again check aspect
control till we reach the LSS. In both steps the Inter Cabin Control (ICC) must be checked as
the signal aspects change each time i.e. correct Inter Cabin Control must be send
corresponding with the aspect of the signal. For example, if the signal is Yellow only HECPR
must be sent to the next cabin.
Cascading of each signal must be checked individually apart from above. While checking
cascading of signal it must be ensured that panel indications correspond to those as given in
approved Interlocking Plan (IP).
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The signal should go to danger and should re-clear with the fuse re-inserted.
It must be checked that all route lamp checking repeater relays (UECPRs) has been picked
up from the concerned signal group’s 60 V fuse.
UECR Testing
I. Take Off the Signal for diversion. UECR is picked up.
II. Remove one Route Indicator Lamp, UECR should remain pickup and signal should
remain OFF
III. Remove 2nd Route Indicator Lamp, UECR should remain pickup and signal should
remain OFF.
IV. Remove 3rd Route Indicator Lamp, UECR should drop and signal should go to
danger.
I. Now with Signal in ON position, Remove one Route Indicator Lamp and take OFF
the signal. UECR should remain pickup with 4 route indicator lamps lit and signal
signal should remain OFF
II. Again put back the signal to ON position. Remove 2nd Route Indicator Lamp and take
OFF the signal. UECR should not pick up with 3 route indicator lamps lit and signal
should not clear.
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While testing signal for diversion, clear the ahead signal for straight route and the rear signal
being tested should display Yellow with route only. This will ensure that the correct ADUCR
and NWKR has been taken in GR3 and GR4 circuits of the rear signal. For example, Home
Signal is being tested for loop line, then Main line Starter should be cleared while testing
home Signal. This is to be tested that the Home Signal should not clear with Green and
Double Yellow with the Route indicator burning.
Now fail point permanently and after few seconds pick it up. The signal should not re-
clear indicating that GR1 has dropped.
For PIs the sub-routes should not get set or released with point failed during Three button
cancellation and for RRIs the sub-routes should get set and released.
The point should be failed by dropping WKR1, in non-RE areas by disconnecting links
on CT rack and in 25 KV RE area by removing external detection supply fuse for the
concerned point.
It must be checked that panel indication corresponds to the point group of point being
failed.
After clearing each signal it must be ensured that concerned points are locked and cannot
be operated from panel.
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before the berthing track has been released. The same must be tested for each OV
(overlap).
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Figure 16 : (i) Track Circuit 4AT dropped with Point Normal. (ii) Track Circuit 4AT
dropped with point operated to Reverse (iii) Track Circuit 4BT dropped with Point Normal
(iv) Track Circuit 4BT dropped with Point operated to Reverse
(ii) Fail the other track circuit with first track circuit of the point/cross over as pick up and
test as above in (i).
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(i) The concerned signals, ‘A’ sign, Calling-on, Shunt Signals must go to danger when
the XCKR of gate is failed.
(ii) It must not be possible to open the gate with subroute or overlap leading over it is set
for any line or when only ‘A’ sign is given with route released, the slot for gate
opening must not go and the signal should not go to danger.
(iii) It must not be possible to open the gate with gate track circuit failed. In many places
this has been done only for signalled movements.
(iv) With chain locking in suburban section the XR relay must drop and all signals must
clear with yellow aspect only. Once chain has been connected it can be released when
slot for gate opening is given.
(v) For motor operated lifting barriers the XCKR limit switches contact must be broken
and it must be ensured that XCKR drops for each barrier. The limit switches must
make only for 85 degree to 90 degree zone. The lever lock Reverse and Normal bands
contacts must be broken for each lever lock to ensure that XCKR and XR relays drop
respectively.
(vi) Testing of road warning bell, pedestrian bell, boom lights and road signals must be
done. Pedestrian warning bell must be tested separately for each line separately by
failing concerned track circuits.
(vii) When gate is open, it must be possible to initiate the route and operation should take
place up to GLSR.
(viii) When ‘A’ sign and ‘AG’ sign are provided, ‘A’ sign should clear with gate closed
and points locked and ‘AG’ sign should clear with gate open i.e. XCKR dropped and
points locked.
(ix) On turning the emergency key if provided with Gateman/ASM, all signals should go
to danger.
For winch operated gates apart from above, on breaking of ‘N’ band of gate lever-lock, the
Gate KLCPR relay must drop in the relay room and if the gate KLCPR holds through ‘NA’
band the same must also be tested. The ‘NR’ coil must get energized only when the slot for
gate opening is given and DR coil only after the KLCPRs, XCKRs/XCKPRs in the relay
room have dropped due to breaking of NA band at site while gate opening.
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(i) With route released by three button cancellation, all points must be locked by ‘A’
sign.
(ii) With route released by three button cancellation, gate must be locked by ‘A’ sign and
it must not be possible to open the gate.
(iii) Fail each point and Gate XCKR, the ‘A’ sign should go to danger i.e. extinguished.
(iv) With route released, the conflicting movements must be locked by ‘A’ sign. The step
(i), (ii) and (iv) must be repeated with ‘A’ sign bulb fused, the points, gate and
conflicting sub-routes must still be locked.
(v) The signal should be repeated automatically when ‘A’ sign working is introduced and
AULR should pick up only when OV track is down.
(vi) Clear the signal and release any sub-route in the path of the signal through EUYN
button, the signal should go to danger. Remove the fuse of this particular sub-route.
Now simulate the train movement by failing track circuits at a time till we reach the
OV track. With OV track down, AULR will pick up and AUZ1UR will be up. Since
the sub-route cannot set due to its fuse being removed, GLSPR will not pick up and
AUZ1UR will remain permanently up. This will cause GNCR1, UNCR1 to drop
making the panel inoperative with NCR indication. The route locking indication of
G(R)LR must start flashing. On pick up of OV track, AUZ1UR must drop and the
panel must again become operative. Also on pressing concerned GN button and
AGGYN button the NCR indication should extinguish due to picking up of AULR.
(vii) It must be possible to clear ‘A’ sign even if main signal above is blank.
(viii) In old installations when ‘A’ sign is cancelled, it remain flashing on panel till the
passage of the train or emergency three button cancellation is done. In new circuits, it
must be possible to cancel ‘A’ sign directly if main signal above is ‘Off’ and by three
button cancellation if the signal above is ‘On’ and by EUYN and GN button if the
signal above is ‘On’.
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When the Point/Crossover is Normal at site, the panel position must show Normal steady
and in the point Group (N) WLR must be up for PI station and (N)WLR1, 2, 3 must be
up for RRI station. In this position for PIs the NWKR relay of the point/crossover must
be picked up and for RRIs the NWKR relay must pick up on route setting. (iii)Similarly
we test for Reverse position of the point/crossover.
It is very important that both points of a crossover are checked at the same time when
testing correspondence i.e. both points must be ‘Normal’ or both points must be
‘Reverse’.
The point/crossover must be operated two or three times and correspondence checked for
both Normal and Reverse positions.
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3.10.6 Break test for points from site for Siemens point Machine
Testing of the first machine of a crossover
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For a left hand cross over the point must fail only when the indication contacts are broken.
The point must not fail when operation contacts and NX contacts are broken.
Note:
After breaking each contact as above, the point fails (except for LH crossover when
operation contacts and NX contacts are broken) and on again making these contacts the
point indication must become steady and WKR1 must pickup.
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Section IV
Testing of Panel Interlocking/Route Relay
Interlocking (Metal to Carbon Contact
Relays)
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Section IV - Contents
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ASR
This is a stick Relay. There are 3 or 4 paths of energisation including stick path. (3 paths
where Dead approach locking is provided and 4 paths where Approach locking is
provided). Stick Relay shall not be energised by the stick feed. It shall be energised by
Approach locking where available or cancellation path where dead approach locking is
available.
It shall be ensured that the ASR relay is energised through all the possible paths in the
back lock portion of the track circuit.
Similar procedure shall be adopted where sectional Route Release is provided to pick up
TRSR and TLSR.
TSR
This is a stick Relay. This Relay also shall not be picked up by stick feed. If all the
ASRs pertaining to TSR are in picked up condition and the respective signal RRs are
de-energised (i.e. knob normal) TSR picks up through TPR front contact of the
controlling track circuit. When one TSR is used for more than one signal, the circuit is
designed in such a way that the TSR does not drop when an unconnected track circuit
fails or drops. The effectiveness of this aspect shall be checked.
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UCR
This relay picks up after reversing of the signal knob and fulfilling certain conditions
like, detecting of the required points, conflicting signals are not taken off , CHLRs
and KLCRs where required are available.
Check up all the parallel paths as per the circuit by setting all routes.
Energisation of UCR drops the concerned ASR.
RR
This relay picks up through UCR front contact and the Reverse band of the signal knob.
This relay is required to re-clear the signal automatically when point detection breaks
momentarily and corresponding UCR also drops.
HR/DR
In addition to the conditions required for energizing UCR, keep all TPRs, TSRs and
LXPR in picked up condition and observe that HR picks up (For diverging route, UGR
picks up first, route lamps are lit on the illumination board, UECR picks up and then HR
picks up).
Check up whether the HG bulb is lit on the illumination board and HECR picked up. In
case of indication transformer, check up whether indication is available on the panel.
Wherever more than one OFF aspect is available for a signal, all the aspects shall be
energised. All panel indications shall be checked up separately from IDF.
JSLR
This relay initiates time delay cancellation circuit and shares the same circuit of the
corresponding ASR. The same JSLR may pick up for different ASRs (in different paths).
This relay is energised when the signal knob is normalized and all signal control Relays
are de-energised, all the back lock tracks are in energised condition and, the concerned
ASR is in the dropped condition, conflicting JSLRs are dropped (i.e. JSLRs sharing same
timer) and cancellation button is pressed.
JSLR picking up is indicated by lighting on the panel.
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NJPR
This relay picks up after 120 sec. after the picking up of JSLR.
JSLR and NJPR front contacts together are used in the cancellation path of the ASR.
When NJPR picks up, the indication on the panel is extinguished.
UYRs
A group of conflicting signals which share the route partially or fully have common set
of UYRs. Conditionally conflicting signals however shall have different UYRs since no
two signals can be taken off within the group.
The signal shall be cleared and the signal knob normalized. Then the train movement is
simulated by dropping and picking up the track circuits sequentially. The required UYRs
shall pick up. While simulating the train movement, both the light engine and long
formation conditions shall be checked.
When there is only one track circuit available to route releasing, in major stations where
shunting is frequently done, use of TPSLR relay is made. This shall also be checked.
Dropping and picking up of track circuit momentarily shall not release the route.
UYRs shall be energised through all the paths provided.
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Check up the correct polarity out going is available on W1 & W2 as shown in circuit
diagram (negative on W1 & positive on W2) and also, supply is available on W3 & W4
(positive on W3 and negative on W4).
In case of reverse to normal operation, positive on W1 and negative on W2 shall be
checked and there is no change in polarity on W3 and W4.
Note:
If the point contactor unit is in relay room, check up its operation and also B110/N110
outgoing is available in the cable termination rack.
Note:
Calling on signal can be taken off even if home signal route is held up.In such cases where
calling on cancellation is done, home signal route also gets released. This operation should be
checked.
(f) Cancellation
Separate ASR is provided for calling on signal.
Whenever calling on signal is taken off, the route has to be cancelled every time whether
train is received on calling on signal or not.
Press the calling on cancellation button (COCAR picks up).
Timer circuit is (240 sec.) triggered with an indication on the panel and after 240 seconds
calling on ASR picks up, thus releasing the route.
Calling on signal ASR also releases the Main signal route, if it is in locked condition.
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4.2 Interlocking Testing using Simulation Panel and as per Control Table
This activity consists of clearing of signals on the simulation panel and carrying out the
following tests (as per table of control).
Negative test
Dead/Approach locking test
Route/back locking test
Sectional Route Release test
Overlap release test
Testing of conflicting signals-Cross Sheet Testing.
All other circuits viz. SM’s key, CHLR, LXPR, KLCPR are proved correctly in the
respective signalling circuits.
Note:
Negative Test and Cross -Test are explained in Section V.
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Example: Main line starter is approach locked by the home signal for main line i.e. when
pass through signals are taken off, normalizing the starter signal does not release the starter
route, though the approach track circuit is clear.
Testing:
Clear the signal. Keep the approach track clear. Put back the signal knob to normal. The
route gets released immediately.
Clear the signal. Drop the approach track circuit. Put back the signal knob to normal.
The route shall not get released. The route is released by cancellation only.
When approach locked by signals, the testing shall be done by taking off the signal in
rear. The route shall not get released when the ahead signal (starter) knob is normalized.
In case of conditional approach locking, the free condition of approach locking shall also
be tested.
Method – II
Take the ASR circuit (any ASR), put through UYRI, UYR2 contacts in ASR circuit and
disconnect the ASR stick circuit. As per the circuit drop the back lock track circuit one
by one and observe the ASR drops and picks up as and when the track circuit has picked
up. This test shall be done for all the conditions.
This test shall be done for all the ASRs, individually check up the parallel paths if any
are defective in back lock circuit. The above method is most suitable for major yards. Do
not forget to remove shorts for UYRI UYR2 contacts after the testing is completed.
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As part of route holding test, attempt shall be made to release the route by cancellation
when back lock track circuit is in dropped condition. It shall not be possible to initiate
cancellation. Note: Apart from the above test the following test is also to be conducted to
check the effectiveness of point locking.
Clear the signal. Observe the points free indication and compare it with the Table of
Control. Attempt shall be made to operate a locked point by operating the point
operating knobs. The point indication shall remain steady.
Do not clear any signal. The point free indication shall be available. Drop the point
controlling track circuits one by one and make attempt to operate the point.
The point indication shall remain steady. In both these cases, observe the WLR relay in
the relay room.
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4.2.5 Checking of SM’s Lock, Crank handle, Level Crossing and Siding Points
Effectiveness of SM’s key shall be checked for all functions (signals, points, crank
handle, siding points level crossing). When SM’s key is out with SM’s control knob
reverse, none of the above functions shall work when the knobs are operated. When
SM’s key is IN with SM’s control knob normal, it shall be possible to operate the
functions. It locks the functions in the last operated conditions.
For checking CHLRs, KLCRs, LXPRs the converse locking has to be checked i.e. when
the signal is taken off, the key cannot be released. If the key is out, the signal cannot be
taken off. For way stations the above testing has to be done for all signals and for every
route. For major yards CHFRs, LXFRs,KLYRs shall be tested, keeping the circuit sheet
and breaking the conditions one by one and observe the relay drop every time when the
condition is broken. Check up all the parallel paths are effective. The following example
is given for testing of crank handle/slot:
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(i). Clear the signal and try to give concerned CHLR / KLCR. CHLR / KLCR
permission should not go and signal should not go to danger. Fail the KLCPR (or
YCR) coming from site the signal should go to danger. On failing CHLR / KLCPR
(or YCR) the CH indication becoming flashing RED.
(ii). Give the slot for concerned KLCR and then try to clear the signal. The route will not
initiate the point will get locked .i.e. LR will drop and the point will not operate. The
panel indication with slot given must be flashing white and with CHLR /KLCR key
Extracted as Flashing Red.
(iii). Give the slot for the concerned CHLR/KLCR, the visual indication at site will lit.
Now extract the key at site and see that the slot cannot be taken back. Insert the key
and take back the slot, now it must not be possible to extract the key at site.
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is done to prevent LSS going back if the block is made to TOL before the train passes
the LSS. This should be checked.
TAR indication and block instrument release from TOL is to be checked. This is
normally done at the time of reconnecting block with panel circuit.
Check up whether main line starter is approach locked by home signal i.e. take off both
home and starter and put back starter signal knob. The starter ASR shall not pick up
unless home signal ASR picks up.
Remove route lamp and observe the home signal assumes ON position.
Individually all the signal lamps have to be removed and check, that ECR drops or NA
transformer does not give sufficient voltage to lit the indication lamp on the panel.
Check up whether all parallel movements are functioning correctly. This is very
important as the wrong contact will be known by this test.
Panel indication for points, signals, crank handle, level crossing and routes in track
picked up and track dropped conditions are to be observed carefully.
Cancellation circuits functioning for all the ASRs to be checked. Proper cancellation
indication shall appear in panel.
By removing the signal lamp of the signal ahead, test the signal in rear does not clear for
the respective line.
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Check that Home signal display green aspect when taken off for main line with main line
starter and advance starter in off position and in this position off aspect of the main line
starter, advance starter, first Distant second distant should be as per Interlocking Plan
and panel indications shall be corresponding to the aspect of the signals.
Check that home signal shows correct route indicator and aspect when taken off for loop
line along with correct aspect of first and second Distant as per aspect chart of
Interlocking Plan and panel indications should be conforming to the aspect of the
signals. Home signal and Distant signals should not change their aspects when main line
starter and advance starter are taken OFF.
Main line starter shall display correct aspect as per interlocking plan with advance starter
not taken off and panel indications correspond to the aspect of the signal.
Operate and check position of each point for Normal and Reverse at site and
corresponding panel indications as per site.
Try to take off advance starter without receiving line clear on the block instrument from
the station in advance. It should not be possible to take off the Advance starter without
obtaining line clear.
Cascading and intra signal cascading should be checked for each signal. When signal is
intended to display DG aspect and the bulb of this DG aspect is removed or fused, signal
should display more restrictive aspect means HG aspect and signal in rear should display
aspect as per aspect control chart of interlocking plan and circuit diagram. When signal
is intended to display HG aspect and the bulb of this HG aspect is removed or fused,
signal should display more restrictive aspect means RG aspect and signal/signals in rear
changes and display aspect as per aspect control chart of I.P. and circuit diagram.
Drop each and every track circuit of the station one at a time shorted by positive and
negative rails of the track circuit with a wire and check corresponding occupied
indication on the panel.
Check that it must not be possible to open any interlocked gate after the signal has been
taken off.
Note:
All the functional tests as mentioned in para 3.10.1 Correspondence Test of Signal, 3.10.2
Correspondence Test of Track Circuit, 3.10.3 Correspondence Test of point, 3.10.4
Correspondence Test of Crank Handle & 3.10.5 Correspondence Test of Level Crossing
Gate Slot of Section III for testing of Relay Interlocking (Metal to Metal Contact Relays) are
applicable for Relay Interlocking (Metal to Carbon Contact Relays) also.
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Section V
Testing of Electronic Interlocking
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Section V _Contents
5.1 Introduction 67
Interlocking/Logic Circuits
Testing)
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5.1 Introduction
(Ref.: Para 21.5.2 of Signal Engineering Manual Version 3.0 June 2021)
For Electronic Interlocking, the integrity of interlocking inside E.I designed for a specific
station can be tested at factory which is termed as Factory Acceptance Test (FAT). When the
interlocking is installed at site and interface wiring is connected, the test carried out as laid
down for relay interlocking, is known as Site Acceptance Test (SAT).
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(II) When the existing ports (I/O and communication) are disturbed, the following tests
besides FAT and any other tests as required are to be done;
(i) I/O port correspondence check between Application logic and Interface circuits.
(ii) Logic and interlocking testing Control Table to the extent as decided by the Zonal
Railway.
(iii) Interface and Equipment functional Test:
Correspondence test (new additions)
Intercommunication test between sub-racks (if any new addition)
Note:
(i). FAT should preferably be conducted at factory premises. However, FAT can also be
done at railway premises at central location but not at the site. For this, the setup should
be made by all the Zonal Railways.
(ii). FAT & SAT should be done by separate officials where ever feasible.
(a) Version of the Generic System software and hardware shall be approved and controlled
by authority competent to approve the Electronic Interlocking system and its
specifications.
(b) Version and checksum of the Application logic (station specific logic) shall be unique
for the installation and shall be approved by the authority competent to approve the
circuit diagrams. Corresponding Checksum shall be recorded and controlled by the
same authority.
(c) Version number and Checksum shall change whenever any modifications are carried
out to the Application logic (site specific logic).
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Figure 19 : Design & Testing Flowchart for Electronic Interlocking (Courtesy: M/s
Kyosan India Pvt. Ltd.)
As per the existing practice, Testing of Electronic Interlocking is done with Selection Table
during FAT/SAT. There are number of tests which are also important and should be done
along with selection table test. The following Interlocking Logic/Circuits tests and
certifications given in Table 4 are to be completed for each and every station before
commissioning:
Table 4 : List of interlocking Logic/Circuit Tests for EI
Sr. Test Type Description
No.
2 One signal one train test After signal is cleared, first control track circuit is
dropped and picked up. Signal shall change to red
and remain in danger even after first control track
circuit is picked up again
3 Route release test for light After clearing the signal, tracks are dropped to
simulate light engine movement. Route release
4 Route release test for long train After clearing the signal, tracks are dropped to
movement simulate long train movement. Route release relays
operation as specified in STLT at each stage is
checked.
5 Route holding test All route releasing conditions are fulfilled except
the picking up of route holding track and route
locking is observed
7 Red lamp protection test When signal is cleared and red aspect of signal in
ahead becomes unavailable. Previous signal shall
change to danger.
8 Signal lamp cascading test After signal clearance, each OFF aspect supply is
cutoff. Signal shall change to more restrictive
aspect.
9 Signal aspect sequence control After clearing all signals for a line, each aspect of a
signal starting from advanced starter is brought
down to next restrictive aspect. Change of aspect of
signals in rear are observed as per STLT/Aspect
Control Chart
10 Track locking test for points Each controlling track is dropped and attempt is
made for operating the point. It shall not operate.
11 Crank handle locking test Attempt is made to transfer the control of each
crank handle locked by the signal when the signal
is cleared. It is expected that the CH Control is not
transferred. Test should also be done to check
releasing of CH when point control is not available
and/or TC is failed. It should be possible.
15 Point Operation through Route All the controlling points in a route are set opposite
Test to the required condition. Now route is initiated and
operation of Points to the required Position and
setting and locking of Route are checked.
16 Timers Test All Timers are first set to their original value. After
setting a Route, Cancellation is applied and the
time to release of Route is observed. This test is
17 Square sheet Test A route is set and every other route is attempted to
check whether it is locked I free. This is repeated
for all the routes.
18 Route Checking Test When all Non control Functions (Tracks, Points,
Crank Handles, Gates indications) are dropped. It is
expected that the Signal Status remains intact.
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(vi). It is carried out only through VDU panel, whereas Site Acceptance Test (SAT) is
carried out through CCIP and VDU panels, if both the options are available at site.
(vii). During FAT, Timers in Application logic are modified for the FAT testing for Timer
values used for signal, point, overlap and cancellation are reduced from 120 seconds to
12 seconds to speed up the testing. It is essential that the original values of timers are
reinstated and validated at the completion of testing.
(viii). In FAT setup, the I/O boards are not physically present and the same are simulated
using the test setup. Therefore, field inputs and outputs delivered by Input and Output
card will be disabled and will be directly delivered into simulation VDU. However this
will not affect the interlocking part of the application logic.
(ix). To carry out FAT, the following inputs are required:
Signal Interlocking Plan (SIP)
Route Control Chart (RCC).
Control cum Indication Panel Diagram.
Cross Table/Square sheet.
Station Interlocking Application Software files as designed (example in case of
MicrolokII, .ML2, .MLL, .MLP).
(x). After carrying out FAT, the following are the outputs:
Station Interlocking Application Software files as tested (example in case of
MicrolokII.ML2, .MLL, .MLP).
Total Management System (TMS) Forms.
FAT Certificate.
When Railways/Customer testing is completed, the Check sum and CRC values of the FAT
simulated application logic will be recorded as per the Application Logic and it is to be
jointly signed by OEM and Railways representative.
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Figure 20 : A FAT setup (Courtesy: M/s Siemens Rail Automation Pvt. Ltd.)
The two VDUs on top display the yard diagram (A & B). Whatever conditions are
simulated on simulator, are displayed on these VDUs.
In the bottom there are three windows.
Middle window (C) is the Simulator through which all the signalled movements are
simulated and interlocking between various functions is tested as per the Selection Table.
The window on bottom right (D) is the Table of Control or Selection Table.
The window on bottom left (E) is for the analysis of logics in case any criterion is not
met as per the selection table. In this window, logics can be opened in rung states for
analysis. A rung state can be taken to see the status of a particular logic whether it is in
high or low state (on or off).
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Whatever deviations/observations are made during FAT, are logged into a separate PC for
discussion. These observations are required to be tested again and finalized. Results of the
test are observed and documented in a Test Report. Documents supporting FAT are signed
jointly by Railway official and OEM representative. Sometimes these are signed without any
comments indicating that there is no discrepancy. Sometimes there may be open comments
which require further discussion. In case if these are within the purview of testing officials,
then they are sorted out at the location of FAT, implemented and tested. However,
sometimes the comments require discussion with headquarter in reference to Railway Board
or RDSO circulars or CRS's previous noting etc. In this case the decision is made by the
headquarter after discussion or alternative solutions if any are given and the comments are
closed. These solutions are either implemented in the software and again tested in FAT stage
or kept reserved for implementation in future projects as decided by the headquarter and
recorded in the minutes of meeting.
Prerequisites
The designing of PI/RRI/EI circuits is based Signal Interlocking Plan (SIP) and Route
Control Chart (RCC) or Selection table, hence these are the essentially required for FAT.
Objectives
To check whether the VDU is displaying the yard and functions correctly.
To verify that all inputs from SIP captured in VDU.
To verify that indications are as per Operators’ Jurisdiction.
To verify that additional info/ indications/ Alarm are as prescribed by RDSO / Railway
circulars
To test the interlocking software through:
RCC, Square Sheet & Negative Testing
Any other tests preferred by Railways.
Retesting Defects/Observations/Improvements
The Factory Acceptance Test ensures that station interlocking system fulfils the station
control table requirements and if any false inputs/information is received, it can be corrected
at software level. FAT is carried out through simulation set up at factory with all
field inputs simulated. Performing FAT for each station interlocking at factory before
delivering to site minimizes the site error and reduces the correction at site. Each entry in the
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Selection Table is to be tested during FAT. All the software versions are tested. If required,
previous version can be loaded and tested for discrepancies.
Figure 21: K5BMC EI FAT Set up using Interlocking Simulation Software (ISS)
(Courtesy: M/s Kyosan India Pvt. Ltd.)
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2. Signal, Track, Points and Train conditions are simulated over simulation module and
tested in reference to Selection Table without any field gears, relay racks or any other
wiring connected externally. A front view of Graphical Simulator (GSIM) for Siemens
WESTRACE EI system is shown in Figure 24 It has following features:
It is a PC tool used for offline simulation of WESTRACE MKII.
It is used to test the WESTRACE installation logic using graphical on-screen
computer simulations of railway Signalling systems.
It can be connected with other WESTRACE software in order to test an interlocking
system without using WESTRACE hardware.
After testing, the software is validated and it becomes compiled or Application Software. It is
signed by the testers both from railways as well as OEM with changes in control table,
changes in logics, differences in first and final version and all logs closed. Application
software becomes Application data and it is sent to Installation Check System (ICS) for
further processing.
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3. Application data is sent for uploading in hardware through Installation Check System
(ICS). A front view of Installation Check System (ICS) for Siemens WESTRACE EI
system is given below. It has following functions:
It uploads application data to a WESTRACE PM.
It downloads and decompiles application data from a WESTRACE PM.
It compares the downloaded or retrieved application data with the original, approved
application data.
It generates an Installation Check Report.
4. Application data is loaded in the hardware (here Processor Module of WESTRACE
Mark II).
5. Application data loaded in the hardware is downloaded in the ICS for comparison with
the original data. After comparison, the ICS gives the controlled version of software.
The hardware is then sent to field for Site Acceptance Test (SAT).
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FAT Setup
Tester- in-Charge is responsible to set up for FAT according to the specific requirements of
the station. The following inputs and equipments are required to set up the FAT:
Station circuits (Hard copy & Read-only soft copy)
Station SIP
Station Route Control Chart (RCC)
Station Control cum indication panel diagram
Cross tables
Operator VDU Screen
Simulator Tool or Simulation Panel
Power supply Equipments (Converters, Cable Extension Cards)
Simulation Panel
The simulation panel consists of toggle switches to simulate the track and point detection
conditions and lamp proving detection. All I/O bits are simulated through PC via serial
communication between PC and the interlocking software. Any additional requirements such
as block, IBH, Crank Handle, Level Crossing and Axle Counters pertaining to indications are
simulated according to the requirements of station layout by switches. The simulation
system is used to operate control bits in order to set/cancel routes, set
points and give releases. It will also provide make and break controls to the Field Equipment
Simulation system e.g. Clear/Occupy track circuits, make/break point detection, make/break
lamp proving etc.
We shall take the example of testing with Graphical Simulator (GSIM) tool for Siemens
WESTRACE EI (Figure 26). In GSIM tool, WESTRACE software is used without any
hardware and all the inputs coming from the field can be toggled and simulated on the
Operator VDU (Figure 25) through this tool. Double clicking the input on Simulator with
mouse will drop it and single clicking it will pick up it. Menu for all the operations like point
operation, transmission of LC Gate control, route setting, signal clearance, route cancellation
etc. are available on the operator VDU screen.
(Please see Fig. 25 : Operator VDU Screen for Thalwara Station (ECR) on Page No. 81 above)
Figure 26 : Graphical Simulator (GSIM) Tool display for Thalwara Station (ECR)
{Please see Fig. 26 : Graphical Simulator (GSIM) Tool display for Thalwara Station (ECR) on Page No. 82 above}
(Please See Fig. 27 : Various Menu for operation available on VDU on Page No. 83 above). Go to Para: 5.5.7 Proving of Points in the Route, 5.5.8 Proving of Tracks
in the Route , 5.5.9 One Signal One Train Test, 5.5.10 Sequential Route Release Test, 5.5.11 Manual Route Cancellation Test, 5.5.12 Crank Handle Interlocking Test,
5.5.13 LC Gate Control Test, 5.5.18 Super Emergency Route Release, 5.7 Testing of Conflicting Signals (Cross Sheet Testing)
SIGNAL REPLACED BY
REQUIRES/ BACK RELEASES SIGNAL / No.
ED REQUIR RELEASED BY KEY 'IN' OF
CONTROLLED BY
Sr No. OF ROUTE
TRACK CCT.
POINTS AFTER
SIG No.
Sr. No.
BY TRACK CCT.
UNTILL TRACK
DESTINATION
OCCUPATION
FROM
CLEARANCE
CCT. CLEAR
HANDLE CONTRO CONTRO
ENTRANCE
OCCUPIED
TO
L L
O
OF
OF
OFF N R
N
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
1 1 1 3 S1 D3 1A 3 3 51,52, -- SIG 1T, 2T, 1T, 1T 1T, 03T, 52T CH1, -- G-31 2, C1, 103, OVERLAP 1A
58,60 OFF 02T, 2T, 2T, OR CH2, 203, 202, SET
51BT, 02T, 02T, 03T CH8, 206 TOWARDS
52T, 51BT, 51BT, 1, CH10
M/L
03T2 52T 52T, OR
03T2, 03T
03T1, 2
03T,
3T,
60BT,
011T
2 2 1 3 C1 D3 C1A 3 -- 51,52 -- SIG 1T, 2T, 1T, 1T 1T -- -- CH1, CH2 -- -- 1,2,3,5,7,11, CLEARS C1A
OFF 02T, 2T, 103,105,107 AFTER 60
51BT, 02T, ,203,205, SECS.
52T, 51BT,
202,206 OCCUPATIO
03T2 52T
N OF C1T
3 3 1 5 S1 D5A S1B 5 -- 51,58 52 SIG 1T, 2T, 1T, 1T 1T, 05T 52T CH1, -- -- C1, 2, 203, OVERLAP 1B
OFF 02T, 2T, 2T, OR CH2, 204, 206L2 SET
51BT, 02T, 02T, 05T CH8 TOWARDS
SIGNAL REPLACED BY
REQUIRES/ BACK RELEASES SIGNAL / No.
ED REQUIR RELEASED BY KEY 'IN' OF
CONTROLLED BY
Sr No. OF ROUTE
TRACK CCT.
POINTS AFTER
SIG No.
Sr. No.
BY TRACK CCT.
UNTILL TRACK
DESTINATION
OCCUPATION
FROM
CLEARANCE
CCT. CLEAR
HANDLE CONTRO CONTRO
ENTRANCE
OCCUPIED
TO
L L
O
OF
OF
OFF N R
N
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
5 5 3 11 S3 D11 3 11 11 58, 60 -- SIG 3T, 3T, 3T 3T, -- -- CH8, -- G-31 C1A, 103, 5 SECS. TIME 3
OFF 60BT, 60BT 60BT, CH10 203L2, 202, DELAY
011T 011T 206 PROVIDED
IN 3HR
CIRCUIT
6 6 103 11 SH D11 103 11 -- 58, 60 -- SIG 3T, 3T, 3T 3T, -- -- CH8, -- G-31 1A, C1A, 3, 5 SECS. TIME 103
10 OFF 60BT, 60BT 60BT CH10 11, 202, 206 DELAY
3 011T PROVIDED
IN 103HR
SIGNAL REPLACED BY
REQUIRES/ BACK RELEASES SIGNAL / No.
ED REQUIR RELEASED BY KEY 'IN' OF
CONTROLLED BY
Sr No. OF ROUTE
TRACK CCT.
POINTS AFTER
SIG No.
Sr. No.
BY TRACK CCT.
UNTILL TRACK
DESTINATION
OCCUPATION
FROM
CLEARANCE
CCT. CLEAR
HANDLE CONTRO CONTRO
ENTRANCE
OCCUPIED
TO
L L
O
OF
OF
OFF N R
N
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
CIRCUIT
7 7 202 2 SH D2 SH 1, -- 51, 52 -- SIG 52T, 52T, 52T 52T, -- -- CH1, CH2 -- -- 1, C-1, 2, 3, 1RECR PICK SH202
20 202 2 OFF 51BT, 51BT 51BT 103, 203L2 UP
2 02T
8 8 203 3 20 D3 203 3 -- 51, 52 -- SIG 51BT, 51BT, 51B 51BT, -- -- CH1, CH2 -- -- 1, C1, 3, 5, 1RECR PICK SH203
3 L2 OFF 52T, 52T T 52T 7, 11, 2, UP L2
03T2 202, 206L2
9 9 206 202 20 D20 206 20 202 58, 60 -- SIG 60BT, 60BT, 60B 60BT, -- -- CH8, -- G-31 1, C1, 3, 4, 1RECR PICK SH206
6 2 L2 2 OFF 3T, 3T T 3T CH10 6, 11, 12A- UP L2
03T ALT, 103,
203L2, 2,
12B-ALT
10 10 5 11 S5 D11 5 -- 11 60 58 SIG 5T, 3T, 5T, 5T 5T, -- -- CH8, -- G-31 C1A, C1B, -- S5
OFF 60BT, 3T, 3T, CH10 105, 203L1,
011T 60BT 60BT, 203L2, 204,
011T
206L1
Go to Para: 5.5.7 Proving of Points in the Route, 5.5.8 Proving of Tracks in the Route , 5.5.9 One Signal One Train Test, 5.5.10 Sequential Route Release Test, 5.5.11
Manual Route Cancellation Test, 5.5.12 Crank Handle Interlocking Test, 5.5.13 LC Gate Control Test, 5.5.18 Super Emergency Route Release, 5.7 Testing of
Conflicting Signals (Cross Sheet Testing)
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5.5 Test Procedure for FAT
5.5.1 Power On
Power On test includes extending power to Operator VDU, Simulation Panel and other PCs.
Procedure:
In reference to Figure 25, set the route as above for UP Main Home S1A to S3 with
overlap set towards UP mainline and clear the signal.
Drop the tracks one by one given in the column “Back locked - By Track Circuit
Occupied” in Selection Table (Table 5) i.e. drop 1T, 2T, 02T, 51BT, 52T, 03T2
sequentially.
Now pick up the track circuits one by one given in the column “Back locked – Until
Track Circuit Clear” in Selection Table (Table 5) i.e. pick up 1T, 2T, 02T, 51BT, 52T,
sequentially keeping the berthing track 03T2 down.
Ensure that the route gets released automatically with sequential occupation and clearance
of track circuits in route even when the berthing track is in occupied condition.
The above test is applicable for a long train. For Route release test for a Light Engine
movement, simulate the conditions by dropping ahead track circuit followed by picking
up track circuit immediately behind it sequentially. For example for the above route
follow th sequence as give below:
1T↓, 2T↓, 1T↑, 02T↓, 2T↑, 51B↓, 02T↑,52T↓, 51BT↑,032T↓
In this case also the route should get released.
While doing emergency point operation through the menu option, it will ask for
confirmation.
On confirming, it will ask for username and password. On entering username and
password and submitting the point will be thrown to the other position.
S1B P P X √ √ P X √ √
C1A X P X X X X X X X
S2 X X X √ √ X X X √
S3 √ √ X √ X X X X P
SH103 X √ X √ X X √ X P
SH202 X X X X X X X √ √
SH203 X X X X X √ X X X
SH206 X X X X X X √ X P
S5 √ √ X √ P P √ X P
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5.8 Documentation of FAT
The record of Factory Acceptance Test (FAT) shall be kept in following documents to enable
railways in referring at a later date if required:
References
This shall consist of references of Signal Interlocking Plan, Route Control Chart and actions
taken by OEM along with signatures of OEM and Railway representative.
A sample of MoM is given in Figure 41
Log
The record of following events are kept in the log:
How many versions are tested?
Deviations as per the minutes of meeting recorded.
Detailed log of observations.
Rounds of testing
A sample record of logs is given in Figure 42 & Figure 43
Note:
FAT process is not complete until all observations are closed mutually between OEM and
Railway representative. Observations are to be either closed or some open comments should
be recorded. If these are not closed then they become open ended comments and
changes/deviations if any required are to be resolved and approved at a next (higher) level by
competent authority before Site Acceptance Test (SAT).
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(Please see Fig. 42 : A sample record of logs 1 on Page No. 103 above)
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(Please see Fig. 45: A Sample Control table Checked & Signed on Page No. 106 above)
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Insulation resistance test
Earthing test
Power On
VCOR
Communication testing
Correspondence Test
System Integrity Test
Interlocking testing
Change over test
I. Testing of Electronic Interlocking at site with E.I. hardware and simulation panel.
II. Testing of the outdoor gears, viz., points, signals, track circuits, LC gates etc.
SAT for EI should be done first from panel and thereafter from VDU.
SAT certificate should be signed only after testing has been completed both from panel
and VDU.
If dual VDU is provided, then SAT to be done with each VDU separately.
SAT certificate should be jointly signed by OEM and Railways. SAT certificate should
mention Check-sum as well as CRC code of the final interlocking logic loaded in EI on
which station will be commissioned. This certificate should also mention the
changes made after the FAT.
Above tests may be under taken using data logger also.
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Minutes of meeting (MoM) of FAT for any special instructions
EI Hardware & Relay rack arrangements
Field simulation Panel along with VDU (dual)
Monitoring software and tools availability
NI & Transition plan for commissioning
Objectives
To test VDU with redundancy (Automatic Changeover)
To test Interlocking with RCC
To test field correspondence with Field Simulation Panel
To test Crank Handle, LC Gate, Block working, etc.
Failure Mode Effective Analysis (FMEA)
OEM checklist documentation
Technical System Application Approval (TSAA) documentation
Monitoring Systems –Diagnostic Tool & Datalogger
Preparation for EI commissioning
Figure 49 : A Site Acceptance Test Setup (Courtesy: M/s Kyosan India Pvt. Ltd.)
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5.9.2 Interlocking Testing
The interlocking testing shall cover all the tests which are done for Panel or Route relay
Interlocking and during FAT, with the help of Simulation Panel connected to EI Hardware
and Control Table, namely:
Back Locking
Aspect Control, Cascading & Red Lamp Protection
Route indicator testing
Proving of Points in the Route
Crank Handle interlocking
Emergency Route and overlap cancellation
Approach locking
Calling On Signal testing
Shunt Signal testing
Shunting Permitted Indicator (SPI) testing
Track Locking
Testing of Interlocked Gates
Slot Testing
One Signal One Train Test
In addition to above following tests are also to be conducted:
Correspondence of VDU and Panel Indications (If Operating panel is also available).
Automatic Changeover from Normal to Standby VDU and vice -versa (for dual VDU)
A sample VDU-Panel Correspondence Test Certificate is given in Figure 50
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(iii).Correspondence Test of Points
It must be checked that panel indication corresponds to the point being failed.
After clearing each signal it must be ensured that concerned points are locked and cannot be
operated from panel.
It is very important that the normal and reverse position of points at site must be checked as
per selection table while checking correspondence from site for each point
Note:
The details of functional tests are mentioned in para 3.10.1 Correspondence Test of Signal,
3.10.2 Correspondence Test of Track Circuit, 3.10.3 Correspondence Test of point, 3.10.4
Correspondence Test of Crank Handle & 3.10.5 Correspondence Test of Level Crossing
Gate Slot of Section III for testing of Relay Interlocking (Metal to Metal Contact Relays).
These are applicable for Electronic Interlocking also.
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References
1. Signal Engineering Manual Version 3.0, June 2021
2. RDSO Report on Standardization of the Typical Circuits for Electronic Interlocking -
2019.
3. Railway Board Letter No. 2017/Sig/3/85th SSC dated 14.12.2018 on FAT, SAT for EI
4. Northern railway Policy No.07/2018 on Standardization of Safety and integrity checks
for Interlocking Logic/ Circuits.
5. Guidelines on Procedure of making Panel functional –M/s Siemens Rail Automation
Ltd., Mumbai
6. Procedure for Functional Testing –M/s Siemens Rail Automation Ltd., Mumbai
7. Standardization of S&T Drawings V2.1, June 2019 – IRISET Secunderabad
8. IRISET notes on Electronic Interlocking (S18)
9. Handbook on Panel Interlocking Testing (Metal to Metal contact Relays)- August 2007-
CAMTECH Gwalior
10. Handbook on Panel Interlocking Testing (Metal to Carbon contact Relays)- June 2008-
CAMTECH Gwalior
11. Presentation on Functional Testing of EI by M/s Siemens Rail Automation Pvt. Ltd.,
Mumbai dated 27.08.2021.
12. Information on Functional Testing of EI by M/s Kyosan India Pvt. Ltd., Chennai.
13. Signal Interlocking Plan (SIP) for EI of Thalwara station of ECR
14. Route Control Chart (RCC) for EI of Thalwara station of ECR
15. Sample Test documents for EI of Singur station Howrah Division ER.
16. WESTRACE System Description by Shri M K Rao, Professor Signal II/IRISET
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Quality Policy
parties.”
Table of Contents
INDIAN RAILWAYS
Centre for Advanced Maintenance Technology
Maharajpur, Gwalior (M.P.) Pin Code – 474 005