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PD AMD Questions
PD AMD Questions
2. How will you make sure that your power structure is good?
4. Why we are following certain guidelines for macros placement and what are those guidelines?
5. What is the minimum space required in between macros if the channel is there on the non-pin
side of macros?
7. What are the setup and hold edges for a 3-level multi-cycle path?
8. What are the setup and hold edges for the half-cycle path?
11. Why we are not taking care of hold violations at the placement stage?
13. Tell me about Switching power, internal power, average power, peak power, and IR Drop.
16. What are the setup and hold edges for the half-cycle path?
17. What are the setup and hold edges for the positive latch to negative flop?
18. Tell me about setup and hold violation fixes which are occurred in the same path.`
22. What are the different ways to fix setup and hold? Which one is difficult to fix setup? or hold?
25. What are the timing arcs for flipflop when we have scan-chain reordering?
39. On what basis, the distance between tap cells will be decided?
41. How many std cells are being accommodated by each tap cell.
42. What is the use of keeping tap cells in checkerboard format rather than keeping continuous?
44. Why can’t we keep endcaps on the top and bottom of macros?
47. How the tool will place std cells in the design.
51. Among Max Trans, Max cap, Max fanout.....which one will be fixed first.