The operations implemented on data stored in registers are known as micro-operations.

A micro-operation is a basic operation implemented on the data saved in one or more

registers.
There are various micro-operations including addition, subtraction, increment, and
decrement.

Add Micro-Operation
It is described by the following statement −
R3 → R1 + R2
The following statement instructs the information or contents of register R1 to be
inserted to data or content of register R2 and the sum must be converted to register R3.

Subtract Micro-Operation
Example −
R3 → R1 + R2' + 1
Subtract micro-operation are using minus operator we create 1's complement and add
1 to the register which obtains subtracted, i.e R1 - R2 is similar to R3 → R1 + R2' + 1

Increment/Decrement Micro-Operation
In Increment and decrement micro-operations, it is usually implemented by adding and
subtracting 1 to and from the register respectively.
R1 → R1 + 1
R1 → R1 – 1
The following table demonstrates the symbolic representation of several Arithmetic
Micro-operations.

Symbolic Representation Description

R3 ← R1 + R2 The contents of R1 plus R2 are moved to R3.

R3 ←R1$ R1 - R2 The contents of R1 minus R2 are moved to R3.

 Symbolic Representation Description

R2 ←R1$ R2' Complement the contents of R2 (1's complement).

R2 ←R1$ R2' + 1 2's complement the contents of R2 (negate).

R3 ← R1 + R2' + 1 R1 plus the 2's complement of R2 (subtraction).

R1 ←R1$ R1 + 1 It can increment the contents of R1 by one.

R1 ←R1$ R1 - 1 It can decrement the contents of R1 by one.

The increment and decrement micro-operations are symbolized by plus one and minus-
one operations, respectively. These micro-operations are performed with a
combinational circuit or with a binary up-down counter.
The arithmetic operations of multiply and divide are not shown in the table. These two
operations are valid arithmetic operations but are not contained in the essential set of
micro-operations.
In this case, the signals that implement these operations propagate by gates, and the
result of the operation can be transferred into a destination register through a clock
pulse immediately after the output signal propagates by the combinational circuit.
The multiplication operation is performed with a series of add and shift micro-
operations. The division is executed with a series of subtracting and shift micro-
operations.

Arithmetic Micro-operations
In general, the Arithmetic Micro-operations deals with the operations performed on
numeric data stored in the registers.

The basic Arithmetic Micro-operations are classified in the following categories:

1. Addition
2. Subtraction
 3. Increment
4. Decrement
5. Shift

Some additional Arithmetic Micro-operations are classified as:

1. Add with carry

2. Subtract with borrow
3. Transfer/Load, etc.

The following table shows the symbolic representation of various Arithmetic Micro-
operations.

Symbolic Representation Description

R3 ← R1 + R2 The contents of R1 plus R2 are transferred to R3.

R3 ← R1 - R2 The contents of R1 minus R2 are transferred to R3.

R2 ← R2' Complement the contents of R2 (1's complement)

R2 ← R2' + 1 2's complement the contents of R2 (negate)

R3 ← R1 + R2' + 1 R1 plus the 2's complement of R2 (subtraction)

R1 ← R1 + 1 Increment the contents of R1 by one

R1 ← R1 - 1 Decrement the contents of R1 by one

Note: The increment and decrement micro-operations are symbolized by '+ 1' and '? 1'
respectively. Arithmetic operations like multiply and divide are not included in the basic set of
micro-operations.
Multiplexer
A multiplexer is a combinational circuit that has 2n input lines and a single output line.
Simply, the multiplexer is a multi-input and single-output combinational circuit. The
binary information is received from the input lines and directed to the output line. On the
basis of the values of the selection lines, one of these data inputs will be connected to the
output.

Unlike encoder and decoder, there are n selection lines and 2n input lines. So, there is a
total of 2N possible combinations of inputs. A multiplexer is also treated as Mux.

There are various types of the multiplexer which are as follows:

2×1 Multiplexer:
In 2×1 multiplexer, there are only two inputs, i.e., A0 and A1, 1 selection line, i.e., S0 and
single outputs, i.e., Y. On the basis of the combination of inputs which are present at the
selection line S0, one of these 2 inputs will be connected to the output. The block diagram
and the truth table of the 2×1 multiplexer are given below.

Block Diagram:
Truth Table:

The logical expression of the term Y is as follows:

Y=S0'.A0+S0.A1

Logical circuit of the above expression is given below:

4×1 Multiplexer:
In the 4×1 multiplexer, there is a total of four inputs, i.e., A 0, A1, A2, and A3, 2 selection
lines, i.e., S0 and S1 and single output, i.e., Y. On the basis of the combination of inputs
that are present at the selection lines S0 and S1, one of these 4 inputs are connected to
the output. The block diagram and the truth table of the 4×1 multiplexer are given below.
Block Diagram:

Truth Table:

The logical expression of the term Y is as follows:

Y=S1' S0' A0+S1' S0 A1+S1 S0' A2+S1 S0 A3

Logical circuit of the above expression is given below:

8 to 1 Multiplexer
In the 8 to 1 multiplexer, there are total eight inputs, i.e., A 0, A1, A2, A3, A4, A5, A6, and A7,
3 selection lines, i.e., S0, S1and S2 and single output, i.e., Y. On the basis of the combination
of inputs that are present at the selection lines S0, S1, and S2, one of these 8 inputs are
connected to the output. The block diagram and the truth table of the 8×1 multiplexer
are given below.
Block Diagram:

Truth Table:
The logical expression of the term Y is as follows:

Y=S0'.S1'.S2'.A0+S0.S1'.S2'.A1+S0'.S1.S2'.A2+S0.S1.S2'.A3+S0'.S1'.S2 A4+S0.S1'.S2 A5+S0'.S1.S2 .A6

+S0.S1.S3.A7

Logical circuit of the above expression is given below:

8 ×1 multiplexer using 4×1 and 2×1 multiplexer

We can implement the 8×1 multiplexer using a lower order multiplexer. To implement the
8×1 multiplexer, we need two 4×1 multiplexers and one 2×1 multiplexer. The 4×1
multiplexer has 2 selection lines, 4 inputs, and 1 output. The 2×1 multiplexer has only 1
selection line.
For getting 8 data inputs, we need two 4×1 multiplexers. The 4×1 multiplexer produces
one output. So, in order to get the final output, we need a 2×1 multiplexer. The block
diagram of 8×1 multiplexer using 4×1 and 2×1 multiplexer is given below.

16 to 1 Multiplexer
In the 16 to 1 multiplexer, there are total of 16 inputs, i.e., A 0, A1, …, A16, 4 selection lines,
i.e., S0, S1, S2, and S3 and single output, i.e., Y. On the basis of the combination of inputs
that are present at the selection lines S0, S1, and S2, one of these 16 inputs will be
connected to the output. The block diagram and the truth table of the 16×1

Block Diagram:
Truth Table:
The logical expression of the term Y is as follows:

Y=A0.S0'.S1'.S2'.S3'+A1.S0'.S1'.S2 '.S3+A2.S0'.S1'.S2.S3'+A3.S0'.S1 '.S2.S3+A4.S0'.S1.S2'.S3'+A5.S

0 '.S1.S2'.S3+A6.S1.S2.S3'+A7.S0 '.S1.S2.S3+A8.S0.S1'.S2'.S3'+A9 .S0.S1'.S2'.S3+Y10.S0.S1'.S2.S3 '+
A11.S0.S1'.S2.S3+A12 S0.S1.S2 '.S3'+A13.S0.S1.S2'.S3+A14.S0.S1 .S2.S3'+A15.S0.S1.S2'.S3

Logical circuit of the above expression is given below:

16×1 multiplexer using 8×1 and 2×1 multiplexer
We can implement the 16×1 multiplexer using a lower order multiplexer. To implement
the 8×1 multiplexer, we need two 8×1 multiplexers and one 2×1 multiplexer. The 8×1
multiplexer has 3 selection lines, 4 inputs, and 1 output. The 2×1 multiplexer has only 1
selection line.

For getting 16 data inputs, we need two 8 ×1 multiplexers. The 8×1 multiplexer produces
one output. So, in order to get the final output, we need a 2×1 multiplexer. The block
diagram of 16×1 multiplexer using 8×1 and 2×1 multiplexer is given below.
Encoders
The combinational circuits that change the binary information into N output lines are
known as Encoders. The binary information is passed in the form of 2N input lines. The
output lines define the N-bit code for the binary information. In simple words,
the Encoder performs the reverse operation of the Decoder. At a time, only one input
line is activated for simplicity. The produced N-bit output code is equivalent to the binary
information.
There are various types of encoders which are as follows:

4 to 2 line Encoder:
In 4 to 2 line encoder, there are total of four inputs, i.e., Y0, Y1, Y2, and Y3, and two outputs,
i.e., A0 and A1. In 4-input lines, one input-line is set to true at a time to get the respective
binary code in the output side. Below are the block diagram and the truth table of the 4
to 2 line encoder.

Block Diagram:

Truth Table:
The logical expression of the term A0 and A1 is as follows:

A1=Y3+Y2
A0=Y3+Y1

Logical circuit of the above expressions is given below:

8 to 3 line Encoder:
The 8 to 3 line Encoder is also known as Octal to Binary Encoder. In 8 to 3 line encoder,
there is a total of eight inputs, i.e., Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 and three outputs, i.e., A0,
A1, and A2. In 8-input lines, one input-line is set to true at a time to get the respective
binary code in the output side. Below are the block diagram and the truth table of the 8
to 3 line encoder.
Block Diagram:

Truth Table:

The logical expression of the term A0, A1, and A2 are as follows:

A2=Y4+Y5+Y6+Y7
A1=Y2+Y3+Y6+Y7
A0=Y7+Y5+Y3+Y1

Logical circuit of the above expressions is given below:

Decimal to BCD Encoder
The Octal to Binary Encoder is also known as 10 to 4 line Encoder. In 10 to 4 line encoder,
there are total of ten inputs, i.e., Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7, Y8, and Y9 and four outputs, i.e.,
A0, A1, A2, and A3. In 10-input lines, one input-line is set to true at a time to get the
respective BCD code in the output side. The block diagram and the truth table of the
decimal to BCD encoder are given below.

Block Diagram:
Truth Table:

The logical expression of the term A0, A1, A2, and A3 is as follows:

A3 = Y9 + Y8
A2 = Y7 + Y6 + Y5 +Y4
A1 = Y7 + Y6 + Y3 +Y2
A0 = Y9 + Y7 +Y5 +Y3 + Y1

Logical circuit of the above expressions is given below:

Priority Encoder:
4 to 2 line Priority Encoder:
In this priority encoder, there are total of 4 inputs, i.e., Y0, Y1, Y2, and Y3, and two outputs,
i.e., A0 and A1. The Y3 has high and Y0 has low priority inputs. When more than one input
is '1' at the same time, the output will be the (binary) code corresponding to the higher
priority input. Below is the truth table of the 4 to 2 line priority encoder.

Truth Table:
The logical expression of the term A0 and A1 can be found using K-map as:

A1=Y3+Y2
A0=Y3+Y2'.Y1

Logical circuit of the above expressions is given below:

Uses of Encoders:

1. These systems are very easy to use in all digital systems.

2. Encoders are used to convert a decimal number into the binary number. The
objective is to perform a binary operation such as addition, subtraction,
multiplication, etc.

Decoder
The combinational circuit that change the binary information into 2N output lines is known
as Decoders. The binary information is passed in the form of N input lines. The output
lines define the 2N-bit code for the binary information. In simple words,
the Decoder performs the reverse operation of the Encoder. At a time, only one input
line is activated for simplicity. The produced 2N-bit output code is equivalent to the binary
information.
There are various types of decoders which are as follows:

2 to 4 line decoder:
In the 2 to 4 line decoder, there is a total of three inputs, i.e., A 0, and A1 and E and four
outputs, i.e., Y0, Y1, Y2, and Y3. For each combination of inputs, when the enable 'E' is set
to 1, one of these four outputs will be 1. The block diagram and the truth table of the 2
to 4 line decoder are given below.

Block Diagram:

Truth Table:
The logical expression of the term Y0, Y0, Y2, and Y3 is as follows:

Y3=E.A1.A0
Y2=E.A1.A0'
Y1=E.A1'.A0
Y0=E.A1'.A0'

Logical circuit of the above expressions is given below:

3 to 8 line decoder:
The 3 to 8 line decoder is also known as Binary to Octal Decoder. In a 3 to 8 line decoder,
there is a total of eight outputs, i.e., Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 and three outputs, i.e.,
A0, A1, and A2. This circuit has an enable input 'E'. Just like 2 to 4 line decoder, when enable
'E' is set to 1, one of these four outputs will be 1. The block diagram and the truth table
of the 3 to 8 line encoder are given below.

Block Diagram:

Truth Table:
The logical expression of the term Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 is as follows:

Y0=A0'.A1'.A2'
Y1=A0.A1'.A2'
Y2=A0'.A1.A2'
Y3=A0.A1.A2'
Y4=A0'.A1'.A2
Y5=A0.A1'.A2
Y6=A0'.A1.A2
Y7=A0.A1.A2

Logical circuit of the above expressions is given below:

4 to 16 line Decoder
In the 4 to 16 line decoder, there is a total of 16 outputs, i.e., Y 0, Y1, Y2,……, Y16 and four
inputs, i.e., A0, A1, A2, and A3. The 3 to 16 line decoder can be constructed using either 2
to 4 decoder or 3 to 8 decoder. There is the following formula used to find the required
number of lower-order decoders.

Required number of lower order decoders=m2/m1

m1 = 8
m2 = 16

Required number of 3 to 8 decoders= =2

Block Diagram:
Truth Table:
The logical expression of the term A0, A1, A2,…, A15 are as follows:

Y0=A0'.A1'.A2'.A3'
Y1=A0'.A1'.A2'.A3
Y2=A0'.A1'.A2.A3'
Y3=A0'.A1'.A2.A3
Y4=A0'.A1.A2'.A3'
Y5=A0'.A1.A2'.A3
Y6=A0'.A1.A2.A3'
Y7=A0'.A1.A2.A3
Y8=A0.A1'.A2'.A3'
Y9=A0.A1'.A2'.A3
Y10=A0.A1'.A2.A3'
Y11=A0.A1'.A2.A3
Y12=A0.A1.A2'.A3'
Y13=A0.A1.A2'.A3
Y14=A0.A1.A2.A3'
Y15=A0.A1.A2'.A3

Logical circuit of the above expressions is given below:

Boolean algebra
The logical symbol 0 and 1 are used for representing the digital input or output. The
symbols "1" and "0" can also be used for a permanently open and closed digital circuit.
The digital circuit can be made up of several logic gates. To perform the logical operation
with minimum logic gates, a set of rules were invented, known as the Laws of Boolean
Algebra. These rules are used to reduce the number of logic gates for performing logic
operations.

The Boolean algebra is mainly used for simplifying and analyzing the complex Boolean
expression. It is also known as Binary algebra because we only use binary numbers in
this. George Boole developed the binary algebra in 1854.

Rules in Boolean algebra

1. Only two values(1 for high and 0 for low) are possible for the variable used in
Boolean algebra.
2. The overbar(-) is used for representing the complement variable. So, the
complement of variable C is represented as .
3. The plus(+) operator is used to represent the ORing of the variables.
4. The dot(.) operator is used to represent the ANDing of the variables.

Properties of Boolean algebra

These are the following properties of Boolean algebra:

Annulment Law
When the variable is AND with 0, it will give the result 0, and when the variable is OR with
1, it will give the result 1, i.e.,

B.0 = 0

B+1 = 1

Identity Law
When the variable is AND with 1 and OR with 0, the variable remains the same, i.e.,
B.1 = B

B+0 = B

Idempotent Law
When the variable is AND and OR with itself, the variable remains same or unchanged,
i.e.,

B.B = B

B+B = B

Complement Law
When the variable is AND and OR with its complement, it will give the result 0 and 1
respectively.

B.B' = 0

B+B' = 1

Double Negation Law

This law states that, when the variable comes with two negations, the symbol gets
removed and the original variable is obtained.

((A)')' = A

Commutative Law
This law states that no matter in which order we use the variables. It means that the order
of variables doesn't matter in this law.

A.B = B.A

A+B = B+A

Associative Law
This law states that the operation can be performed in any order when the variables
priority is of same as '*' and '/'.
(A.B).C = A.(B.C)

(A+B)+C = A+(B+C)

Distributive Law
This law allows us to open up of brackets. Simply, we can open the brackets in the Boolean
expressions.

A+(B.C) = (A+B).(A+C

A.(B+C) = (A.B)+(A.C)

Absorption Law
This law allows us for absorbing the similar variables.

B+(B.A) = B

B.(B+A) = B

De Morgan Law

The operation of an OR and AND logic circuit will remain same if we invert all the inputs,
change operators from AND to OR and OR to AND, and invert the output.

(A.B)' = A'+B'

(A+B)' = A'.B'

Boolean Functions
The binary variables and logic operations are used in Boolean algebra. The algebraic
expression is known as Boolean Expression, is used to describe the Boolean Function.
The Boolean expression consists of the constant value 1 and 0, logical operation symbols,
and binary variables.

Example 1: F=xy' z+p

We defined the Boolean function F=xy' z+p in terms of four binary variables x, y, z, and
p. This function will be equal to 1 when x=1, y=0, z=1 or z=1.

Example 2:

The output Y is represented on the left side of the equation. So,

Apart from the algebraic expression, the Boolean function can also be described in terms
of the truth table. We can represent a function using multiple algebraic expressions. They
are their logically equivalents. But for every function, we have only one unique truth table.

In truth table representation, we represent all the possible combinations of inputs and
their result. We can convert the switching equations into truth tables.

Example: F(A,B,C,D)=A+BC'+D

The output will be high when A=1 or BC'=1 or D=1 or all are set to 1. The truth table of
the above example is given below. The 2n is the number of rows in the truth table. The n
defines the number of input variables. So the possible input combinations are 23=8.
Methods of simplifying the Boolean function
There are two methods which are used for simplifying Boolean function. These functions
are as follows:

Karnaugh-map or K-map
De-Morgan's law is very helpful for manipulating logical expressions. The logic gates can
also realize the logical expression. The k-map method is used to reduce the logic gates
for a minimum possible value required for the realization of a logical expression. The K-
map method will be done in two different ways, which we will discuss later in
the Simplification of Boolean expression section.

NAND gates realization

Apart from the K-map, we can also use the NAND gate for simplifying the Boolean
functions. Let's see an example:

Example 1: F(A,B,C,D)=A' C'+ABCD'+B' C' D+BCD'+A'B'

Laws and Rules of Boolean algebra
In simplification of the Boolean expression, the laws and rules of the Boolean algebra play an impo
understanding these laws and rules of Boolean algebra, understand the Boolean operations addition
concept.

Boolean Addition
The addition operation of Boolean algebra is similar to the OR operation. In digital circuits, the OR op
calculate the sum term, without using AND operation. A + B, A + B', A + B + C', and A' + B + + D' are som
of 'sum term'. The value of the sum term is true when one or more than one literals are true and false w
are false.

Boolean Multiplication
The multiplication operation of Boolean algebra is similar to the AND operation. In digital circuits, t
calculates the product, without using OR operation. AB, AB, ABC, and ABCD are some of the examples o
The value of the product term is true when all the literals are true and false when any one of the literal

Laws of Boolean algebra

There are the following laws of Boolean algebra:

Commutative Law
This law states that no matter in which order we use the variables. It means that the order of variables
Boolean algebra, the OR and the addition operations are similar. In the below diagram, the OR gate dis
of the input variables does not matter at all.

For two variables, the commutative law of addition is written as:

A+B = B+A

For two variables, the commutative law of multiplication is written as:

A.B = B.A
Associative Law
This law states that the operation can be performed in any order when the variables priority is same.
same priority. In the below diagram, the associative law is applied to the 2-input OR gate.

For three variables, the associative law of addition is written as:

A + (B + C) = (A + B) + C

For three variables, the associative law of multiplication is written as:

A(BC) = (AB)C

According to this law, no matter in what order the variables are grouped when ANDing more than tw
below diagram, the associative law is applied to 2-input AND gate.

Distributive Law:
According to this law, if we perform the OR operation of two or more variables and then perform the
the result with a single variable, then the result will be similar to performing the AND operation of that s
each two or more variable and then perform the OR operation of that product. This law explains the pr
For three variables, the distributive law is written as:

A(B + C) = AB + AC

Rules of Boolean algebra

There are the following rules of Boolean algebra, which are mostly used in manipulating and si
expressions. These rules plays an important role in simplifying boolean expressions.

1. A+0=A 7. A.A=A

2. A+1=1 8. A.A'=0

3. A.0=0 9. A''=A

4. A.1=A 10. A+AB=A

5. A+A=A 11. A+A'B=A+B

6. A+A'=1 12. (A+B)(A+C)=A+BC

Rule 1: A + 0 = A
Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform OR operatio
will be the same as the input variable. So, if the variable value is 1, then the result will be 1, and if the
then the result will be 0. Diagrammatically, this rule can be defined as:

Rule 2: (A + 1) = 1
Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform OR operatio
will always be 1. So, if the variable value is either 1 or 0, then the result will always be 1. Diagrammatica
defined as:

Rule 3: (A.0) = 0
Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform the AND op
result will always be 0. This rule states that an input variable ANDed with 0 is equal to 0 always. Diagram
can be defined as:
Rule 4: (A.1) = A
Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform the AND op
result will always be equal to the input variable. This rule states that an input variable ANDed with 1 is
variable always. Diagrammatically, this rule can be defined as:

Rule 5: (A + A) = A
Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform the OR opera
variable, the result will always be equal to the input variable. This rule states an input variable ORed wi
the input variable always. Diagrammatically, this rule can be defined as:

Rule 6: (A + A') = 1
Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform the OR o
complement of that variable, the result will always be equal to 1. This rule states that a variable ORed w
is equal to 1 always. Diagrammatically, this rule can be defined as:
Rule 7: (A.A) = A
Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform the AND
same variable, the result will always be equal to that variable only. This rule states that a variable ANDed
to the input variable always. Diagrammatically, this rule can be defined as:

Rule 8: (A.A') = 0
Let's suppose; we have an input variable A whose value is either 0 or 1. When we perform the AND
complement of that variable, the result will always be equal to 0. This rule states that a variable ANDed w
is equal to 0 always. Diagrammatically, this rule can be defined as:

Rule 9: A = (A')'
This rule states that if we perform the double complement of the variable, the result will be the sa
variable. So, when we perform the complement of variable A, then the result will be A'. Further if we
complement of A', we will get A, that is the original variable.

Rule 10: (A + AB) = A

We can prove this rule by using the rule 2, rule 4, and the distributive law as:

A + AB = A(1 + B) Factoring (dis

A + AB = A.1 Rule 2: (1
A + AB = A Rule 4: A .1 = A

Rule 11: A + AB = A + B
We can prove this rule by using the above rules as:

A + AB = (A + AB)+ AB Rule 10: A

A+AB= (AA + AB)+ AB Rule 7:
A+AB=AA +AB +AA +AB Rule 8: adding
A+AB= (A + A)(A + B)
A+AB= 1.(A + B) Rule 6: A +
A+AB=A + B Rule 4: drop the 1
Rule 12: (A + B)(A + C) = A + BC
We can prove this rule by using the above rules as:

(A + B)(A + C)= AA + AC + AB + BC D
(A + B)(A + C)= A + AC + AB + BC Rule
(A + B)(A + C)= A( 1 + C)+ AB + BC Rule 2:
(A + B)(A + C)= A.1 + AB + BC Factoring (d
(A + B)(A + C)= A(1 + B)+ BC Rule 2: 1
(A + B)(A + C)= A.1 + BC Rule 4:
(A + B)(A + C)= A + BC
 Next Topic Logic Gates

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