NuMicro® 2

IC
A Leading MCU Platform Provider

June 2016
Agenda
• General Description
• Features
• Protocol
• Register Description
• Functions and Sample Code in BSP
• Sample Code

2
General Description
• A two-wired and bi-directional bus, comprised by SDA and
SCL, may include multi masters and multi slaves
• Both SDA and SCL are bi-directional with Open-Drain driving
type, connected to a positive supply voltage via pull-up
resistors.

3
Features (1/2)
• Up to two 2
IC controllers
• Compatible with Philips 2
IC standard
• Master/Slave mode
• 7 bit addressing mode
• Built-in a 14-bit time-out counter to avoid the 2
IC bus hang-
up
• Power-down wake-up function

4
Features (2/2)
• Multiple address recognition (4 slave address with mask
option)
• Modes of Operation
- Master transmitter
- Master receiver
- Slave transmitter
- Slave receiver
- General call
5
2
IC Block Diagram
• The basic configurations of 2
IC are as follows:
APB Interface

Wakeup Control
Control Register

I2Cn_SCL
Bus Protocol
Interface Control I2Cn_SDA
Bus Clock Control

6
2
IC Protocol
• Normally, a standard communication consists of 4 stages:
- START or Repeated START signal generation
- Slave address transfer
- Data transfer
- STOP signal generation
SCL 1 2 7 8 9 1 2 3-7 8 9

P
NACK
SDA A6 A5 A4 - A1 A0 R/W ACK D7 D6 D5 - D1 D0
ACK
S P Sr
MSB LSB MSB LSB
or or
Sr Sr

7
START, Repeated START and STOP
• When the bus is free, 2
IC
Hardware can initiate a transfer by
sending a START signal.
• The master can use a Repeated START to continue a next
transmission without releasing the bus.
• The master can terminate the communication by generating
a STOP signal.
SCL 1 2 7 8 9 1 2 3-7 8 9

P
NACK
SDA A6 A5 A4 - A1 A0 R/W ACK D7 D6 D5 - D1 D0
ACK
S P Sr
MSB LSB MSB LSB
or or
Sr Sr

Transmission starts with a START Transmission ends with a STOP condition 8

condition
Slave Address Transfer
• The first byte transferred by the master after the START
signal is the slave address.
• This is a 7-bit slave address followed by a R/W bit.
• No two slaves have the same address
SCL 1 2 7 8 9 1 2 3-7 8 9

P
NACK
SDA A6 A5 A4 - A1 A0 R/W ACK D7 D6 D5 - D1 D0
ACK
S P Sr
MSB LSB MSB LSB
or or
Sr Sr

Mater transmits a 7-bit Slave address and 1-bit R/W

9
Data Transfer
• When successful slave addressing has been achieved, the
data transfer can proceed on byte-by-byte basis in the
direction specified by the R/W bit.
• The data length is based on actual application
SCL 1 2 7 8 9 1 2 3-7 8 9

P
NACK
SDA A6 A5 A4 - A1 A0 R/W ACK D7 D6 D5 - D1 D0
ACK
S P Sr
MSB LSB MSB LSB
or or
Sr Sr

Data transfer stage

(example 1 byte data)

10
Acknowledge

Acknowledge
Position

clock pulse for

acknowledgement

SCL FROM
MASTER
1 2 8 9

DATA OUTPUT BY NACK: High level

TRANSMITTER

not acknowledge

DATA OUTPUT BY
RECEIVER
S

START acknowledge
condition
ACK: Low level

Each transferred byte is followed by an ACK or a NACK at 9th

clock.
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Data Transfer on the 2
IC bus
• Master transmits data to slave.
S SLAVE ADDRESS R/W A DATA A DATA A/A P

data transfer
‘0’ : write (n bytes + acknowlegde)

from master to slave A = acknowledge (I2Cn_SDA low)

A = not acknowledge (I2Cn_SDA high)
S = START condition
from slave to master
P = STOP condition

S SLAVE ADDRESS R/W A DATA A DATA A/A P

data transfer
‘1’ : read (n bytes + acknowlegde)

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2
IC Control Register

14
2
IC Status Register
• 26 possible status codes.
• All I C status codes correspond to defined I2C states.
2

- Ex: When a START has been transmitted, the status code is 08H.

15
2
IC Time-out
• 14-bit time-out counter
• Avoid 2
IC bus hang-up
• Writing 1 to the SI flag will reset counter
• Write 1 to clear TOIF(Time-Out Flag )

16
I2C EEPROM Application Example (1/3)
• I2C EEPROM sample code
- Configure system settings.
- Open the I2C0 and set I2C bit rate.
- Write a byte data into specified address of EEPROM.
- Read data from the specified address of EEPROM and compare the
result.

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2
IC EEPROM Example (2/3)
• Master to access any address of EEPROM space.
- Set the multi-function pin in I2C mode
- Enable I2C APB clock
- Set the I2C Controller Reset bit in normal operation mode
- I2C controller enable and set I2C clock rate
- Set I2C IRQ and interrupt enable
- Set I2C address registers
ROM ADDRRSS HIGH ROM ADDRRSS LOW
SLA+W BYTE BYTE SLA+R DATA BYTE

S A A A A N S
I2Cn_SDA A A A S A A A
T 1 0 1 0 W C X X X C C 1 0 1 0 R C A T
2 1 0 T 2 1 0
A K K K K C O
K

STATUS=0x08 STATUS=0
STATUS=0xF8 x18
I2CDAT I2CDAT
... S
(SLA+W)
ACK
(ROM Address High Byte) A
I2CDAT=SLA+W STATUS=0xF I2CDAT=ROM Address High Byte
STATUS=0x
(STA,STO,SI,AA)=(0,0,1,X) 8 (STA,STO,SI,AA)=(0,0,1,X)
(STA,STO,SI,AA)=(1,0,1,X)
20 18
NAK P
2
IC EEPROM Application (3/3)
ROM ADDRRSS HIGH ROM ADDRRSS LOW
SLA+W BYTE BYTE SLA+R DATA BYTE

S A A A A N S
I2Cn_SDA A A A S A A A
T 1 0 1 0 W C X X X C C 1 0 1 0 R C A T
2 1 0 T 2 1 0
A K K K K C O
K

A
STATUS=0x28 STATUS=0x28
I2CDAT
ACK ACK
(ROM Address Low Byte)
I2CDAT=ROM Address Low Byte STATUS=0x30 STATUS=0xF8
(STA,STO,SI,AA)=(0,0,1,X)
NAK P

(STA,STO,SI,AA)=(0,1,1,X)

STATUS=0x58
STATUS=0x10 STATUS=0x40 Read I2CDAT to Get Data STATUS=0xF8
I2CDAT I2CDAT
Sr ACK NAK P
(SLA+R) (Data)
I2CDAT=SLA+R (STA,STO,SI,AA)=(0,0,1,0) (STA,STO,SI,AA)=(0,1,1,X)
(STA,STO,SI,AA)=(0,0,1,X) STATUS=0x48 STATUS=0xF8
(STA,STO,SI,AA)=(1,0,1,X) Master to Slave
NAK P
Slave to Master
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(STA,STO,SI,AA)=(0,1,1,X)
Sample Code Path

NUC029xEEBSPv3.00.001

NuMicro NUC029 Series

Document Driver Reference Guide

SampleCode

StdDriver

I2C_Slave

I2C_Slave.uvproj
KEIL

20
Functions and Sample Code in BSP
• \SampleCode\StdDriver
- I2C_EEPROM
- I2C_GCMode_Master
- I2C_GCMode_Slave
- I2C_Master
- I2C_Slave
- I2C_Wakeup_Master
- I2C_Wakeup_Slave

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 I2C Sample Code (1/2)
int32_t main (void)
{
/* Set GPA multi-function pins for I2C0 SDA and SCL */
SYS->GPA_MFP &= ~(SYS_GPA_MFP_PA8_Msk | SYS_GPA_MFP_PA9_Msk);
SYS->GPA_MFP |= SYS_GPA_MFP_PA8_I2C0_SDA | SYS_GPA_MFP_PA9_I2C0_SCL;

/* Open I2C module and set bus clock */

I2C_Open(I2C0, 100000);

/* Get I2C Bus clock*/

uint32_t I2C_GetBusClockFreq(I2C_T *i2c);

/* Enable I2C0 interrupt and set corresponding NVIC bit */

I2C_EnableInt(I2C0);
NVIC_EnableIRQ(I2C0_IRQn);`

/* Set I2C 4 Slave Addresses */

I2C_SetSlaveAddr(I2C0, 0, 0x15, 0); /* Slave Address : 0x15 */
I2C_SetSlaveAddr(I2C0, 1, 0x35, 0); /* Slave Address : 0x35 */
I2C_SetSlaveAddr(I2C0, 2, 0x55, 0); /* Slave Address : 0x55 */
I2C_SetSlaveAddr(I2C0, 3, 0x75, 0); /* Slave Address : 0x75 */

/* Set I2C 4 Slave Addresses Mask */

I2C_SetSlaveAddrMask(I2C0, 0, 0x01);
I2C_SetSlaveAddrMask(I2C0, 1, 0x04);
I2C_SetSlaveAddrMask(I2C0, 2, 0x01);
I2C_SetSlaveAddrMask(I2C0, 3, 0x04); 22
 I2C Sample Code (2/2)
/* I2C enter no address SLV mode */
I2C_SET_CONTROL_REG(I2C0, I2C_I2CON_SI_AA);

for(i = 0; i < 0x100; i++)

{
g_au8SlvData[i] = 0;
}

/* I2C function to Slave receive/transmit data */

s_I2C0HandlerFn = I2C_SlaveTRx;

printf("\n");
printf("I2C Slave Mode is Running.\n");

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Thank you!