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Department of Electronics and Communication Engineering

Digital Electronics (EC8392)


Module No:5.1
MEMORY DEVICES AND DIGITAL
INTEGRATED CIRCUITS

Date: 13/10/2020
Session: 5
Faculty: Dr.G.Nirmalapriya, Prof/ECE
Mrs.S.Sheela, AP/ECE
MEMORY DEVICES AND DIGITAL
INTEGRATED CIRCUITS
• Basic memory structure – ROM -PROM – EPROM – EEPROM –EAPROM, RAM – Static
and dynamic RAM – Programmable Logic Devices – Programmable Logic Array (PLA) –
Programmable Array Logic (PAL) – Field Programmable Gate Arrays (FPGA) –
Implementation of combinational logic circuits using PLA, PAL. Digital integrated circuits:
Logic levels, propagation delay, power dissipation, fan-out and fan-in, noise margin, logic
families and their characteristics-RTL, TTL, ECL, CMOS
Objective:
To explain the various semiconductor memories and related technology
To introduce the electronic circuits involved in the making of logic gates
Outcome:
Use the semiconductor memories and related technology
Use electronic circuits involved in the design of logic gates
Basic memory structure
• Memory is the most essential element of a computing system
because without it computer can’t perform simple tasks.
• Computer memory is of two basic type – Primary memory(RAM
and ROM) and Secondary memory(hard drive,CD,etc.).
• Random Access Memory (RAM) is primary-volatile memory and
Read Only Memory (ROM) is primary-non-volatile memory.
Types of Memory
RAM
• It is also called as read write memory or the main memory or
the primary memory.
• The programs and data that the CPU requires during execution
of a program are stored in this memory.
• It is a volatile memory as the data loses when the power is
turned off.
• RAM is further classified into two types- SRAM (Static Random
Access Memory) and DRAM (Dynamic Random Access Memory).
Types of RAM
• There are two important memory devices in the RAM family: SRAM and DRAM.
• The main difference between them is the duration of the data stored. Static RAM
(SRAM) retains its contents as long as electrical power is applied to the chip.
• However, if the power is turned off or lost temporarily, its contents will be lost
forever. Dynamic RAM (DRAM), on the other hand, has an extremely short data
life time usually less than a quarter of a second. This is true even when power is
applied continuously.
• In short, SRAM has all the properties of the memory you think of when you hear
the word RAM.
• DRAM is a volatile memory .
• A simple piece of hardware called a DRAM controller can be used to make DRAM
behave more like SRAM. The job of the DRAM controller, often included within
the processor, is to periodically refresh the data stored in the DRAM. By
Department of Electronics and Communication Engineering

Digital Electronics (EC8392)


Module No:5.2
MEMORY DEVICES
Date: 16/10/2020
Session: 4
Faculty: Dr.G.Nirmalapriya, Prof/ECE
Mrs.S.Sheela, AP/ECE
Memory Organization 16x4 RAM= 64 BITS
128X8 RAM=1024 BITS
ROM
• Stores crucial information essential to operate the system, like
the program essential to boot the computer.
• It is not volatile.
• Always retains its data.
• Used in embedded systems or where the programming needs
no change.
• Used in calculators and peripheral devices.
• ROM is further classified into 4 types- ROM, PROM, EPROM,
and EEPROM.
Types of Read Only Memory (ROM)
1. PROM (Programmable read-only memory) – It can be
programmed by user. Once programmed, the data and
instructions in it cannot be changed.
2. EPROM (Erasable Programmable read only memory) – It can
be reprogrammed. To erase data from it, expose it to ultra violet
light. To reprogram it, erase all the previous data.
3. EEPROM (Electrically erasable programmable read only
memory) – The data can be erased by applying electric field, no
need of ultra violet light. We can erase only portions of the chip.
RAM Vs ROM
Programming Logic Device-PLA,PAL

• Programmable Array Logic (PAL) is a commonly used programmable logic device (PLD).
• It has programmable AND array and fixed OR array.
• Because only the AND array is programmable, it is easier to use but not flexible as
compared to Programmable Logic Array (PLA). PAL’s only limitation is number of AND
gates.
• PAL consist of small programmable read only memory (PROM) and additional output logic
used to implement a particular desired logic function with limited components.
• Comparison with other Programmable Logic Devices:
• Main difference between PLA, PAL and ROM is their basic structure.
• In PLA, programmable AND gate is followed by programmable OR gate.
• In PAL, programmable AND gate is followed by fixed OR gate.
• In ROM, fixed AND gate array is followed by programmable OR gate array.
• Describing the PAL structure (programmable AND gate followed by fixed OR gate).
PAL
PAL Example

• Example: Realize the given function by using PAL:


Any form sum of product (SOP) form or product of sum (POS)
can be used for realization of a boolean function.
There are three inputs A, B, C and three functions X, Y, Z. Using
sum of product (SOP) terms to express the given function as
follows:-
                                                  
Realization
Advantages of PAL:

• Highly efficient
• Low production cost as compared to PLA
• Highly secure
• High Reliability
• Low power required for working.
• More flexible to design.
Programmable Logic Array

• Programmable Logic Array(PLA) is a fixed architecture logic


device with programmable AND gates followed by
programmable OR gates. 
PLA is basically a type of programmable logic device used to
build reconfigurable digital circuit. PLDs have undefined
function at the time of manufacturing but they are programmed
before made into use. PLA is a combination of memory and
logic. 
Programmable Logic Array
Example PLA
Applications: 

• PLA is used to provide control over datapath.


• PLA is used as a counter.
• PLA is used as a decoders.
• PLA is used as a BUS interface in programmed I/O.
Department of Electronics and Communication Engineering

Digital Module
Electronics (EC8392)
No:5.3
MEMORY DEVICES-SRAM AND
DRAM
Date: 19/10/2020
Session: 4
Faculty: Dr.G.Nirmalapriya, Prof/ECE
Mrs.S.Sheela, AP/ECE
Static RAM Structure
Read Operation
Write Operation
Static RAM Structure(with 6 transistors)
DRAM Structure
Read/Write Operation
DRAM Vs SRAM
Types of DRAM
Department of Electronics and Communication Engineering

Digital Electronics (EC8392)


Module No:5.4
DIGITAL LOGIC FAMILIES
Date: 19/10/2020
Session: 5
Faculty: Dr.G.Nirmalapriya, Prof/ECE
Mrs.S.Sheela, AP/ECE
Digital integrated circuits

Digital integrated circuit is a


semiconductor-based chip comprising an
integrated set of digital circuitry.
Characteristics of Logic families
• The main characteristics of Logic families include:
• Speed.
• Fan-in.
• Fan-out.
• Noise Immunity.
• Power Dissipation.
Characteristics of Logic families
• Propagation Delay (or) Speed: It is the time required for a pulse to
propagate from input to output.
• Fan-in: It determines the number of inputs the logic gate can handle.
• Fan-out: Determines the number of circuits that a gate can drive.
• Noise Margin(or)Noise Immunity: Maximum noise that a circuit can
withstand without affecting the output.
• Power dissipation: When a circuit switches from one state to the
other, power dissipates.
Voltage parameters

a) VIH (min) – High-Level Input Voltage


• The voltage level required for logic 1 at an input.
• Any voltage below this level will not be accepted as a HIGH by the logic circuit.

b) VIL (max) – Low-Level Input Voltage


• The voltage level required for logic 0 at an input.
• Any voltage above this level will not be accepted as a LOW by the logic circuit.

c) VOH (min) – High-Level Output Voltage


• The voltage level at a logic circuit output in the logic 1 state.
• The maximum value of VOH is usually specified.

d) VOL (max) – Low-Level Output Voltage


• The voltage level at a logic circuit output in the logic 0 state
• The maximum value of VOL is usually specified.
Current parameters
a) IIH – High-Level Input Current
• The current the flows into an input when a specified HIGH-level voltage is applied to that input.

b) IIL – Low-Level Input Current


• The current that flows into an input when a specified LOW-level voltage is applied to that input.

c) IOH – High-Level Output Current


• The current that flows from an output in the logical 1 state under specified load conditions.

d) IOL – Low-Level Output Current


• The current that flows from an output in the logical 0 state under specified load conditions.
Propagation Delay
Power Dissipation
Fan Out
• VIHmin: It is the minimum voltage level required at i/p of a gate for that i/p to be treated as logic 1.
• VOH(min) :It is the minimum voltage level required at o/p of a gate for that i/p to be treated as logic 1.
• VIL(max) : It is the maximum voltage level that can be treated as logic 0 at the i/p of a gate.
• VOL(max) : It is the maximum voltage level that can be treated as logic 0 at the o/p of a gate.
• IIH : current that flows into an i/p when a specified HIGH level voltage is applied to that input.
• IIL : current that flows into an i/p when a specified LOW level voltage is applied to that input.
• IOH : current that flows from an o/p in a logic 1 state under specified load conditions.
Noise Margin
Department of Electronics and Communication Engineering

Digital Electronics (EC8392)


Module No:5.5
DIGITAL INTEGRATED
CIRCUITS -RTL,DTL
Date: 20/10/2020
Session: 3
Faculty: Dr.G.Nirmalapriya, Prof/ECE
Mrs.S.Sheela, AP/ECE
Classification of Logic families
RTL(Resistor Transistor Logic)-NOR gate
RTL(Resistor Transistor Logic)-NAND gate
DTL (Diode Transistor Logic)-NAND Gate
DTL (Diode Transistor Logic)-NOR Gate
Department of Electronics and Communication Engineering

Digital Electronics (EC8392)


Module No:5.6
DIGITAL INTEGRATED
CIRCUITS -TTL,ECL,CMOS,FPGA

Date: 20/10/2020
Session: 6
Faculty: Dr.G.Nirmalapriya, Prof/ECE
Mrs.S.Sheela, AP/ECE
TTL(Transistor Transistor Logic) NAND Gate
CMOS (Complementary Metal Oxide
Semiconductor)-Inverter
CMOS NOR Gate
CMOS NAND Gate
ECL (Emitter Coupled Logic)
ECL (Emitter Coupled Logic)-NOR/OR Gate
Comparison of Logic Families
FLIPPED CLASS
What is FPGA?
What is CLB and LUT in FPGA?
Compare CPLD with FPGA
FPGA Manufacturing Companies
Complex Programmable Logic Device(CPLD)
• A complex programmable logic
device (CPLD) is a
programmable logic device with
complexity between that of PALs
and FPGAs,
and architectural features of
both. The main building block of
the CPLD is a macrocell, which
contains logic implementing
disjunctive normal form
expressions and more
specialized logic operations.
Complex Programmable Logic
Devices
• -Complex Programmable Logic Devices with large logic
blocks and Coarse grain architecture
• -CPLD’s are with more combinational circuits
• -CPLD’s are EEPROM based and non volatile
• -Design flexibility is less.
• -CPLD’s are more secure
• -CPLD’s have less delay and is more predictable
FPGA Architecture
A configurable logic block (CLB) is
the basic repeating logic resource
on an FPGA. When linked together
by routing resources, the
components in CLBs execute
complex logic functions, implement
memory functions, and
synchronize code on the FPGA.
FPGA(Field Programmable Gate Array)
• Field Programmable Gate Arrays with tiny blocks with fine
grain architecture
• -FPGA’s are with more F/F’s
• -FPGA’s are RAM based and Volatile
• -In FPGA design security is an issue
• -Design flexibility is more
• -FPGA’s have more delay because of more sequential circuits
and less predictable.
CPLD Vs FPGA

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