North South University

Department of Electrical & Computer Engineering

LAB REPORT
Computer Organization and Architecture Lab
Experiment Number: Lab - #03
Experiment Name: Design a 4-Bit Universal Shift Register

Experiment Date: 07-07-2021

Report Submission Date: 13-07-2021
Section: 04

Student Name: Md. Rakibul Islam Rakib Score

Student ID: 1911977642

Remarks:
Objective-
1. To construct a 4-bit universal shift register.
2. To learn basic concept of Flip-Flop.
3. To learn how register store data using Flip-Flop.
4. To build register by using D Flip-Flop and MUX.
5. To build register by using D Flip-Flop and MUX.
6. To do register operation like No change, Shift right, Shift Left and parallel
load.
7. To learn how we can do this operations by selecting different select bits in
the MUX.

List of Equipment-
1. 4 D Flip-Flop.
2. 4 4*1 MUX.
3. Connecting Wire.
4. Trainer Board.
5. Power Supply.

Theory-
A register that can store the data and shifts the data towards the right and left
along with the parallel load capability is known as a universal shift register. It
can be used to perform input/output operations in both serial and parallel
modes.
A Flip-Flop or latch is a circuit that has two stable states and can be used to store
state information.
A multiplexer makes it possible for several input signals to share one device or
resource.
In this experiment we will construct a 4 bit universal shift register by using D
Flip-Flop and 4:1 MUX. By giving clock pulse into the Flip-Flop and selecting the
select bits, the data will be passed through the Flip-Flop and the operations like
No change, Shift Right, Shift Left, Parallel load will be held.
No change means data of Flip-Flop remain unchanged. Shift Right means all the
data will go to the right direction one by one. Shift Left means all the data will
go to the left direction one by one. And Parallel load means all the data will be
passed through Flip-Flop’s output one at a time.

Circuit Diagram-
Truth table-

S1 S0 Operation I4 I3 I2 I1 A4 A3 A2 A1

0 0 No Change 0 1 1 0 0 1 1 0

0 1 SHR 1 1 0 0 0 1 1 0

1 0 SHL 1 1 0 0 1 0 0 0

1 1 Parallel Load 1 1 0 0 1 1 0 0

Discussion-
In todays experiment we have used D flip flop and 4 bit data, a clock. We have
used 4 D flip flops, because one flip flop can store one bit. This will work as
shift register. This register will work as a parallel connection. In parallel
connection, all the bit will be updated at a time in one clock pulse. In register
operation there will be four operations, No change, Shift right, Shift left,
Parallel load. We have used 4 4:1 MUX. In No Change operation, each output
of D Flip-Flop connects to each of the 0 pin number of the MUX. In Shift Right
operation, 1st Flip-Flop output passed to 1st of 2nd MUX. 2nd Flip-Flop output
passed to 3rd MUX’s 1 pin number. 3rd Flip-Flop’s output passed to 4th MUX’s 1
pin number. In Shift Left operation, all the input will be passed through left
side.
Now we will perform four operations No change, Shift right, Shift left, and
Parallel load. We need to connect each of the D Flip-Flop outputs to each of
the 0 PINs of MUX for no change operation. To perform the Shift right
operation, we have to select 01 of the select bit, then 1st Flip-Flop output will
be passed into one PIN of 2nd MUX. 2nd Flip-Flop output will be passed into 3rd
MUX’s one PIN. This how it will go through till the last MUX. The Shift left
operation is the same, but we have to connect the line from the left side this
time and select 10 pins of select bits. For example, the 4th Flip-Flop’s output
will be passed through as input in the 3rd MUX’s 2 PIN and so on for the rest of
the Flip-Flop. For parallel load operation, all the MUX’s three no PIN will work
as an input. It will work when we select 11 of the select bits. If we want to
perform no change operation, we have just to select 00 of select bits.