ROLL NO.

G.L. BAJAJ INSTITUTE OF TECHNOLOGY &MANAGEMENT

GREATER NOIDA
B. TECH(SEM-III)- (Branch-IT)
SECOND SESSIONAL TEST (ODD SEM 2022-23)
Digital Electronics (KOE-039)
Faculty Name: Dr. Mohan Singh/ Dr. Krishanu Kundu
Unit Covered: 2 & 3
Duration: 02:00Hrs ` Max. Marks:50
Note:
(i) No student will be allowed to leave the examination Room before end of exam.
(ii) Diagram should be neat and clean.
(iii) Mention Question number/section correctly.
(iv) Be precise in your answer.
(v) Do not write anything on question paper except Roll number.

Course Outcomes:
Following are the course outcomes of the subject: - Digital Electronics (KOE 039)
CO Code Course Outcome (CO) Bloom's Level
KOE 039.1 Apply concepts of Digital Binary System and implementation of Gates. L3- Apply
KOE 039.2 Analyze and design of Combinational logic circuits. L4 -Analyze
KOE 039.3 Analyze and design of Sequential logic circuits with their applications. L4 -Analyze
KOE 039.4 Implement the Design procedure of Synchronous & Asynchronous Sequential Circuits. L3- Apply
KOE 039.5 Apply the concept of Digital Logic Families with circuit implementation. L3- Apply

Section: A

1. Attempt all question: (2 x 5 = 10 Marks)

Q.No. Questions Marks CO BL

a) Implement 4:1 MUX using 2:1 MUX. 2 KOE 039.2 L3
b) Explain how BCD addition is carried out. 2 KOE 039.3 L2
c) Discus the Race Around Condition in JK Flip Flops and how it can 2 KOE 039.3 L2
be resolve?
d) What is the difference between Flip-Flop and Latch? 2 KOE 039.3 L2
e) Discuss the Difference between Asynchronous Counter and 2 KOE 039.3 L3
Synchronous Counter?

Section: B

2. Attempt any four of the following: (5 x 4 = 20 Marks)

Q.No. Questions Marks CO BL

a) Construct BCD adder using two 4-bit binary parallel adder and 5 KOE 039.2 L3
logic gates. Explain its working for two 4-bit binary numbers.
b) Design 5:32 Decoder using 3:8 Decoder. 5 KOE 039.2 L4
c) Convert SR Flip Flop to JK Flip Flop. 5 KOE 039.3 L3
d) Design a universal shift register that performs HOLD, SHIFT 5 KOE 039.3 L4
RIGHT, SHIFT LEFT, & LOAD.
e) Design and Implement the MOD 6 Asynchronous up counter using 5 KOE 039.3 L4
JK flip flop.
f) Write the Excitation Table & logic diagram of SR,JK,D & T flip 5 KOE 039.3 L2
flop.

Section: C

3. Attempt any one question (10 x 1 = 10 Marks)

Q.No. Questions Marks CO BL

a) Implement and design the following Boolean function 10 KOE 039.2 L4
𝒇(𝑨, 𝑩, 𝑪, 𝑫) = ∑𝒎(𝟎, 𝟏, 𝟑, 𝟒, 𝟕, 𝟖, 𝟗, 𝟏𝟏, 𝟏𝟒, 𝟏𝟓) using
(i) 4:1 MUX and
(ii) 2:1 MUX.
b) Draw 4-bit Johnson Counter using D flip flop. Explain the working 10 KOE 039.3 L4
with timing diagram and its applications. How many state produced
for the 4-bit Johnson Counter? Also find the output frequency if the
clock frequency is 12 MHz

4. Attempt any one question (10 x 1 = 10 Marks)

Q.No. Questions Marks CO BL

a) Design & Explain the 4 Bit Magnitude Comparator. 10 KOE 039.2 L4
b) Design 3 bit UP/DOWN counter with directional control Mode, M 10 KOE 039.3 L4
using T flip flop.

Course Outcome Wise Marks Distribution

70 48
32
20

-30 CO2 CO3

Checked By
(Head of Department)