Sardar Patel Institute of Technology

Bhavan’s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India

(Autonomous College Affiliated to University of Mumbai)

End Semester Examination

20th April 2022
Max. Marks: 60 Duration: 2Hrs
Class: F.E. Semester: I
Course Code: EC101 Branch: A,B and C

Name of the Course: Digital Systems and Microprocessor

Instructions:
(1) All Questions are Compulsory
(2) Draw neat diagrams
(3) Assume suitable data if necessary

Question Max.
CO
No. Marks
Q.1 A) Design a combinational Circuit for controlling panel light for a
Rocket, the Light should go ON if

The amount in the Fuel tank and the CNG tank is equal to or
above the required minimum and there are 5 minutes or less for
the vehicle to start.
OR 05 CO1
The amount in the Fuel tank is below the required minimum but
there are more than 5 minutes for the vehicle to start.

OR

The amount in the CNG tank is below the required minimum but
there are more than 5 minutes for the vehicle to start.
Q.1 B) Obtain the min terms for the following 4:1 MUX
implementation. A is MSB and D is LSB

05 CO2
 Sardar Patel Institute of Technology
Bhavan’s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous College Affiliated to University of Mumbai)

OR

a. Multiply following numbers (56)7 X (24)5 and write the 03

answer in Octal.
b. What is fixed distance in code? What is its significance? 02

Q.1 C) Using Quine Mc’Clusky Method minimize the given

expression.
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F(A,B,C,D)= ∑m(0,1,3,4,5,7,10,13,14,15)

Q.2 A) Design a “SPIT” flip flop using JK flip flop having two inputs
“SP” & “IT”. The truth table of “SPIT” flip flop is as follows.

S IT Output
P

0 0 ̅̅̅̅
𝑄𝑛
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0 1 0

1 0 0

1 1 𝑄𝑛

Q.2 B) Explain the following w.r.t Logic Families.

a) Power Dissipation
b) Fan In
c) Fan Out
d) Noise Margin
e) Propagation Delay
OR
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Explain the working of TTL Totem Pole NAND gate in brief.
Draw the transfer characteristics. Explain why there are 2 break
points.
 Sardar Patel Institute of Technology
Bhavan’s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous College Affiliated to University of Mumbai)

Q.2 C) Reduce the given State diagram and obtain reduced table using
Normal Method and Implication Chart Method

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Q.3 A) Design a synchronous decade counter using T flip flop which

counts in 2421 BCD.
05 CO3
OR
Design MOD 7 Synchronous counter using JK Flip Flops
Q.3 B) Analyze the following Sequential machine and obtain the state
diagram.

05 CO3
 Sardar Patel Institute of Technology
Bhavan’s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous College Affiliated to University of Mumbai)

Q.3 C) ̅̅̅̅
Design Mod 7 counter using IC 74160 and basic gates. Use 𝐋𝐃
and RCO pins in the design.
OR
Design a sequence generator using IC 7490 decade counter for 05 CO3
the following sequence.

……..111100011111…..

Q.4 Solve Any 3.

(A) What are the various generations of computers. Write a short note.
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4
(B) Draw the timing diagram of MVI M, data instruction. 05 CO
5
(C) Explain any two of the following instructions
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I. DAA 5
II. RST, n
III. LHLD, address

(D) Write an assembly language program to decide whether a number

1.5
in an accumulator has odd parity or even parity. If it has odd 1.5 CO
parity then store FF at memory location 1000H. Else store 00 at 2 4
1000H. Assume that 8085 has no parity flag.