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P3 - Chapter 3 - Flip Flops
SR Flip Flop
+ SR Flip Flops are used for memory storage they store a single bit
+ S-Set (to 1)
+ R- Reset (to original value)
* C-Clear (0)
+ SR Flip Flops can have 2 structures made from either NAND or NOR Gates
NOR Based SR Flip Flop
* Respond to active high inputs. (when an input of 1 is sent)
* The initial outputs form the inputs
* Qand Q compliment can'not be the same.
+ In NOR based flip flops if S is changed to 1 Q changes to 1.
* Oand 0 makes no change ( previous output remains unchanged)
SR NOR Flip Flop Truth Table
A jen Set is True (1) Q
3 when SetleTue(010> |, cs
and 0 Causes no
change
WhenResetisTue(NQ@ 9 1 g 4
20
Qand 0 no change o 0 0 1
Land 1 Invalid state tee ea
3 - Flip Flops + A input of 1 and 1 should not be allowed to occur as they give an invalid
output. This is because Q and Q compliment both have the same value ,
however Q and Q compliments should be compliments of each other, this
causes the flip flop to become unstable.
NAND Based SR Flip Flop
* Responds to active low inputs. (when an input of 0 is sent)
+ In NAND based flip flops if S is changed to 0 Q changes to 1.
* and 1 makes no change ( but in this case 0 and 0 is invalid)
+ Note: The truth table for NAND based flip flops is basically the opposite to.
that of NOR based flip flops.
S: SRNAND Flip Flop Truth Table
Description Se lo lo
When Set is False(0).Q >
A
. Q and 1 Causes no 1 1 1 c
change
When Reset is False(0) Q
oF 1 0 0 1
‘Land 1 no change lo
and 0 Invalid state o o 1 4
er 3 - Flip Flops JK Flip Flop
+ JK flip flops have an additional clock input which helps synchronize inputs
+ J-Set
« K- Clear
©) Why Jk Flip Flops are an improvement over SK Flip Flops?
"SR Flip Flops have an invalid combination of S and R (where both Q
and Q* are the same). JK doesn't allow for Q and Q* to have the
same value. All 4 combinations for JK are valid. It uses a clock pulse
for synchronization
NOR Based JK Flip Flops
+ Notice that both NOR and NAND Based JK Flip Flops have the same truth
tables but here the circuit diagram is varied instead of using NAND gates
to connect the inputs we use AND gates.
3} 33] }3}3} 3]
pter 3 - Flip Flops
No change
sat NAND Based JK Flip Flops
* Active High (1)
* O and 0 no change from initial value
* 1and 1 Flip bits from initial value
¢ Jto True SetsQ>1
* Kto True SetsQ>0
JD
a
cur} SS
=
[ae
napter 3 - Flip Flops
Q
a
NAND Based JK Flip Flops
Description a
Initial Value 0
Qand 0 (Same as
tial value),
Setting J To True(1),
SetsQ>1
Setting K To True(1)
Clears Q > 0
New Initial Value just
for an example
and 1
values
the initial
Clock
