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Lecture (03)

By:
Dr. Ahmed ElShafee

Dr. Ahmed ElShafee, ACU : Fall 2022, Microprocessors


1 Programming
> 86x in action; Fetching &
Execution Cycles
• Fetching Cycles
– The fetch cycle takes the instruction required from
memory, stores it in the instruction register, and
– moves the program counter on one so that it points to the
next instruction.

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• Execute cycle
– The actual actions which occur during the execute cycle of
an instruction.
– depend on both the instruction itself and the addressing
mode specified to be used to access the data that may be
required.

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• Main players
– Instruction pointer (IP)
– Address bus
– Memory access register (MAR)
– Memory Map
– Data bus
– Instruction Register (IR)

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> Fetching an instruction
• Step 1

Instruction pointer (program counter) hold the address


of the next instruction to be fetch.

5
• Step 2

6
• Step 3

7
• Step 4

8
• Step 5

9
• Step 6

10

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Example 01
Moving two
memory
locations to two
registers,
execute
addition inside
processor,
move result
back to
memory
location

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Assembler Directives
 Directives are instructions given by the programmer to the assembler
on how to assemble the program.
 Directives are not part of the instruction set of the microprocessor.
 The use of directives might vary from assembler to assembler.
 Some of the MASM 32 assembler directives are:
– ORG (Origin): Tells the assembler where to store the machine code of
the next instruction.
– EQU (Equate): Tells the assembler to assign a value to an identifier.
– SEGMENT: Tells the assembler to begin a new segment.
– ASSUME: Tell the assembler to associate a segment with a segment
register.
– PROC (Procedure): Tells the assembler to begin a new procedure.
– MACRO: Assigns the sequence of instructions to an identifier.
– END: Ends a program, segment (ENDS), a procedure (ENDP), or a
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macro (ENDM).
> Data Definition Directives
• Data Definition directives tell the assembler to store the
specified data in the next memory locations. Data that
occupies more than one location is stored with the LSByte in
the lower address.
• (DB) Define Byte (1 byte or 8 bits - Same as BYTE)
• (DW) Define Word (2 bytes or 16 bits - Same as WORD)
• (DD) Define Double Word (4 bytes or 32 bits - Same as
DWORD)
• (DQ) Define Quad Word (8 bytes or 64 bits - Same as
QWORD)
• (DT) Define Ten Bytes (10 bytes or 80 bits - Same as TBYTE)

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Examples:
• ABC DB 26H ;ABC=26H
• XYZ DB 35H,87H,0A4H ;XYZ= {35H,87H,A4H}
• YOU DB ‘ahmd’ ;YOU = ahmd’
• VAL DW 1254H ;VAL = 1254H
• X1 DB ? ;X1 = UNSPECIFIED
• X4 DB 3 DUP(20H) ;X4 = {20H,20H,20H}
• N1 DB 123H ;INVALID

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Example 02
• Show the content of the memory based on the
following data definitions:
ORG 100H
VAL1 EQU 21H
AB10 DB 37
NEW DB 23H,56H,’$’
LOT DW 1245H
XY11 DB ‘NEXT’
A123 DD 123H
B561 DB 4 DUP(40H)
VAL2 DB VAL1

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solution
• Show the content of the memory
based on the following data Label Address Content
AB10 DS:0100
definitions: NEW+0 DS:0101
NEW+1 DS:0102
ORG 100H NEW+2 DS:0103
LOT DS:0104
VAL1 EQU 21H
DS:0105
AB10 DB 37 XY11+0 DS:0106
XY11+1 DS:0107
NEW DB 23H,56H,’$’ XY11+2 DS:0108
LOT DW 1245H XY11+3 DS:0109
A123 DS:010A
XY11 DB ‘NEXT’ DS:010B
DS:010C
A123 DD 123H
DS:010D
B561 DB 4 DUP(40H) B561+0 DS:010E
B561+1 DS:010F
VAL2 DB VAL1 B561+2 DS:0110
B561+3 DS:0111
22 Dr. Ahmed ElShafee, NileU : Fall 2017, Microprocessor System Design VAL2 DS:0112
Example 03; data definition;
emu86
ORG 100H
JMP START
VAL1 EQU 21H
AB10 DB 37
NEW DB 23H,56H,’$’
LOT DW 1245H
XY11 DB ‘NEXT’
A123 DD 123H
B561 DB 4 DUP(40H)
VAL2 DB VAL1
START:
nop
END

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80x86 Modes of operation
• Protected mode
– Programs are given separate memory areas
(segments)
– Programs are not allowed to access memory
outside of their segments

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• Real-address mode
– Environment of 8086 processor
– Direct access to system memory and hardware
devices
– The operating system could crash

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• System management mode
– Provides an operating system for implementing
power management and system security functions
(computer manufacturers)

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C U Next Week,…

Dr. Ahmed ElShafee, ACU : Fall 2022, Microprocessors


28
Programming

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