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Arquitetura SAP WR
Arquitetura SAP WR
8-bit bus
PC_INC ACC_IN
1 JMP 4 lsb 8 1
PROGRAM ACCUMULATOR
CLOCK CLOCK
COUNTER 4 lsb 8 REGISTER
PC_OUT ACC_OUT
RESET RESET
MAR_IN ALU_OUT
2 2
4 lsb 8 ADD_SUB
CLOCK MAR ALU
RESET
AND
OR
XOR_NOT
} ALU_1 , ALU_0
8
8
BR_IN
RAM_IN
8
RAM 8
B
CLOCK
3 16 x 8 8 REGISTER 3
RAM_OUT
RESET
IR_IN OPR_IN
8
INSTRUCTION 8
OUTPUT
CLOCK CLOCK
REGISTER 4 lsb REGISTER
IR_OUT
4 4
RESET RESET
CLOCK
HLT
/ CLOCK DECIMAL
CONTROL
RESET
DISPLAY
/ RESET
RESET
5 5
TITLE: DATE:
8 Bit Computer 18
Computer Architecture 18/08/17
CONTROL WORD
WR Kits Eng. Eletrônica PAGE: