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CINEC CAMPUS

FACULTY OF ENGINEERING & TECHNOLOGY

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

BSC (ENG) (ELECTRONICS & TELECOMMUNICATION ENGINEERING)

BSc (ENG) (MECHANICAL ENGINEERING)

YEAR 2 SEMESTER 1 FIRST SIT EXAMINATION 2022

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Module Code : EE2314


Module Title : Analog Electronics
Date : 05th September 2022 / 1300h – 1600h
Examiners : Praveen Ekanayake
Time Allowed : 3 Hours
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INSTRUCTIONS TO CANDIDATES

• This is a closed book examination.

• Answer 4 questions only.

• This paper contains 6 pages.

• Students may use a Scientific calculator. This must not be programmable

• GOOD LUCK!

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Question 1

1. Explain how to prevent a transistor from going into cutoff or saturation when an input
signal is applied.

[5 MARKS]

2. Draw the dc equivalent circuit and the ac equivalent circuit for the amplifier shown in
Figure Q1.1.

[5 MARKS]

Figure Q1.1

3. From the circuit shown in Figure Q1.1, determine the following (Input AC signal Vin =
10mV (peak) and Source Resistance, RS=600Ω).
a. DC Quiescent Point
b. Rin(tot)
c. Voltage Gain (Av)

[15 MARKS]

TOTAL 25 MARKS

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Question 2
Consider the following given circuit (Figure Q2.1). From the circuit,

1. Identify the circuit configuration.

[3 MARKS]

2. Identify and show the discontinuity in the output signal.

[5 MARKS]

3. Suggest a modification that can overcome that particular issue and explain how.

Figure Q2.1

[7 MARKS]

4. Characteristics of two op-amps are as follows.

Op-amp 1: Rin = 5 MΩ, Rout = 100 Ω, open-loop gain = 50,000

Op-amp 2: Rin = 10 MΩ, Rout = 75 Ω, open-loop gain = 150,000

Choose the most desirable op-amp and justify your answer.

[10 MARKS]

TOTAL 25 MARKS
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Question 3

1. For the circuit shown in Figure Q3.1, determine the bandwidth of the amplifier.

Figure Q3.1

[15 MARKS]

2. Draw the band-pass filter circuit

[5 MARKS]

3. Draw the band-stop filter circuit

[5 MARKS]

TOTAL 25 MARKS

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Question 4
1. The op-amp in the following circuit (Figure Q4.1) outputs a current of 5 mA. (Io =5 mA).
The transistor has β=100. Calculate the value of the resistor R.

Figure Q4.1

[9 MARKS]

2. Determine the output voltage of each circuit shown in Figure Q4.2 and Figure Q4.3

Figure Q4.2

Figure Q4.3

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[8 x 2 = 16 Marks]

TOTAL 25 MARKS

Question 5

1. Explain the concept “Lead-Lag” circuit.

[5 Marks]

2. Calculate the resonant frequency of a lead-lag circuit with the following values: R1 = R2=
6.2kΩ, and C1=C2= 0.02µF.

[3 Marks]

3. Draw the schematic diagram of the Wien Bridge oscillator and explain the lead-lag
relationship with the resonant frequency of the Wien Bridge oscillator.

[7 Marks]

4. Using diagrams, describe the conditions for the oscillations of the Wien Bridge oscillator

[10 Marks]

TOTAL 25 MARKS

END OF THE EXAM PAPER.

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