Instructor Manual Designed by Engr.

Wania Anoosh

Experiment 08

Interfacing Codec TLV320AIC23, and Use of DAC and ADC

Objectives:
• Introducing students to AIC23 Codec in DSK
• Generation of sinusoidal waveform through a lookup table and displaying output on
oscilloscope
• Using AIC23 codec to take real time input signal from Function Generator and display the
waveform on oscilloscope

Equipment required:
• C6713 DSK
• Power Cable
• USB Cable
• Code Composer Studio v5.1.0
• Function Generator
• Oscilloscope

Background Knowledge:
AIC23 Codec:
The DSK uses a Texas Instruments AIC23 (part #TLV320AIC23) stereo codec for input and output of
audio signals. The codec samples analog signals on the microphone or line inputs and converts them
into digital data so it can be processed by the DSP. When the DSP is finished with the data processing,
it uses the codec to convert the samples back into analog signals on the line and headphone outputs
so the user can hear the output. The codec, located on DSK, interfaces the DSP chip to the analog
environment, such as signal generator, oscilloscope, or stereo headphones. The codec contains an
analog-to-digital converter (ADC), and a digital-to-analog converter (DAC). The ADC circuitry on the
codec converts the input analog signal to a digital representation to be processed by the DSP.

DSP system with input and output

The codec communicates using two serial channels, one to control the codec’s internal configuration
registers and one to send and receive digital audio samples. McBSP0 is used as the unidirectional
control channel. It should be programmed to send a 16-bit control word to the AIC23 in SPI format.
The top 7 bits of the control word should specify the register to be modified and the lower 9 should

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contain the register value. The control channel is only used when configuring the codec, it is generally
idle when audio data is being transmitted, McBSP1 is used as the bi-directional data channel.
Many data formats are supported based on the three variables of sample width, clock signal source
and serial data format. The DSK examples generally use a 16-bit sample width with the codec in
master mode, so it generates the frame sync and bit clocks at the correct sample rate. The preferred
serial format is DSP mode which is designed specifically to operate with the McBSP ports on TI DSPs.
The codec has a 12MHz system clock. The 12MHz system clock corresponds to USB sample rate mode,
named because many USB systems use a 12MHz clock and can use the same clock for both the codec
and USB controller. The internal sample rate generate subdivides the 12MHz clock to generate
common frequencies such as 48KHz, 44.1KHz and 8KHz. The sample rate is set by the codec’s
SAMPLERATE register. The figure below shows the codec interface on the C6713 DSK.

DSK6713 Codec Interface

Once the digital signal is processed, a DAC is used which performs the reverse operation of ADC. An
output filter smooths out or reconstructs the output analog signal. ADC, DAC, and all required filtering
operations are performed by the single-chip codec AIC23 on the DSK. The coder and decoder support
data word lengths of 16b, 20b, 24b, and 32b. The ADC converts an input signal into discrete output
in a 2’s complement format which corresponds to the analog signal value. The DAC includes an
interpolation filter and a digital modulator. A decimation filter reduces the digital data rate to the
sampling rate. The DAC’s output is first passed through an internal lowpass reconstruction filter to
produce an output analog signal.
Sampling:
Internally, the sampler is over-sampling at 250-384 times fs, depending on fs. This is a common
practice when using delta-sigma modulators. A delta-sigma modulator takes the current sample and
compares it with the previous sample. If the current sample is larger (or smaller) than the previous
sample, it makes the current sample the previous sample plus (or minus) some fixed amplitude δ. In
our case, we have a 1-bit delta-sigma modulator which means that the current sample (16-bit finite-
length word) will be the previous sample plus (or minus) a binary 1, assuming that the current
sample is larger (or smaller) than the previous sample. By over-sampling, a good representation of
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the original signal is captured at each sample point, since the signal, which is essentially band-limited,
will not change by more than 1 bit, or quantization level, between each sample point.
An additional advantage of over-sampling is that images of the input signal spectrum created by
sampling are shifted to very high frequencies. For example, with fs = 8KHz and an oversampling ratio
of 250, the first image occurs at 2MHz, so the anti-aliasing filter need only roll-off at 90% of 1MHz,
which is much easier to implement than a filter for a Nyquist-rate converter (sampling ratio=1),
which would require a 4KHz roll-off. Only every 250th to 384th sample point is needed to accurately
represent the bandlimited signal, so a decimation filter (LPF running at 8KHz) is used to decrease the
word rate to the desired rate of 8KHz. These 16-bit finite-length words are then transmitted to the
CPU via serial port 0 on the DSP chip. The CPU will treat these 16-bit finite length words as 16-bit
signed integers (-32768 to +32767).
Reconstruction:
The discrete-time signal is artificially increased in rate by a factor of M (zero-filled up-sampling).
Here M = 250 to 384, just as with the coder (ADC). A high rate discrete-time LPF is used to interpolate
the M −1 newly inserted samples. The up-sampled signal is then converted from a discrete-time
signal to a continuous-time signal by a DAC and finally, a smoothing filter (anti-imaging filter) is used
to create a continuous-time signal. As with the ADC, the higher output rate of the DAC, combined with
the interpolating filter, considerably simplifies the analog LPF on the output of the DAC.
The figure given below shows the generic input/output DSP system:

Codec Connectors:
Four connectors on the board provide input and output capabilities:

• MIC IN for microphone input

• LINE IN for line input
• LINE OUT for line output
• HEADPHONE for headphone output (multiplexed with line output)

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Polling:
The polling technique uses a continuous procedure of testing when the data is ready. Although it is
simpler than the interrupt technique, it is less efficient since the input and output data need to be
continuously tested to determine when they are ready to be received or transmitted.

Sine Wave Generation Using Eight Points:

Create an array which contains 16-bit signed integers initialize it to contain eight samples of exactly
one cycle of a sinusoid. The value of sine_table is equal to 1000 ∗ sin(𝑡), where t = 0, 45, 90, 135, 180,
225, 270, and 315 degrees. Within the main function, another function, comm_poll, should be called.
The statement while (1) within the function main will create an infinite loop. When dip switch #0 is
pressed, LED #0 should turn on and the sinusoid should be generated. Otherwise,
DSK6713_DIP_get(0) will be false (true if the switch is pressed) and LED #0 will be off.
Every sample period T = 1/Fs = 1/8000 = 0.125 ms, the value of dip switch #0 is tested, and a
subsequent data value in sine_table (scaled by gain = 10) is sent for output. Within one period, eight
data values (0.125 ms apart) are output to generate a sinusoidal signal. The period of the output
signal is T = 8(0.125 ms) = 1 ms, corresponding to a frequency of f = 1/T = 1 kHz. Consequently, one
cycle of the sinusoidal analog output waveform corresponds to eight output samples and hence the
frequency of the sinusoidal analog output waveform is equal to the codec sampling rate (8 kHz)
divided by eight, that is, 1 kHz.

Interrupts:
Interrupts are another way of handling asynchronous events on the DSP chip and may be generated
either internally through software or externally by other components on the DSK. Interrupt handling
requires extra hardware that operates autonomously from the CPU. The C6713 chip is equipped with
this hardware (timers, McBSP, etc.) and is the preferred way to time events on the DSP chip. When
interrupts are used to establish the real-time link between the on-board codec and the CPU, the
interrupt registers in SP0 are configured to handle interrupts. When the codec sets the transmit ready
bit in the SPCR, the McBSP will generate an interrupt. When an interrupt occurs, the following events
happen:

• The current program execution is halted.

• The current execution state is saved (in a CPU register).
• The program branches to and processes the interrupt.
• Upon completion of the interrupt processing, the execution state is restored, and the program
continues executing.

On the C6713 DSP chip, there are thirty-two possible interrupt sources, but only twelve may be
assigned by the programmer, namely INT4 through INT15. These twelve interrupts are prioritized
by the ‘Interrupt Selector’. Using interrupts requires that each interrupt be mapped to an interrupt
service routine (ISR). This is done by a Vectors file that, in our case, maps INT11 to the C coded ISR
c_int11(). In addition, INT11 must be selected to handle interrupts from XINT0, and the DSP chip
must be set up to accept programmer assigned interrupts. These tasks will be done by the C coded
function comm_intr().

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Sine Wave Generation using Interrupt:

The code given below reads real time input signal from the function generator, passes it through ADC
and DAC and then displays the output on oscilloscope.
In this example, a sampling rate of 8 kHz is used, and interrupts will occur every 0.125 ms. (Sampling
rates of 16, 24, 32, 44.1, 48, and 96 kHz are also possible.) Following initialization, function main()
enters an endless while loop, doing nothing but waiting for interrupts. The functions that will act as
interrupt service routines for the various different interrupts are specified in the interrupt service
table contained in file vectors_intr.asm. This assembly language file differs from the file
vectors_poll.asm in that function c_int11() is specified as the interrupt service routine for interrupt
INT11. On interrupt, the interrupt service routine (ISR) c_int11() is called and it is within that routine
that the most important program statements are executed. Function output_left_sample() is used to
output a value read from the codec using function input_left_sample().
Visualizing Output on Oscilloscope:
Compile and load this program onto the DSK and run it. Connect the signal generator to one end of
the stereo audio cable and plug the other end into the line-in jack on the DSK (J303). Plug the second
cable into the line-out jack on the DSK (J304) and the other end to oscilloscope channel 1. (Make sure
that the oscilloscope is calibrated beforehand). Set the signal generator to a 1KHz sinusoid with
amplitude 1Vpp (peak-to-peak voltage) and observe a 1KHz sinusoid on oscilloscope. Change the
peak-to-peak voltage and the frequency on the signal generator and observe the effects on the
oscilloscope. If the voltage input to the codec exceeds 3.3V, then the codec will be overdriven. When
the codec is overdriven, the output on the codec will reveal either amplitude clipping of the input
sine wave. If the voltage input is too small (around 100mV or less), then coupling effects from the
internal hardware will be observed. For frequency, keep in mind that there is a lowpass filter that
cuts off frequencies above 4KHz. Vary the frequency of the sinusoid on the signal generator and
observe that sinusoids above 4KHz are suppressed. (Note that sinusoids around 4KHz are decreased
in amplitude, but not fully suppressed. This is due to the fact that the anti-aliasing filter is not ideal
and therefore has a non-zero roll-off around 4KHz.)

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Lab Tasks:
1. Write a code in CCS to read analog input from the function generator, converts it to digital
signal and then converts it back to analog signal. Display the results on oscilloscope.
The input signal from function generator should be a 1Vpp sine wave with frequency of 1 kHz.
Note: Using sampling rate = 16 kHz.

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