Analog Electronics Study Guide

SANDUR POLYTECHNIC, YESHWANTNAGAR
Analog Electronics
Rahul. S. Mahendrakar
A
Study Material
Of
ANALOG ELECTRONICS
[20EC31P]
Prepared as per C-20 Curriculum W.e.f. 2021-22
For III semester E&CE students
Compiled By
Rahul. S. Mahendrakar
Lecturer
Department of Electronics & Communication Engineering
SANDUR POLYTECHNIC, YESHWANTNAGAR
Course Details
Course Title ANALOG ELECTRONICS Course Code 20EC31P

Semester III Course Group Core
Teaching Scheme L:T:P::3:1:4 Credits 6
Type of Course Core Total Contact Hours 102 Hrs
CIE 60 Marks SEE 40 Marks
Rationale
Analog electronics is a branch of electronics that deals with a continuously variable signal. It is widely used in radio and audio
equipment along with other applications where signals are derived from analog sensors before being converted into digital signals for
subsequent storage and processing. Analog Electronics offers a very elegant design with many components and would effectively act
as an impetus to the digital world.
Course Outcomes/Skill Sets: On successful completion of the course, the students will be able to:
Identify the components in a given analog electronic circuit and list their characteristics and
CO-1
uses.
Study the given analog circuit and using the data sheets/specification sheets, list alternative electronic components for the
CO-2
given circuit.
Construct an analog electronic circuit for a given application and demonstrate the working of
CO-3
that circuit either in Real or Simulated environment.
Test a given circuit for a desired result/outcome, identify the problem and troubleshoot to obtain
CO-4
the desired result/outcome.
DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION i

Course Content:
Lecture Tutorial Practice

Week CO PO (Knowledge Criteria) (Activity Criteria) (Performance Criteria)
3 Hours/Week 1 Hour/Week 4 Hours/Week
I. Power Supplies
i Need, Types – Unregulated,
Regulated – Linear, Switched, 1. Build +5V/+12V regulated
Battery, Selection Criteria of power supply
1, 3, 4, 6, different power supplies 2. Identify the components in
I 1, 3, 4 ii RPS & UPS – Online & Offline
Refer Table 1
SMPS
7
– Block Diagram and its 3. Identify the front panel control
working principle & indicators of UPS
iii SMPS – Block diagram and its
working principle
II. Wave Shaping Circuits
i RC Integrator & RC
Differentiator
4. Generate trapezoidal and
ii Clippers - Series, Shunt &
positive cycle from sinusoidal
II 1, 3, 4 1, 3, 4, 6, 7 Biased Refer Table 1
waveform.
iii Clampers – Positive Voltage &
5. Voltage doubler and Tripler.
Negative Voltage
iv Voltage Multipliers – doubler,
Tripler
III. Special Purpose Diodes
i Features & Applications of
Tunnel Diode, Varactor Diode. 6. Test special purpose devices
1, 2, ii Features & Applications of 7. Simulate simple application
III 1, 3, 4, 6, 7 Gunn diode & PIN diode, Solar
Refer Table 1
circuit using special purpose
3, 4
cell devices.
iii Features & Applications of
Schottky diode & UJT.
IV. Transistor Amplifiers
i Introduction, DC load line,
Operating point, Need for biasing,
Stabilization, stability factor
1, 2, ii Types of biasing-voltage divider 8. Simulate AND gate and OR
IV 1, 3, 4, 6, 7 bias for BJT
Refer Table 1
gate using transistors.
3, 4
iii Classification of Amplifiers-based
on use, frequency, coupling
methods & mode of operations
(advantages and disadvantages)
DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION ii

V. CE Amplifiers
i CE Amplifier- Working,
voltage gain and phase reversal 9. Construct and plot the
ii RC Coupled transistor amplifier frequency response curve of
V 3, 4 1, 3, 4, 6 and frequency response Refer Table 1 RC coupled amplifier.
iii Power amplifiers- 10. Simulate the working of RC
classification, principle & coupled amplifier using FET.
performance criteria of power
amplifiers
VI. Types of Power Amplifiers
i Working of Class-A–Series-fed
amplifier and transformer-
coupled amplifier. Expression
for output power and maximum
power efficiency
ii Class B- Push pull Amplifier
and complementary-symmetry 11. Simulate the working of class-
VI 3, 4 1, 2, 5, 6, 7 push-pull amplifier. Expression
Refer Table 1
B push pull amplifier.
for output power and maximum
power efficiency
iii Working of Class AB and Class
C amplifiers. Stages of practical
power amplifier, Concept and
expression for voltage gain of
multistage amplifiers.
VII. Introduction to Operational
Amplifiers
i Op-amp: Block diagram,
Symbol, Basic differential 12. Identify Op-amp IC, its pins
amplifier- Working principle and interpret its data sheet.
ii Modes of operation-Single 13. Conduct an experiment to
ended, Common mode &
find the practical
VII 1, 2, 3 1, 4, 6 Differential mode, Ideal and Refer Table 1
practical characteristics characteristics of op-amp
iii Op-amp parameters: Input and compare them ideal
offset voltage, input offset characteristics.
current, power supply rejection
ratio, CMRR, Input and output
impedance, gain, gain
bandwidth product, slew-rate.
DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION iii
VIII. Op-amp Configurations
i Open-loop configuration:
Comparator-inverting, non-
14. Use op-amp to construct and
inverting, applications,
test Inverting and
disadvantages
Noninverting amplifiers
VIII 3, 4 1, 4, 6 ii Closed-loop configuration: Refer Table 1
virtual ground, applications –
test Summing amplifier and
inverting, noninverting
Difference amplifier.
amplifier
iii Voltage follower, summing &
difference amplifiers
IX. Applications of Op-amp
i Construct and verify Op-amp as
Differentiator, Integrator 16. Construct and verify Op-amp
ii Op-amp as Schmitt trigger and as Differentiator, Integrator
IX 3, 4 1, 3, 4, 6 precision rectifier
Refer Table 1
iii Sinusoidal Oscillators, Types of test Schmitt trigger
Oscillations, LC Tank circuit
and stability
X. Oscillators
i Concept of feedback and types,
Barkhausen criteria 18. Simulate the working of
ii Types of Oscillators. Working of Harley oscillator using BJT.
X 3, 4 1, 3, 4, 6 Hartley oscillator using BJT/Op- Refer Table 1 19. Simulate the working of
amp and its applications. Colpitts’s oscillator using
iii Working of Colpitts and crystal BJT.
oscillator using BJT/Op-amp and
their applications
XI. Filters
i Working of RC phase-shift and
Wein-bridge oscillators using
20. Construct RC phase shift
Op-amp and their applications
oscillator using op-amp to
ii Filters: Classification,
generate 1KHz sine wave.
XI 3, 4 1, 3, 4, 6 Applications & Advantages of Refer Table 1
21. Conduct an experiment to plot
Active over Passive Filters
the frequency response of LPF
iii Filter Terminology, frequency
and HPF using op-amp.
response of 1st order
Butterworth LPF, HPF (No
Derivation)
DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION iv

XII. Instrumentation Amplifier & PLL
i Frequency response of 1st order
Butterworth BPF and Band
Elimination Filter, BEF (No
Derivation) 22. Build an Instrumentation
ii Instrumentation amplifier-Need for Amplifier Circuit to detect and
XII 3, 4 1, 3, 4, 7 instrumentation amplifier, Working
Refer Table 1
Amplify Analog/Bio Potential
of instrumentation amplifier circuit Signals.
iii Phase Locked Loop (PLL): voltage
to frequency converter, PLL
operation with mention of its
applications
XIII. IC 555 Timer
i IC 555 Timer: Internal diagram,
Pin Configuration. Interpret 23. Verify the working of IC-555
Datasheets as astable multivibrator.
XIII 1, 3, 4 1, 3, 4 ii IC 555 timer as Astable
Refer Table 1
24. Verify the working of IC-555
multivibrator as monostable multivibrator.
iii IC 555 timer as monostable
multivibrator
Total in hours 39 13 52
Table1: List of Suggested Activities
Week No. Suggested activities for tutorials
1. Gather knowledge and give a presentation on the type of power supply used in mobile charger, desktop
computer and laptop with its specifications and justify.
I 2. Build a Notch Filter to reject 50 Hz noise in power supplies and demonstrate it in the class.
3. Identify the type of UPS used in the lab, its specifications, analyze its load carrying capacity related to its
power factor and prepare a report on it.
1. Design and build a circuit that can store maximum voltage of the input signal (Peak Detector) and demonstrate
it in the class.
II 2. Prepare a report on any one application of peak detector in daily life, also compare the nature of output of a
rectifier and a peak detector.
3. Prepare a video of a circuit which increases the input voltage 4 times. (Quadrupler).
1. Give a presentation on the use of opto isolator to detect DC or control AC signals and data.
III 2. Demonstrate the use of PIN diode as a switch in domestic applications.
3. Build a power supply switching circuit using optocouplers.
DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION v
Week No. Suggested activities for tutorials
1. Prepare a report on applications of each type of amplifier and present it.
IV
2. Demonstrate any one real life application of an amplifier.
1. Prepare a report and explain a specific application of emitter follower in daily life. (Ex: as switching
V circuit, isolator circuit, voltage buffer, impedance matching circuit).
2. Prepare a presentation on comparison of power amplifiers.
1. Prepare a video/report on any one real life application of a power amplifier.
VI 2. Build and demonstrate radio player amplifier circuit.
3. Give a presentation on low noise amplifiers.
1. Explain the criteria for selecting an op-amp for a given application.
VII
2. Identify at least 5 electronic circuits using op-amp and present the details of its working.
1. Prepare a report on comparison of transistor amplifier and op-amp.
VIII
2. Demonstrate the operation of auto cut for manual stabilizers using 741 IC.
1. Explain how an op-amp can be used in applications such as A/D converters, wave shaping circuits etc.
IX
2. Prepare a report on Schmitt trigger applications such as switch debouncing, noise removal etc.
1. Demonstrate the operation of a variable audio frequency oscillator using op-amp 741.
X
2. Explain the working of FM radio jammer.
XI 1. Discuss the problems to design and analyze 1st order Butterworth filters.
2. Demonstrate how LEDs can be made to blink on the beats of music.
XII 1. Prepare a report on different applications of instrumentation amplifier
2. Explain the operation of Frequency Shift Keying (FSK) generator using PLL 565.
XIII 1. Study the latest technological changes in this course and present the impact of these changes on industry.
2. Demonstrate the use of IC 555 timer in traffic light controller.
3. List the real-life applications of IC 555 timer and explain any one application.
DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION vi

CIE and SEE Assessment Methodologies
Sl. No. Assessment Test Week Duration in minutes Max Marks Conversion
1 CIE-1 Written Test 5 80 30
2 CIE-2 Written Test 9 80 30 Average of three tests 30
3 CIE-3 Written Test 13 80 30
4 CIE-4 Skill Test-Practice 6 180 100 Average of two skill tests
5 CIE-5 Skill Test-Practice 12 180 100 20
CIE-6 Portfolio continuous evaluation
6 1-13 10
of Activity through Rubrics
Total CIE Marks 60
Semester End Examination (Practice) 180 100 40
Total Marks 100
Format for CIE-(4,5) Skill Test -Practice
Sl. No. COs Particulars/Dimension Marks

Identify and test the given electronic components - 10 Marks
1 1, 2 20
Interpret datasheet of any one electronic component -10 Marks
2 3 Test the working of electronic circuit using simulation. 20
Conduct an experiment on analog circuit
a) Writing the circuit diagram, tabular column, formula 10 Marks
3 3, 4 b) Build the circuit 10 Marks 40
c) Test, troubleshoot and demonstrate working of the circuit 10 Marks
d) Result 10 Marks
4 1, 2, 3, 4 Portfolio evaluation of Practice sessions through rubrics 20
Total Marks 100
DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION vii

Reference:
Sl. No. Description

Electronic Devices and Circuits, S. Salivahanan , N. Sereshkumar , McGraw Hill Education (India) Private Limited, ISBN -
1
9781259051357
2 Op-amps and linear integrated circuits, Ramakanth A. Gayakwad, ISBN- 9780132808682
3 Principles of Electronics, Rohit Mehta and V K Mehta, S. Chand and Company Publishing, ISBN- 9788121924504
4 Electronic Devices and Circuits, David A. Bell, Oxford University Press, ISBN9780195693409
Fundamentals of Electrical and Electronics Engineering, B. L. Theraja, S. Chand and Company Publishing. REPRINT
5
2013, ISBN-8121926602.
SEE Scheme of Evaluation
Sl. No. COs Particulars/Dimension Marks

Identify and test the given electronic components - 10 Marks
1 1, 2 20
Interpret datasheet of any one electronic component -10 Marks
2 3 Test the working of electronic circuit using simulation. 20
Conduct an experiment on analog circuit
a) Writing the circuit diagram, tabular column, formula 10 Marks
3 3, 4 b) Build the circuit 10 Marks 40
c) Test, troubleshoot and demonstrate working of the circuit 10 Marks
d) Result 10 Marks
4 1, 2, 3, 4 Viva-Voce 20
Total Marks 100
DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION viii

Contents
Week Unit Title Page No.
1 Power Supplies 1-5
2 Wave Shaping Circuits 6 - 13
3 Special Purpose Devices 14 - 17
4 Transistor Amplifiers 18 - 22
5 RC Coupled Amplifiers 23 - 28
6 Power Amplifiers 29 - 31
7 Introduction to Operational Amplifiers 32 - 38
8 Configuration of Op-Amps 39 - 47
Applications of Op-Amp & Basics of
9 48 - 56
Oscillators
10 Sinusoidal Oscillators 57 - 62
11 Active Filters 63 - 69
12 Instrumentation Amplifier & PLL 70 - 73
13 IC-555 Timer 74 - 79
Analog Electronics 20EC31P
Course Content 1 1. Poor regulation

2. Variations in the AC mains supply
Power Supplies 3. Variations in the temperature
All above mentioned problems can be eliminated by using regulated
power supplies which incorporates a regulator to maintain the constant
Lecture Tutorial Practice DC voltage irrespective of the variations.
(Knowledge Criteria) (Activity Criteria) (Performance Criteria) 1.2. Types of Power Supplies
Gather knowledge and
give a presentation on i. Unregulated power supplies
the type of power supply ii. Regulated power supplies
used in mobile charger, iii. Linear power supplies
desktop computer and iv. Switched power supplies
Introduction
laptop with its
Need, Types- Unregulated,
specifications and Build +5V/+12V
regulated, Linear and
switched
justify. regulated power supply. 1.3. Block Diagram of Regulated Power Supply
The regulated power supply comprises several components in
Build a Notch Filter to Identify the components the conversion of AC voltage to DC and maintenance of the constant
RPS & UPS
reject 50 Hz noise in in the SMPS.
Online & Offline – Block DC voltage as shown in the figure 1.1.
power supplies and
Diagram and its working
demonstrate it in the Identify front panel
principle
class. control & indicators of
UPS
SMPS
Identify the type of UPS
Block diagram and its
used in the lab, its
working principle
specifications, analyze Figure 1.1. Block diagram of regulated power supply
its load carrying
capacity related to its Transformer: Usually, a step-down transformer is used, which
power factor and decreases the AC voltage level and its output is fed as input to the
prepare a report on it. rectifier. Secondary voltage of this transformer is fed as input to the
rectifier.
Knowledge Criteria Rectifier: Rectifier converts the sinusoidal voltage into pulsating DC.
Pulsating DC means the signal will be mixture of DC and small amount
of AC in terms of ripples.
1.1. Need for Regulated Power Supplies Output of the rectifier is called as ripple voltage and is fed as input to
The semiconductor devices and integrated circuits in any of the the filter.
electronic circuit or equipment usually operate on DC voltages. The Filter: It is also called as smoothing circuit.
characteristic behavior of devices depends on how much pure and Filter removes the AC component (ripple) from the output of rectifier.
constant DC voltage by which they are operating. A slight variation in Output of the filter is only DC but it is not constant, this voltage is called
the operating DC voltage causes an undesirable effect and results into unregulated voltage.
Regulator: It maintains constant output DC voltage irrespective of the
circuit or malfunctioning. The unregulated power supplies not good
variations in the output current.
enough because of the following reasons:
Department of E&CE Page 1 of 79 RAHUL S MAHENDRAKAR
1.4. Uninterruptible Power Supply 1.4.2. Offline UPS

UPS is an electrical system that provides continuous power ➢ The offline UPS acts as an alternative power source in the event
supply to load during mains failure or over voltage or under voltage of power outage.
conditions. Mainly UPS are available in two configurations. ➢ Figure 1.3. shows the block diagram of offline UPS.
i Online UPS
ii Offline UPS
1.4.1. Online UPS
➢ In this configuration, battery acts as the primary power source
and load is always connected to the inverter.
➢ Figure 1.2. shows the block diagram of online UPS.
Figure 1.3. Block diagram of offline UPS

➢ During normal operation, AC mains supply directly connected
to load and hence only RFI (Radio Frequency Interference)
filtering is provided. The flow will be as follows.
Figure 1.2. Block diagram of online UPS

➢ The UPS converts the 230V input AC mains supply to DC
power, which is then used to charge the battery,
➢ The inverter converts DC output of the battery into AC. ➢ During failure of the mains, flow will be as follows.
➢ During normal operation, the flow is as follows:
➢ Upon the return of mains power, the output is switched back

➢ During failure of AC mains, the flow is as follows: onto mains and the inverter is turned off. Typically, there will be
a break of 4-10ms during the transfer from to and from the
battery mode.
1.5. SMPS
➢ SMPS is an acronym for Switched Mode Power Supply.
➢ During failure of the rectifier/battery/inverter, the flow will be ➢ Figure 1.4. shows the block diagram of SMPS.
as follows. ➢ The main supply is rectified by the bridge rectifier and smoothed
to provide high voltage DC.

➢ The high voltage DC converted into high frequency AC by Performance Criteria

means of a chopper and an electronic switch.
RPS, SMPS & UPS
Experiment No. 1.1: Regulated Power Supply
Aim: To construct and test +5V regulated power supply.
Figure 1.4. Block diagram of SMPS Component Required:

➢ Secondary voltage of the transformer finally rectified by a Sl. Equipment/
Specification Quantity
double diode full wave rectifier and smoothed by a filter circuit. No. Component Name
➢ To regulate the output, a portion of the output voltage is fed back 1 Stepdown transformer 12V-0V-12V 01
and compared with the reference voltage. The difference 2 Bridge rectifier module BR64/BR68 01
between these two are called error voltage and is used to control 3 Regulator IC 7805 01
the ON and OFF ratio of the multivibrator. 4 Electrolytic capacitor 100µF 01
➢ The output of the multivibrator controls the action of the chopper 5 Resistor 1KΩ 01
in high voltage DC circuit. 6 Multimeter - 01
➢ The ON and OFF ratio of multivibrator controls the rms value 7 Wires - As needed
of the transformer primary and in turn the final output voltage.
Circuit Diagram:
Figure 1.5. +5V Regulated power supply
Tabular Column:
Input Voltage Output Voltage

Theory: Experiment 7.2. SMPS

Regulated power supply is an electronic circuit that is designed
to provide a constant dc voltage of predetermined value across load Aim: To identify the different parts of SMPS.
terminals irrespective of ac mains fluctuations or load variations. The
circuit mainly consists of: Components and Apparatus Required:
➢ Stepdown transformer
➢ Rectifier Sl. Equipment/
➢ Filter No. Component Name
➢ Regulator 1 SMPS - 01
Procedure:
1. Connect the circuit as shown in the circuit diagram.
2. Measure the AC voltage at the secondary of the transformer and
note down in the tabular column.
3. Measure the DC voltage at the secondary of the transformer and
note down in the tabular column.
4. Disconnect the circuit safely.
Result:
Regulated power supply is constructed to output +5V and tested.
Figure 1.6. SMPS
Different parts of SMPS are as follows:

A: Input EMI filtering and bridge rectifier
B: Input filter capacitors
Between B and C: Primary side heat sink;
C: Transformer
Between C and D: Secondary side heat sink
D: Output filter coil
E: Output filter capacitors.
The coil and large yellow capacitor below E are additional input filtering
components that are mounted directly on the power input connector and
are not part of the main circuit board.
The SMPS provide at least 5 independent voltage outputs.
Result: Different parts of SMPS are identified and gain knowledge

about their functions.
Expt. 7.3. UPS When the UPS is operating from utility power
(the Power LED is green), the Battery Charge
Aim: To study different front panel control of UPS. LED indicates the approximate charge state of
the batteries:
Components and Apparatus Required: • Red - The batteries are beginning to
charge.
Sl. Equipment/ • Amber - The batteries are midway
Specification Quantity through charging.
No. Component Name
• Green - The batteries are fully charged.
1 UPS - 01
When the UPS is operating on battery power
during a blackout or severe brownout (the Power
6 Battery Charge LED LED is flashing green), the Battery Charge LED
indicates the approximate amount of remaining
battery energy:
• Red - The batteries have a low level of
energy.
• Amber - The batteries have a medium
amount of energy.
• Green - The batteries have a high
Figure 1.7. Front panel controls of UPS amount of energy.
Sl. No Item description Function Periodically initiate a self-test to determine the

energy level of the batteries before a blackout or
Power On/Standby Turns the UPS power on and off, and places the
1 brown out occurs.
button UPS in Standby mode
7 Mute/Test button Silences UPS alarms and initiates a self-test.
Shows approximately how much of the UPS
power capacity is used to support the equipment
Output Load Level connected to the output receptacles.
2
LED Red - Maximum load
Amber - Medium load
Green - Light load
Green - The UPS is on and supplying connected
equipment with AC power.
Flashing green - The UPS is operating from its
3 Power LED internal batteries during a blackout or severe
brownout. If the blackout or brownout is
prolonged, save any open files and shut down
the connected equipment.
Green - The UPS is automatically correcting
Voltage Correction
4 high or low AC voltage on the utility line
LED
without the assistance of battery power.
Amber—During a self-test, the UPS found that
Battery Warning
5 the batteries must be recharged. Charge the
LED
batteries and repeat the self-test.

Course Content 2 ➢ Under certain conditions, the voltage drop across C will be very
small in comparison to the voltage drop across R. hence total
Wave Shaping Circuits input voltage Vi appears across R.
➢ Current through resistor R is given by
𝑉𝑖
𝑖𝑅 =
Lecture Tutorial Practice 𝑅
(Knowledge Criteria) (Activity Criteria) (Performance Criteria) The output voltage across the capacitor is given by
1
Design and build a 𝑉𝑜 = 𝐶 ∫ 𝑖𝑅 dt
circuit that can store the 1 𝑉
RC Integrator & RC maximum voltage of the = 𝐶 ∫ 𝑅𝑖 dt
Differentiator input signal (Peak 1
Detector) and
𝑉𝑜 = 𝑅𝐶 ∫ 𝑉𝑖 dt
Generate the following
Clippers demonstrate it in the
waveforms from the According to the above equation, the output voltage is
• Series class. proportional to the integral of the input signal.
sinusoidal waveform.
• Shunt • Trapezoidal ➢ The behavior of the circuit to the square wave is illustrated in
Prepare a report on any
• Biased • Positive cycle
one application of peak figure 2.2.
detector in daily life,
Clampers Construct and verify the
also compare the nature
• Positive voltage doubler and
of the output of a
• Negative rectifier and a peak
Tripler circuit to multiply
the input voltage.
detector.
Voltage multipliers
• Doubler Prepare a video of a
• Tripler circuit that increases the
input voltage 4 times.
(Quadruple)
Knowledge Criteria
Figure 2.2. Response of integrator circuit to square wave input
2.1. RC Integrator
➢ Figure 2.1. shows the circuit diagram of RC integrator in which
2.2. RC Differentiator
resistor R is connected in series with the input. ➢ Figure 2.3. shows the circuit diagram of RC differentiator in
which capacitor C is connected in series with the input.
Figure 2.1. RC Integrator

Figure 2.3. RC Differentiator
➢ Under certain conditions, the voltage drop across the resistor R ➢ Positive Series Clipper
will be very small in comparison with the drop across C. Hence, ▪ Figure 2.5. shows the circuit diagram and waveforms of
we may consider that the total input Vi appears across C, hence the positive series clipper.
the current is determined entirely by the capacitance.
➢ The current through capacitor is given by,
𝑑
𝐼𝑐 = 𝐶 𝑉𝑖
𝑑𝑡
The output voltage VO across R is given by,
𝑑
𝑉𝑂 = 𝑅𝐶 𝑉𝑖
𝑑𝑡
According to above equation, the output voltage is proportional
to the derivative of the input signal. Figure 2.5. Positive series clipper circuit and waveforms
➢ The behavior of the circuit to the square wave is illustrated in ▪ During the positive half cycle of the input, diode D is
the figure 2.4. reverse biased and the output is zero, the positive half
cycle is clipped-off.
▪ During the negative half cycle of the input, diode D is
forward biased and the output is the same as the input,
the negative half cycle appears at the output.
➢ Negative Series Clipper
▪ Figure 2.6. shows the circuit diagram and waveforms of
the negative series clipper.
Figure 2.4. Response of integrator circuit to square wave input

2.3. Clippers
➢ It is a wave shaping circuit that clips off some part of the input Figure 2.6. Negative series clipper circuit and waveforms
waveform.
➢ There are three types of clippers ▪ During positive half cycle of the input, diode D is
i Series Clippers forward biased and the output is the output is same as
ii Shunt Clippers input, positive half cycle appears at the output.
iii Biased Clippers ▪ During negative half cycle of the input, diode D is
2.3.1. Series Clippers reverse biased and output is zero, negative half cycle is
➢ In this type of clippers, diode is in series with the input signal. clipped-off.

2.3.2. Shunt Clippers ▪ During the negative half cycle of the input signal, diode
➢ In this type of clippers, the output is taken across the diode. D becomes forward biased and the output voltage is zero
since it is taken across the diode.
➢ Positive Shunt Clipper
▪ Figure 2.7. shows the circuit diagram and waveforms of the 2.3.3. Biased Clippers
positive shunt clipper. ➢ The clipping action can be varied by connecting reference
voltage in series with the diode, such clippers are called biased
clippers.
➢ Positive Bias Clipper
the positive bias clipper.
Figure 2.7. positive shunt clipper circuit and waveforms

▪ During the positive half cycle of the input signal, diode D
becomes forward biased and the output voltage is zero since
it is taken across the diode.
▪ During the negative half cycle of the input signal, diode D Figure 2.9. Positive bias clipper circuit and waveforms
becomes reverse biased and the output voltage is as same as ▪ The diode D is forward-biased only when the input
the input. Hence negative half cycle appears at the output. becomes more positive than (+V). The output voltage is
➢ Negative Shunt Clipper limited to +V.
▪ Figure 2.8. shows the circuit diagram and waveforms of ▪ The diode D is reverse biased when input is negative and
the negative shunt clipper. output is the same as the input, a negative half cycle
appears at the output.
➢ Negative Bias Clipper
the negative bias clipper.
Figure 2.8. Negative shunt clipper circuit and waveforms

▪During the positive half cycle of the input signal, diode
D becomes reverse biased and the output voltage is as
same as the input. Hence positive half cycle appears at
Figure 2.10. Negative bias clipper circuit and waveforms
the output.
▪
The diode D is forward biased only when the input ➢ Figure 2.12. shows the circuit diagram and waveforms of the
becomes more negative than (-V). The output voltage is positive clamper.
limited to -V.
▪ The diode D is reverse biased when input is positive and
output is the same as the input, a positive half cycle
appears at the output.
➢ Combinational Clipper
the combinational clipper.
Figure 2.12. positive clamper circuit and waveform
➢ When the input is negative, diode D is forward biased and the
capacitor charges to V with the polarity shown. The output
voltage is zero.
➢ When the input is positive, diode D is reverse biased and the
output voltage is the sum of the input voltage (+V) and the
capacitor voltage (+V).
VO=+V+V=+2V
Figure 2.11. Combinational clipper circuit and waveform 2.4.2. Negative Clamper
▪ When input becomes positive, diode D2 is reverse biased ➢ when the signal is pushed downward by the circuit and the
and Diode D1 becomes forward biased only when the positive peak of the signal coincides with the zero level, such
input becomes more positive than V1 and the output clampers are called as negative clamper.
voltage is limited to +V1. ➢ Figure 2.13. shows the circuit diagram and waveforms of the
▪ When input becomes negative, diode D1 is reverse biased negative clamper.
and Diode D2 becomes forward biased only when the
input becomes more negative than V2 and output voltage
is limited to -V2.
2.4. Clampers
➢ The clamper changes the DC level of the waveform but does not
affect its shape.
➢ It is also known as DC restorer.
➢ There are two types of clampers Figure 2.13. Negative clamper circuit and waveform
i. Positive Clamper ➢ When the input is positive, diode D is forward biased and the
ii. Negative Clamper capacitor charges to V with the polarity shown. The output
voltage is zero.
2.4.1. Positive Clamper
➢ When the input is negative, diode D is reverse biased and the
➢ when the signal is pushed upward by the circuit and the negative
output voltage is the sum of the input voltage (-V) and the
peak of the signal coincides with the zero level, such clampers
capacitor voltage (-V).
are called as positive clamper.
VO=-V-V=-2V
2.5. Voltage Multipliers

➢ The Voltage Multiplier is a type of diode rectifier circuit that can
produce an output voltage many times greater than the applied
input voltage.
2.5.1. Voltage Doubler
➢ A voltage doubler is an electronic circuit that produces an output
voltage equal to double the input voltage.
➢ Figure 2.14. shows the circuit diagram of the voltage doubler.
Figure 2.15. Voltage tripler

➢ The path that current take in the circuit is,
Current first travels through diode D1, charging up capacitor C1.
Current then travels through diode D2, charging up capacitor C2.
Current then travels through diode D3, charging up capacitor C3.
➢ The first capacitor charges up to the input voltage.
➢ The second capacitor charges up to the input voltage but from
the point of the anode of the capacitor, the voltages from the
capacitors add.
➢ So, at the point of the second capacitor, it sees the voltage from
Figure 2.14. Voltage doubler
the first capacitor as well as the second one, so at this point, it's
➢ During the positive half cycle
double the input voltage.
Current travels from the diode D1 and charges up capacitor C1.
➢ The third capacitor that charges up to the input voltage. This
When fully charged, C1 equals the same voltage as the input
capacitor sees the first and second capacitor, both charged up to
voltage.
the input voltage.
➢ During the negative half cycle
Hence, input voltage is multiplied by the factor 3.
Current travels through diode D2 and charges up capacitor C2.
Capacitor C2 charges up to the same voltage as the input voltage.
➢ The voltages across the capacitors add up to give the full output
voltage. This is how the output voltage is doubled, or 2 times,
the input voltage.
➢ To double the voltage, so we use two capacitors, if we want to
triple the input voltage, we would use three capacitors.
2.5.2. Voltage Tripler

➢ A voltage Tripler is an electronic circuit that produces an output
voltage equal to three times the input voltage.
➢ Figure 2.15. shows the circuit diagram of the voltage doubler.

Performance Criteria Waveforms:
Waveform Generation and Multipliers
Experiment No. 2.1: Waveform Generation
Aim: To generate the following waveforms from sinusoidal waveforms:

i. Trapezoidal waveform
ii. Positive cycle
Component Required:
Sl. Equipment/
No. Component Name
Figure 2.17. Trapezoidal waveform from sinusoidal waveform
1 Signal generator 0-1MHz 01
Circuit diagram to generate positive half cycle:
2 DC Regulated power supply 0-30V 01
3 Resistor 200Ω, 1KΩ 01
4 Junction diodes 1N4007 02
5 Single stand wires - As needed
Circuit diagram to generate trapezoidal waveform:
Figure 2.18. Circuit to generate positive halfcycle
Waveforms:
Figure 2.16. Circuit to generate trapezoidal waveform Figure 2.19. Positive half cycle from a sinusoidal input

Theory: Experiment No. 2.2: Voltage Multipliers

➢ A trapezoidal waveform can be obtained from sinusoidal input
by using a combinational clipper. Aim: To construct and test voltage doubler and Tripler.
➢ A positive half cycle can be obtained from sinusoidal input by
using a negative series clipper. Component Required:
Procedure:
1. Connect the circuit as shown in the circuit diagram. Equipment/
2. Set 10V(p-p), 1KHz square wave input signal from the function Sl. No. Specification Quantity
Component Name
generator. 1 Step down transformer 12V-0-12V 01
3. Observe the output from the CRO. 2 Resistor 1KΩ 01
4. Disconnect the circuit safely. 3 Capacitor 100µF 01
Result: Trapezoidal waveform and the positive half cycle is obtained 4 Junction diodes 1N4007 03
from the sinusoidal input. 5 Single stand wires - As needed
Circuit diagram of Voltage doubler:
Figure 2.20. Voltage Doubler
Tabular Column:
Input AC voltage Output DC voltage

Circuit diagram of Voltage Tripler:
Figure 2.21. Voltage Tripler

Tabular Column:
Input AC voltage Output DC voltage
Procedure:
2. Note down the AC input at the secondary winding of the
transformer.
3. Measure the DC output voltage.
Result: Voltage multiplier circuits are constructed and tested.

Course Content 3 ➢ Applications of Tunnel diode
Special Purpose Devices i Used as a high-speed switching device.

ii Used as a logical memory element.
iii Used in microwave oscillator.
iv Used in FM receiver circuits.
(Knowledge Criteria) (Activity Criteria) (Performance
Criteria) 3.2. Varactor Diode
Give a presentation on ➢ A varactoror diode is a type of diode whose internal capacitance
Features and Applications the use of an varies with respect to the reverse voltage. It always works in
of optoisolator to detect reverse bias condition and is a voltage-dependent semiconductor
• Tunnel diode DC or control AC Test the functioning of
device.
• Varactor diode signals and data. UJT using DMM.
➢ Varactor diode is known by several names as Varicap, Voltcap,
• Gunn diode Voltage variable capacitance, or Tunning diode.
Demonstrate the use of Simulate Schottky
• PIN diode
PIN diode as a switch in diode/PIN diode/Gunn ➢ Figure 3.2. shows the symbol and physical appearance of the
• Solar cell domestic applications. diode/Varactor diode
• Schottky diode varactor diode.
application circuits.
• UJT Build a power supply
switching circuit using
optocouplers
Knowledge Criteria
3.1. Tunnel Diode

➢ A Tunnel diode is also known as an Esaki diode.
Figure 3.2. Circuit symbol and Physical appearance of Varactor diode
➢ A Tunnel diode is a heavily doped thin junction diode that, under
➢ Features
low forward bias conditions, exhibits negative resistance.
i The increase in the reverse voltage increases the value of
➢ Figure 3.1. shows the symbol and physical appearance of the
capacitance.
Tunnel diode.
ii Less noisy.
iii More compact in size.
iv More reliable.
Figure 3.1. Circuit symbol and Physical appearance of Tunnel diode ➢ Applications
➢ Features of Tunnel diode i Used in AFC (Automatic Frequency Control) circuits.
i The switching speed of the device is high. ii Used in Parametric amplifier.
ii Less noisy iii Used as tuning network in FM radio and TV receivers.
iii Low power dissipation iv Used in adjustable band pass filter.
iv Current conduction is due to majority charge carries.
v It has negative resistance.
3.3. Gunn Diode ➢ The PIN diode under unbiased condition, offers high resistance.
➢ Gunn diode is two terminal high-frequency bulk semiconductor The resistance offered by the diode decreases as the forward
device, based on the Gunn effect. voltage increases, therefore it acts like a variable resistor under
➢ Figure 3.3. shows the symbol and physical appearance of the forward bias.
varactor diode. ➢ When PIN diode is reverse biased, it acts like constant capacitor.
➢ Applications
i Acts as switching device for frequencies upto GHz.
ii Used as an AM modulator of very high frequency
signals.
3.5. Solar Cell
Figure 3.3. Circuit symbol and Physical appearance of Gunn diode ➢ Solar cells are the source of energy which works on the principle
➢ Features of photo voltaic effect.
i It is made up of only N-type semiconductor, not P-type. ➢ Solar cells convert solar energy into electrical energy.
ii It exhibits negative resistance region. ➢ Figure 3.5. shows the circuit symbol of solar cells.
iii It has better noise immunity.
iv It has poor temperature stability.
v Its efficiency is low below 10 GHz.
➢ Applications
i Used as low and medium power oscillators in microwave Figure 3.5. Circuit symbol of solar cell
instruments and receiver circuits. ➢ Applications of solar cells
ii Used in CW radars. i Used in obtaining domestic power supply.
iii Used as sensor for detecting trespassers, to avoid ii Extensively used in water heaters.
derailment of trains. iii Used in solar based traffic control lights.
iv Used for remote vibration detectors and rotational speed iv Used to power the satellites.
measuring tachometers. 3.6. Schottky Diode
v Used in microwave transmitters to generate microwave ➢ It is a two terminal unipolar metal semiconductor junction diode.
radio waves at very low powers. It is also called as hot carrier diode or Schottky barrier, surface
3.4. PIN Diode barrier.
➢ The PIN diode contains three semiconductors namely, P region, ➢ The construction of this diode is quite different from the
N region and Intrinsic layer of pure silicon. ordinary diode that a metal semiconductor junction is created as
➢ The structure, circuit symbol and physical appearance of PIN shown in the figure 3.6.
diode is shown in figure 3.4.
Figure 3.4. Circuit symbol and Physical appearance of PIN diode Figure 3.6. Circuit symbol and Physical appearance of Schottky diode

➢ The Schottky diode has much lower forward voltage drop and Performance Criteria
reverse breakdown voltage, than ordinary PN junction diode.
The Schottky diode has a very little junction capacitance Testing & Application Circuit
because of this it can be operated at higher frequencies.
➢ Applications
i Used as switching device in computers. Experiment No. 3.1: Testing of UJT
ii Used in clipping and clamping circuits.
iii Used in mixers and detectors in communication circuits. Aim: To test the functionality of UJT.
iv Used in rectifiers at high frequencies.
3.5. Unipolar Junction Transistor Components and Apparatus Required:
➢ A unijunction transistor is a three terminal semiconductor Sl. Equipment/
device, it has Base1, Base2 and emitter terminals. No. Component Name
It has only one PN junction and hence it is called Uni Junction 1 UJT 2N2646 01
transistor. 2 Digital multimeter - 01
➢ The structure, circuit symbol and physical appearance of UJT is 3 Single stand wires - As needed
shown in figure 3.7.
Circuit diagram
(a) Forward biasing the emitter junction
Figure 3.7. Circuit symbol of solar cell

➢ Applications
i In relaxation oscillator to generate sawtooth wave.
Figure 3.8. UJT testing circuit 1
ii As a triggering device for SCR and TRIAC.
(b) Measuring the resistance the between base terminals
iii In timing circuits.
iv In voltage sensing circuits.
v In phase control circuits.

(c) Measuring the resistance between base terminals Experiment No. 3.2: Schottky Application Circuit
Aim: To simulate simple application circuit using Schottky diode.
Component Required:
Proteus 8.1 Circuit simulation software
Theory:
The voltage regulator is called a Buck converter or step down
voltage regulators. It is a type of DC-DC converter, so it accomplishes
the task using Schottky diode, transistor, switches and an inductor.
Procedure: Circuit diagram
2. Measure the resistance.
3. Disconnect the connections safely.
Result: UJT is tested using digital multimeter.
Figure 3.10. Voltage regulators using Schottky diode
Tabular Column
Input DC voltage Output DC voltage
Result: Voltage multiplier circuits are constructed and tested.

Course Content 4 ➢ When the input signal is applied

During the positive half cycle,
Transistor Amplifiers Forward bias across the emitter-base junction increases, this
increases the collector current IC. This increased collector
current produces a large voltage drop across the resistance RC.
During the negative half-cycle,
(Knowledge Criteria) (Activity Criteria) (Performance Criteria) Forward bias across the emitter-base junction decreased.
Introduction Therefore, the collector current IC is decreased which produces
• Need for biasing a smaller voltage across resistor RC.
• DC Load line Thus, a small input voltage results in a large output voltage,
• Operating point which shows that the transistor works as an amplifier.
• Stabilization and
Prepare a report on Demonstrate Numbering
stability factor
applications of each System of
type of amplifier and Semiconductor Devices
Voltage divider biasing for
present it.
BJT
Construct/Simulate
Demonstrate any one AND/OR Gate using
Classification of Amplifiers,
real-life application of transistors
based on
an amplifier.
• Use
• Frequency
• Coupling methods
• Mode of operations
Figure 4.1. CE Transistor Amplifier
4.2. Need for biasing
Knowledge Criteria
4.1. Introduction
➢ A transistor acts as an amplifier by raising the strength of a weak
signal.
➢ The figure shows what a transistor looks like when connected as
an amplifier. Figure 4.2. Biasing
➢ The supply voltage VBB forward biases the emitter-base junction As we know, one of the most common applications of the BJT is to
and VCC reverse biases the collector-base junction. use it as an amplifier. where if we apply the time-varying signal as an
This forward bias is maintained regardless of the polarity of the input then it amplifies the input signal. But this BJT won't amplify the
input signal. input signal until we apply the DC power supply. And in fact, the energy
➢ When no input signal is present, the dc collector current IC flows supplied by this DC supply is used to amplify the input signal. So, the
through collector resistor RC. This is called zero signal currents. process of applying this DC voltage source to the BJT is known as bias.

➢ To design a transistor-based amplifier, it is necessary to operate ➢ The operating point is a fixed point on the output characteristics
the transistor in the linear active region. This is done by using of the transistor, it is also referred to as the dc operating point,
external components such as resistors and capacitors and quiescent point, or Q-point.
applying dc voltages to the transistor to establish proper ➢ It is called an operating point because the variations of IC and
collector IC and collector-emitter voltage VCE. VCE take place at this point when the input signal is applied.
This process is referred to as biasing and the circuit used for 4.5. Stabilization and Stabilization Factor
transistor biasing is called transistor Biasing. ➢ For a transistor to be operated as a faithful amplifier, the
➢ The transistor will function properly if its input circuit (base- operating point should be stabilized.
emitter junction) is forward biased and the output circuit ➢ The main factor that affects the operating point is the
(Collector-base junction) is reverse biased. temperature. The operating point shifts are due to changes in
4.3. DC Load line temperature.
➢ The dc operation of a transistor circuit can be described ➢ As temperature increases, the values of ICE, β, VBE get
graphically using a DC load line. affected.
➢ This is a straight line drawn on the characteristic curves from the ICBO gets doubled (for every 100 rises)
cutoff point to saturation point as shown in figure 4.3. VBE decreases by 2.5mv (for every 1o rise)
➢ So, the main problem which affects the operating point is
temperature. Hence operating point should be made independent
of the temperature to achieve stability.
4.5.1. Stabilization
➢ The process of making the operating point independent of
temperature changes or variations in transistor parameters is
known as Stabilization.
➢ Once the stabilization is achieved, the values of IC and VCE
become independent of temperature variations or the
replacement of the transistor.
A good biasing circuit helps in the stabilization of the operating
Figure 4.3. DC load line point.
At the cutoff point, the values of base current and collector ➢ Stabilization of the operating point has to be achieved due to the
current are ideally zero and VCE=VCC on the x-axis. following reasons.
At the saturation point, the collector current is maximum and i Temperature dependence of IC
collector-to-emitter voltage is ideally equal to zero and IC=IC(Sat) ii Individual variations
on the y-axis. iii Thermal runaway
The load line is determined by VCC and RC. 4.5.2 Stabilization Factor
4.4. Operating Point ➢ The extent to which a biasing circuit is successful in maintaining
➢ The dc collector current IC and collector-emitter voltage VCE IC constant despite variations in ICBO is measured by the Stability
when no input signal is applied are collectively referred to as factor. It is denoted by S.
Operating point.

➢ By definition, the rate of change of collector current IC for the The emitter resistor RE provides stabilization.
collector leakage current ICO at constant β and IB is called the ➢ A basic assumption is that the resistance looking into the base is
Stability factor. much larger than that of the resistor R2. The current through
𝑑𝐼 resistor R1 flows almost completely into resistor R2 and two
𝑆 = 𝑑𝐼 𝐶 at constant IB and β
𝐶𝑂 resistors may be considered effective in series.
Hence, we can understand that any change in collector leakage ➢ Circuit Analysis
current changes the collector current to a great extent. The The base voltage is given by,
stability factor should be as low as possible so that the collector 𝑅2
current doesn’t get affected. S=1 is the ideal value. 𝑣𝐵 = 𝑣𝐶𝐶
𝑅1 + 𝑅2
4.6. Voltage Divider Biasing for BJT Emitter voltage is given by,
➢ The current gain β is temperature-sensitive, especially for silicon VE=VB-VBE
transistors. So, it is desirable to provide a dc bias circuit in which Collector current and emitter current are given by,
the dc bias current and voltage of the collector are independent 𝑉
IC≈IE=𝑅𝐸
of β. 𝐸
➢ The voltage divider bias circuits are so popularly used and it is Collector voltage is given by,
also called a self-bias circuit or universal bias circuit. VC=VCC-ICRC
Collector-emitter voltage is given by
VCE=VC-VE
4.7. Classification of Amplifiers
Amplifiers are classified in many ways few of them are listed below.
➢ By use
i. Voltage amplifiers
ii. Current amplifiers
iii. Power amplifiers
➢ By frequency range
i. DC amplifiers
ii. Audio amplifiers
iii. Video amplifiers
iv. RF amplifiers
v. UF amplifiers
➢ By coupling methods
i. Direct-coupled amplifiers
ii. RC coupled amplifiers
iii. Transformer coupled amplifiers
Figure 4.4. Voltage divider circuit ➢ By mode of operations
➢ The name voltage divider is derived from the fact that resistors i. Class A amplifiers
R1 and R2 form a voltage divider across the VCC supply. ii. Class B amplifiers
The voltage drop across resistor R2 forward biases the emitter- iii. Class AB amplifiers
base junction of the transistor. iv. Class C amplifiers

Performance Criteria Experiment 4.2. Logic Gates using BJTs
Aim: To simulate the working of logic gates using BJTs.

Semiconductor Devices Numbering System
Logic Gates using BJTs
Components and Apparatus Required
Experiment No. 4.1. Semiconductor Device Numbering
PC loaded with Proteus 8.1 simulation software
System
Aim: To familiarize the semiconductor device numbering system.

Circuit Diagram of AND gate:
Each Semiconductor devices have a special numbering coding
as per the specification of those components. All Components have a
particular symbolic numbering with Alphanumeric coding for
represents the characteristics of the material and other parameters. There
is an international numbering system for all semiconductor devices and
components.
i Pro Electron Numbering codes (European)
ii JEDC Numbering system- [Joint Electron Engineering
Council] (USA)
iii JIS Semiconductor Numbering system (Japan)
iv Manufacturing Numbering system
The numbering system used in major semiconductor devices:
The majority of every semiconductor device is numbered by five alpha-
numeric symbols.
Example: BF194, BFX63, SL100 and etc. Figure 4.5. AND gate using BJTs
Here, usually, the first letter represents the type of material such as Ge,
Si, etc. The second letter represents the types of devices such as a diode, Truth Table of AND gate:
BJT, FET, etc. the numbering from 001 to 999 represents the serial
number of the device. Inputs Output
Generally, devices with two letters and three digits are intended for A B Y
entertainment and consumer equipment (Ex. BF194). 0 0 OFF
Devices with three letters and two digits are used for industrial or 0 1 OFF
professional equipment (Ex. BFX63). 1 0 OFF
1 1 ON

Circuit Diagram of OR gate:
Figure 4.6. OR gate using BJTs
Truth Table of OR gate:

Inputs Output
A B Y
0 0 OFF
0 1 ON
1 0 ON
1 1 ON
Theory:
The use of transistors for the construction of logic gates depends
upon their utility as fast switches. When the base-emitter diode is turned
on enough to be driven into saturation, the collector voltage concerning
the emitter may be near zero and can be used to construct gates for the
TTL logic family.
For the AND logic, the transistors are in series and both
transistors must be conducted to drive the output high.
For the OR logic, the transistors are in parallel and the output is
driven high if either of the transistors is conducting.
Result: Simulation of AND and OR gates using transistors is done and

verified the truth table.

Course Content 5 ➢ The resistors R1 and R2 form a voltage divider bias circuit.
➢ The resistor RE provides bias stabilization.
RC Coupled Amplifier ➢ An emitter bypass capacitor CE is used in parallel with RE to
provide a low reactance path to the AC signal.
➢ Capacitor C1 is used to couple the input signal vi to the base of
Q1 while the resistor RC and capacitor CC are used to couple the
(Knowledge Criteria) (Activity Criteria) (Performance output to the next stage of the amplifier.
Criteria) ➢ When an ac signal is applied to the input of the first stage, it is
Common Emitter RC amplified by a transistor and appears across the collector resistor
Coupled transistor Prepare a report on Construct voltage RC.
amplifier frequency applications of each type of divider biased single
response. amplifier and present it. stage RC coupled 5.2. Frequency Response of RC Coupled Amplifier
amplifier ➢ The figure shows the frequency of the RC coupled amplifier.
Power amplifiers- Demonstrate any one real
classification, principle life application of an Simulate RC coupled
& performance criteria amplifier amplifier using FET.
of power amplifiers.
Knowledge Criteria
5.1. Common Emitter RC Coupled Amplifier
➢ The figure shows a circuit diagram of a common emitter RC
coupled transistor amplifier.
Figure 5.2. Frequency response of RC coupled amplifier
➢ It is from the graph that the voltage rolls off at frequencies below
50Hz and above 20 kHz are uniformly amplified.
➢ The voltage gain remains constant in the mid-frequency range
which is known as the bandwidth.
5.3. Power Amplifiers – Classification
➢ The transistor power amplifiers handle large signals. Many of
them are driven so hard by the large input signal that collector
current is either cut off or is in saturation region during a large
portion of the input cycle. Therefore, such amplifiers are
generally classified according to the current conduction in the
active device:
Figure 5.1. Single-stage RC coupled amplifier
i Class A amplifiers 5.3.2. Class-B Amplifiers

ii Class B amplifiers ➢ The biasing of the transistor in class B operation is in such a way
iii Class AB amplifiers that at zero signal condition, there will be no collector current.
iv Class C amplifiers The operating point is selected to be at collector cut-off voltage.
v Class D amplifiers So, when the signal is applied, only the positive half cycle is
5.3.1. Class-A amplifiers amplified at the output.
➢ A Class A power amplifier is one in which the output current ➢ The figure 5.4. below shows the input and output waveforms
flows for the entire cycle of the AC input supply. Hence the during class B operation.
complete signal present at the input is amplified at the output.
➢ The operating point of this amplifier is present in the linear
region. It is so selected that the current flow for the entire ac
input cycle. Figure 5.3. explains the selection of operating point.
Figure 5.4. Current flow in the Class-B amplifier
➢ When the signal is applied, the circuit is forward biased for the
positive half cycle of the input and hence the collector current
Figure 5.3. Current flow in the Class-A amplifier flows. But during the negative half cycle of the input, the circuit
is reverse biased and the collector current will be absent. Hence
➢ In class-A amplifier the power dissipation of a transistor is
only the positive half cycle is amplified at the output.
maximum with no input signal and minimum with largest with
the input signal.
➢ Expression for Output Power
𝑉𝐶𝐶 𝐼𝐶(𝑠𝑎𝑡)
➢ Expression for Output Power PO(Max)= 4
The output power of Class-A amplifier is given by, In class-B amplifiers, power dissipation will be more.
PO(Max)=0.5 VCEQ ICQ
➢ Expression for Efficiency ➢ Expression for Efficiency
𝑉𝐶𝐶 𝐼𝐶(𝑆𝑎𝑡)
The efficiency of the amplifier is defined as the ratio of ac power 𝑃𝑂(𝑚𝑎𝑥) П
delivered to load to the power supplied by the dc source to the ȠMax= 𝑃𝑑𝑐
= 4
𝑉𝐶𝐶 𝐼𝐶(𝑠𝑎𝑡) =4 =0.785=78.5%
transistor. П
𝑃𝑂(𝑚𝑎𝑥) 0.5𝑉𝐶𝐸𝑄 𝐼𝐶𝑄 Class B amplifiers offer much-improved efficiency and
ȠMax= 𝑃 = 𝑉 𝐼 =0.5=50% theoretically it is 78.5%.
𝑑𝑐 𝐶𝐸𝑄 𝐶𝑄
50% is the highest possible efficiency for a class A amplifier.

5.3.3. Class-AB Amplifiers
➢ Class AB is a combination of class A and class B types of

amplifiers. As class A has the problem of low efficiency and
class B has distortion problem, this class AB is emerged to
eliminate these two problems, by utilizing the advantages of
both the classes.
Figure 5.6. Current flow in the Class-C amplifier

➢ Class C amplifiers offer good efficiency and theoretically it is
90%.
5.3.5. Class D Amplifiers
➢ Class D amplifiers use the active device in switching mode to
regulate the output power.
➢ Class D amplifiers offer high frequencies and do not require heat
sinks and transformers.
➢ These amplifiers use Pulse Width Modulators (PWM) to convert
the input signal into a string of pulses as shown in figure 5.7.
Figure 5.5. Current flow in the Class-AB amplifier
➢ The conduction angle of the class AB amplifier is somewhere

between 180o to 360o depending upon the operating point
selected as illustrated in figure 5.5.
➢ The maximum operating efficiency of class AB is between 50%

and 78.5%.
5.3.4. Class-C Amplifiers

➢ When the collector current flows for less than half the cycle of
the input signal, the power amplifier is known as a class C power
amplifier. Figure 5.7. Class-D amplifier
➢ figure 5.6. shows the operating point and output of a class C
amplifier.

Performance Criteria
Nature of Graph:
RC Coupled Amplifiers
Experiment No. 5.1. RC Coupled Amplifier using BJT
Aim: To plot the frequency response curve of the RC coupled amplifier.
Components and Apparatus Required:

Figure 5.9. Frequency response of RC coupled amplifier
Equipment/ Component
Sl. No. Specification Quantity
Name
1 Function generator 0-10MHz 01 Tabular Column:
2 Regulated power supply 0-30V 01
3 CRO 0-10MHz 01 Input Voltage=
Frequency Output Voltage Vout 𝑽
4 Transistor SL100 01 Gain= 𝑽𝑶𝒖𝒕
𝑰𝒏
5 Resistors 1KΩ, 10KΩ 03
6 Capacitors 10µF, 100µF 03
7 Breadboard - 01
Circuit Diagram:
Theory:
➢ The RC coupled amplifier is a voltage amplifier, which
amplifies the voltage of the input signal.
➢ The resistors R1 and R2 form voltage divider bias circuit.
➢ The resistor RE provides bias stabilization.
➢ An emitter bypass capacitor CE is used in parallel with RE to
provide a low reactance path to the amplified ac signal. Without
this capacitor, a gain of the amplifier will be lost.
➢ The capacitor C1 is used to couple the input signal Vi to the base
of the transistor.
➢ The capacitor C2 is used to couple the output signal from the
collector of the transistor to load.
Figure 5.8. Circuit diagram of RC coupled amplifier

Procedure: Experiment 5.2. RC Coupled Amplifier using FET

2. Set 2mV(p-p) input signal from a function generator.
3. Rig up the circuit as shown in the circuit diagram.
4. Vary the input frequency and note down the output voltage.
Aim: To simulate and test the working of RC coupled amplifier using
5. Calculate the gain.
FET.
6. Plot the graph frequency and gain.
7. Disconnect the circuit safely. Components and Apparatus Required
Result: The frequency response curve of the RC coupled amplifier is PC loaded with Proteus 8.1 simulation software
plotted and verified.
Circuit Diagram:
Figure 5.10. Circuit diagram of RC coupled amplifier using FET
Observations:
Figure 5.11. Output waveforms

Sl. No. Parameter Value

1 The input voltage Vin (P-P)
2 Period of the input signal
3 Frequency of input signal
4 The output voltage Vout (P-P)
5 Period of the output signal
6 Frequency of output signal
Result: The RC coupled amplifier using FET is simulated and output is

verified.

Course Content 6 ➢ Figure 6.1. shows the circuit diagram of class A series-fed
amplifier.
Power Amplifiers ➢ It is a class A amplifier with direct-coupled resistive load.
➢ The resistor RC is the load resistor.
➢ The transistor is biased such that the output current flows for the
complete cycle (i.e., 3600) of the input signal. This condition is
(Knowledge Criteria) (Activity Criteria) (Performance achieved by locating the Q-point at the centre of the load line.
Criteria) 6.2. Transformer Coupled Class A Amplifier
Working of Class-A Series-fed ➢ Figure 6.2. shows the circuit diagram of transformer-coupled
amplifier and transformer-
class A amplifier.
coupled amplifier. Prepare a video/report
on any one real life
Class B- Push pull Amplifier application of a power
Simulate the working
and complementary-symmetry amplifier.
of Class-A amplifier.
push-pull amplifier.
Build and demonstrate
Simulate the working
Working of Class AB and radio player amplifier
of push pull amplifier.
Class C amplifiers. circuit.
Concept and expression for Give a presentation on

voltage gain of multistage low noise amplifiers.
amplifiers.
Knowledge Criteria Figure 6.2. Transformer coupled class A Amplifier

6.1. Class A Series-Fed Amplifier ➢ The primary winding of the transformer has a low resistance,
therefore power absorbed in the winding is negligible as
compared to the resistive load.
➢ The function of the transformer is to provide impedance
matching between the amplifier output and low impedance load
such as loudspeaker.
The transformer can increase or decrease voltage or current
levels according to the turns ratio.
6.3. Class B Push Pull Amplifier
➢ In class-B amplifiers, the bias point is set at cutoff. The transistor
turns on when the ac signal is applied and output current varies
for only half-cycle (1800).
➢ To obtain output for the full cycle of signal, two transistors are
used. Each transistor conducts on opposite half-cycles. The
Figure 6.1. Series-Fed class A Amplifier combined operation provides a full cycle of output signal.
➢ One part of the circuit pushes the signal high during one half- 5.3.3. Class-AB Amplifiers
cycle and other part pulls the signal low during the other half- ➢ The cross distortion may be avoided by applying slight forward
cycle and hence the name. bias voltage (0.7V for Si transistor and 0.3V for Ge transistor)
➢ Distortion can occur if the device characteristic is not linear. to the base-emitter junction of the both transistors.
6.4. Complementary Symmetry Push Pull Amplifiers ➢ The application of slight forward bias shifts the Q-point above
➢ Figure 6.3. shows the circuit diagram of complementary the cutoff.
symmetry push-pull amplifier. ➢ Each transistor operates more than one half cycle.
5.3.4. Class-C Amplifiers
➢ The class C amplifier is the most efficient power amplifier,
which can produce more load power than that of either class A
or class B amplifier.
➢ The output current flows only during a part of the positive (or
negative) half cycle of the input signal. This condition is
achieved by achieved biasing the transistor below cutoff.
➢ Class C amplifier is the most efficient power amplifier and its
overall efficiency may even approach to 100%.
6.5. Multistage Amplifiers
➢ Two or more amplifiers can be connected in a series
Figure 6.3. Complementary symmetry push pull Amplifier arrangement with output of one amplifier driving the input of the
➢ This arrangement uses two transistors in the emitter follower next stage amplifier as shown in the figure.
configuration.
➢ The term ‘Complementary’ here means that it uses two identical
transistors- NPN and PNP. Figure 6.4. Cascaded connection of amplifiers
➢ The term ‘Symmetry’ here means that both these transistors ➢ The basic purpose of a multistage arrangement is to increase
have identical input and output characteristics. the overall gain.
➢ There is no bias voltage. Only signal voltage drives the ➢ The overall gain AV of these cascaded stages is equal to the
transistors into conduction. product of individual voltage gains. i.e.,
➢ When no input signal is applied, none of the transistors conducts AV=A1 x A2 x …………………x An
and output voltage is zero.
➢ During positive half cycle of the input signal,
NPN transistor is ON
PNP transistor is OFF
During negative half cycle of the input signal,
NPN transistor is OFF
PNP transistor is ON
➢ A complete cycle of output signal is developed across the load.
➢ The circuit has unity gain.
Performance Criteria Experiment 6.2. Push Pull Amplifier
Power Amplifiers Aim: To simulate and test the working of push pull amplifier.
Components and Apparatus Required
Experiment No. 6.1. Class-A Amplifiers PC loaded with Proteus 8.1 simulation software
Aim: To simulate Class-A amplifier and observe the effect of biasing Circuit Diagram:
on the output.

PC loaded with Proteus 8.1. Simulation software
Circuit Diagram:
Figure 6.6. Push Pull Amplifier

Theory:
➢ In class-B amplifiers, the bias point is set at cutoff. The transistor
turns on when the ac signal is applied and output current varies
for only half-cycle (1800).
➢ To obtain output for the full cycle of signal, two transistors are
Figure 6.5. Class-A Amplifier used. Each transistor conducts on opposite half-cycles. The
Theory: combined operation provides a full cycle of output signal.
➢ One part of the circuit pushes the signal high during one half-
➢ A Class A power amplifier is one in which the output current cycle and other part pulls the signal low during the other half-
flows for the entire cycle of the AC input supply. Hence the cycle and hence the name.
complete signal present at the input is amplified at the output. ➢ Distortion can occur if the device characteristic is not linear.
Result: The class-A amplifier circuit is simulated and effect of biasing Result: The class-B amplifier circuit is simulated.
voltage is observed.

Knowledge Criteria
Course Content 7 7.1. Introduction to Operational-Amplifier
As its name suggests, this op-amp is basically Amplifier and the
Introduction to Operational Amplifier basic job of an amplifier is to amplify the input signals.
why it is known as the operational amplifier?
In early days when digital computers were not evolved, at that
time the different mathematical functions like addition, subtraction,
(Knowledge Criteria) (Activity Criteria) (Performance Criteria)
integration, and differentiation were performed using this operational
Op-amp amplifier. So, just by connecting few resistors and capacitors, it is
• Symbol possible to perform the different mathematical operations. And that is
• Block Diagram why this amplifier is known as the operational amplifier.
• Basic
Differential
Amplifier
7.2. Circuit Symbol of Operational Amplifier
Modes of Operation Figure shows the circuit symbol of an operational amplifier, it consists
• Single Ended of two inputs and one output and two power supplies connections. But
• Common mode there are many op-amp IC’s which runs on the single power supply.
• Differential
mode
Ideal and Practical
Explain the criteria for Identify Op-amp IC, its
characteristics of an op-
selecting an op-amp for a pins and interpret its
amp.
given application. datasheet.
Conduct an experiment to
Op-amp parameters
Identify at least 5 find the practical
• Input offset
electronic circuits using characteristics of Op-amp
voltage
op-amp and present the and compare them with
• Input offset
details of its working ideal characteristics
current
Figure 7.1. Circuit symbol of an op-amp
• Power supply
rejection ratio
➢ The input terminal marked by this positive sign is known as the
• CMRR non-inverting input terminal.
• Input and ➢ Another input terminal marked by this negative sign is the
Output known as the inverting input terminal.
impedance ➢ The operational amplifier, it is one kind of differential amplifier
• Gain with the single output. It means that this amplifier amplifies the
• Gain-Bandwidth
Product
difference between the two input signals.
• Slew rate So, let's say V1 and V2 are the input signals being applied to this
operational amplifier and the gain of this operational amplifier
is A, then the output of operational amplifier is given by,
VOut=A (V1-V2) Volts

7.3. Block Diagram of Operational Amplifier 7.4. Basic Differential Amplifier

Non inv Figure 7.3. shows the circuit diagram of the differential amplifier
input Level constructed using BJTs.
Input Intermediate Output
Shifting
Inv Stage Stage
stage
stage Output ➢ The differential amplifier amplifies the difference between the two
input
input signals.
Figure 7.2. Block diagram of Level
op-amp
➢ The differential amplifier is widely used input stage of an op-amp.
The operational amplifier is a multistage amplifier and it can be This determines the input characteristics of an Op-amp.
➢ As shown in the figure, it has two inputs V1 and V2 and output voltage
represented by a block diagram as shown in the figure 7.2. It consists of VO is voltage difference between two collector voltages VC1 and VC2.
the following stages: Two DC supplies +VCC and -VEE applied at common collectors and
i Input stage common emitters respectively.
ii Intermediate stage ➢ Ideally, the circuit is symmetrical with identical transistors and
iii Level shifting stage collector resistors. As a results, the output voltage is zero when two
iv Output stage inputs are equal.
➢ When V1>V2, an output voltage V0 appears with the polarity shown
Input stage:
appears.
➢ The input stage is a dual input (balanced), dual output When V1<V2, an output voltage V0 has the opposite polarity.
differential amplifier. ➢ Generally, this circuit is termed to as “double ended input, double
➢ This stage provides most of the voltage gain of the amplifier and ended output differential amplifier” because it has two inputs and two
outputs.
also establishes the input impedance of the op-amp.
➢ In this configuration,
➢ A well-designed input stage provides high input impedance. V1 is called the non-inverting input because the output voltage VO is
Intermediate stage: in phase with V1 input.
➢ The intermediate stage is a differential amplifier which is driven V2 is called inverting input because the output voltage VO is 180o out
of phase with V2.
by the output of the first stage.
➢ The differential amplifies the difference between the two input
➢ In most of the op-amps, the intermediate stage is dual input, voltages, producing an output of,
single-ended (unbalanced) output amplifier. VOut=A (V1-V2) Volts
Level shifting stage:
➢ The dc voltage at the output of the intermediate stage is well
above the ground potential because direct coupling used.
➢ The level shifting circuit is used to shift the dc level at the output
to ground level.
Output Stage:
➢ The output stage is a complementary symmetry push-pull
amplifier.
➢ It increases the voltage swing and raises the current supplying
capability of the op-amp.
➢ A well-designed output stage provides low output resistance. Figure 7.3. Differential Amplifier

7.5. Modes of Operation of Differential Amplifier Differential Mode

The differential amplifier operates in following three modes: ➢ In this mode, two opposite-polarity signals are applied to the
i Single Ended Mode inputs as shown in the figure. This type of operation is also
ii Differential Mode referred to as Double-Ended.
iii Common Mode ➢ Figure 7.4.(a) shows the output signals due to signal on input1
acting alone as a single ended input.
Single Ended Mode
➢ Figure 7.4.(b) shows the output signals due to signal on input2
Vin1
Vout1 acting alone as a single ended input.
➢ Signals on output1 are of same polarity and also signals on
output2 are of same polarity.
➢ By superimposing both output1 signals and output2 signals, we
Figure 7.4.(a). Signal on input 1 get the total differential operation. This is illustrated in figure
7.5.
Vout1
Figure 7.4.(b). Signal on input 2
➢ In this mode, one input is grounded and the signal voltage is

Figure 7.5. Differential Mode
applied only to the other input. Common Mode
➢ Suppose that the input signal voltage is applied to input 1 and ➢ In this mode, two signal voltages of the same phase, frequency
input 2 is grounded. and amplitude are applied to the inputs as shown in figure 7.6.
An inverted, amplified signal voltage appears at output1. Also, ➢ Signals on output1 are of the opposite polarity and so are the
a noninverted signal voltage appears at output2. ones on output2, when these are superimposed, they cancel,
This is illustrated in the figure shown in figure 7.3.(a). resulting in a 0 output voltage. This action is called common-
➢ Suppose that the input signal voltage is applied to input 2 and mode rejection.
input 1 is grounded.
An inverted, amplified signal voltage appears at output2. Also,
a noninverted signal voltage appears at output1.
This is illustrated in the figure shown in figure 7.3.(b).
Figure 7.6. Common Mode

7.6. Characteristics of Operational Amplifier vi Slew Rate (SR)

It is defined as the maximum rate of change of output voltage
Parameter Ideal Practical per unit time expressed in volts per microsecond. In equation
Voltage gain (A) ∞ High form,
𝒅𝑽
Input impedance (Zi) ∞ High SR= 𝒅𝒕𝑶 volts/µs
Output impedance (Zo) 0 Low vii Supply Voltage Rejection Ratio (SVRR)
Output voltage (VO) 0 Low The change in the op-amp’s input offset voltage Vio caused by
Bandwidth ∞ Wide variations in supply voltages is called supply voltage rejection
CMRR ∞ High ratio.
∆𝑽
Slew rate ∞ High SVRR= ∆𝑽𝒊𝒐 µV/V
viii Gain-Bandwidth Product (GB)
7.7. Op-Amp Parameters The gain-bandwidth product is the bandwidth of the op-amp
i Input Offset Voltage (Vio) when the voltage gain is 1. The measurements are made for
It is the amount of voltage that must be applied between the two output amplitudes not exceeding 100mV peak-to-peak.
input terminals of an op-amp to null the output. In the form of
an equation,
Vio=Vdc1-Vdc2
ii Input Offset Current (Iio)
The algebraic difference between the currents into the inverting
and noninverting terminals is referred to as input offset current
Iio. In the form of an equation,
Iio=|IB1-IB2|
iii Gain or Large-Signal Voltage Gain (A or Ad)
The voltage gain of the op-amp is defined as the ratio of the
output voltage VO to the differential input voltage Vid. In the
form of equation,
𝑽
Ad=𝑽 𝑶
𝒊𝒅
iv Common-Mode Voltage Gain (Acm)
It is defined as the ratio of the output voltage VO to the common
mode input voltage Vcm. In the form of an equation,
𝑽
ACM=𝑽 𝑶
𝒄𝒎
v Common-Mode Rejection Ratio (CMRR)
It is defined as the ratio of the differential voltage gain Ad to the
common-mode voltage gain ACM.
𝑨
CMRR=𝑨 𝒅
𝒄𝒎

Performance Criteria ➢ The main pins in the 741 op-amp are pin2, pin3 and pin6.
In inverting amplifier, a positive voltage is applied to pin2 of the
Identify Op-amp IC, its pins and interpret its op-amp; we get output as negative voltage through pin 6. The
datasheet. polarity has been inverted.
In a non-inverting amplifier, a positive voltage is applied to pin3
of the op-amp; we get output as positive voltage through pin 6.
Experiment No. 7.1. Polarity remains the same in non-inverting amplifier.
➢ VCC is usually in the range from 12 to 15 volts. When two
Aim: To identify the pins of µA741 Op-amp IC, know their supplies (+VCC/-VCC) are used, they are the same voltage and
functionality and interpret its datasheet. of opposite sign in almost all cases.
Component Required: Specifications of µA741:

Sl. Equipment/ i Power Supply: Requires a minimum voltage of 5V and can
Specification Quantity withstand up to 18V.
No. Component Name
1 Op-amp IC µA741 01 ii Input Impedance: About 2 megaohms.
iii Output impedance: About 75 ohms.
Pin Description: iv Voltage Gain: 200,000 for low frequencies.
Figure 7.8. shows the pinout diagram of µA741. v Maximum Output Current: 20mA.
vi Recommended Output Load: Greater than 2 kiloohms.
Figure 7.7. Pinout Diagram of IC-741

Usually, µA741 is a numbered counter clockwise around the chip. It
comes in 8-pin dual-in-line package with a pinout shown below.
Pin No Description
1 Offset null
2 Inverting input terminal
3 Non-Inverting input terminal
4 -VCC (Negative voltage supply)
5 Offset null
6 Output voltage
7 +VCC (Positive voltage supply)
8 No connection

Tabular Column:
Practical Characteristics of an Op-amp Sl. No. Parameter Value
1 Non-inverting terminal voltage (V1)
Experiment 7.2. 2 Inverting terminal voltage (V2)
3 Differential voltage (VD)
Aim: To find practical values of differential gain AD, Common mode 4 Average voltage (VAV)
gain ACM and CMRR of given Op-amp and compare them with ideal
5 Output voltage (Vo)
values.
𝑉
6 Differential voltage gain AD=𝑉𝑜
Components and Apparatus Required 𝐷
𝑉𝑂
Sl. Equipment/ 7 Common mode gain ACM=𝑉
𝐴𝑉
Specification Quantity 𝐴𝐷
No. Component Name CMRR= 𝐴
8
1 Op-amp IC µA741 01 𝐶𝑀
2 Op-amp power supply ±15V, 2 Amp 01

3 DC regulated power supply 0-30V, 2 Amp 01 Circuit Diagram:
4 Digital multimeter - 01
5 Bread board - 01
Procedure:
2. Apply DC input voltages at the inverting and non-inverting input
terminals.
3. Measure the DC voltages at the inverting and non-inverting
input terminals using digital multimeter.
Figure 7.8. Circuit diagram to find AD, ACM and CMRR
4. Calculate the required parameters.
Result: The practical values of AD, ACM and CMRR of given op-amp is
measured and compared with ideal values.

Expt. 7.3. Procedure:
Aim: To find practical values of Input bias current and Input offset 1. Connect the circuit as shown in the circuit diagram.
current of given Op-amp and compare them with ideal values. 2. Measure the DC voltages at the inverting and non-inverting
input terminals using digital multimeter.
Components and Apparatus Required 3. By using ohm’s law, calculate bias currents at inverting and non-
Sl. Equipment/ inverting terminals.
Specification Quantity 4. Take the average of values obtained in third step to find output
No. Component Name
1 Op-amp IC µA741 01 input bias current.
2 Op-amp power supply ±15V, 2 Amp 01 5. Calculate the sum of the bias currents flowing into inverting
3 Digital multimeter - 01 inputs and non-inverting inputs to find out input bias current.
4 Bread board - 01 6. Disconnect the circuit safely.
Result: The practical values of Input bias current IB and Input offset
current IIO and compared with ideal values.
Circuit Diagram:
Figure 7.9. Circuit diagram to IB and IIO

Tabular Column:
DC DC
voltage voltage
at at Input Input
Non Non 𝑽+ 𝑽− bias Offset
I += IB-=𝟏𝟎𝟎𝑲 current
inverting inverting B 𝟏𝟎𝟎𝑲 current
𝑰+ −
𝑩 +𝑰𝑩
input input IB = 𝟐 I IO=IB++IB-
terminal terminal
V+ V-

8.1.1. Open loop Differential Amplifier

➢ In this configuration, the inputs are applied to both inverting and
Course Content 8 noninverting input terminals of the op-amp and it amplifies the
difference between the two input voltages.
Configurations of Op-amp ➢ Figure 8.1. shows the open-loop differential amplifier
configuration.
➢ The output voltage given by VO=A(V1-V2) where A is the open
Lecture Tutorial Practice loop voltage gain.
Open-loop
configuration
Comparator-Inverting &
Noninverting types.
Prepare a report on Construct and test an op-
Closed-loop comparison of transistor amp circuit to obtain
configuration amplifier and op-amp. Inverting & Noninverting
Virtual ground output.
Inverting amplifier Demonstrate the
Figure 8.1. Open-loop differential amplifier
Noninverting amplifier operation of auto cut for Construct a circuit to
manual stabilizers using obtain sum/difference of 8.1.2. Open loop Inverting Amplifier
Voltage follower 741 IC. all input voltages. ➢ In this configuration, the input signal is applied to the inverting
Summing amplifier input terminal of the op-amp and the non-inverting input
Difference amplifier terminal is connected to the ground.
➢ Figure 8.2. shows the open-loop inverting amplifier
configuration.
➢ The output voltage given by VO=-AVi where A is open loop
Knowledge Criteria voltage gain.
➢ In an inverting amplifier, the input signal is amplified by the
open-loop gain A and its phase shifted by 180o.
8.1. Open Loop Configuration
➢ The term ‘Open-Loop’ indicates that no feedback in any form is

fed to the input from the output.
➢ When op-amp is connected in open-loop, it functions as a very
high gain amplifier.
➢ Depending on the inputs applied, op-amp can be configured in
following configurations.
i Open loop Differential amplifier
ii Open loop Inverting amplifier Figure 8.2. Open-loop inverting amplifier
iii Open loop Noninverting amplifier
8.1.3. Open loop Noninverting Amplifier 8.2.1. Noninverting Comparator

➢ In this configuration, the input signal is applied to the ➢ Figure 8.5. shows the circuit diagram and relevant waveforms of
noninverting input terminal of the op-amp and the inverting noninverting comparator.
input terminal is connected to the ground. ➢ The input signal Vin is applied to the noninverting input (+)
➢ Figure 8.3. shows the open-loop noninverting amplifier terminal and reference voltage Vref is applied to inverting input
configuration. (-) terminal.
➢ The output voltage is driven into +Vsat when Vin>Vref
The output voltage is driven into -Vsat when Vin<Vref
Figure 8.3. Open-loop noninverting amplifier

➢ The output voltage given by VO=AVi where A is open loop
voltage gain.
Figure 8.5. Noninverting comparator
➢ In noninverting amplifier, the input signal is amplified by the
open-loop gain A.
8.2.2. Inverting Comparator
➢ Figure 8.6. shows the circuit diagram and relevant waveforms of
8.2. Comparator inverting comparator.
➢ Comparator is a circuit with two inputs V+ and V- and produces
➢ The input signal Vin is applied to the inverting input (-) terminal
digital output VO, HIGH or LOW depending on which input is
greater. and reference voltage Vref is applied to noninverting input (+)
VO=HIGH, When V+>V- terminal.
VO=LOW, When V+<V- ➢ The output voltage is driven into -Vsat when Vin>Vref
➢ The output voltage is driven into +Vsat when Vin<Vref
V+
VO
V-
Figure 8.4. Circuit symbol of comparator

➢ Comparator is an open loop op-amp with two analog inputs and
a digital output. There are two comparator configurations.
i Noninverting Comparator
ii Inverting Comparator Figure 8.6. Inverting Comparator
8.3. Closed loop Configuration 8.3.2. Inverting Amplifier

➢ The op-amp can be effectively utilized in linear applications by ➢ Figure 8.8. shows the circuit diagram of inverting amplifier.
providing feedback from the output to the input, either directly Input signal Vin is applied to inverting input terminal,
or through another network. noninverting input terminal is grounded and feedback is
➢ If the feedback signal is out-of-phase by 1800 with respect to the implemented through resistor RF.
input signal, then feedback is referred to as negative feedback or The output signa Vout is an amplified and inverted version of the
degenerative feedback. input signal as shown in the figure 8.7.
➢ If the feedback signal is in phase with the input signal, then
feedback is referred to as positive feedback or generative
feedback.
➢ An op-amp that uses feedback is called closed loop amplifier.
➢ The two most widely used closed loop configuration of op-amp
are,
i Inverting amplifier
ii Noninverting amplifier
Figure 8.8. Inverting Amplifier
8.3.1. Virtual Ground Concept
➢ Virtual ground in an op-amp is a phenomenon in which one of ➢ By KCL,
the input terminals will have zero terminal voltage although that Iin=Id+If
terminal is not connected to ground potential. By virtual ground concept, Id=0 and Vx=0
➢ Consider op-amp circuit shown in the figure 8.7. which employs i.e., Iin=IF
negative feedback. 𝑣𝑖𝑛 − 𝑣𝑥 𝑣𝜘 − 𝑣0
=
𝑅1 𝑅𝐹
𝑣𝑖𝑛 − 0 0 − 𝑣0
=
𝑅1 𝑅𝐹
𝑣𝑖𝑛 −𝑣0
=
𝑅1 𝑅𝐹
𝑅𝐹
𝑣0 = − 𝑣𝑖𝑛
𝑅1
𝑣0 = 𝐴𝑣 𝑣𝑖𝑛
𝑅
Figure 8.7. Op-amp circuit with negative feedback where, 𝐴𝑣 = − 𝑅𝐹
1
➢ By virtual ground concept, V1=V2 8.3.3. Noninverting Amplifier

We know that, an ideal op-amp will amplify the differential ➢ Figure 8.9. shows the circuit diagram of noninverting amplifier.
voltage Vid=V1-V2. Input signal Vin is applied to noninverting input terminal and
𝑉 feedback signal is applied to inverting input terminal.
Gain=A=𝑉 𝑂
𝑖𝑑 The output is an amplified and noninverted version of the input
Ideal op-amp will have, A=∞, which means Vid=0. signal as shown in the figure 8.9.

8.5. Summing Amplifier

➢ A summing amplifier has two or more inputs and its output
voltage VOut is proportional to the negative of the algebraic sum
of its input voltages.
➢ The summing amplifier is the application of the inverting
amplifier. Figure 8.11. shows the circuit diagram of summing
amplifier with two inputs.
Figure 8.9. Noninverting amplifier

𝑅1
➢ 𝑣𝑥 = 𝑅 − 𝑣0
1 +𝑅𝑟
By virtual ground concept, Vx=Vin
𝑅1
𝑣𝑖𝑛 = 𝑣
𝑅1 + 𝑅𝐹 0
𝑅𝐹
𝑣0 = (1 + ) ⋅ 𝑣𝑖𝑛 Figure 8.11. Summing Amplifier
𝑅1 ➢ Applying KCL at inverting terminal,
𝑣0 = 𝐴𝐹 𝑣𝑖𝑛 I1+I2=Id+IF
𝑅
where, 𝐴𝑣 = 1 + 𝑅𝐹 By virtual ground concept Vd=0 and Id=0
1
8.4. Voltage Follower 𝐼1 + 𝐼2 = 𝐼𝐹
𝑣1 − 𝑣𝑑 𝑣2 − 𝑣𝑑 𝑣𝑑 − 𝑣0
➢ When noninverting amplifier is configured for unity gain, the + =
resulting circuit is called voltage follower. 𝑅1 𝑅2 𝑅𝐹
𝑣1 𝑣2 𝑣0
➢ It is called as voltage follower because the output voltage is + =−
𝑅1 𝑅2 𝑅𝐹
equal to and in phase with the input. In other words, output 𝑣1 𝑣2
follows the input. 𝑣0 = −𝑅𝐹 [ + ]
𝑅1 𝑅2
➢ Figure 8.10. shows the circuit diagram and waveforms of the
If R1=R2=RF=R
voltage follower. 𝑣1 𝑣2
𝑣0 = −𝑅 [ + ]
𝑅 𝑅
𝑣0 = −(𝑣1 + 𝑣2 )
The equation shows that, the output voltage is equal to the
negative sum of individual voltages.
8.6. Difference Amplifier
➢ A difference amplifier amplifies the difference between two
input signals.
➢ Figure 8.12. shows the circuit diagram of two-input difference
amplifier.
Figure 8.10. Voltage follower
Inverting and Noninverting Amplifier

Summing and Difference Amplifier
Experiment No. 8.1. Inverting Amplifier
Aim: To construct and test an op-amp circuit to obtain inverting

waveform.
Figure 8.12. Difference Amplifier
➢ The circuit is a combination of inverting amplifier and Components and Apparatus Required:
noninverting amplifier.
Sl. Equipment/ Component
➢ The voltage at point Vb is given by, Specification Quantity
𝑅4 No. Name
𝑣𝑏 = 𝑣 1 Function generator 01
𝑅2 + 𝑅4 2
2 Op-amp power supply ±12V 01
If V2=0, then output voltage due to input signal V1 is given by,
𝑅3 3 CRO
𝑣01 = − 𝑣1 4 Op-amp IC µA741 01
𝑅𝐼
5 Resistors 1KΩ 02
If V1=0, then output voltage due to input signal V2 is given by,
𝑅3 6 Breadboard - 01
𝑣02 = [1 + ] 𝑣2 7 Single stand wires - As needed
𝑅1
𝑅1 + 𝑅3 𝑅4
𝑣02 = [ ][ ]𝑣 Circuit Diagram:
𝑅1 𝑅2 + 𝑅4 2
Then output voltage VO is given by,
𝑅3 𝑅1 + 𝑅3 𝑅4
𝑣0 = − 𝑣1 + [ ][ ]𝑣
𝑅𝐼 𝑅1 𝑅2 + 𝑅4 2
If R2=R1 and R3=R4, then
𝑅3 𝑅3
𝑣0 = − 𝑣1 + 𝑣2
𝑅𝐼 𝑅1
𝑅3
𝑣0 = [𝑣 − 𝑣1 ]
𝑅1 2 Figure 8.13. Inverting Amplifier circuit diagram
If R3=R1, then
𝑣0 = 𝑣2 − 𝑣1 Design:
𝑅 1𝐾
Gain A= -𝑅𝐹=-1𝐾=-1
1
Output voltage VOut= A x VIn = -1x1=-1V
Experiment No. 8.2. Noninverting Amplifier

Waveforms:
Aim: To construct and test an op-amp circuit to obtain noninverting
waveform.
No. Name
1 Function generator 01
3 CRO
4 Op-amp µA741 01
Figure 8.14. Waveforms of inverting amplifier 5 Resistors 1KΩ 02
6 Breadboard - 01
VIn(p-p)= _________Volts 7 Single stand wires - As needed
VOut(p-p)= _________Volts
Circuit Diagram:
𝑽𝑶𝒖𝒕
Gain A= 𝑽 =_______
𝑰𝒏
Theory:
In inverting amplifier circuit, the non-inverting input is
grounded and A signal is applied to inverting input through resistor R1
and feedback is implemented with resistor RF. The output voltage is
given by
𝑅
Vout=- 𝑅𝐹 Vin Volts
1
Procedure:
Figure 8.15. Noninverting Amplifier Circuit Diagram
2. Apply biasing voltages to the op-amp IC.
3. Set 1V(p-p), 1KHz input signal from function generator. Design:
4. Rig up the circuit as shown in the circuit diagram. 𝑅 1𝐾
5. Observe inversion waveform at pin no 6. Gain A= 1+ 𝑅𝐹=1+1𝐾=2
1
Output voltage VOut= A x VIn = 2x1=2V
Result: An inverted waveform is obtained using op-amp circuit.
Waveforms: Experiment No. 8.3. Summing Amplifier

Aim: To construct and test an op-amp circuit to obtain the sum of input
voltages.
No. Name
1 Function generator 01
Figure 8.16. Waveforms of noninverting amplifier 3 Digital multimeter 01
VIn(p-p)= _________Volts 4 Op-amp µA741 01
VOut(p-p)= _________Volts 6 Breadboard - 01
𝑽 7 Single stand wires - As needed
Gain A= 𝑽𝑶𝒖𝒕 =_______
𝑰𝒏
Circuit Diagram:
Theory:
The non-inverting amplifier is configured by connecting the
input signal to the non-inverting input and the resistance R1 connected
to inverting input is grounded at the other end. The feedback resistor RF
is connected between inverting input and output. The output voltage is
given by,
𝑅
Vout=1+ 𝑅𝐹 Vin Volts
1
Figure 8.17. Circuit diagram of summing amplifier
Procedure:
1. Connect the circuit as shown in the circuit diagram. Tabular Column:
3. Set 1V(p-p), 1KHz input signal from function generator. Theoretical Output Practical Output
V1 in V2 in
4. Rig up the circuit as shown in the circuit diagram. Voltage Voltage
Volts Volts
VO=-(V1+V2) in volts VO=-(V1+V2) in volts
5. Observe inversion waveform at pin no 6.
Result: A noninverted waveform is obtained using op-amp circuit.

Theory: Experiment No. 8.4. Difference Amplifier

The inverting amplifier can be made to operate as summing Aim: To construct and test an op-amp circuit to obtain the difference
amplifier. The summing amplifier has two inputs V1 and V2 and its of input voltages.
output voltage is proportional to negative of the algebraic sum of its
input voltages. Components and Apparatus Required:
Procedure: Sl. Equipment/ Component

1. Connect the circuit as shown in the circuit diagram. No. Name
2. Apply biasing voltages to the op-amp IC. 1 Function generator 01
3. Rig up the circuit as shown in the circuit diagram. 2 Op-amp power supply ±12V 01
4. Apply input voltages and note down output voltage. 3 CRO
5. Disconnect the circuit safely. 4 Op-amp µA741 01
Result: Operation of summing amplifier using op-amp is tested. 6 Breadboard - 01
Circuit Diagram:
Figure 8.18. Circuit diagram of difference amplifier
Tabular Column:
Theoretical Output Practical Output
V1 V2
Voltage Voltage
In Volts In Volts
VO=-(V1-V2) in volts VO=-(V1-V2) in volts

Theory:
A difference amplifier amplifies the difference between two
input voltages. This circuit is a combination of inverting amplifier and
noninverting amplifier.
Procedure:
4. Apply input voltages and note down output voltage.
Result: Operation of difference amplifier using op-amp is tested.

➢ The integrator may be constructed from an inverting amplifier if

Course Content 9 the feedback resistor RF is replaced by capacitor CF as shown in
the figure.
Applications of Op-amp and Basics of ➢ Figure 9.2. shows the virtual ground equivalent circuit of the
Oscillators integrator.

Op-amp as integrator and Explain how an op-amp

differentiator can be used in Construct a circuit to Figure 9.2. Virtual ground equivalent circuit of integrator
applications such as A/D obtain triangular wave ➢ The expression for output voltage can be obtained from KCL
Op-amp as Schmitt trigger
converters, wave shaping and spike from square
and precision full wave
circuits etc. wave. equation written at node v2 as follows:
rectifier.
Prepare a report on i1=iB+iF-------(1)
Sinusoidal oscillators, Schmitt trigger Build an op-amp circuit to by virtual ground concept, iB=0
Types of oscillations, LC applications such as generate clock pulses and Equation (1) can be rewritten as,
tank circuit and stability switch debouncing, noise verify its working. i1=iF ---------(2)
removal etc.
Current through R1 is given by,
𝑣 −𝑣
i1= 𝑖𝑛𝑅 2-----------(3)
1
Knowledge Criteria Relationship between current through and voltage across the
capacitor is,
9.1. Op-amp as Integrator 𝑑𝑣
➢ A circuit in which the output voltage waveform is the integral of 𝑖𝑐 = 𝐶 𝑑𝑡𝐶 ------------(4)
the input voltage waveform is called integrator or integral Therefore, current through CF is given by,
𝑑
amplifier. 𝑖𝐹 = 𝑐𝐹 𝑑𝑡 (𝑣2 − 𝑣0 )----------(5)
➢ Figure 9.1. shows the circuit diagram of integrator. Substituting equation (3) and (5) in (2),
𝑣𝑖𝑛 −𝑣2 𝑑
= 𝐶𝐹 (𝑣2 − 𝑣0 )---------(6)
𝑅1 𝑑𝑡
By virtual ground concept and open loop gain of A is very high,
therefore V1=V2≈0
Equation (6) can be written as,
𝑣𝑖𝑛 𝑑
= 𝑐𝐹 (−𝑣0 )---------(7)
𝑅1 𝑑𝑡
The output can be obtained by integrating both sides with respect
to time,
Figure 9.1. Integrator

1 1 ➢ The expression for output voltage can be obtained from KCL

∫ 𝑣𝑖𝑛 𝑑𝑡 = 𝑅 ∫ − 𝑣0 𝑑𝑡-------(8)
𝑅1 1 𝑐𝐹 equation written at node v2 as follows:
Solving equation (8) for Vo, iC=iB+iF-------(1)
1
𝑣0 = − 𝑅 𝑐 ∫ 𝑣𝑖𝑛 𝑑𝑡------(9) Current through the virtual short is almost zero, IB≈0.
1 𝐹
The equation (11) shows that the output is the integral of the Equation (1) can be written as,
1 ic=iF ---------(2)
input, with inversion and scale multiplier of 𝑅 𝐶 .
𝐹 𝐹 Relationship between current through and voltage across the
➢ For an integrator, capacitor is,
If the input is sine wave, output will be a cosine wave. 𝑑𝑣
𝑖𝑐 = 𝑐 𝑑𝑡𝑐 -----------(3)
If the input is square wave, output will be a triangular wave.
9.2. Op-amp as Differentiator Therefore, current through C1 is given by,
𝑑(𝑣 −𝑣2 )
➢ The circuit which produces an output voltage which is 𝑖𝐶 = 𝑐1 𝑖𝑛1 ----------(4)
𝑑𝑡
proportional to the rate of change of the input voltage. Current through RF is given by,
➢ Figure 9.3. shows the circuit diagram of differentiator. 𝑣 −𝑣
𝑙𝐹̇ = 2𝑅 0----------(5)
𝐹
Substituting (4) and (5) in (2),
𝑑(𝑣 −𝑣2 ) 𝑣2 −𝑣0
𝑐1 𝑖𝑛 = ---------(6)
𝑑𝑡 𝑅 𝐹
By virtual ground concept and open loop gain of A is very high,
therefore V1=V2≈0
Substituting equation (4) and (6) in (2),
𝑑𝑣 𝑣
𝑐1 𝑑𝑡𝑖𝑛 = − 𝑅0 -----------(7)
𝐹
Output voltage is given by,
𝑑𝑣
Figure 9.3. Differentiator 𝑉0 = −𝑅𝐹 𝐶1 𝑑𝑡𝑖𝑛---------(8)
➢ The differentiator may be constructed from an inverting Thus, the output voltage VO is equal to RFC1 times the negative
amplifier if the input resistor R1 is replaced by capacitor C1. instantaneous rate of change of input voltage Vin with time.
➢ The differentiator is not commonly used because of practical ➢ For a differentiator,
problems with noise. A cosine wave input will produce a sine wave output.
➢ Figure 9.4. shows the virtual ground equivalent circuit of the Triangular input will produce a square wave output.
differentiator. 9.3. Op-amp as Schmitt Trigger
➢ A comparator with positive feedback is called as Schmitt trigger.

➢ In Schmitt trigger, the input is applied to inverting terminal and
feedback is connected from output to the non-inverting terminal
through the resistor as shown in the figure 9.5.
Figure 9.4. Virtual ground equivalent circuit of differentiator

➢ Upper Trigger Point

When Vin < V1, the output VO is saturated in a positive direction
i.e., VO=+Vsat, this voltage V1 is called UTP.
The input voltage Vin slightly more positive than UTP in order
to cause VO to switch from +Vsat to -Vsat.
As long as Vin<UTP, VO=+Vsat.
Using voltage divider rule, UTP is given by
𝑅1
𝑈𝑇𝑃 = [+𝑣𝑆𝑎𝑡 ]
𝑅1 + 𝑅2
➢ Lower Trigger Point
When Vin ≥ V1, the output VO is saturated in a negative direction
i.e., VO=-Vsat, this voltage V1 is called LTP.
The input voltage Vin slightly more negative than LTP in order
Figure 9.5. Schmitt Trigger to cause VO to switch from -Vsat to +Vsat.
➢ In Schmitt trigger, As long as Vin>LTP, VO=-Vsat.
When input voltage arrives at upper triggering point (UTP) or Using voltage divider rule, LTP is given by
lower triggering point (LTP), the output voltage switches rapidly 𝑅1
between +Vsat and -Vsat. 𝐿𝑇𝑃 = [−𝑣𝑆𝑎𝑡 ]
𝑅1 + 𝑅2
➢ The circuit operates with almost any input waveform and always ➢ Hysteresis
gives a pulse-type waveform. The Schmitt trigger exhibits hysteresis as shown in the figure
➢ The output voltage VO switches rapidly from +Vsat to -Vsat when 9.7.
input voltage Vin exceeds certain positive level called UTP. Hysteresis is the condition in which change in input voltage has
Similarly, output voltage VO switches rapidly from -Vsat to +Vsat no effect on the output.
when input voltage Vin goes below certain negative level called
LTP.
Figure 9.6. shows the relevant waveforms.
Figure 9.7. Hysteresis

The hysteresis voltage is equal to the difference between UTP
Figure 9.6. Schmitt Trigger waveforms and LTP.

𝐻𝑦𝑠𝑡𝑒𝑟𝑒𝑠𝑖𝑠 = 𝑈𝑇𝑃 − 𝐿𝑇𝑃 In the circuit, R1 and R2 are chosen such that,
𝑅1 𝑅1 R2=2R1
𝐻𝑦𝑠𝑡𝑒𝑟𝑒𝑠𝑖𝑠 = [+𝑣𝑆𝑎𝑡 ] − [−𝑣𝑆𝑎𝑡 ]
𝑅1 + 𝑅2 𝑅1 + 𝑅2 Hence, VB=-2Vin
2𝑅1 Thus, during positive half cycle of the input, rectified voltage
𝐻𝑦𝑠𝑡𝑒𝑟𝑒𝑠𝑖𝑠 = [+𝑣𝑆𝑎𝑡 ] VB applied to terminal B of the inverting summing amplifier is
𝑅1 + 𝑅2
-2Vin.
The voltage at terminal A is,
9.4. Precision Full Wave Rectifier
VA=+Vin
➢ The use of op-amps in rectifiers eliminate diode-voltage drop
The output from the summing circuit with R3=R4=R5 is,
that occurs with semiconductor diode rectifiers, thus they
VO=-(VA+VB)
become precision rectifiers.
VO=-(Vin-2Vin) =+Vin
➢ Figure 9.8. shows the circuit diagram of precision full wave
➢ When input Vin is negative,
rectifier.
Output of the op-amp terminal goes positive and this makes D2
reverse biased and D1 forward biased.
The positive voltage at the output of the op-amp tends to pull the
op-amp inverting terminal in a positive direction. But such pull
causes the op-amp output to go negative. So, the output settles
at the voltage close to ground level. Hence, the negative half
cycle is clipped-off. That is,
VB=0
VA=-Vin
VO=-(-Vin+0)=+Vin
Figure 9.8. Precision Full Wave Rectifier ➢ Waveform at the output VO is a full-wave rectified version of the
➢ The precision full wave rectifier circuit consists of the following input voltage as shown in the figure 9.9.
sections:
▪ Precision half-wave rectifier
▪ Inverting summing amplifier
➢ The input voltage Vin is applied to terminal A of the summing
amplifier and to the input of precision rectifier.
The output of the precision rectifier is designated as VB and is
applied to terminal B of the summing amplifier.
The precision half wave rectifier uses an inverting amplifier
configuration.
➢ When input Vin is positive,
Op-amp output terminal is negative, diode D1 is reverse biased
and D2 is forward biased. And output voltage VB is given by,
𝑅2
𝑣𝐵 = − 𝑣𝑖𝑛
𝑅1 Figure 9.9. Precision Full Wave Rectifier output

9.5. Sinusoidal Oscillators

➢ An oscillator is an electronic circuit that produces a periodic
signal.
If the oscillator produces sinusoidal oscillations, it is called as a
sinusoidal oscillator.
It converts the input energy from a DC source into an AC output
energy of a periodic signal.
This periodic signal will be having a specific frequency and
amplitude.
9.5.1. Types of Oscillations
➢ There are three types of oscillations
i Free oscillations
ii Damped oscillations Figure 9.10. Damped Oscillations
iii Maintained oscillations ➢ Maintained Oscillations
➢ Properties of oscillation The amplitude of an oscillating system can be made constant by
i The frequency (F) is defined as the number of complete feeding some energy to the system. If an energy is fed to the
oscillations per unit time. system to compensate the energy it has lost, the amplitude will
ii The amplitude (A) is defined as the maximum be a constant. Such oscillations are called maintained
displacement of an oscillator from its equilibrium oscillations.
position.
iii The time period (T) is defined as the time taken for one
complete oscillation, in seconds. The relationship
between frequency and period is f = 1/T
➢ Free Oscillations
When a body vibrates with its own frequency, it is called a free
oscillation. The free oscillation has a constant amplitude and
period without any external force to set the oscillation.
An example would be the vibrations in a tuning fork.
Figure 9.11. Maintained Oscillations
➢ Damped Oscillations 9.6. LC Tank Circuit
Most free oscillations eventually die out due to the ever-present ➢ The circuit consists of an inductive coil, L and a capacitor, C.
damping forces in our surrounding. The oscillation that The capacitor stores energy in the form of an electrostatic field
decreases with time is called damped oscillation. Due to external and which produces a static voltage across its plates, while the
factors such as friction or air resistance that results in damping, inductive coil stores its energy in the form of an electromagnetic
the amplitude of oscillation reduces with time, and this will field. The capacitor is charged up to the DC supply voltage, V
result in energy loss from the system. by putting the switch in position A. When the capacitor is fully
An example would be the decaying oscillations of a pendulum. charged the switch changes to position B.

energy is transferred from the capacitor, C to inductor, L and

back from L to C some energy losses occur which decay the
oscillations to zero over time as shown in the figure 9.13.
Figure 9.12. LC Tank Circuit

➢ The charged capacitor is now connected in parallel across the
inductive coil so the capacitor begins to discharge itself through
the coil. The voltage across C starts falling as the current through Figure 9.13. LC Tank Circuit
the coil begins to rise. ➢ This oscillatory action of passing energy back and forth between
➢ This rising current sets up an electromagnetic field around the the capacitor, C to the inductor, L would continue indefinitely if
coil which resists this flow of current. When the capacitor, C is it was not for energy losses within the circuit. Electrical energy
completely discharged the energy that was originally stored in is lost in the DC or real resistance of the inductors coil, in the
the capacitor, C as an electrostatic field is now stored in the dielectric of the capacitor, and in radiation from the circuit so
inductive coil, L as an electromagnetic field around the coil’s the oscillation steadily decreases until they die away completely
windings. and the process stops.
➢ As there is now no external voltage in the circuit to maintain the ➢ Then in a practical LC circuit the amplitude of the oscillatory
current within the coil, it starts to fall as the electromagnetic field voltage decreases at each half cycle of oscillation and will
𝑑𝑖
begins to collapse. A back emf is induced in the coil (e = -L𝑑𝑡) eventually die away to zero. The oscillations are then said to be
keeping the current flowing in the original direction. “damped” with the amount of damping being determined by the
➢ These current charges up capacitor, C with the opposite polarity quality or Q-factor of the circuit.
to its original charge. C continues to charge up until the current
reduces to zero and the electromagnetic field of the coil has
collapsed completely.
➢ The energy originally introduced into the circuit through the
switch, has been returned to the capacitor which again has an
electrostatic voltage potential across it, although it is now of the
opposite polarity. The capacitor now starts to discharge again
back through the coil and the whole process is repeated. The
polarity of the voltage changes as the energy is passed back and
forth between the capacitor and inductor producing an AC type
sinusoidal voltage and current waveform.
➢ This process then forms the basis of an LC oscillators tank
circuit and theoretically this cycling back and forth will continue
indefinitely. However, things are not perfect and every time
Performance Criteria Waveforms:
Integrator and Differentiator

Schmitt Trigger
Experiment No. 9.1. Integrator
Aim: To construct and test an op-amp circuit to obtain triangular

waveform from square wave.
Equipment/ Component
Sl. No. Specification Quantity
Name
1 Function generator 0-1MHz 01
2 Op-amp power supply ±12V 01 Figure 9.15. Waveforms of Integrator
3 CRO 0-1MHz 01 Theory:
4 Op-amp IC µA741 01 ➢ A circuit in which the output voltage waveform is the integral of
5 Resistors 1KΩ 01 the input voltage waveform is called integrator or integral
6 Capacitors 0.1µF 01 amplifier.
7 Breadboard - 01 ➢ Output of the integrator circuit is given by
8 Single stand wires - As needed 1
𝑣0 = − ∫ 𝑣𝑖𝑛 𝑑𝑡
𝑅1 𝑐1
Circuit Diagram: ➢ For an integrator,
If the input is sine wave, output will be a cosine wave.
If the input is square wave, output will be a triangular wave.
Procedure:
Vin(p-p) 3. Set 10V(p-p), 1KHz square input signal from function generator.
10V
1KHz
5. Observe output waveform at pin no 6.
Figure 9.14. Integrator circuit diagram Result: Working of op-amp as integrator is verified.
Experiment No. 9.2. Differentiator Waveforms:
Aim: To construct and test an op-amp circuit to obtain spikes from

square wave.

No. Name
3 CRO 0-1MHz 01
4 Op-amp µA741 01
Figure 9.17. Waveforms of Differentiator
Theory:
6 Capacitors 0.1µF 01
7 Breadboard - 01 ➢ The circuit which produces an output voltage which is
8 Single stand wires - As needed proportional to the rate of change of the input voltage.
➢ Output voltage is given by,
𝑑𝑣𝑖𝑛
𝑉0 = −𝑅𝐹 𝐶1
𝑑𝑡
Circuit Diagram: ➢ For a differentiator,
RF
A cosine wave input will produce a sine wave output.
Triangular input will produce a square wave output.
Procedure:
3. Set 10V(p-p), 1KHz square wave input signal from function
generator.
5. Observe output waveform at pin no 6.
Result: Working of op-amp as differentiator is verified.
Figure 9.16. Differentiator Circuit Diagram

Experiment No. 8.3. Schmitt Trigger Similarly, output voltage VO switches rapidly from -Vsat to +Vsat
when input voltage Vin goes below certain negative level called
Aim: To construct and test an op-amp circuit to generate clock pulses. LTP.
Waveforms:
No. Name
3 DC regulated power supply 0-30V 01
4 CRO 0-1MHz 01
5 Op-amp µA741 01
7 Breadboard - 01
Circuit Diagram:
Figure 9.19. Waveforms of Schmitt trigger

Procedure:
4. Apply input voltages and note down output voltage.
Figure 9.18. Circuit diagram of Schmitt trigger
Theory: Result: Operation of Schmitt trigger using op-amp is tested.
➢ A comparator with positive feedback is called as Schmitt trigger.

➢ The circuit operates with almost any input waveform and always
gives a pulse-type waveform.
➢ The output voltage VO switches rapidly from +Vsat to -Vsat when
input voltage Vin exceeds certain positive level called UTP.

➢ The feedback network feeds a portion of the output signal to the

input of the amplifier.
Course Content 10 The feedback factor determines the amount of output signal
being fed back.
Sinusoidal Oscillators ➢ The way in which the feedback signal is mixed to the input
determines the type of the feedback, accordingly there are two
types,
Lecture Tutorial Practice ▪ Negative Feedback
(Knowledge Criteria) (Activity Criteria) (Performance The feedback signal is mixed to the input signal in phase
Criteria) opposition.
Concept of feedback and
▪ Positive Feedback
types, Barkhausen criteria.
The feedback signal is mixed to the input signal in phase.
Demonstrate the Simulate Hartley ➢ As shown in the figure,
Types of Oscillators,
operation of a variable oscillator using
Working of Hartley
audio frequency BJT.
AV is the voltage gain of the amplifier
oscillator using BJT/Op- Vi is the input signal to the amplifier
oscillator using op-
amp and its applications.
amp 741. Simulate Colpitts VS is the external input signal.
Working of Colpitts and
oscillator using BJT. ➢ The output signal VO is given by,
Explain the working VO=AVVi
crystal oscillator using
of FM radio jammer.
BJT/Op-amp and their ➢ The feedback signal is given by,
applications Vf=βVO
➢ Negative Feedback
Knowledge Criteria Here, the feedback signal Vf is mixed with input signal Vs in
phase opposition.
Input signal Vi is given by,
10.1. Concept of Feedback and Types Vi=VS-Vf
➢ Figure 10.1. illustrates the block diagram of feedback amplifier. Output signal VO is given by,
It consists of an amplifier with gain AV and a feedback network VO=AV Vi
with feedback factor β. The feedback network is connected VO=AV(VS-βVO)
between the output and input of the amplifier. Rearranging the terms we get,
VO(1+Avβ)=VSAV
Or,
𝑉𝑂 𝐴𝑉
=
𝑉𝑆 1 + 𝐴𝑉 𝛽
The ratio is generally referred to as closed loop gain, ACL. i.e.,
𝐴
ACL=1+𝐴𝑉 𝛽
𝑉
The gain of the amplifier is reduced in negative feedback it has
Figure 10.1. Block diagram of feedback system
other advantages like improved stability.

➢ Positive Feedback b) Colpitts oscillator

Here, the feedback signal Vf is mixed with input signal Vs in ii RC oscillators
phase. a) RC phase shift oscillator
Input signal Vi is given by,
b) Wein bridge oscillator
Vi=VS+Vf
Output signal VO is given by, iii Negative resistance oscillators
VO=AV Vi a) Tunnel diode oscillators
VO=AV(VS+βVO) b) Gun diode oscillators
Rearranging the terms we get, iv Crystal controlled oscillators
VO(1-Avβ)=VSAV
10.4. Hartley Oscillator
Or,
𝑉𝑂 𝐴𝑉 ➢ Figure 10.2. shows the circuit diagram of Hartley oscillator
= using BJT.
𝑉𝑆 1 − 𝐴𝑉 𝛽
The ratio is generally referred to as closed loop gain, ACL. i.e.,

𝐴
ACL=1−𝐴𝑉 𝛽
𝑉
The gain of the amplifier is increased in positive feedback and
it is useful in oscillators.
10.2. Barkhausen Criterion

➢ The conditions which are required to be satisfied to operate the
circuit as an oscillator are called as “Barkhausen Criterion” for
sustained oscillations.
➢ The Barkhausen criterion should be satisfied by an amplifier
with positive feedback to ensure the sustained oscillations.
➢ The Barkhausen criterion states that,
i The open loop gain |Aβ|=1
ii Net phase shift around the loop is 0o or 360o
10.3. Types of Oscillations
➢ Oscillator circuits basically classified into two categories: Figure 10.2. Hartley Oscillator
i Sinusoidal Oscillators - Produces sinusoidal waveform ➢ A phase shift of 1800 is produced by the transistor amplifier and
ii Non-sinusoidal Oscillators – Produces non-sinusoidal a further phase shift of 1800 is produced by the feedback network
waveform (LC tank circuit) so that phase shift around the closed loop is
➢ Sinusoidal wave oscillators may be of the type: 3600.
i LC oscillators ➢ The LC tank circuit is made up of two inductors L1 and L2 placed
across a common capacitor C and centre of inductors is tapped.
a) Hartley oscillator
➢ Working The feedback voltage Vf is 1800 out of phase with output voltage
When circuit is powered up, the capacitor C is charged. Vout.
The circulating tank current I flows through both L1 and L2, The oscillations across C2 are applied to the amplifier input.
setting up the oscillations of frequency f. The amount of feedback depends upon C1 and C2.
The output voltage Vout of the amplifier appears across L1 and ➢ The frequency of oscillations is given by
feedback voltage Vf appears across L2. 1
f=2П 𝐿𝑐
The feedback voltage Vf is 1800 out of phase with output voltage √ 𝑒𝑞
𝐶1 𝐶2
Vout. Where, Ceq=𝐶
1 +𝐶2
The oscillations across L2 are applied to the amplifier input. 𝑐
The feedback factor β is given by, β=𝑐1
The amount of feedback depends upon L1 and L2. 2
➢ The frequency of oscillations is given by
1
f=2П 𝐿 𝐶
√ 𝑒𝑞
Where, Leq=L1+L2
𝐿
The feedback factor β is given by, β=𝐿1
2
➢ Applications
i Used as local oscillator in radio receivers.
ii Suitable for producing oscillations in the radio
frequency range up to 30MHz.
10.5. Colpitts’s Oscillator
➢ Figure 10.3. shows the circuit diagram of Colpitts’s oscillator
using BJT.
➢ A phase shift of 1800 is produced by the transistor amplifier and
a further phase shift of 1800 is produced by the feedback network
(LC tank circuit) so that phase shift around the closed loop is
3600.
➢ The LC tank circuit is made up of two capacitors C1 and C2
placed across a common inductor L and centre of Capacitors is
tapped. Figure 10.3. Colpitts’s oscillator
➢ Working ➢ Applications
When circuit is powered up, the capacitors C1 and C2 are
charged. i Used in radio and mobile communications
The circulating tank current I flows through both C1 and C2, ii Used in microwave applications
setting up the oscillations of frequency f. iii Used as Surface Acoustical Wave (SAW) resonator.
The output voltage Vout of the amplifier appears across C1 and
feedback voltage Vf appears across C2.

10.6. Crystal Oscillator ➢ The transistor amplifier provides basic amplification while the
➢ In many applications it is desirable to maintain constant oscillator frequency set by the crystal.
frequency with extreme low tolerances. ➢ The crystal is connected in series-resonant path and operates at
➢ In order to maintain constant frequency, piezo electric crystals the crystal-resonant frequency.
are used in place of LC or RC circuits, this type of oscillators are ➢ At the series-resonant frequency of the crystal, impedance is
called crystal oscillators. smallest and the amount of positive feedback is the largest. The
➢ A quartz crystal exhibits the property that when mechanical phase shift around the closed loop is 0o.
stress is applied across the faces of the crystal, a difference of ➢ The series capacitor CC is used to fine tune the oscillator
voltage develops across opposite faces of the crystal. This frequency.
property is called Piezo-electric effect.
➢ Similarly, a voltage is applied across one set of faces of the
crystal causes mechanical distortion in the crystal shape.
When alternating voltage is applied to crystal, the crystal is
distorted by an amount proportional to the voltage and causes it
to vibrate at its natural resonance frequency. This frequency is
very stable quantity and these piezo electric crystals are used to
stabilize the frequency of oscillations.
➢ A crystal oscillator is basically a tuned circuit oscillator using
piezoelectric crystal as a resonant tank circuit as shown in the
figure.
Figure 10.4. Crystal Oscillator

Calculation:
Sinusoidal Oscillators
𝟏
f=
𝟐П√𝑳𝑪
Experiment No. 10.1. Hartley Oscillator
L=L1+L2
Aim: To simulate and verify the working of Hartley oscillator.
𝟏
Components and Apparatus Required: f=
𝟐.П.√(𝟓𝒎+𝟑𝒎).𝟏µ
PC loaded with Proteus 8.1. circuit simulation software. = 1.7KHz

Observations:
Circuit Diagram:
Amplitude(P-to-P)
Time Period
Frequency
Theory:
➢ Figure shows the circuit diagram of Hartley oscillator using BJT.

(LC tank circuit) so that phase shift around the closed loop is
3600.
Figure 10.5. Circuit diagram of Hartley oscillator
➢ The LC tank circuit is made up of two inductors L1 and L2 placed
Nature of Output: across a common capacitor C and centre of inductors is tapped.
1
f=2П 𝐿 𝐶
√ 𝑒𝑞
Where, Leq=L1+L2
Result: The Hartley oscillator working is tested.
Figure 10.6. Output waveform of Hartley oscillator

Experiment No. 10.2. Colpitts’s Oscillator Calculation:
Aim: To simulate and test the working of Colpitts’s oscillator. 1

f=
2П√𝐿𝐶
𝐶 𝐶 0.1µ 𝑥 0.1µ
PC loaded with Proteus 8.1. circuit simulation software. C=𝐶 1+𝐶2 = 0.1µ + 0.1µ= 0.05µF
1 2
Circuit Diagram: 1
f=
2.П.√(0.05µ 𝑥 100µ)
= 71 KHz
Observations:
Amplitude(P-to-P)
Time Period
Frequency
Theory:
➢ Figure shows the circuit diagram of Colpitts’s oscillator using

BJT.
Figure 10.7. Circuit diagram of Colpitts’s oscillator (LC tank circuit) so that phase shift around the closed loop is
3600.
Nature of Output:
➢ The LC tank circuit is made up of two capacitors C1 and C2
placed across a common inductor L and centre of Capacitors is
tapped.
1
f=
2П√𝐿𝐶
𝐶 𝐶
C=𝐶 1+𝐶2
1 2
Result: The Colpitts’s oscillator working is tested.

Figure 10.8. Output waveform of Hartley oscillator

Course Content 11 ➢ The circuit consists of three identical RC sections and an op-
amp.
Active Filters ➢ A single RC section introduces ideal phase shift of 90o, however
in practical at particular frequency, the RC components are
selected to introduce phase shift of 60o.
Lecture Tutorial Practice ➢ Three such identical RC networks in effect produces 1800 phase
(Knowledge Criteria) (Activity Criteria) (Performance Criteria) shift.
▪ Working of RC phase-
shift and
➢ The op-amp configured in inverting amplifier configuration
Wein-bridge Design and implement introduces 180o phase shift.
Discuss the
oscillators using Op-
problems to design
/Simulate RC phase shift ➢ The total phase shift introduced is 360o or 0o.
amp and their oscillator for generating ➢ The frequency of sinusoidal waveform produced by RC phase
and analyze 1st order
applications. a frequency of 1khz
Butterworth filters. shift oscillator is given by,
▪ Filters: Classification, using BJT. Verify the
Applications & same using op-amp. 1
Demonstrate how f=2П𝑅𝐶√6
Advantages of Active
LEDs can be made to
over Passive Filters.
blink on the beats of
Conduct an experiment 11.2. Wein Bridge Oscillator
▪ Filter Terminology, to plot the frequency ➢ Wein bridge oscillator is the standard oscillator used to generate
music
frequency response of response of LPF & HPF
1st order Butterworth
sinewave in audio frequency range.
LPF, HPF (No ➢ Figure 11.2 shows the circuit diagram of Wein bridge oscillator.
Derivation).
Knowledge Criteria
11.1. RC Phase Shift oscillator

➢ Figure 11.1 shows the circuit diagram of RC phase shift
oscillator.
Figure 11.2. Wein bridge oscillator

➢ The resistors R3 and R4 are the part of the amplifier and the two
branches of bridge circuit forms the RC feedback network.
Figure 11.1. RC phase shift oscillator ➢ The Feedback network consists two RC networks,
Series RC Network 1. Used in signal processing

Parallel RC Network 2. Used in Radio
➢ The series RC network acts as high pass filter and the parallel 3. Used in Satellites
RC network acts as low pass filter. 4. Used in biomedical equipments
In effect, this RC network does not allow low frequencies as well 11.4. Classification of Filters
as high frequencies. But at one particular frequency, the output ➢ By signal processing techniques
of the circuit will be maximum and that frequency is known as i Analog filters
resonant frequency. In other words, the RC network functions as ii Digital filters
a Notch filter. ➢ By circuit elements
➢ At the resonant frequency, phase shift of the circuit will be zero i Passive filters
1
and ratio of output to input will be equal to 3 . ii Active filters
If we consider, R1=R2 and C1=C2 then resonant frequency fr is ➢ By number of stages
given by, i First order filters (20 dB/decade)
1 ii Second order filters (40 dB/decade)
fr=2П𝑅𝐶
iii Third order filters (60 dB/decade)
1
or, fr=2П√𝑅 if values of R and C are different ➢ By operating frequency
1 𝑅2 𝐶1 𝐶2
i Audio frequency filters
➢ The ratio of output by the input is also called as feedback
1 ii Radio frequency filters
fraction β and it is equal to 3. ➢ By passband
➢ To get sustainable oscillations, Aβ=1, hence A=3. i Low pass filter
➢ The op-amp is configured in non-inverting configuration, so the ii High pass filter
gain is given by, iii Band pass filter
𝑅
A=1+𝑅4 iv Band reject filter
3
𝑅4 11.4. Advantages of Active filters over Passive filters
3=1+𝑅
3 i Provides adjustable gain
𝑅4
=2 ii Easier to tune
𝑅3
iii No loading problem
Whenever these conditions are met, we get sustained
iv More economical
oscillations.
v No use of inductors
11.3. Filters 11.5. Terminologies used in filters
i Passband
➢ A filter is a frequency selective circuit that is designed to pass The range of frequencies that a filter allows to pass is termed as
frequencies within a specified range, while rejecting all the passband.
frequencies that fall outside the range. ii Stopband
➢ Active filters use active devices such as transistors and op-amps The range of frequencies that a filter will attenuate is termed as
with resistors and capacitors. passband.
iii Cutoff frequency
➢ Applications:
The frequency at which the gain of the filter drops by 3 dB from ➢ The first order low pass filter has a practical slope of -
that of the passband determines where the stop band begins. 20dB/decade as shown in the figure in figure.
It is also called as corner frequency or break frequency.
iv Fall-off rate
Fall-off rate is the ratio of change in gain to increase in
frequency.
Fall-off rate of 20 dB/decade indicates that amplifier gain varies
by 20dB for every tenfold increase in frequency.
v Frequency scaling
The procedure used to convert an original cut-off frequency to a
new cut-off frequency is called frequency scaling.
11.6. First order Butterworth Active Low Pass Filter
➢ The Low Pass Filter provides a constant output from dc up to a
cut off frequency fH and rejects all signals above that frequency. Figure 11.4. Practical characteristics of First Order Butterworth LPF
➢ Figure 11.3 shows the circuit diagram of first order Butterworth The LPF has constant gain AF from 0 to high cutoff frequency
low pass filter that uses RC network for filtering. fH.
At fH the gain is 0.707AF
After fH, the gain decreases at a constant rate 20dB/decade.
11.7. First order Butterworth Active High Pass Filter
➢ Figure shows the circuit diagram of first order Butterworth high
pass filter that uses RC network for filtering.
Figure 11.3. First Order Butterworth LPF

➢ The op-amp is configured in noninverting configuration and the
gain of the filter is determined by resistors R1 and RF.
➢ The voltage gain AF below the high cutoff frequency fH is called
passband gain and is given by, Figure 11.5. First Order Butterworth HPF
𝑅
AF=1+ 𝑅𝐹 ➢ The op-amp is configured in noninverting configuration and the
1 gain of the filter is determined by resistors R1 and RF.
➢ High cutoff frequency is given by, ➢ The voltage gain AF above the low cutoff frequency fL is called
1
fH=2П𝑅𝐶 passband gain and is given by,

𝑅
AF=1+ 𝑅𝐹 Performance Criteria
1
➢ Low cutoff frequency is given by,
1 Sinusoidal Oscillators & Filter
fL=2П𝑅𝐶
➢ The gain of the first order high pass filter increases at a
constant rate of +20dB/decade up to fL as shown in figure. Experiment No. 11.1. RC Phase Shift Oscillator
Aim: To construct and test RC phase oscillator.

No. Name
2 CRO
3 Op-amp µA741 01
Figure 11.6. Practical characteristics of First Order Butterworth HPF 1KΩ 03
4 Resistors
➢ At fL, the gain is 0.707AF 100KΩ 01
➢ Above fL, the gain is constant it is known as passband gain. 5 Capacitors 0.01µF 03
6 Breadboard - 01
Circuit Diagram:
Figure 11.7. Circuit diagram of RC phase shift oscillator

Waveform: Procedure:
1. Connect the circuit as shown in circuit diagram.
2. Observe the output waveform at pin no. 6 in CRO.
3. Measure the amplitude and frequency.
Result: RC phase shift oscillator is designed using op-amp and its
working is tested.
Figure 11.8. Output waveform of RC phase shift oscillator
Calculation:
1 1
f= = = 1.9 KHz
2П𝑅𝐶 √6 2𝑥П𝑥3.3𝐾𝑥0.01µ
Observations:
Amplitude(P-to-P)
Time Period
Frequency
Theory:
➢ As shown in the circuit diagram, RC phase shift oscillator

comprises three identical RC sections. Single RC section
introduces phase shift of 900, however in practical at particular
frequency, the RC components are selected to introduce phase
shift of 600. Three such identical RC networks in effect produces
1800 phase shift.
➢ The op-amp configured in inverting amplifier configuration; it
introduces 1800 phase shift.
➢ Thus, total phase shift produced is 3600 or 00.
➢ The frequency of oscillations produced by RC phase shift
oscillator is given by,
1
f=
2П𝑅𝐶√6
Experiment No. 11.2. Active LPF Tabular Column:
Aim: To plot the frequency response of Active low pass filter. Input Voltage Vin= 5V
𝑽
Components and Apparatus Required: Sl. No. Frequency Output Voltage Vo Gain=20log 𝑽𝑶
𝒊
1 100 Hz
Specification Quantity 2 200 Hz
No. Name
3 300 Hz
4 400 Hz
2 CRO
3 Op-amp µA741 01 5 500 Hz
6 700 Hz
7 800 Hz
8 1KHz
6 Breadboard - 01
9 2KHz
10 3KHz
Circuit Diagram: 11 4KHz
12 5KHz
Theory:
➢ The active low pass filter is made up of op-amp.
➢ An active low pass filter is composed of one reactive element
such as Capacitor and active component such as op-amp.
A resistor is used with capacitor to form RC filter.
➢ At the lower frequencies, the input signals flow directly through
amplifying circuit and at the higher frequencies, it is bypasses
and made to pass through capacitor C. This increases the
Figure 11.9. Circuit Diagram of Active LPF amplitude of the output signal by passband gain.
Nature of Graph: Procedure:
2. Set the input voltage Vin(P-P)=5V.
3. Note down the output voltage at pin no 6 from CRO.
5. Plot frequency vs. Gain graph.
6. Release the connections safely.
Result: Active LPF is constructed and its frequency response
characteristics are studied.
Figure 11.10. Characteristics of Active LPF
Experiment No. 11.3. Active HPF Nature of Graph:
Aim: To plot the frequency response of Active high pass filter.

No. Name
2 CRO
3 Op-amp µA741 01
6 Breadboard - 01 Figure 11.12. Circuit Diagram of Active HPF
7 Single stand wires - As needed Theory:
➢ The active high pass filter is made up of op-amp.
Circuit Diagram:
➢ An active high pass filter is composed of one reactive element
such as Capacitor and active component such as op-amp.
A resistor is used with capacitor to form RC filter.
➢ The capacitor offers very high reactance for the signal with a
frequency lower than the cut-off frequency. i.e., Capacitor acts
as open switch.
The capacitor offers low reactance for the signal with a
frequency higher than the cut-off frequency. i.e., Capacitor acts
as close switch.
Procedure:
2. Set the input voltage Vin(P-P)=5V.
3. Note down the output voltage at pin 6 from CRO.
5. Plot frequency vs. Gain graph.
6. Release the connections safely.
Result: Active HPF is constructed and its frequency response
Figure 11.11. Circuit Diagram of Active HPF
characteristics are studied.

Course Content 12
Instrumentation Amplifier & PLL

(Knowledge Criteria) (Activity Criteria) (Performance
Criteria)
Frequency response of 1st
order Butterworth BPF and Figure 12.2. Circuit Diagram of BPF
Band Elimination Filter, BEF
(No Derivation).
Prepare a report on
Build an
Instrumentation Amplifier- different applications of
Instrumentation
Need for instrumentation instrumentation amplifier
Amplifier Circuit to
amplifier, Working of Explain the operation of
detect and Amplify
instrumentation amplifier Frequency Shift Keying
Analog/BioPotential
circuit. (FSK) generator using
Signals
PLL 565
Phase Locked Loop (PLL):
voltage to frequency
converter, PLL operation with
mention of its applications
Figure 12.3. Characteristics of BPF
Knowledge Criteria 12.2. First Order Butterworth Band Elimination Filter
➢ The Band Elimination Filter (BEF) is also known as Band Stop
12.1. First Order Butterworth Band Pass Filter Filter (BSF) or Band Rejection Filter (BRF).
➢ The function of BEF is inverse of BPF.
➢ The function of Band Pass Filter (BPF) is to pass a range of
➢ A BEF can be constructed by connecting a LPF and HPF in
frequencies between two cutoff frequencies fL and fH.
parallel with the help of summer as shown in figure , provided
➢ The BPF can be formed by cascading LPF and HPF as shown in
fH<fL.
figure 12.1. provided fH>fL.
Figure 12.1. BPF using LPF and HPF Block diagram

➢ The LPF will pass all frequencies up to fH, while the HPF will
block all frequencies below fL. So, the resultant BPF will have
passband from fL to fH as shown in figure 12.3.
Figure 12.4. BEF using LPF and HPF Block diagram

Figure 12.7. Circuit diagram of Instrumentation Amplifier

➢ The op-amps 1 and 2 are configured as noninverting amplifiers
Figure 12.5. Circuit Diagram of BEF and op-amp 3is configured as difference amplifier.
➢ The output of instrumentation amplifier is the amplified
difference of two input signals and it is given by,
𝑅
Vout=𝑅3 (Vo1-Vo2)
2
12.4. Phase Locked Loop
➢ The Phase Lock Loop (PLL) is the control loop or the control
system which maintains the same phase between the input or the
reference signal and the output signal.
➢ The figure 12.8. shows the block diagram of PLL and it consist
of three blocks:
Figure 12.6. Characteristics of BEF i Phase detector
➢ The LPF will pass all the frequencies upto fH, while HPF will ii Low Pass Filter
iii Voltage Controlled Oscillator (VCO)
block all frequencies below fL. So, the combination gives the
filter with a stopband from fH to fL as shown in figure 12.6.
12.3. Instrumentation Amplifier
➢ The instrumentation amplifier is a differential amplifier with
optimized dc parameters.
➢ An instrumentation amplifier is used to amplify very low-level Figure 12.8. Block diagram of PLL
signals, rejecting noise and interference signals. Examples can ➢ Phase Detector
be heartbeats, blood pressure, temperature, earthquakes and so The Phase detector detects the phase difference between the
on. VCO and the input, or the reference signal.
➢ Figure 12.7. shows the circuit diagram of instrumentation Based on the phase difference, it generates the error signal.
amplifier using three op-amps.
➢ Low Pass Filter Performance Criteria

The low pass filter removes the high-frequency components
from the error signal and generates the error voltage. The error Instrumentation Amplifier
voltage is fed to the VCO for the frequency correction.
➢ Voltage Controlled Oscillator
Based on the Control Voltage, the output frequency of the VCO Experiment No. 12. Instrumentation Amplifier
can be controlled around the center frequency.
Based on the error voltage, the output frequency of the VCO Aim: To demonstrate the working of Instrumentation Amplifier.
changes until the VCO frequency is equal to the input frequency.
➢ Specifications of PLL Components and Apparatus Required:
i Lock Condition
ii Capture Range PC loaded with Proteus 8.1. circuit simulation software.
iii Lock Range Circuit Diagram:
➢ Lock Condition
When the VCO frequency is the same as the input frequency and
there is no phase difference or the constant phase difference
between the two signals then the loop is said to be in the lock
condition.
➢ Capture Range
Capture range is the range of input frequencies around the VCO
center frequency onto which the loop can lock when starting
from the unlocked condition.
➢ Lock Range
It is the range of input frequencies over which the loop remains
in the lock condition once it has captured the input signal.
12.5. Voltage to Frequency Converter
➢ The Voltage-Controlled Oscillator (VCO) is also known by the name voltage
to frequency converter.
➢ In the conventional oscillators, to change the oscillator frequency, it is
required to tune the passive components like a resistor and the capacitor.
➢ But in the VCO, with the given set of passive components, just by changing
the control voltage the output oscillation frequency can be changed. Figure 12.9. Instrumentation Using Op-amps
➢ Applications of VCO Theory:
i Phase Lock Loop
ii Modulation and Demodulation Circuits ➢ An instrumentation amplifier is used to amplify very low-level
iii Frequency Synthesizers
iv Function Generators signals, rejecting noise and interference signals. Examples can
be heartbeats, blood pressure, temperature, earthquakes and so
on.

➢ The instrumentation amplifier using op-amp circuit is shown in

circuit shown below. The op-amps 1 & 2 are inverting
amplifiers and op-amp 3 is a difference amplifier. These three
op-amps together, form an instrumentation amplifier.
➢ Instrumentation amplifier’s final output VOut is the amplified
difference of the input signals applied to the input terminals of
op-amp 3.
Result: Working of Instrumentation amplifier is demonstrated.

Course Content 13 13.2. Internal Structure of IC-555 Timer

➢ Figure shows the internal structure of IC-555 timer.
IC 555 Timer

Study the latest
technological changes in
this course and present
IC 555 Timer: the impact of these
Internal diagram Verify the working of IC
changes on industry.
Pin Configuration. 555 timer as astable
multivibrator.
Demonstrate the use of
IC 555 timer as Astable IC 555 timer in traffic
Verify the working of IC
multivibrator. light controller.
555 timer as monostable
multivibrator
IC 555 timer as List the real-life
monostable multivibrator applications of IC 555
timer and explain any
one application.
Figure 13.2. Internal Structure of IC-555 Timer
➢ The internal structure is divided into five functional units:
Knowledge Criteria i Potential divider network
13.1. Introduction to IC-555 ii Comparators C1 and C2
➢ The 555 timer IC is a very popular timer IC and it is widely used iii RS flip-flop
in many timing related applications. iv Inverting buffer output stage
It can be used as an oscillator, LED Flasher, tone generator, v Transistors Q1 and Q2
Frequency division, and timing delay generation. ➢ Potential Divider Network
➢ The 555 timer IC is available in many packages but most popular This consists of three resistors of 5KΩ and provides reference
2 1
is 8 pin DIP (Dual Inline Package) as shown in figure. voltage of 3VCC and 3VCC to comparators.
➢ Comparators C1 and C2
▪ Comparator C1: Non-Inverting type comparator
Non-inverting terminal is connected to threshold input.
Inverting terminal is connected to reference voltage of
2
VCC.
3
2
Comparator 1 output goes High when threshold> 3VCC
Figure 13.1. Physical appearance of IC-555 Timer
and Resets the flip-flop.
2 Trigger input connected to negative terminal of comparator2 and

To use reference voltage other than 3VCC, inverting
1
terminal of this comparator can ve connected to external this input sets the flip-flop when trigger>3 𝑉𝑐𝑐.
voltage via Control voltage pin (pin no. 5) ➢ Pin no. 3: Output
▪ Comparator C2: Inverting type comparator This output pin can drive any TTL output and capable of
Inverting terminal is connected to reference voltage of sourcing or sinking current up to 200mA.
1
3
VCC. ➢ Pin no. 4: Reset
Non-Inverting terminal is connected to trigger input. This pin is used to reset the internal flip-flop.
1 This is an active low pin and connected to VCC when it is not
Comparator 2 output goes High when trigger< 3VCC and
used.
sets the flip-flop.
➢ RS Flip-flop ➢ Pin no. 5: Control Voltage
This RS flip-flop is used to make output High or Low according By applying control voltage to this pin, the width of the output
to the outputs of the comparators. signal can be varied.
➢ Inverting Buffer Output Stage When this pin is not used, it is bypassed to ground via a capacitor
Output stage provides low resistance. of 0.01µF.
This stage can source and sink the current up to 200mA. ➢ Pin no. 6: Threshold
This output stage inverts the output of flip-flop. i.e., Threshold input is connected to positive terminal of the
Output=0, when flip-flop output is High. 2
comparator2 and it resets the flip-flop when threshold > 3 𝑉𝑐𝑐.
Output=1, when flip-flop output is Low.
➢ Pin no 7: Discharge
➢ Transistors Q: NPN type.
This pin is connected to collector of transistor Q1 and used to
Used to discharge the capacitor at pin no 7 when 𝑄̅ =1.
➢ The operation of IC-555 Timer is summarized below. discharge the timing capacitor to ground.
➢ Pin no 8: +VCC:
Input Condition R S Q ̅
𝑸
Transistor This supplies VCC supply to IC and allowed voltages are 4.5V to
Q
2 15V.
Vthreshold< VCC Vtrigger> VCC 0 0 Previous state
3
2
Vthreshold< VCC Vtrigger< VCC 0 1 1 0 Off
3
2
Vthreshold> VCC Vtrigger> VCC 1 0 0 1 On
3
2
Vthreshold> VCC Vtrigger> VCC 1 1 Forbidden
3
13.3. Pin Configuration of IC-555

➢ Figure shows the pinout diagram of IC-555 timer 8 pin DIP
(Dual Inline Package).
➢ Pin no.1: Ground
The ground pin connects IC to the negative supply chain.
➢ Pin no. 2: Trigger
Figure 13.3. Pin-out Diagram of IC-555 Timer
13.4. IC-555 Timer as Astable Multivibrator 13.5. IC-555 Timer as Monostable Multivibrator
➢ Figure shows the circuit diagram of IC-555 stable multivibrator. ➢ Figure shows the circuit diagram of IC-555 monostable.
Figure 13.4. Astable multivibrator using IC-555 Timer

➢ The circuit has two astable states: Low and High.
The circuit changes the output to Low and High repeatedly based
on the values of R1, R2 and C. Figure 13.5. Monostable multivibrator using IC-555 Timer
Working: ➢ The circuit has one stable state ‘Low’ and one quasi stable state
𝟏
➢ Capacitor voltage VC<𝟑VCC ‘High’.
Comparator 2 output goes High, which sets the flip-flop, makes The circuit output is High for the period based on the values of
the output Low and allows to charge the capacitance up to R and C.
2 Working:
VCC. ➢ By applying trigger input at pin no 2, we can make output High
3
𝟐
➢ Capacitor voltage VC>𝟑VCC and allows the capacitor to charge.
2
Comparator 1 output goes High, which resets the flip-flop, When capacitance reaches voltage 3VCC, the circuit goes to
makes the output High and allows to discharge the capacitance LOW state.
1
up to 3VCC. ➢ Figure shows the waveforms of astable multivibrator.
➢ Figure shows the waveforms of astable multivibrator. ➢ Formula:
➢ Formulas: THigh=1.1. R. C
THigh=0.7(R1+R2)C
TLow=0.7R2C
T= 0.7(R1+2R2) C
Performance Criteria Circuit Diagram:
IC-555 Timer as Multivibrators
Experiment No. 13.1. Astable Multivibrator
Aim: To construct and test the working astable multivibrator using

timer IC-555.
No. Name
1 +5V fixed power supply 01
2 CRO 01
3 IC-555 01
4 Resistors 4.7 KΩ, 3.3 KΩ 02 Figure 13.6. Astable multivibrator using IC-555 Timer
5 Capacitors 0.1µ, 0.01µF 02 Calculations:
6 CRO 0-25 MHz 01 T=0.7(R1+2R2) C
1
7 Breadboard 01 f= 𝑡
8 Wires As needed
Waveforms:
Theory:
➢ An electronic circuit that generates non-sinusoidal waveforms is
known as multivibrator.
➢ An astable multivibrator is also known as free running
multivibrator, the circuit has no stable states. Both states are
quasi stable states.
➢ An astable multivibrator alternatively switches between the two
states. It remains in each state for a period determined by circuit
constants.
➢ An astable multivibrator most widely used as clock generator in
digital systems.
Figure 13.7. Waveforms Astable multivibrator using IC-555 Timer

Observations: Experiment No. 13.2. Monostable Multivibrator
Ton 13.2. Monostable Multivibrator
Toff Aim: To construct and test the working monostable multivibrator using
timer IC-555.
T
Procedure: Components and Apparatus Required:
1. Rig up the circuit as shown in the circuit diagram. Sl. Equipment/ Component
2. Connect channel 1 of CRO to capacitor voltage and note down No. Name
2 1 1 +5V fixed power supply 01
the values of 3VCC and 3VCC.
2 Signal generator
3. Connect channel 2 of CRO to pin number 3 and note down
voltage and time period. 3 CRO 01
4. Disconnect the circuit safely. 4 IC-555 01
5 Resistors 10 KΩ 02
Result: Working of astable multivibrator is tested. 6 Capacitors 0.01µF 02
7 CRO 0-25 MHz 01
8 Breadboard 01
9 Wires As needed
Theory:
A monostable multivibrator (MMV) often called a one-shot
multivibrator, is a pulse generator circuit in which the duration of the
pulse is determined by the R-C network, connected externally to the 555
timer. In such a vibrator, one state of output is stable while the other is
quasi-stable (unstable). For auto-triggering of output from quasi-stable
state to stable state energy is stored by an externally connected capacitor
C to a reference level. The time taken in storage determines the pulse
width. The transition of output from stable state to quasi-stable state is
accom-plished by external triggering.

Circuit Diagram: Observations:
Trigger Input V(P-P)

Output Voltage V(P-P)
TON
Procedure:
2. Set 2V(p-p-), 1KHz square input from function generator.
3. Observe the output.
Result: Working of monostable multivibrator is tested.
Figure 13.8. Monostable multivibrator using IC-555 Timer
Output Waveforms:
Figure 13.9. Monostable multivibrator using IC-555 Timer

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SANDUR POLYTECHNIC, YESHWANTNAGAR

Course Title ANALOG ELECTRONICS Course Code 20EC31P

DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION i

Lecture Tutorial Practice

DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION ii

DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION iv

DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION vi

Format for CIE-(4,5) Skill Test -Practice

Sl. No. COs Particulars/Dimension Marks

DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION vii

Sl. No. Description

SEE Scheme of Evaluation

Sl. No. COs Particulars/Dimension Marks

DEPARTMENT OF COLLEGIATE & TECHNICAL EDUCATION viii

Week Unit Title Page No.

1 Power Supplies 1-5

2 Wave Shaping Circuits 6 - 13

3 Special Purpose Devices 14 - 17

7 Introduction to Operational Amplifiers 32 - 38

12 Instrumentation Amplifier & PLL 70 - 73

Course Content 1 1. Poor regulation

1.4. Uninterruptible Power Supply 1.4.2. Offline UPS

Figure 1.3. Block diagram of offline UPS

Figure 1.2. Block diagram of online UPS

➢ Upon the return of mains power, the output is switched back

Department of E&CE Page 2 of 79 RAHUL S MAHENDRAKAR

➢ The high voltage DC converted into high frequency AC by Performance Criteria

Experiment No. 1.1: Regulated Power Supply

Aim: To construct and test +5V regulated power supply.

Figure 1.4. Block diagram of SMPS Component Required:

Figure 1.5. +5V Regulated power supply

Department of E&CE Page 3 of 79 RAHUL S MAHENDRAKAR

Theory: Experiment 7.2. SMPS

Figure 1.6. SMPS

Different parts of SMPS are as follows:

Result: Different parts of SMPS are identified and gain knowledge

Sl. No Item description Function Periodically initiate a self-test to determine the

Department of E&CE Page 5 of 79 RAHUL S MAHENDRAKAR

Figure 2.1. RC Integrator

Figure 2.4. Response of integrator circuit to square wave input

Department of E&CE Page 7 of 79 RAHUL S MAHENDRAKAR

Figure 2.7. positive shunt clipper circuit and waveforms

Figure 2.8. Negative shunt clipper circuit and waveforms

2.5. Voltage Multipliers

Figure 2.15. Voltage tripler

2.5.2. Voltage Tripler

Department of E&CE Page 10 of 79 RAHUL S MAHENDRAKAR

Performance Criteria Waveforms:

Waveform Generation and Multipliers

Experiment No. 2.1: Waveform Generation

Aim: To generate the following waveforms from sinusoidal waveforms:

Circuit diagram to generate trapezoidal waveform:

Figure 2.18. Circuit to generate positive halfcycle

Department of E&CE Page 11 of 79 RAHUL S MAHENDRAKAR

Theory: Experiment No. 2.2: Voltage Multipliers

Circuit diagram of Voltage doubler:

Figure 2.20. Voltage Doubler

Input AC voltage Output DC voltage

Department of E&CE Page 12 of 79 RAHUL S MAHENDRAKAR

Circuit diagram of Voltage Tripler:

Figure 2.21. Voltage Tripler

Input AC voltage Output DC voltage

Department of E&CE Page 13 of 79 RAHUL S MAHENDRAKAR