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Lecture 1 P2: Semiconductor

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Subject E1

Table of Content
Books
Pn ,  Pp dereived expression
Low Level Injection
Δp,  Δn derivation
Reverse saturation Current Density Js
Reverse Saturation Current IS
Diode Equation
How to Solve Diode Circuit
Using Circuitry
Using Load Lines
Diffusion Capacitance

Lecture 1 P2: Semiconductor 1

 Books
Pn ,  Pp dereived expression
In the above section, we have learnt that Vj = VT ln( NAnN
2
D
). This is the formular for
i
unbiased and equilibrium condition only

It can also be expressed as

VJ = VT ln ( ppn0
p0
)

VJ = VT ln ( nnn0
p0
)

So now we want to carried out the concentration expression

pp0 = pn0 exp( VTj )

V

⟹         
nn0 = np0 exp( VTj )
V

To avoid confusion with the variables under a voltage bias in the later derivation, we use
pp0 , pn0 , nn0 , np0 to denote the carries under unbias and equilibrum condition

Low Level Injection

Low level Injection is a state where the number of minority carries generate are small
compared to the majority carries of the material

When forward biased, majority carrier concentrations ⇒ unchanged, while minority carrier
concentration ⇒Large increase

Graphical Illustration

Lecture 1 P2: Semiconductor 2

 Mechanism of Low Level Injection

When under a forward bias, p-region is added wtth more holes and n-region is added with
more electrons. These surplus holes and electrons come from supply voltage

The surplus e− in n region and surplus holes in p region significantly weaken electric field
right at the depletion region⇒Depletion region will be more narrow

This weakended electric field E will not be able to overcome the diffusion current.
Eventually, diffusion will take place as a result of concentration gradient

The surplus e− in n-region will be driven across junction and combine with holes in p-
region. Similarly for holes in p-region

The main concentration in p side is holes and n side is electron. After forward bias, they
are added more holes in p region and more electrons in n region ⇒ Minority carries in both
side will be very small compared to the majority carries. We called this Low Level
Injection

As a result of recombination process, the minority carrier concentration gradually decreases

against x

pn (x),  np (x) are given here without any proof

x − xn
pn (x) = Δp exp( ) + pn0
Lp
−x − xp
np (x) = Δn exp( ) + np0
Ln
Graphical Representation

Lecture 1 P2: Semiconductor 3

 Δp,  Δn derivation
When the junction is forward biased, we have

VD
pp = pn0  exp( ) = pn (xn0 )
VT
where VD is the voltage applied to the pn junction

According to the above figure, we have

pn (xn0 ) = Δp + pn0
Then substitute into the above eq, we have

VD
Δp + pn0 = pn0  exp( )
VT
VD
⟹ Δp = pn0 (exp( ) − 1)
VT
Reverse saturation Current Density Js

Lecture 1 P2: Semiconductor 4

 Full Explanation

⎧p (x) = Δp exp( x − xn ) + p
n n0
Lp
⎨

⎩Δp = pn0 (exp(

VD
) − 1)
VT
Thus, we have

VD x − xn
pn (x) = pn0 (exp( ) − 1) exp( ) + pn0
VT Lp
since we have (recall diffusion current eq)

dpn (x)
Jp (x) = −qDp
dx
Thus, we have (just another derivative of above pn (x) )

Dp VD x − xn
Jp (x) = q  pn0 (exp( ) − 1) exp( )
Lp VT Lp
At x = xn

Dp VD
Jp (x) = q  pn0 (exp( ) − 1)
Lp VT
Similarly at x = xp

Dn VD
Jn (x) = q  np0 (exp( ) − 1)
Ln VT
Therefore, total current density is the sum of diffusion current for holes and electrons

VD
J = Jn + Jp = Js (exp( ) − 1)
VT
where Js is

Lecture 1 P2: Semiconductor 5

 Dn Dp
Js = qn2i ( + )
Ln NA Lp ND

Reverse Saturation Current IS

For an abrupt junctions

Dp Dn
Is = Js A = Aqn2i ( + )
Np Lp Nn Ln
Where Ln ,  Lp are respectively the diffusion lenght for electrons and holes and are defined as

Ln = Dn τn

Lp = Dp τp
Where τn ,  τp are the minority carries lifetime

Alternatively, we could have

1 Dp 1 Dn
Is = Js A = Aqn2i ( + )
NA τp ND τn

Remember that A is a cross sectional area and n is called the identity factor

Diode Equation
qVD VD
iD = IS [exp( ) − 1] = IS [exp( ) − 1]
nkT nVT
k is a Boltzman Constant = 1.38 x 10−23   J /K
T is absolute temperature in Kelvin
n is non-ideality factor (dimesionless)
VT = kT /q is thermal voltage ( 25mV at room teperature )

Lecture 1 P2: Semiconductor 6

 How to Solve Diode Circuit
Using Circuitry
Figure

💡 Apply

1. KCL to find all current elements

2. KVL

vi = RiD + vD

iD = iS (evD /nvT − 1)

Using Load Lines

The goal is the find the voltage and current of all elements

Graphical Illustration

Lecture 1 P2: Semiconductor 7

 💡 1. Write all the circuit equation and simplify

2. Assume Diode is 1 state (ON or OFF). Use Diode equation to solve for iD and vD

3. Check inequality associated with that state. If iD and vD statisfy the inequality ⇒
State correct. If not, turn back to step 2 and continue with the other state

Note that

This way only work if we know all value of elements so we can work out the value for iD
and vD

Diffusion Capacitance
We have the charge eq is

VD
Q = Aqpn0 (exp( ) − 1)
VT
Then the Diffusion Capacitance is

dQ Aqpn0 VD
C= =  exp( )
dV VT VT

Lecture 1 P2: Semiconductor 8

 Recall that pn0 = n2i /NA (for unbiases and equilibrium condition)

Aqn2i VD Aqn2i qVD

⟹ C=  exp( ) =  exp( )
VT NA VT VT NA kT
⟹ The largeer the voltage applied, the large the capacitance

Lecture 1 P2: Semiconductor 9