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Fault Location in Extra Long HVDC Transmission Lin
Fault Location in Extra Long HVDC Transmission Lin
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Fault Location in Extra Long HVdc Transmission Lines using Continuous Wavelet
Transform
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3 authors, including:
A.D. Rajapakse
University of Manitoba
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Abstract-- In this paper, fault location accuracies in a 2400 km well for analyzing transient in signals because of its
long overhead HVdc line and 300km long underground cable simultaneous time and frequency localization capabilities.
HVdc line using the two-terminal travelling wave method are Availability of software tools and lower computational burden
investigated. The paper proposes to use continuous wavelet
transform for detecting the arrival time of travelling waves, and have made discrete version of the wavelet transform, DWT, is
shows that it provides better accuracy when compared with the the common choice for implementation of these improved
commonly used discrete wavelet transform based technique. fault location algorithms.
Furthermore, the results show that the continuous wavelet Compared to the DWT, the continuous-wavelet transform
transform based wave front detection can provide adequate (CWT) provides more detailed and continuous analysis of a
accuracy in the fault location in extra long overhead lines and fault transient [9]. In CWT, the analyzing wavelet is shifted
long underground cables. The influence of noise on the fault
location accuracy is discussed. The results also show that either smoothly along the time axis of the input signal. Therefore,
dc terminal voltages or the surge capacitor currents can be used CWT coefficients have better time resolution which is very
in dc line fault location. important to have high accuracy in travelling wave based dc
line fault location. Hence, as shown in this paper, the CWT
Keywords: HVdc, continuous wavelet transform, dc line fault approach allows obtaining fault location accuracy better than
location, transmission lines, cables, travelling waves that obtained with the DWT coefficients.
All studies were carried out with detailed models of HVdc
I. INTRODUCTION converters and transmission lines simulated in
0.5 (e) CWT S-32 A threshold to identify the surge arrival point is set about
DWT L-5
0 15% above the maximum value of the wavelet coefficient of
2.402 2.4021 2.4023
Time(s)
the corresponding input signal under the normal conditions.
Fig. 3 - Rectifier end terminal voltage DWT and CWT coefficient
The safety margins are required to allow for the noise.
magnitude values when a line to ground fault occurred (625 km away from the Different threshold values are found for each coefficient scale
rectifier end applied at 2.4s) considered in the algorithm.
The time when the magnitude of the considered coefficient
IV. DC LINE FAULT LOCATION METHOD rises above the threshold is recognized as the time of arrival of
The proposed simplified fault location algorithm which is a surge at the terminal. From the measurements at the other
an offline calculation is illustrated in Fig. 4. This calculation end of the transmission line, the time of arrival of the surge in
that terminal is received via telecommunication channel. Fault
can be initiated once the primary protection scheme identifies
location is calculated by using the travelling wave principle
the dc line fault. The fault location scheme maintains a
according to (2).
runtime input data buffer, which will be saved when a fault is
As different coefficient scales or levels represent different
detected. The size of this buffer depends on factors such as the frequency bands in the signal, the velocity of propagation at
primary protection time delay, sampling time and the each of these frequency bands could slightly differ. These
transmission line length of the specific HVdc scheme. velocities can be found and the algorithm can be calibrated by
The largest time delay in the system is used to estimate the using test data for a known fault.
buffer size. For example, consider that the primary protection The algorithm attempts to find an arrival of surge in the
scheme has 1 ms time delay and the data acquisition rate is current data buffer, and if it did not find an edge, then the
2MHz for a HVdc scheme with a transmission line length of buffer window is shifted and the procedure is repeated.
2400km. The worst case travel time of the surge is Note that if the signal processing can be done in real time,
approximately equal to 8ms (assuming 3*105 km/s the occurrence of a fault can be detected by continuously
propagation velocity) when the fault is closer to one end of the observing the wavelet coefficients, without depending on an
line. In this case, the primary protection time delay (1ms) is external initiation signal. With fast digital signal processors
smaller than the worst case travelling wave time delay. (DSPs), this is also a practically viable approach.
Therefore the buffer size is determined by the travel time and
the required value is 16000 samples at 2 MHz. With a safety V. SIMULATION MODELS
margin the buffer size can be taken as double of this value Simulations were done using two HVdc transmission
(32000 samples). Data acquisition boards with sufficient on networks, one with OH transmission line and the other with
board memory meet such requirements are commercially UG cable line. All the test networks are based on the modified
available. version of the first Cigré benchmark HVdc scheme [13]. This
In this research, both terminal voltage and surge capacitor test network has 500kV as the nominal dc voltage and it is
current measurements were tested as potential input signals. designed to deliver 1000MW of active power. Furthermore, a
Sampling is assumed synchronized and time tagged using GPS bipolar HVDC configuration is used since most of the present
clock signals. Wavelet transform either DWT or CWT is day HVDC systems are built in bipolar configuration, instead
applied to the input signal and the magnitude values of the of the mono-polar arrangement in the original reference [13].
wavelet coefficients are extracted. The simplified PI model representing a cable dc line
scheme in the original Cigré model [13] was replaced with a
frequency dependent distributed parameter model of a 2400km
long overhead transmission line in one of the test network and
in the other test network, it was replaced with a frequency presented for the two different test networks, HVdc system
dependent distributed parameter model of a 300 km long with 2400 km long OH dc line and HVdc system with 300 km
underground cable line. Schematic diagram of the test long UG cable dc line. The tests were investigated the
networks are shown in Fig. 5. potential usage terminal voltage measurements and surge
capacitor current measurements as the input signals to the
algorithm. The results also compare the DWT based method
and the CWT based method.
The results are presented using the absolute prediction error
value obtained for different fault locations on the dc line. This
value shows the magnitude difference between the predicted
fault location and the actual fault location in kilometers.
Fig. 5 - HVdc test networks modeled in PSCAD/EMTDC
A. HVdc test network with 2400 km long OH dc line
The original test network does not contain a surge Fig. 7 shows the variations of the prediction error with the
capacitor. Surge capacitor is used to protect converter station
tested fault locations using CWT of the terminal voltage
equipment from surges travelling alone the dc line. When a
measurements to identify the travelling wave arrival time. The
steep wave-front of surge travelling along the dc transmission
results are within ±350m prediction error using the scales up
line is first slowed down by the line surge impedance and then
by the surge capacitor. Since the use of surge capacitor current to 32. In general the lower scales give better accuracy.
to detect surge arrival as in the existing fault locator installed Fig. 8 shows the prediction errors when the surge capacitor
at the Nelson River HVDC scheme [14] to be investigated, a currents are used as the input signals. Overall accuracy is
20 nF surge capacitor is added to the test networks. similar to the accuracy obtained with the terminal voltages as
A series dc reactor is important in line commutated type inputs. The results are within ±400m prediction error using the
HVdc system [15]. However, original test network does not scales up to 32. In general the lower scales give better
contain a separate smoothing reactor because it is included in accuracy. These results indicate that surge capacitor current
the simplified cable model. Typical value of the smoothing and terminal voltage measurements can be used as inputs in
reactor is in the range of 0.5-1H [15]. Therefore, 0.5H the dc line fault location algorithm.
smoothing reactor is placed in series with the transmission line Fig. 9 and Fig. 10 summarize the prediction error values
at both ends. obtained with DWT based method. In Fig. 9 the terminal
Tower structure for the OH dc line and Cable parameters voltages are used as the inputs for the fault location algorithm.
for the UG dc line are shown in Fig. 6. All the distance According to the tested cases the prediction error is ±2.5km
measurements are shown in meters. The test networks are when detail coefficients up to level 5 are used. However less
modeled in PSCAD/EMTDC. The terminal voltage and surge prediction error is visible in the lower levels.
capacitor current measurements are monitored for large
0.35
number of simulation cases with different dc line fault S:4
S:8
0.3
locations. The input signals were conditioned assuming 2 S:16
Absolute prediction error (km)
S:32
MHz sampling rate, 16-bit Analog to Digital (A/D) conversion 0.25
resolution, and 0-20 V range before use in the dc line fault 0.2
location algorithm to understand the performance under 0.15
presence of an A/D converter. These A/D parameters are
0.1
selected after careful testing and considering the availability of
commercial A/D converters. 0.05
0
1 10 100 157 251 333 400 850 1111 1200 1323 1400 2040 2100 2240
Actual fault location (km)
Fig. 7 - Fault location error based on CWT and using terminal voltage as
input
5.79
4.27
0.4
S:4
28.35
0.35 S:8
S:16
Absolute prediction error (km)
0.3 S:32
0.25
0.2
1
0.15
0.1
0.05
Fig. 6 - HVdc dc line parameters (Left: OH line tower structure and Right: 0
1 10 100 157 251 333 400 850 1111 1200 1323 1400 2040 2100 2240
UG cable parameters) Actual fault location (km)
Fig. 8 - Fault location error based on CWT and using surge capacitor
VI. SIMULATION RESULTS current as input
Fig. 9 - Fault location error based on DWT and using terminal voltages as
inputs 0.1
detail levels. It can be seen from the results for the test Fig. 12 - Fault location error based on CWT and using surge capacitor
network with 2400 km of OH line that CWT based method current as input
provides better overall accuracy than the DWT based method. 1.8
L:2
2.5 1.6 L:3
L:2 L:4
2 1.2
L:5
1
1.5
0.8
0.6
1
0.4
0.2
0.5
0
1 5 10 100 150 175 200 201 247 250 290 299
Actual fault location (km)
0
1 10 100 157 251 333 400 850 1111 1200 1323 1400 2040 2100 2240
Actual fault location (km)
Fig. 10 - Fault location error based on DWT and using surge capacitor Fig. 13 - Fault location error based on DWT and using terminal voltages
currents as inputs as inputs
L:5
2.5
HVdc system. Fig. 11 and Fig. 12 show the prediction errors
2
obtained with CWT method. In Fig. 11 terminal voltages are
used as inputs. The prediction accuracy is ±200m for the test 1.5
0.2 0.5
S:4
S:8
S:16 0
1 5 10 100 150 175 200 201 247 250 290 299
Absolute prediction error (km)
Fig. 14 - Fault location error based on DWT and using surge capacitor
currents as inputs
0.1
Rec.Sur.cap.cur (kA)
10.005 10.05
Fig. 15 - Surge capacitor current and terminal voltage with added noise Fig. 18 - Comparison of prediction errors using different CWT scales for
terminal voltage with 0.005pu of noise
Fig. 15 (c) and (d) compare the rectifier end surge capacitor
current with 0.001 kA and 0.01 kA noise respectively with the As can be seen in Fig. 18, it was found that lower scales are
clean signal. In the following sections results obtained with more sensitive to noise than the higher scales. Therefore when
CWT based method are presented for the two test networks. the noise is present in the input signals, use of higher scales
(Scales 16 and 32) CWT coefficients may be desirable to
1) HVdc test network with 2400 km long OH dc line achieve robust results.
1.4
2) HVdc test network with 300 km long UG cable dc line
Nonoise
0.001pu noise
1.2
0.005pu noise 0.35
Absolute prediction error (km)
Nonoise
1
0.3 0.001pu noise
0.6
0.2
0.4
0.15
0.2
0.1
0
1 10 100 157 251 333 400 850 1111 1200 1323 1400 2040 2100 2240 0.05
Actual fault location (km)
1 presented in Fig. 19 and Fig. 20. It was found that cable based
0.8 test network is more sensitive to noise and therefore higher
0.6
scales (Scale 16) is used to present the results. Fig. 19
compares the prediction errors using terminal voltage
0.4
measurements contaminated with 0.001pu noise and no noise.
0.2
Fig. 20 compares the prediction errors using surge capacitor
0
1 10 100 157 251 333 400 850 1111 1200 1323 1400 2040 2100 2240
measurements contaminated with 0.001kA noise and no noise.
Actual fault location (km)
It is clearly visible that the performance of the fault
Fig. 17 - Prediction errors for different noise levels in the surge capacitor
location algorithm is sensitive to the noise in the input signal.
current measurements (Using CWT Scale 4)
As can be seen in Fig. 21, it was found that lower scales are
Fig. 16 compares the prediction error results obtained with more sensitive to noise than the higher scales. Therefore when
terminal voltage measurements contaminated with 0.005 pu the noise is present in the input signals, use of higher scales
noise, 0.001pu noise and normal no noise condition. Fig. 17 (Scales 16 and 32) CWT coefficients may be desirable to
compares the prediction error results obtained with surge achieve robust results.
capacitor current measurements contaminated with 0.005 kA
noise, 0.001kA noise and normal no noise condition.
In both of these cases only CWT scale 4 coefficients are
used which is usually given the lowest errors. According to the
result with increasing noise level the performance of the fault
location is reduced.
0.7 that the UG cable test network is more sensitive to noise than
Nonoise the OH line test network. However when the noise is present
0.6 0.001kA noise
Absolute prediction error (km) in the input signals, use of higher scales (Scales 16 and 32)
0.5
CWT coefficients may be desirable to achieve robust results in
0.4
both test networks.
0.3