Microprocessor & Interfacing

EE 405
Second Sessional Test

Time Allowed: 90 minutes Marks : 30 minutes

1. Design an interfacing circuit using a 3 to 8 decoder , the latch for output device to be mapped at
address C5H and tristate buffer to be mapped at address C7H.The design should be optimum, which
is that minimum hardware components to be used. (6)

2. How does a microprocessor differentiate whether it is reading from a memory mapped input port
or from memory? (3)

3. WAP to count from 0 to F continuously with a 2 second delay between each count . Use register
pair DE to set up the delay and display each count at output port 02H. Assume clock frequency to be
1 MHz. (7)

4 .What is the maximum time delay possible using a register pair in 8085 if the clock frequency is
given to be 2 MHz? (4)

5. Explain data transfer during the execution of CALL instruction giving suitable example (5)

6. Explain qualitatively the interrupts in 8085 (5)