A Novel Dual Boost/Dual Buck AC/AC Converter
Chen Jiawei, Chen Jie, Gong Chunying
Department of Electrical Engineering, Nanjing University of Aeronautics & Astronautics, Nanjing, 210016, China
Abstract-A novel dual Boost/dual Buck AC-AC converter which
is very suitable for the variable-frequency power system of
airplane (360Hz-800Hz) is proposed in this paper. It is constructed
by directly connection of a dual Boost rectifier and a dual Buck
inverter which inherit the merits of high reliability and efficiency
of them for no hidden danger of shoot-through and no
freewheeling current flows through the body diodes of power
switches. The operational principle and control method are briefly
talked about first; then the method of designing inductors is
deduced, also the principle of choosing DC bus voltage and
capacitors are proposed. At last, a 1KW laboratory prototype is
designed. Both experimental and simulation results verified the
validity of the presented circuit.
I. INTRODUCTION
In modern aircraft, traditional VSCF (vary speed constant
frequency) power system and CSCF (constant speed constant
frequency) power system are gradually being replaced by
variable-frequency power system [1] due to its advantages of
simple structure, high efficiency, light weight, small size, low
cost, high reliability and good maintainability etc. What’s more,
this kind of power system needs only one energy evolution, that
is, mechanical energy of the engine will be transformed into
electrical energy by the generator, which gets rid of the trouble
of two energy transformation.
In recent years, the world's largest aviation countries, the
United States and European countries as representatives, have
strengthened the research of variable-frequency power supply
systems. On large civil aircraft, the higher proportion of
electrical devices which can work with variable-frequency AC
power, the more superior of variable-frequency power system.
Take A380 from Airbus and B787 from Boeing for example,
they all use variable-frequency power system [2]. Also, it
becomes a preferred option of China's future large aircraft.
Along with the development of More-Electric Aircraft (MEA)
technology, electrical equipments and direct motor drive
devices which all need DC source or constant-frequency AC
source are applied massively on airplane. So, there is a great
need to seek a high efficient and reliable power electronic
converter to covert variable-frequency AC source to DC or
constant-frequency AC source.
Now, half-bridge [3-5] and full-bridge [6-9] circuits are the most
widely used topologies on PWM rectifier/inverter. But these
topologies have two problems: a), the two power switches of
these topologies are connected in series in one leg, causing an
inherent possibility of shoot-through. The shoot-through
problem caused by a misgating-on of an electromagnetic
嘋,((( 1775
interference (EMI) noise is a major killer to the reliability of the
system; b), the reverse recovery dissipation is very high for that
the free-wheeling current flows through the body diodes of
power switches which limit the efficiency of the system.
Considering these, a novel PWM rectification/inversion
topology is proposed in this paper. It is constructed by directly
connection of a dual Boost rectifier (front end)[10] and a dual
Buck inverter(back end) [11]which inherit the merits of high
reliability and efficiency of them for no hidden danger of
shoot-through and no freewheeling current flows through the
body diodes of power switches. Because the front end and back
end of the circuit have common ground and share the same DC
bus, the structure is simple. This circuit is very suitable for the
power system of airplane.
II. OPERATIONAL PRINCIPLE AND CONTROL METHOD
Fig.1 depicts the proposed dual Boost/dual Buck AC-AC
converter, which mainly consists of a dual Boost PWM rectifier
and a dual Buck PWM inverter. The operational principle can
be introduced respectively.
Fig.1 Dual Boost/dual Buck AC-AC converter
A. Dual Boost rectifier
The first step-up bridge of this part is constructed by vin, S2,
D2, L2, C1, C2, and the second step-up bridge is constructed by vin,
S1, D1, L1, C1, C2. According to the switching states of the two
power switches S1 and S2, there are four valid switching states in
this part, as shown in Fig.2. According to the phase between the
input voltage and input current, the circuit can operate under two
operation modes. When the input current is in phase with the
input voltage, the circuit operates under rectification mode. On
the contrary, the circuit will operate under inversion mode while
the phase angle between the input current and input voltage
equals 180 degree. The two phase legs will operate in turn
according to the cycle state of input current, that is: during the
positive cycle of input current (iin>0), the circuit operates in
,3(0&
mode1 and mode 2. During the negative cycle of input current has natural peak current limiting capability, and it is beneficial
(iin<0), the circuit operates in mode3 and mode 4. To further to the power system in aviation and other high-reliabe occasions for
facilitate the analysis of operational principle, we can refer to specific requirements of short-circuit running ability are put forward to
reference [10]. the inverters. Fig.4 gives the control block diagram of the
+
proposed circuit.
S1 D2 C1 VC1 S1 D2 C1 VC1
i in
L1 L2 L1 L2
-
VDC
Vref ve iref
iL1 iin iL 2 iL1 iin iL 2

D1
vin S
2 C2 VC 2 D1
vin S
2 C2
+
VC 2 vin
-
VC1
a.mode1 b.mode2 VC 2
S1 D2 C1 VC1 S1 D2 C1 VC1
a. Control block diagram of the rectifier part
L1 L2 L1 L2

iL1 iin iL 2 iL1 iin iL 2

uo io
vin S vin S
D1 2 C2 VC 2 D1 2 C2 VC 2
u ref i ref
c.mode2 d.mode4 b. Control block diagram of the inverter part
Fig.2 Operational modes of dual Boost rectifier part
Fig.4 Control block diagram of the system
B. Dual Buck inverter According to Fig.4 (a), a proportional-integral (PI) voltage
The first step-down bridge of this part is constructed by uo, S3, controller is adopted in the outer control loop to maintain the dc
D3, L3, C1, C2, and the second step-down bridge is constructed bus voltage constant. The phase lock loop (PLL) generates an
by uo, S4, D4, L4, C1, C2. As the operational principle is similar to ideal sinusoidal waveform in phase with the input voltage. In
the dual boost rectifier, for simplicity, we don’t talk about it here, order to balance the voltage across the dc bus split capacitors C1
the detailed analysis is shown in reference [11]. Also, there are and C 2 , an additional loop is employed. The imbalance value
four operational modes, as shown in Fig.3. between the two capacitors is sensed and then added to the input
current command through a proportional controller. The current
+
C1 VC1 S3 D4 C1 VC
1 S3 D4 reference and the input current sampled signal are sent to the
-
L3 L4 L3 L4
hysteresis controller at the same time to produce PWM signals.
Power switches’ driven signals can be gained after a logic circuit.
iL 3 i iL 4 iL 3 i iL 4
0 Fig.4 (b) shows the control method of the inverter part, a
0

C2 VC 2 D
3
uo S 4
C 2 V
+
C 2 D 3
uo S 4 proportional-integral (PI) voltage controller is adopted in the
-
outer control loop to draw a sinusoidal output voltage. The
a.mode1 b.mode2 current reference is the output of the voltage controller. Then the
current reference and output current sampled signal are sent to a
C1 VC1 S3 D 4 C1 VC1 S3 D 4 hysteresis controller. Power switches’ driven signals can be
L L
gained after a logic circuit.
3 L4 3 L4
iL 3 i0
iL 4 iL 3 i0
iL 4 III. SOLUTION OF KEY TECHNOLOGIES
C2 VC 2 D uo S4 C2 VC 2 D uo S4
3 3 A. Method of designing inductors
The HCC control can realize the current of inductors track
c.mode2 d.mode4 current reference iref and limit it in the set current band width
Fig.3 Operational modes of dual Buck inverter part
(2h), as shown in Fig.5. However, due to the introduction of
C. Control method HCC control, the switching frequency is not fixed. This deduces
The control of the proposed circuit is to achieve the purpose the difficulty of designing filters. In addition, in application of
of variable frequency (360Hz-800Hz) ac power input, constant aviation, the power of inverter is supplied to a number of loads.
frequency (400Hz) ac power output. Considering that the To enhance the running reliability, specific requirement of
operational principle of both the two parts is similar, so the same short-circuit running ability is put forward to the inverter. When
control method, the well-known fixed-band hysteresis current one of the devices is breakdown because of short-circuit, it
control (HCC) technique, is brought in for both the two parts. requires the inverter to provide a several times rated current and
The use of HCC technique can realize no loop current in the last a few seconds to cut off the fuse of this device in order to
circuit [10] [12], extremely fast response and the input current track separate this device from the grid. When designing filters, the
reference automatically [13]. What’s more, the HCC control also above two aspects should be concerned.

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 The same control method has been brought into the rectifier (8).
part and the inverter part, so does the design method of the
B. Principle of DC bus voltage determination
inductors in these two parts. Here we just take L2 as an example
According to the topology and operational principle of the
for simplicity.
circuit, to the rectifier part, in order to realize the input current in
phase with the input voltage, the output voltage (voltage of each
split capacitors) must be greater than the peak of the input
voltage [10]. And to the inverter part, the input voltage must be
greater than the peak of output voltage to realize the output
voltage sinusoidal [12]. In this aspect, we require the DC bus
voltage as high as possible. But taking efficiency into
consideration, to the Boost converter, when the output power
Fig.5 Theory of HCC control
and input voltage are constant, the higher the output voltage, the
When ignore the parasitic resistance of the windings of
lower efficiency of the converter; And to Buck converter, when
inductors and consider the voltage of two DC bus capacitors is
output voltage and output power are constant, the higher the
the same, VC1=VC2=Vdc/2. Combine the operational modes in
input voltage, and the lower efficiency of the converter. So, this
Fig.2 (a) & (b), we can know that:
time we hope the DC bus voltage as low as possible. According
diL2 VL2
(1) to the two considerations above, the principle of DC bus voltage
dt L2 selection is as follows: 2.1-2.2 times of the peak of input voltage
When S2 turns on, the voltage across L2 is (vin+ Vdc/2), the (or output voltage) and when input and output voltage is
current of L2 rises up, and the rising quantity is decided by: different, we choose a higher value.
Vdc
'I vin  2 C. Selection of DC bus capacitors
(2) The value of capacitors is determined by the voltage ripple
't L2
that allowed. So we should analyze the factors which affect the
Considering that I=2h, so we have:
ripple voltage of capacitors and their relationship first. Fig.6
2h ˜ L2 shows the simulation waveforms of ib+, idc+ (current before and
't1
V (3)
vin  dc after the DC bus capacitors, marked in Fig.1). After detailed
2 analysis of the working principle, we can easily know that the
In the same way, when S2 turns off, the voltage across L2 is (vin-
two split capacitors are charged and discharged alternatively in
Vdc/2); the current of L2 falls down:
accordance with the positive and negative half-cycle of both
2h ˜ L2
't2  input current of the rectifier and output current of the inverter.
V (4)
vin  dc Here we just take the upper capacitor to analyze for the same
2
working modes of the two capacitors.
According to Fig.5:
Ts 't1  't2 (5)
Ts is the instantaneous switching period, it can be written as:
2hL2Vdc
Ts
V (6)
( dc ) 2  vin2
2
Where vin=Esmsin(t), Esm is the peak of input voltage. So we
can gain the equation of instantaneous switching frequency:
Vdc 1
fs (1  2O 2 )  2
Esm cos(2Zt ) f s  fs (7)
8hL2 4hL2
Where f s is the average switching frequency and fs is the
t[1.25ms / div]
magnitude of a frequency fluctuation.
Fig.6 waveform of ib+ and idc+
What’s more, when the input voltage is zero-cross over, we have
the maximum switching frequency: The voltage ripple of the capacitor C1 (uC1 ) is :
1 1
f s max
Vdc
(8)
'uC1
C1 ³ iC1dt
C1 ³
(ib  idc )dt (9)
8hL2
Equation (7) expresses that the switching frequency is alterable, From above equation, we can easily find that uC1 is impacted
the range of variation is determined by fs . However, to the by ib+, idc+ , including their amplitude, phase, and frequency.
Without taking power dissipation into account, we have the
back end inverter, the switching frequency continue to reach the
equation:
maximum when short-circuit for the output voltage is zero. So _
we can choose inductors in accordance with the equation (7) and 2 ˜ VC1 ib Pin (10)

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 When Pin remains constant, the higher the DC bus voltage, the
lower ib+. Because ib+ has the same envelope of the input current,
when the input power and input voltage remains constant, the
input current remains unchanged, that is to say, the envelope of
ib+ don’t change. The change of average value of ib+ is through
changing the duty cycle: the lower the input voltage, the higher
the average value of ib+ and the longer the power switches turn
on. In the same way, idc+ has similar relations. So if we choose
the DC bus voltage under the guidance of the principle given
above, the waveforms of ib+ and idc+ are close to half-sine waves.
Furthermore, because the frequency of input current changes
between 360Hz and 700Hz, and the frequency of output current
remains 400Hz, the phase between input and output current
varies from time to time, so do ib+ and idc+ for they keep pace
with input and output current respectively. Easily, we know that,
with respect to other regions, the voltage ripple of capacitor
reaches maximum when ib+ and idc+ do not overlap. In addition,
considering that when the frequency of input current is of low
level, with respect to high frequency input, the charging time is
longer, and the value of the voltage ripple is greater.
input voltage and Ism is the peak of input current. After
integration with respect to time, equation (12) becomes:
P0
C1 (13)
Vdc f in ,min 'uCmax
We can choose capacitor according to Equation (13).
IV. EXPERIMENTAL VERIFICATION
In order to verify the validity of the proposed circuit, a 1kW,
360Hz-800Hz/400Hz laboratory prototype has been built. The
experimental parameters are as follows: DC bus voltage:
Vdc=340V; Four inductors: L1=L2=L3=L4=800H; Two split
capacitors: C1=C2=1200F/250V; Four power switches:
IRFP460; Four diodes: DSEI30-06A; Output voltage
u0=115V/400Hz; Input voltage: vin=115V/360Hz-800Hz; A
digital signal processor (DSP) TMS320F2812 is used as the
controller.
Fig.8 shows the waveform of input (output) voltage and
current with resistive full load during the input frequency is
changing. Fig.9 shows the measured efficiency, input PF, THD
of input current and output voltage of the proposed circuit.
Through the combination of Fig.8 (a), Fig.9 (b) &(c) we know
that the THD of input current is 3% and the input PF is greater
than 0.99 when the circuit is of full load. From Fig.8 (b), Fig.9 (d)
we have the conclusion that the output voltage is nearly
sine-wave for its THD is only 0.6% when full load. Fig.9 (a)
shows the relationship between measured efficiency and output
power, the full load efficiency is no less than 94%, the system
possesses the advantage of high efficiency.
i[5A/ div] v[100V / div] U GS [10V / div]

Fig.7 waveform of ib+ and idc+ after approximation

Considering the above three aspects, in order to ensure the

circuit can work in the entire frequency range, we make the
following approximation:
a. The waveforms of ib+ and idc+ are half-sine waves. That is to
say, the energy is all charged into the capacitor C1 when the
input current is in positive cycle. And this energy is all
t[1ms / div]
discharged to the load during the positive cycle of the output
a. waveform of input voltage and current
current.
b. Relative position (phase deference) of ib+ and idc+ is that there
VDS [400V / div] u[100V / div] i[20 A / div]

is just no overlap region.

c. The frequency of input current reaches minimum.
After approximation Fig.6 changes to Fig.7. The input energy
is all charged to capacitor C1 during the positive cycle of the
input current. So we have the energy equation:
1
1 1
³0 vin ˜ iin dt 2 C1U C1max  2 C1U C1min
2 2
2 fin ,min
(11)
Where fin,min is the minimum input frequency. Equation (11) can
be written as:
1
1 t[1ms / div]
Esm I sm ³ 2 fin ,min (sin Zt ) 2 dt C1Vdc 'uCmax (12) b. waveform of output voltage and current
0 2 Fig.8 waveform of input (output) voltage and
uCmax is the maximum voltage ripple of C1. Esm is the peak of current with resistive full load

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 1
98% through regulating the phase of current reference in the DSP
0.99
94% program. From Fig.11 we know that the voltage ripple of
0.98
90%
0.97
capacitor reaches maximum when ib+ and idc+ do not overlap,
86% 0.96 this is consistent with the theoretical analysis.
82% 0.95
0.94 V. CONCLUSION
0 200 400 600 800 1000 1200 0 200 400 600 800 1000 1200
P0 / W P0 / W The dual Boost/dual Buck AC-AC converter proposed in this
a. measured efficiency b. measured input PF paper is mainly constructed by directly connection of a dual
25% 1.6%
Boost rectifier and a dual Buck inverter which inherit the merits
20% 1.2%
of high reliability and efficiency of them for no hidden danger of
15%
7+'

7+'
10%
0.8% shoot-through and no freewheeling current flows through the
0.4% body diodes of power switches. What’s more, the rectifier part
5%
0.0%
and the inverter part have common ground and share the same
0%
0 200 400 600 800 1000 1200 0 200 400 600 800 1000 1200 DC bus, the structure is simple. So this circuit is very suitable for
3: 3:
c. THD of input current d. THD of output voltage variable frequency power system of airplane. In other
Fig.9 Measured efficiency, input PF, THD of input high-reliable occasions, such as: Unified Power Flow Controller
current and output voltage of the proposed circuit (UPFC), Static VAR Compensator (SVC), Super-conducting
Magnetic Energy Storage (SMES), Four Quadrant AC
Motor-driven, Solar, Wind and other Renewable Energy
i[5A/ div]

Generation System, Active Power Filter (APF), Large-capacity

UPS and so on, it is also widely used. This paper firstly talks
about the operational principle and control method briefly, and
t[1.25ms / div]
then discusses a few key technologies. Finally, the validity of
+
the presented circuit is verified by experiment.
a. waveform of ib when DC bus voltage is 340V
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i[5A/ div]

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