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2146 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO.

6, NOVEMBER 2007

Z-Source AC–AC Converters Solving


Commutation Problem
Yu Tang, Shaojun Xie, Member, IEEE, and Chaohua Zhang

Abstract—A new family of Z-source ac–ac converters with Single-phase Z-source ac–ac converters proposed in [8] have
buck-boost ability are proposed, including four switches the following features: providing a larger range of output voltage
single-phase structure and six switches three-phase structure. with buck-boost, continuous output or input current, reversing
New commutation strategies for these converters are proposed
and safe commutation can be achieved without snubber circuit.
or maintaining phase angle, reducing in-rush and harmonic cur-
The commutation strategies are easily to realize by sampling rent. But they have drawbacks such as: 1) input and output is not
only voltage signals, and two switches are always turned on, so sharing the same ground, so the feature that output can reversing
switching loss can be reduced. Analysis based on state-space aver- or maintaining phase angle with input is not supported well; 2)
aging reveals the relationship between Z-source inductor current an external snubber circuit is needed for each switch to sup-
and filter inductor current as well as voltage ratio. The design press voltage surges and provide commutation paths; 3) when
considerations of voltage-fed single-phase topology are given as
an example. Simulation results on the voltage-fed topologies and
each bidirectional switch is on, current flows from two diodes
experimental results on voltage-fed single-phase topology verified and one power switch, which results in high conduction loss;
the unique features of Z-source ac–ac converters and the proposed and 4) high conduction loss and the loss in snubber circuit re-
commutation strategies. These converters have merits such as sults in a low efficiency. Three-phase Z-source ac–ac converter
less conduction and switching loss, less devices, therefore high proposed in [9] can also provide output voltage with buck-boost,
efficiency and reliability can be achieved. but such drawbacks exist: 1) six bidirectional switches are used,
Index Terms—AC–AC converter, commutation, PWM control, which results in complex topology and high cost; 2) an external
solid-state transformer, Z-source. snubber circuit is needed for each switch to suppress voltage
surges and provide commutation paths; and 3) high conduction
loss caused by bidirectional switches and the loss in snubber cir-
I. INTRODUCTION
cuit results in a low efficiency.
OR ac–ac power conversion, the most popular topolo-
F gies are indirect ac–ac converter with dc link [2], matrix
converter [3], [4], and direct pulsewidth modulation (PWM)
To solve these problems, a new family of single-phase
four switches structure and three-phase six switches struc-
ture Z-source ac–ac converter topologies are proposed in this
ac–ac converter [5], [6]. An indirect ac–ac converter presents paper. Proper commutation strategies for these converters are
a two-stage conversion, low efficiency, and the diode-rectifier investigated. Analysis and simulation results are given on
link causes power-line pollution; matrix converter, which has the voltage-fed topologies. Experimental results are given on
limitation of voltage ratio be low than 0.866, is complex in voltage-fed single-phase topology.
structure and commutation strategy. An indirect ac–ac con-
verter and matrix converter can provide output voltage with II. PROPOSED Z-SOURCE AC–AC CONVERTER TOPOLOGIES
variable frequency. However, for applications where only Fig. 1 shows the proposed single-phase four switches con-
voltage regulation is need, the direct PWM ac–ac converter has verters. and constitute four-quadrant switch while
merits such as single-stage conversion, simple topology, easily and constitute . are body diodes of , re-
to control, high efficiency, low harmonic current in line, smaller spectively. The symmetrical Z-source network combined with
size, and low cost. two inductors and two capacitors is the energy storage and fil-
A family of simple topologies of PWM ac–ac converters are tering element. Note that swamping C1 and L1, C2. and L2’s
proposed in [7], but each topology has its drawbacks: the output positions, respectively, will result in an identical circuit with the
voltage is lower than input for buck topology and vice versa same mathematical equations.
for boost topology; the buck-boost and Cuk topology, which Fig. 2 shows the proposed voltage-fed and current-fed three-
can provide output voltage be lower or higher than input, has phase six switches Z-source ac–ac converters. are body
disadvantages of polarity be inverse, and discontinuous input diodes of , respectively. The symmetrical Z-Source
and output current for the former one. network combined with three inductors and three capacitors is
the energy storage and filtering element. The per-phase circuit
for three-phase converters is equivalent to the single-phase con-
Manuscript received December 4, 2006; revised March 13, 2007. This paper verters. The operational principle is similar to that of single-
was presented in part at the PESC’07, Orlando, FL, June 17–21, 2007. Recom-
mended for publication by Associate Editor F. Z. Peng.
phase converters.
The authors are with the College of Automation Engineering, Nanjing
University of Aeronautics and Astronautics Nanjing, 210016, China (e-mail: III. COMMUTATION STRATEGY OF PROPOSED
ty8025@hotmail.com; eeac@nuaa.edu.cn; zhangchaohua007@163.com). Z-SOURCE AC–AC CONVERTERS
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. AC–AC converters have commutation problem. To under-
Digital Object Identifier 10.1109/TPEL.2007.909235 stand this problem, take the circuit shown in Fig. 1(a) as an
0885-8993/$25.00 © 2007 IEEE

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TANG et al.: Z-SOURCE AC–AC CONVERTERS 2147

Fig. 1. Single-phase four switches Z-source ac–ac converters. (a) Voltage-fed with input and output sharing the ground. (b) Voltage-fed with input and output not
sharing the ground. (c) Current-fed with input and output sharing the ground. (d) current-fed with input and output not sharing the ground.

example. Suppose that is turned on and conducts current. voltage-fed. We can define . If , and
After a time, current needs to be commutated to . The are fully turned on, and are modulated in complement
switching of to must be instantaneous and simultaneous. with dead time. If , and are fully turned on,
For practical reason, the finite switching times and delays in the and are modulated in complement with dead time. For the
drive circuits and switches have to be taken into account. So, if topology shown in Fig. 1(d), the commutation strategy is the
the switch is turned on before is turned off, a short-circuit same as the topology shown in Fig. 1(c).
path is established through . Current If , the circuit shown in Fig. 1(a) has three commutation
spikes will destroy the devices. Similarly, if is turned off modes, as shown in Fig. 3. When is turned on, current flows
before is turned on, there will be a junction that connects in- from and according to the current direction, as
ductor , and . Voltage spikes will destroy the switches. shown in Fig. 3(a). Then is turned off and has not been
The three-phase topologies also have commutation problem turned on, there are two options: if , cur-
by similar analysis. Earlier method is adding lossy snubber rent flows from and , as shown in Fig. 3(b), then can
circuit for each switch to suppress voltage surges and provide achieve ZVS (zero voltage switching) naturally; if
commutation paths in dead time which results in inefficient and , current flows from and , as shown in Fig. 3(c),
unreliable. New commutation strategies are proposed in this then can achieve ZVS naturally. When is turned on, cur-
paper. rent flows from and according to the current
direction, as shown in Fig. 3(d). In these switching patterns, cur-
A. Commutation Strategy of Single-Phase Topologies rent path always exist whatever the current direction, so there is
no voltage spike during dead time. Since two switches are al-
For single-phase four switches topologies, take the ways turned on during half period of the voltage source, and one
voltage-fed converter shown in Fig. 1(a) as an example. If of the two high frequency switches can achieve ZVS naturally,
, switches and are fully the switching loss is significantly reduced. If , analysis is
turned on. If , switches and are fully turned similar to .
on. Considering that the fundamental element of and
equal , and can be replaced with to avoid
B. Commutation Strategy of Three-Phase Topologies
high frequency ripple in and . Then we redefine
as . If , and are fully turned For three-phase six switches topologies, taking the
on, and are modulated in complement with dead time. voltage-fed converter shown in Fig. 2(a) as an example.
If , , and are fully turned on, and are We define , , ,
modulated in complement with dead time. For the topology then the switches with the minimal voltage among , ,
shown in Fig. 1(b), the commutation strategy is the same as are fully turned on. If is minimum, and are fully
the topology shown in Fig. 1(a). The switching pattern for turned on, , , and , are modulated in complement
current-fed converter shown in Fig. 1(c) is similar to that of with dead time. If is minimum, and are fully turned

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2148 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 6, NOVEMBER 2007

Fig. 2. Three-phase six switches Z-source ac–ac converters. (a) Voltage-fed. (b) Current-fed.

Fig. 3. Commutation modes of voltage-fed single-phase converter. (a) Q , Q , Q : on, Q : off; (b) Q , Q : on, Q , Q : off; (c) Q ,Q : on, Q , Q : off; (d)
Q Q Q
, , : on, Q: off.

on, , and , are modulated in complement with dead from , and , as shown in Fig. 4(b), then and
time. If is minimum, and are fully turned on, and can achieve ZVS naturally; 2) if and
, and , are modulated in complement with dead , current flows from , , and , as
time. The switching pattern for current-fed converter shown in shown in Fig. 4(c), then and can achieve ZVS naturally;
Fig. 2(b) is similar to that of voltage-fed. We can define as 3) if and , current
, , , the flows from , , and , as shown in Fig. 4(d), then
commutation strategy is the same as that of the voltage-fed. and can achieve ZVS naturally; 4) if
If is minimum, the circuit shown in Fig. 2(a) has three and , then , current
commutation modes, as shown in Fig. 4. When , are flows from , , , as shown in Fig. 4(e), then and
turned on, current flows from or ( 1, 2, 3), according can achieve ZVS naturally. When , have been turned on,
to the current direction, as shown in Fig. 4(a). Then , are current flows from or ( 4, 5, 6), according to the cur-
turned off and , have not been turned on, there are four rent direction, as shown in Fig. 4(f). In these switching patterns,
options: 1) if and , a current path always exist whatever the current direction, so
then can be derived from there is no voltage spike during dead time. Since two switches
, current flows are always turned on during one third the period of the voltage

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TANG et al.: Z-SOURCE AC–AC CONVERTERS 2149

Fig. 4. Commutation modes of voltage-fed three-phase converter. (a) Q , Q , Q , Q : on; (b) Q , Q : on; (c) Q ,Q : on; (d) Q , Q : on; (e) Q , Q : on; (f)
Q Q Q Q
, , , : on.

source, and two of the four high-frequency switches can achieve the Z-network is symmetrical. Ignoring the effects of dead time,
ZVS naturally, the switching loss is significantly reduced. If two states exist in one switching period, as shown in Fig. 5. Then
or is minimum, analysis is similar to the above. we have

IV. ANALYSIS OF Z-SOURCE AC–AC CONVERTERS


(1)
A. Operation Principle of Single-Phase Z-source AC–AC
Converters
In state 1, the bidirectional switch is turned on and
As an example, the voltage-fed converter shown in Fig. 1(a) is is turned off. The time interval in this state is , where
analyzed. The equivalent duty-ratio of is . Since two same is the switching period, as shown in Fig. 5(a). In state 2, the
inductors and two same capacitors are used in the Z-network, bidirectional switch is turned on and is turned off. The

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2150 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 6, NOVEMBER 2007

effects of dead time, two states exist in one switching period, as


shown in Fig. 7. The input line voltage and Z-source capacitor
voltage can be expressed as

(4)
Fig. 5. Equivalent circuits in one switching period of voltage-fed single-phase
topology. (a) State 1. (b) State 2. Here, and are the rms value of input line voltage
and Z-source capacitor voltage. The filter inductor current and
Z-source inductor current can be expressed as

(5)

where and are the rms value of the filter inductor current
and Z-source inductor current.
In state 1, the switches , , are turned on. The time
interval in this state is , where is the switching period, as
shown in Fig. 7(a). In state 2, the switches , , is turned
on. The time interval in this state is , as shown in
Fig. 7(b). We can get the averaged equation

Fig. 6. Voltage gain versus D of voltage-fed single-phase topology.

time interval in this state is , as shown in Fig. 5(b). We


can get the averaged equation

(2)

In steady state, we get

(3)

where and represents the average current value of and (6)


in one switching period, respectively.
Fig. 6 shows the voltage gain versus duty cycle. It clearly
shows that there are two operation regions. When the duty ratio
is less than 0.5, the output voltage can be buck-boost, and out-of- The output line voltage is equal to Z-source capacitor voltage
phase with input voltage. When the duty ratio is greater than 0.5, ignoring the fundamental voltage across filter inductors. In
output voltage can be boost, and in-phase with input voltage. steady state, the following equation can be derived from (6)

B. Operation Principle of Three-Phase Z-Source AC–AC


Converters
As an example, the voltage-fed topology shown in Fig. 2(a) is (7)
analyzed. The equivalent duty-ratio of , , is . Since Where is the rms value of output line voltage.
three same inductors and three same capacitors are used in the Fig. 8 shows the voltage gain versus duty cycle. It clearly
Z-network, the Z-network becomes symmetrical. Ignoring the shows that there are two operation regions. When the duty ratio

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TANG et al.: Z-SOURCE AC–AC CONVERTERS 2151

Fig. 8. Voltage gain versus D of voltage-fed three-phase topology.

Fig. 9. Relationship between ' and D .

Fig. 7. Equivalent circuits in one switching period of three-phase topology. (a)


State 1. (b) State 2. A. Voltage and Current Stress of Switches
The voltage stress of switches can be derived from (3) as

is less than 2/3, output voltage can be buck-boost. When the duty
ratio is greater than 2/3, output voltage can be boost. (9)
From (6), we can get
where is the rms value of input voltage.
The peak current stress of switches is
(8)
(10)
The relationship of and is shown in Fig. 9.
where is the rms value of filter inductor current.
The rms current value of switches and is
V. DESIGN CONSIDERATIONS OF Z-SOURCE
AC–AC CONVERTERS (11)

Because the design considerations of three-phase topologies The rms current value of switches and is
are similar to the single-phase, only voltage-fed single-phase
topology is considered. (12)

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2152 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 6, NOVEMBER 2007

Fig. 10. Simulation results of voltage-fed single-phase topology.

Fig. 11. Simulation results of voltage-fed three-phase topology. (a) Input and output voltage. (b) Switching modes, v (Q ) and v , v , v ; (c) drive and drain-
source voltage.

B. Parameters Design of Z-Source Network If is selected as , we have


The Z-source capacitor value is selected according to the
voltage ripple, in state 1 as shown in Fig. 5(a), the capacitor
current equals the Z-source inductor current, then we get

(13)
(16)
If is selected as , we have

C. Parameters Design of Output Filter


The output filter capacitance is often selected as
(14)
(17)
where is output power, , , are rms value of input
voltage, Z-source capacitor voltage, output voltage, respec-
tively. The output filter inductance is often selected as
The Z-source inductor value is selected according to the cur-
rent ripple, in state 2 as shown in Fig. 5(b), the inductor voltage (18)
equals the Z-source capacitor voltage, then we get
where is the output cutoff frequency, is the rated resis-
(15) tance load, and is selected from 0.5–0.8.

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TANG et al.: Z-SOURCE AC–AC CONVERTERS 2153

Fig. 12. Experimental results under resistance load. (a) top: V (100 V/div) bottom: V (100 V/div), t (10 ms/div); (b) top: V of Q (10 V/div) bottom: V
of Q (100 V/div), t (5 ms/div); (c) top: V of Q (10 V/div) bottom: V of Q (200 V/div), t (10 s=div ); (d) top: V (100 V/div) Bottom: V (100 V/div), t
(5 ms/div); (e) top: V of Q (10 V/div) bottom: V of Q (100 V/div), t (5 ms/div); (f) top: V of Q (20 V/div) bottom: V of Q (100 V/div), t (10 s=div ).

VI. SIMULATION AND EXPERIMENTAL RESULTS


OF Z-SOURCE AC–AC CONVERTERS
Fig. 10(a) and (b) shows the simulation results of
voltage-fed single-phase topology as shown in Fig. 1(a) at
, and , ,
respectively. The parameters were ,
, , , . The
switching frequency is 20 kHz and the dead time is 1 . It can
be seen from simulation that when , the output voltage
is 180 phase-shifted with respect to input voltage; when
, the output voltage is in phase with input voltage.
Fig. 11 shows the simulation results of voltage-fed three-
phase topology as shown in Fig. 2(a) at ,
. The parameters were ,
, ,
, . The switching frequency
is 20 kHz and the dead time is 0.5 . Fig. 11(a) shows the input
and output phase voltage. Fig. 11(b) shows the switching modes,
drain-source voltage of , and polarity choice voltage , ,
defined above. Fig. 11(c) shows gate-source and drain-source
voltage of , , , . From the simulation results, we can
see that two switches are always turned on during one third the Fig. 13. Experimental results under RL load. (a) Top: V (100 V/div) bottom:
V (100 V/div), t (10 ms/div); (b) top: V (100 V/div) bottom: V of Q
line period, so the switching loss is reduced. Safe commutation (200 V/div), t (5 ms/div); (c) top: V (100 V/div) bottom: V (100 V/div), t
is achieved without a snubber circuit. (10 ms/div); (d) top: V (100 V/div) bottom: I (10 A/div), t (10 ms/div).
Experimental results were given on voltage-fed single-phase
four switches Z-source ac–ac converter. The same parameters
were used as in simulation. Fig. 12 shows the experimental re- , . Fig. 12(d) shows the input and
sults when the load is . Fig. 12(a) shows the input and output voltage when , . Fig. 12(e)
output voltage when , . Fig. 12(b) shows the gate-source voltage and drain-source voltage of
shows the gate-source voltage and Drain-source voltage of , when , . Fig. 12(f) shows the ex-
when , . Fig. 12(c) shows the ex- tend gate-source voltage and drain-source voltage of when
tend gate-source voltage and drain-source voltage of , when , . Fig. 13 shows the experimental

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2154 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 6, NOVEMBER 2007

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period for single-phase topologies and one third the line pe- Yu Tang was born in Jiangsu, China, in 1980. He re-
riod for three-phase topologies, and half the high frequency ceived the B.S. degree in electrical engineering form
switches can realize ZVS naturally, that can reduce switching Nanjing University of Aeronautics and Astronautics
(NUAA), Nanjing, China, in 2003, where he is cur-
loss greatly; 4) less devices has been used in the main circuit rently pursuing the Ph.D. degree in electrical engi-
and high reliability can be achieved. Simulation results given on neering.
the voltage-fed three-phase converter and experimental results
given on voltage-fed single-phase converter verify the analysis.
By simple PWM control, they become “solid-state transformer”
with continuously variable turn ratios and Buck-boost ability,
which can be used in a voltage regulator, electronic transformer,
and so on.
Shaojun Xie (M’05) was born in Hubei, China, in
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