9th International Conference on Power Electronics-ECCE Asia
June 1 - 5, 2015 / 63 Convention Center, Seoul, Korea
Two-Phase Interleaved Bidirectional Converter
Input-Parallel Output-Series Connection
Yuji Yamamoto, Taro Takiguchi, Takaharu Sato, and Hirotaka Koizumi
Tokyo University of Science, Japan
Abstract-- The interleaved bidirectional converter (IBC)
has lower input current ripple and higher power conversion
efficiency than the bidirectional chopper because of the
current sharing operation. However, the step up/down ratio
of the IBC is the same as that of the bidirectional chopper.
As a converter with high step up ratio, the two-phase
interleaved DC-DC converter with parallel-input series-
output connection (ICPS) is proposed. The ICPS realizes
twice the step up ratio of the interleaved boost converter.
Also, the ICPS has lower input ripple than the interleaved
boost converter at the same step up ratio.
This paper proposes bidirectional operation of the ICPS,
which realizes the high step up/down ratio and the reduction
of current ripple on the low voltage side. The proposed
bidirectional operational principles and the steady-state
analysis have been verified by simulation and circuit
experiment.
I. INTRODUCTION
Recently, renewable energy is becoming widely used
as alternative fossil fuel. However, renewable energy
does not generate stable energy because of weather
condition. In order to provide stable power, DC back up
systems (DBUS) are essential [1]. Fig. 1 shows a typical
DC back up system (DBUS). When a renewable energy
source generates more than demand, the primary voltage
is stepped down in order to charge the energy storage. On
the other hand, when a renewable energy source
generates less than demand, the voltage of the storage is
stepped up, in order to supply the energy to the load.
Thus, the bidirectional converter operates as both high
step up converter and step down converter.
The bidirectional chopper is commonly used for
bidirectional operation. However, the voltage gain of step
up conversion is limited and the input current ripple is
large.
In order to reduce the input current ripple, the
Interleaved Bidirectional Converter (IBC) has been
proposed [2], [3]. The IBC has the lower input current
ripple than the bidirectional chopper by driving two
switches with a 180° phase shift. In addition, since the
input current is divided into two inductors, the IBC has
higher power conversion efficiency. However, the IBC
has the same voltage gain in step up conversion as the
bidirectional chopper.
On the other hand, as a topology of DC-DC converter,
a parallel-input series-output DC-DC converter with dual
coupled inductor is proposed [4]. The parallel-input
series-output DC-DC converter with dual coupled induc-
2015 KIPE
301
Power
Source
DC-DC Converter Load
Bidirectional
Energy
DC-DC
Storage
Converter
Fig. 1 Typical DC back up system.
tor has two parts which are the modified interleaved DC-
DC converter and the voltage multiplier module. The
modified interleaved DC-DC converter has a parallel-
input series-output configuration, which is called two-
phase interleaved DC-DC converter with parallel-input
series-output (ICPS) in this paper. The ICPS has double
step up ratio of the conventional interleaved boost
converter. However, the ICPS cannot achieve bidirec-
tional operation.
This paper proposes bidirectional operation of the
ICPS by replacing the diodes to the active switches. The
two-phase Interleaved Bidirectional Converter with
Parallel-input Series-output connection (IBCPS) has the
higher voltage gain and the lower input current ripple in
the step up conversion than the IBC. On the other hand,
the IBCPS has the smaller voltage gain and the lower
output current ripple in the step down conversion.
II. TOPOLOGY AND OPERATING PRINCIPLE OF IBCPS
A. Circuit configuration
Fig. 2 shows the two-phase interleaved bidirectional
converter with parallel-input series-output connection.
Fig. 2 (a) is in the step up operation, and Fig. 2 (b) is in
the step down operation. In the step up conversion, the
input voltage is the low-side voltage VL, and the output
voltage is the high-side voltage VoH. In the step down
conversion, the input voltage is the high-side voltage VH,
and the output voltage is the low-side voltage VoL. This
converter can be dividedinto three parts which are the
low voltage part, the interleaved part, and the high
voltage part. The low voltage part is composed of the
low-side voltage source VL or load VoL at the resistance
RL, and the capacitor CL1. The interleaved part is
composed of the two inductors L1 and L2, and the four
switches S1 - S4. The high voltage part is composed of the
two capacitors CH1 and CH2, and the high-side voltage
source VH or load VoH at the resistance RH.
 iin iL1 L1 vGS3 S3 iS3 TS
+ vL1 D3 DupTS
D1 vDS3 vGS1 H
VL 䋫
䋭 CL1 vCL S1
- vDS1 CH1 vCH1 L
vGS1 vGS2 H
iS1 + L
iL2 L2 RH VoH vGS3 H
- L
vL2 D2 vGS4 H
S2 vDS2 CH2 vCH2 L
vGS2 iS2 vDS4 iL1 ΔiL1
D4 iS4 0
S4 v iL2 ΔiL2
GS4
(a) 0
iin Δiin
0
iout irL1 L1 S3 iS3 iS3
vGS3 0
iS4
+
CL1
vrL1 D1 vDS3D3 0
VoL vCL S1
- RL vDS1 CH1 vCH1
a vGS1 T1 t T2 T4 t
iS1 + t0 1 t2 T3 t3 t4
irL2 L2 䋫
䋭 VH
-
vrL2 D2 Fig. 3 Theoretical waveforms of the IBCPS in step up conversion.
S2 vDS2 CH2 vCH2
vGS2 iS2 vDS4
D4 iS4
iin iL1 L1 vGS3 S3 iS3
S4 v
(b) GS4 + vL1 D iCH1
D1 vDS3 3
VL 䋫
䋭 CL1 vCL S1
- vGS1 vDS1 CH1 vCH1
Fig. 2 Two-phase interleaved bidirectional converter with parallel- iS1
input series-output connection, (a) step up operation, (b) step down iL2 L2 +
RH VoH
operation. -
vL2 D2 iCH2
S2 vDS2 CH2 vCH2
vGS2 iS2 vDS4
The IBCPS operates in continuous conduction mode D4 iS4
(CCM) in bidirectional operation. In the step up S4 v
GS4
conversion, the switches S1 and S2 are driven with a 180° (a)
phase shift, and the duty ratio Dup is larger than 0.5. In the
step down conversion, the switches S3 and S4 are driven iin iL1 L1 vGS3 S3 iS3
with a 180° phase shift, and the duty ratio Ddown is less + vL1 D iCH1
D1 vDS3 3
than 0.5. VL 䋫
䋭 CL1 vCL S1
- vGS1 vDS1 CH1 vCH1
iS1 +
iL2 L2 RH VoH
B. Step up operation iCH2 -
vL2 D2
S2 vDS2 CH2 vCH2
Figs. 3 and 4 show the theoretical waveforms and the
vGS2 iS2 vDS4
operation modes of the IBCPS in step up conversion. The D4 iS4
switches S3 and S4 operate as synchronous rectifiers. The S4 v
switches S1 and S2 operate as main switches, the IBCPS (b)
GS4

has four operation modes in the one switching period TS.

iin iL1 L1 vGS3 S3 iS3
Mode I: [t0 - t1]
+ vL1 D iCH1
D1 vDS3 3
At t0, the switch S1 turns on. In this mode, the switch S2 VL 䋫
䋭 CL1 vCL S1
- vGS1 vDS1 CH1 vCH1
remains in ON state. Then, the switch S3 turns off, and iS1
iL2 L2 +
the switch S4 remains in OFF state. The two inductors L1 RH VoH
and L2 are magnetized by the low-side voltage VL. So, the iCH2 -
vL2 D2
inductor currents iL1 and iL2 increase linearly. When the S2 vDS2 CH2 vCH2
switch S2 turns off, this mode ends. Applying KVL vGS2 iS2 vDS4
D4 iS4
(Kirchhoff Voltage Law) to the equivalent circuit shown
S4 v
in Fig. 4 (a), the following equations are derived in mode (c)
GS4

I.
Fig. 4 Operation modes of the IBCPS in step up conversion, (a)
V L − v L1 = 0 (1) Mode I: [t0 - t1], Mode III: [t2 - t3], (b) Mode II: [t1 - t2], (c) Mode IV: [t3 -
VL − vL 2 = 0 (2) t4].

302
Mode II: [t1 - t2]
TS
At t1, the switch S2 turns off. In this mode, the switch DdownTS
S1 remains in ON state. Then, the switch S4 turns on, and vGS3 H
the switch S3 remains in OFF state. The inductor L2 L
vGS4 H
transfers the energy to the capacitor CH2, and the inductor L
current iL2 decreases linearly. Also, the inductor current vGS1 H L
iL1 increases linearly because the inductor L1 is vGS2 H
L
magnetized by the low-side voltage VL. When the switch
irL1 ΔirL1
S2 turns on, this mode ends. Applying KVL to the 0
irL2 ΔirL2
equivalent circuit shown in Fig. 4 (b), the following
0
equations are derived in mode II. iout
0 Δiout
V L − v L1 = 0 (3) iS1
0
V L − v L 2 − v CH 2 = 0 (4) iS2
0
Mode III: [t2 - t3] T1 T2 T3 T4 t
Mode III is the same operation as Mode I. Therefore, t0 t1 t2 t3 t4
applying KVL to the equivalent circuit shown in Fig. 4
(a), the following equations are derived in mode III. Fig. 5 Theoretical waveforms of the IBCPS in step down conversion.

V L − v L1 = 0 (5)
iout irL1 L1 vGS3 S3 iS3
VL − v L 2 = 0 (6)
+
CL1
vrL1 D1 vDS3D3
VoL vCL S1
Mode IV: [t3- t4] - RL vDS1 CH1 vCH1
vGS1
Mode IV is the symmetrical operation as Mode II. iS1 +
irL2 L2
Therefore, applying KVL to the equivalent circuit shown 䋫
䋭 VH
-
in Fig. 4 (c), the following equations are derived in mode vrL2 D2
S2 vDS2 CH2 vCH2
IV.
vGS2 iS2 vDS4
V L − v L 1 − v CH 1 = 0 (7) D4 iS4

VL − v L 2 = 0 (8) S4 v
GS4
(a)

C. Step down operation iout irL1 L1 vGS3 S3 iS3

Figs. 5 and 6 show the theoretical waveforms and the
operation modes of the IBCPS in the step down
+
CL1
vrL1 D1 vDS3D3
VoL vCL S1
conversion. The switches S1 and S2 are synchronous - RL vDS1 CH1 vCH1
vGS1
rectifiers. The switches S3 and S4 are main switches. In iS1 +
irL2 L2 䋫 VH
the step down operation, the IBCPS has four operation 䋭
-
vrL2 D2
modes in the one switching period TS. S2 vDS2 CH2 vCH2
vGS2 iS2 vDS4
Mode I: [t0 - t1] D4 iS4
At t0, the switch S3 turns on. In this mode, the switch S4 S4 v
GS4
remains in OFF state. Then, the switch S1 turns off, and (b)
the body diode of the switch S2 remains in ON state.
Since the inductor L1 is magnetized by the capacitor CH1, iout irL1 L1 vGS3 S3 iS3
the inductor current irL1 increases linearly. Also, the
inductor L2 transfers the energy to the capacitor CL1, and +
CL1
vrL1 D1 vDS3D3
VoL vCL S1
the inductor current irL2 decreases linearly. When the - RL
vGS1
vDS1 CH1 vCH1
switch S3 turns off, this mode ends. Applying KVL to the irL2 L2
iS1 +
equivalent circuit shown in Fig. 6 (a), the following
䋫
䋭 VH
-
equations are derived in mode I. vrL2 D2
S2 vDS2 CH2 vCH2
V oL + v rL 1 − v CH 1 = 0 (9)
vGS2 iS2 vDS4
iS4
V oL + v rL 2 = 0 (10) D4
S4 v
GS4
(c)
Mode II: [t1 - t2]
At t1, the switch S3 turns off. In this mode, the switch S4 Fig. 6 Operation modes of the IBCPS in step down conversion, (a)
remains in OFF state. Then, the switch S1 turns on, and Mode I: [t0 - t1], (b) Mode II: [t1 - t2], Mode IV: [t3 - t4], (c) Mode III: [t2 -
the switch S2 remains in ON state. The inductors L1 and t3].
L2 transfer the energy to the capacitor CL1, and the

303
inductor currents irL1 and irL2 decrease linearly. When the 1
switch S4 turns on, this mode ends. Applying KVL to the V CH 1 = VL. (20)
1 − D up
equivalent circuit shown in Fig. 6 (b), the following
equations are derived in mode II. Also, based on the symmetrical operation, VCH2 is
V oL + v rL 1 = 0 (11) expressed as
1
V oL + v rL 2 = 0 (12) V CH 2 = VL . (21)
1 − D up
Mode III: [t2 - t3] From (20) and (21), the high-side voltage VoH is
Mode III is the symmetrical operation of Mode I. 2
V oH = V CH 1 + V CH 2 = VL . (22)
Therefore, applying KVL to the equivalent circuit shown 1 − D up
in Fig. 6 (c), the following equations are derived in mode
III. Therefore, the step up ratio Į =VoH /VL is expressed as
V oL + v rL 1 = 0 (13) V 2
α = oH = . (23)
VL 1 − D up
 V oL + v rL 2 − v CH 2 = 0 (14)

Mode IV: [t3- t4] 2). Input current ripple

Mode IV is the same operation as Mode II. Therefore, As shown in Fig. 3, the inductor L1 is magnetized, and
applying KVL to the equivalent circuit shown in Fig. 6 the inductor current iL1 increases in T1 - T3. From (1), (3),
(b), the following equations are derived in mode IV. and (5), the inductor current ripple ǻiL1 is
V oL + v rL 1 = 0 (15) (T1 + T 2 + T 3 ) TS
Δi L 1 = VL = D up V L . (24)
V oL + v rL 2 = 0 (16) L1 L1
From the assumption, the inductors L1 and L2 have the
same inductance L. Therefore, the inductor current ripple
III. THEORETICAL ANALYSIS ǻiL2 is equal to the inductor current ripple ǻiL1. On the
This section shows the theoretical analysis in step up other hand, the input current iin is the sum of iL1 and iL2.
and step down conversion in CCM. To simplify the Also, the inductor currents iL1 and iL2 increase in T1, as
circuit analysis, the following conditions are assumed. shown in Fig. 3. Therefore, ǻiin is expressed as
All the switches are ideal. The capacitors CL1, CH1 and T1 T1
CH2 are large enough that the capacitor voltages vCL1, vCH1 Δi in = Δi L 1 + Δi L 2 .(25)
T1 + T 2 + T 3 T1 + T 3 + T 4
and vCH2 are considered as the constant voltages VCL1,
VCH1, and VCH2. The inductors L1 and L2 are large enough By substituting (17) and (18) into (25), ǻiin is expressed
that the inductor currents iL1, iL2, irL1, and irL2 increase and as
decrease linearly. The inductors L1 and L2 have the same T
Δi in = S ( 2 D up − 1 )V L . (26)
inductance L. L
By substituting (23) into (26), the input current ripple is
expressed as
A. Step up conversion TS § 4
Δi in = ·
1). Voltage gain ¨ − + 1 ¸V L . (27)
L © α ¹
This section shows the voltage gain in step up
conversion. Using the duty ratio Dup of the switches S1 Fig. 7 shows the characteristics of the input current
and S2, the following equations are satisfied, ripple of the IBCPS, the IBC, and the bidirectional
1 chopper as functions of the step up ratio Į. As shown in
T 1 = T 3 = t 1 − t 0 = §¨ D up − ·¸ T S , (17) Fig. 7, the IBCPS has the lowest input current ripple.
© 2¹
T 2 = T 4 = t 2 − t 1 = (1 − D up )T S . (18) 1.00
Input current ripple Δiin

Because the averaged inductor voltage VL1 is zero in 0.80

one switching cycle TS, from (1), (3), (5), and (7), the
following equation is derived, 0.60
t1 t2 Bidirectional chopper
³ ³
0.40
0= V L dt + V L dt IBC
t0 t1 0.20 IBCPS
t3 t4
(19)
+ ³ t2
V L dt + ³ t3
(V L − v CH 1 ) dt . 0.00
4 6 8 10 12 14 16 18 20
Step up ratio Į
From the assumption, the capacitor voltage vCH1 is
Fig. 7 Characteristics of input current ripple of IBCPS, IBC, and
considered as the constant voltage VCH1. Therefore, bidirectional chopper as functions of step up ratio Į.
substituting (17), (18) into (19), VCH1 is expressed as

304
B. Step down conversion 1.00
Bidirectional chopper
1). Voltage gain 0.80
IBC

Output current ripple Δiout

IBCPS
This section shows the voltage gain in the step down
conversion. Using the duty ratio Ddown of the switches S3 0.60

and S4, each term is expressed as

0.40
T 1 = T 3 = t 1 − t 0 = D down T S , (28)
0.20
1
T 2 = T 4 = t 2 − t 1 = §¨ − D down ·¸ T S . (29)
©2 ¹ 0.00
Because the averaged inductor voltage VrL1 is zero in 0.00 0.05 0.10 0.15 0.20 0.25
Step down ratio ȕ
one switching cycle TS, from (9), (11), (13), and (15), the
Fig. 8 Characteristics of output current ripple of IBCPS, IBC, and
following equation is derived, bidirectional chopper as functions of step down ratio ȕ.
t1 t2
0= ³ t0
(V oL − v CH 1 ) dt + ³
t1
V oL dt
current ripple ǻiout is expressed as
(30) T1 T1
t3 t4
+ ³ t2
V oL dt + ³ t3
V oL dt . Δi out = Δi rL1
T1
− Δi rL 2
T1 + T 2 + T 4 (38)
From the assumption, the capacitor voltage vCH1 is TS
= D down ( − 2 D down + 1 )V H .
considered as the constant voltage VCH1. Therefore, 2L
substituting (28) and (29) into (30), VCH1 is expressed as By substituting (34) into (38), the output current ripple
1 is expressed as
V CH 1 = V oL . (31)
D down TS
Δi out = β ( − 4 β + 1 )V H . (39)
Based on the symmetrical operation, the capacitor voltage L
VCH2 is expressed as Fig. 8 shows the characteristics of the output current
1 ripple ǻiout of the IBCPS, the IBC, and the bidirectional
V CH 2 = V oL . (32) chopper in the step down conversion. As shown in Fig. 8,
D down
the IBCPS has the lowest output current ripple.
From (31) and (32), the high-side voltage VH is expressed
as
2 IV. INDUCTOR DESIGN
V H = V CH 1 + V CH 2 = V oL . (33)
D down This section derives the input current ripple rate Ki in
From (33), step down ratio ȕ =VoL /VH is expressed as step up conversion in order to design the inductors L1,
V oL D down and L2. The input current ripple rate Ki < 20 [%] is
β= = . (34) required. From the averaged input current Iin and the
VH 2 input current ripple Δiin, the input current ripple rate Ki is
Δi in
2). Output current ripple Ki = . (40)
2 I in
As shown in Fig. 5, the inductor L1 is magnetized, and
the inductor current irL1 increases in T1. From (9) and (31), In steady sate, the averaged input current Iin is given as
2
the inductor voltage vrL1 is V oH
I in = . (41)
§ 1 · V oL R H
v rL 1 = V CH 1 − V oL = ¨ − 1 ¸ V oL . (35)
© D down ¹ Substituting (26) and (40), into (41),
By substituting (34) into (35), the inductor voltage vrL1 ( 2 D up − 1 )(1 − D up )2 R H TS
is Ki = . (42)
8L
§ 1 − D down ·
v rL 1 = ¨ ¸V H . (36) Therefore, the inductance L needs to be
© 2 ¹ ( 2 D up − 1 )(1 − D up )2 R H TS
From (36), the inductor current ripple ǻirL1 is expressed L≥ . (43)
as 8 × 0.2
T1 T
Δ irL1 = vrL1 = S Ddown (1 − Ddown )V H . (37)
L1 2 L1 V. SIMULATION RESULTS
From the assumption, the inductors L1 and L2 have the This section shows the simulation results with PSIM
same inductance L. Therefore, the inductor current ripple ver. 9.1.4. Table I shows the simulation parameters of the
ǻirL2 is equal to the inductor current ripple ǻirL1. On the IBCPS. ESR of each component is included in the
other hand, the output current iout is equal to the sum of simulation parameter in order to approximate the
the inductor currents irL1 and irL2. Also, the inductor experiment condition. In the step up conversion, the high-
current irL1 increases, and the inductor current irL2 side voltage source VL = 5 [V]; in the step down
decreases in T1, as shown in Fig. 5. Therefore, the output conversion, the low-side voltage source VH = 40 [V]; and

305
switching frequency fS = 40 [kHz] were given. On
1

H 0.8

vGS1
0.6
0.4

resistance of the switches was 10 [mΩ] [5]. The time step

0.2

L 0

(a)
Vgs2

was set at 1×10-8 [s]. H 1

Vgs2

vGS2
0.8

Fig. 9 shows the calculated waveforms in the step up

0.6
0.4

L 0.2

conversion at the duty ratio Dup = 0.75. As shown in Figs.

0

Vgs3 (b)
3 and 9, the simulation results agreed with the theoretical H
1
0.8

vGS3
0.6
0.4

waveforms.
0.2

L 0

Vgs4
(c)
Fig. 10 shows the calculated waveforms in the step H 1

vGS4
0.8

down conversion at the duty ratio Ddown = 0.25. As shown

0.6
0.4

L
0.2
0

in Figs. 5 and 10, the simulation results agreed with the (d)
0.6 0.60001 0.60002 0.60003 0.60004 0.60005

Il1

1.2

irL1[A]
theoretical waveforms.
1.2

1.0 1

0.8
0.8

Il2

Il2
(e)
TABLE I 1.2

irL2 [A]
1.2

SIMULATION PARAMETERS OF IBCPS 1.0 1

0.8
0.8

Element Value Iout

Iout
(f)
Inductance [ȝH] 203 2.1

iout [A]
2.1

Inductor L1 2.0 2

ESR [mȍ] 31.1 1.9

1.9

1.8
1.8

Inductance [ȝH] 198 Is1

(g)
Inductor L2 Is1

iS1 [A]
ESR [mȍ] 32.6 1.0 1

0.5
0.5

Capacitance [ȝF] 91.3 0

0

Capacitor CL1 (h)

ESR [mȍ] 118 2.0

VoL [V] iS2 [A]

2

1.5

Capacitance [ȝF] 92.3 1.0 1

Capacitor CH1 0
0.5

ESR [mȍ] 266 Vl

Vl (i)
Capacitance [ȝF] 95.0 5.0 5

Capacitor CH2
4
3

ESR [mȍ] 278 0

2
1
0

Resistance RH [ȍ] 250 (j)

0.6 0.60001 0.60002 0.60003 0.60004 0.60005
Time (s)

Resistance RL [ȍ] 2.51 0.60000 0.60001 0.60002 0.60003 0.60004 0.60005

Times [s]
Vgs1

H 1
Fig. 10 Calculated waveforms at Ddown = 0.25 in step down
vGS1

0.8

conversion, (a) gate-source voltage vGS1, (b) gate-source voltage vGS2, (c)
0.6
0.4

L
0.2

gate-source voltage vGS3, (d) gate-source voltage vGS4, (e) inductor

0

Vgs2
(a)
current irL1, (f) inductor current irL2, (g) output current iout, (h) drain-
Vgs2

H 1
vGS2

0.8

source current iS1, (i) drain-source current iS2, (j) output voltage VoL.
0.6
0.4

L0.2
0

V 3

Vgs3
(b)
H 1
vGS3

0.8
0.6

VI. CIRCUIT EXPERIMENT

0.4

L
0.2
0

(c)
An experimental circuit was built and tested to verify
Vgs4

H 1
vGS4

0.8
0.6

the theoretical analysis and simulation result. The

0.4

L
0.2
0

(d)
parameters of the experimental circuit are the same as
0.8
iL1[A]

those in Table I. The driving signal was generated with an

0.8

0.6
0.6

0.4
0.4

FPGA. The MOSFET IRFB4410 was used as the

Il2
(e)
0.8 switches S1 - S4. The on resistance of the switches S1 - S4
iL2 [A]

0.8

0.6
0.6

0.4
0.4
was 10 [mȍ] [5]. In the step up conversion, the high-side
(f)
1.4
1.4
Iin
voltage VH = 40 [V]; in the step down conversion, the
iin [A]

1.3
1.3

low-side voltage VL = 5 [V]. The switching frequency fS

1.2
1.2

1.1
1.1

was 40 [kHz].
(g)
0.8 Fig. 11 shows the observed waveforms of the IBCPS at
1
iS3 [A]

0.8
0.6

0.4
0.4
0.2

0 0
Dup = 0.75 in the step up conversion. Fig. 11 (a) shows
(h)
0.8
1
the observed waveforms of the gate-source voltage vGS1,
VoH [V] iS4 [A]

0.8

the ripple components of the inductor currents iL1, iL2, and

0.6

0.4
0.4
0.2

0 0

(i) of the input current iin. Fig. 11 (b) shows the observed
40
20 waveforms of the gate-source voltages vGS1, vGS2, the
0
(j)
capacitor voltage VCH1, and the output voltage VoH.
0.60000 0.60001 0.60002 0.60003 0.60004 0.60005 As shown in Fig. 11 (a), the ripple components of the
Times [s] inductor currents iL1, iL2 were canceling each other, which
Fig. 9 Calculated waveforms at Dup = 0.75 in step up conversion, (a) reduced the input current ripple Δiin. The measured input
gate-source voltage vGS1, (b) gate-source voltage vGS2, (c) gate-source current ripple Δiin was 316 [mA], while the theoretical
voltage vGS3, (d) gate-source voltage vGS4, (e) inductor current iL1, (f)
inductor current iL2, (g) input current iin, (h) drain-source current iS3, (i) input current ripple Δiin is 313 [mA]. As shown in Fig. 11
drain-source current iS4, (j) output voltage VoH. (b), the capacitor voltage VCH1 was half of the output
voltage VoH. The measured output voltage VoH was 38.8
[V], while the theoretical output voltage VoH is 40.0 [V].

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 vGS1 vG3

vGS2 vS3
vGS3
vCH1
VoL
VoH

(a) (a)

vGS1 vGS3
iin
iout
iL1 irL1
iL2
irL2

(b)
Fig. 11 Observed waveforms of the IBCPS at Dup = 0.75 in step up
conversion, (a) gate-source voltage vGS1, inductor currents iL1, iL2, and of
the input current iin. Vertical: vGS1: 10 V/div; iin, iL1, iL2: 0.5 A/div;
horizontal: 5 μs/div. (b) gate-source voltages vGS1, vGS2, capacitor
voltage VCH1, and output voltage VoH. Vertical: vGS1, vGS2: 10 V/div; VCH1,
VoH: 20 V/div; horizontal: 5 ȝs/div.
(b)
Fig. 12 Observed waveforms at duty ratio Ddown = 0.25 in step down
conversion, (a) gate-source voltage vGS3, inductor currents irL1, irL2, and
the output current iout. Vertical: vGS3: 10 V/div; iout, irL1, irL2: 0.5 A/div;
horizontal: 5 ȝs/div. (b) gate voltage vG3, source voltage vS3, gate-source
voltage vGS3, and output voltage VoL. Vertical: vG3, vS3, vGS3: 20 V/div;
VoL: 5 V/div; horizontal: 5 ȝs/div.

Fig. 12 shows the observed waveforms at duty ratio 20

Ddown = 0.25 in the step down conversion. Fig 12 (a) 18 Theoretical value
16 Simulation value
shows the observed waveforms of the gate-source voltage Experimental value
14
vGS3, the ripple components of the inductor currents irL1,
Step up ratio Į

12
irL2, and of the output current iout. Also, in Fig. 12 (b) the 10
voltage between the gate of the switch S3 and the node ‘a’ 8
in Fig. 2 (b) is shown as vG3, and the voltage between the 6
source of the switch S3 and the same node ‘a’ is shown as 4
vS3 with the gate-source voltage vGS3, and the output 2
voltage VoL. 0
0.50 0.60 0.70 0.80 0.90
As shown in Fig. 12 (a), the output current ripple Δiout Duty ratio Dup
decreased. The measured output current ripple Δiout was Fig. 13 Experimental, simulation, and theoretical characteristics of
320 [mA], while the theoretical output current ripple Δiout step up ratio Į as functions of duty ratio Dup.
is 313 [mA]. As shown in Fig. 12 (b), the output voltage
VoL was constant. The measured output voltage VoL was
0.50
4.86 [V], while the theoretical output voltage VoL is
Input current ripple Δiin [A]

5.00[V]. 0.40
Fig. 13 shows the experimental, simulation, and the-
oretical characteristics of the step up ratio α as functions 0.30

of the duty ratio Dup. As shown in Fig. 13, the 0.20

experimental and simulation characteristics were lower Theoretical value
than the theoretical characteristics from the duty ratio Dup 0.10 Simulation value
= 0.85 - 0.90. It is considered to be the influence of ESRs. Experimental value
0.00
Fig. 14 shows the experimental, simulation, and theo- 0.50 0.60 0.70 0.80 0.90
retical characteristics of the input current ripple Δiin as Duty ratio Dup
functions of the duty ratio Dup. As shown in Fig. 14, the
Fig. 14 Experimental, simulation, and theoretical characteristics of
experimental and simulation characteristics agreed with input current ripple Δiin as functions of duty ratio Dup.
the theoretical characteristics.
Fig. 15 shows the experimental, simulation, and theo- etical characteristics of the output current ripple Δiout as
retical characteristics of the step down ratio β as func- functions of a duty ratio Ddown. As shown in Fig. 16, the
tions of a duty ratio Ddown. As shown in Fig. 15, the experimental and simulation characteristics were higher
experimental and simulation characteristics were lower than the theoretical characteristics, which could be caused
than the theoretical characteristics. It is also considered to by the difference of the inductances L1 and L2.
be the influence of ESRs. Fig. 17 shows the power conversion efficiency in the
Fig. 16 shows the experimental, simulation, and theor- step up conversion. As shown in Fig. 17 the maximum

307
power conversion efficiency was 97.5 [%] at the duty 100.0

Power conversion efficiency [%]

ratio Dup = 0.65.
Fig. 18 shows the power conversion efficiency in the 98.0

step down conversion. As shown in Fig. 18, the 96.0

maximum power conversion efficiency was 97.4 [%] at
the duty ratio Ddown = 0.30. Also, the experimental value 94.0 Simulation value
decreased from the duty ratio Ddown = 0.10 - 0.20, which Experimental value
could be caused by the iron loss. 92.0

90.0
VII. CONCLUSIONS 0.10 0.20 0.30 0.40 0.50
Duty ratio Ddown
This paper proposed bidirectional operation of the
IBCPS. The operational principles and the theoretical Fig. 18 Power conversion efficiency in step down conversion.
analysis have been verified and confirmed by simulation
and circuit experiment. The IBCPS has a higher voltage
gain and a lower input current ripple than the IBC in step REFERENCES
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than the IBC in step down conversion. voltage gain”, in Proc. 2009 IEEE Energy Conversion
Congr. Exposition., pp. 60-66, Sep. 2009.
0.25
[2] J. Chae, H. Cha, and H. G. Kim, “Analysis and design of
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Step down ratio ȕ

0.15
interleaved boost converter in fuel cell hybrid electric
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Theoretical value
0.05 [4] X. Hu, and C. Gong, “A high gain input-parallel output-
Simulation value
Experimental value series DC/DC converter with dual coupled-Inductors,” IEEE
0.00 Trans. Power Electron., vol. 30, no. 3, pp. 1306-1317, Mar.
0.00 0.10 0.20 0.30 0.40 0.50 2015.
Duty ratio Ddown [5] IRFB4410pdf date-sheet. [Online]. Available:
http://www.irf.com/product-info/datasheets/data/
Fig. 15 Experimental, simulation, and theoretical characteristics of
step down ratio ȕ as functions of duty ratio Ddown. irfs4410.pdf

0.40
0.35
Output current ripple Δiout [A]

0.30
0.25
0.20
0.15
0.10 Theoretical value
Simulation value
0.05 Experimental value
0.00
0.00 0.10 0.20 0.30 0.40 0.50
Duty ratio Ddown

Fig. 16 Experimental, simulation, and theoretical characteristics of

output current ripple Δiout as functions of duty ratio Ddown.

100.0
Power conversion efficiency [%]

98.0

96.0

94.0 Simulation value

Experimental value
92.0

90.0
0.50 0.60 0.70 0.80 0.90
Duty ratio Dup

Fig. 17 Power conversion efficiency in step up conversion.

308