Seminar Report Interleaved Buck Converter Having Low Switching Losses &

Improved Step-Down Conversion Ratio

1. INTRODUCTION

A basic buck converter converts a DC voltage to a step down DC voltage.

Interleaving adds additional benefits such as reduced ripple currents in both the input and
output circuits. Higher efficiency is realized by splitting the output current into two paths,
substantially reducing losses and inductor AC losses In the field of power electronics,
application of interleaving technique can be traced back to very early days, especially in
high power applications. In high power applications, the voltage and current stress can
easily go beyond the range that one power device can handle. Multiple power devices
connected in parallel and/or series could be one solution. However, voltage sharing
and/or current sharing are still the concerns. Instead of paralleling power devices,
paralleling power converters is another solution which could be more beneficial. Benefits
like harmonic cancellation, better efficiency, better thermal performance, and high power
density.
In applications where non-isolation, step-down conversion ratio, and high
output current with low ripple are required, an interleaved buck converter (IBC) has
received a lot of attention due to its simple structure and low control complexity.
However, in the conventional IBC, all semiconductor devices suffer from the input
voltage, and hence, high-voltage devices rated above the input voltage should be used.
High-voltage-rated devices have generally poor characteristics such as high cost, high on-
resistance, high forward voltage drop, severe reverse recovery, etc. In addition, the
converter operates under hard switching condition. Thus, the cost becomes high and the
efficiency becomes poor. And, for higher power density and better dynamics, it is
required that the converter operates at higher switching frequencies. However, higher
switching frequencies increase the switching losses associated with turn-on, turn-off, and
reverse recovery. Consequently, the efficiency is further deteriorated. Also, it experiences
an extremely short duty cycle in the case of high-input and low-output voltage
applications.
To overcome the aforementioned drawbacks of the conventional IBC,
some pieces of research for reducing the voltage stress of a buck converter and several
kinds of IBCs have been presented until now. This proposed interleaved buck converter
(IBC) has low switching losses and improved step-down conversion ratio, which is

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Seminar Report Interleaved Buck Converter Having Low Switching Losses &
Improved Step-Down Conversion Ratio

suitable for the applications where the input voltage is high and the operating duty is
below 50%. It is similar to the conventional IBC, but two active switches are connected
in series and a coupling capacitor is employed in the power path. The two active switches
are driven with the phase shift angle of 180◦ and the output voltage is regulated by
adjusting the duty cycle at a fixed switching frequency.
Since the proposed IBC also operates at CCM, the current stress is low.
During the steady state, the voltage stress across all active switches before turn-on or
after turn-off is half of the input voltage. Thus, the capacitive discharging and switching
losses can be reduced considerably. The voltage stress of the freewheeling diodes is also
lower than that of the conventional IBC so that the reverse-recovery and conduction
losses on the freewheeling diodes can be improved by employing schottky diodes that
have generally low breakdown voltages. The conversion ratio and output current ripple
are lower than those of the conventional IBC.

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Seminar Report Interleaved Buck Converter Having Low Switching Losses &
Improved Step-Down Conversion Ratio

2. OVERVIEW OF PROPOSED CONVERTER

An Interleaved Buck Converter is commonly used in high power

applications where the voltage and current stress can easily go beyond the range that one
power device can handle. In conventional IBC more than one power devices are
connected in parallel as shown in Fig. 1.

Fig. 1 Conventional IBC

However, in the conventional IBC shown in Fig. 1, all semiconductor

devices suffer from the input voltage, and hence, high-voltage devices rated above the
input voltage should be used. High-voltage rated devices have generally poor
characteristics such as high cost, high on-resistance, high for-ward voltage drop, severe
reverse recovery, etc. In addition, the converter operates under hard switching condition.
Thus, the cost becomes high and the efficiency becomes poor. And, for higher power
density and better dynamics, it is required that the converter operates at higher switching
frequencies . However, higher switching frequencies increase the switching losses
associated with turn-on, turn-off, and reverse recovery. Consequently, the efficiency is
further deteriorated. Also, it experiences an extremely short duty cycle in the case of
high-input and low-output voltage applications.
The new IBC shown in Fig. 2, is suitable for the applications where the
input voltage is high and the operating duty is below 50%. It is similar to the
conventional IBC, but two semiconductor switches are connected in series and a coupling
capacitor is employed in the power path. The two active switches are driven with the
phase shift angle of 180° and the output voltage is regulated by adjusting the duty cycle

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Seminar Report Interleaved Buck Converter Having Low Switching Losses &
Improved Step-Down Conversion Ratio

at a fixed switching frequency. Since the proposed IBC also operates at CCM, the current
stress is low.

Fig. 2 Proposed IBC

During the steady state, the voltage stress across all active switches before
turn-on or after turn-off is half of the input voltage. Thus, the capacitive discharging and
switching losses can be reduced considerably. The voltage stress of the freewheeling
diodes is also lower than that of the conventional IBC so that the reverse-recovery and
conduction losses on the freewheeling diodes can be improved by employing schottky
diodes that have generally low breakdown voltages, typically below 200 V. The
conversion ratio and output current ripple are lower than those of the conventional IBC.

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Seminar Report Interleaved Buck Converter Having Low Switching Losses &
Improved Step-Down Conversion Ratio

3. CIRCUIT ANALYSIS

The active switches Q₁ and Q₂ are driven with a phase shift angle of 180°.
Each switching period is divided into four modes. Inorder to illustrate the operation of
proposed IBC, some assumptions are made as follows:

 The output capacitor Cо is large enough to be considered as a voltage source

 The two inductors L₁ and L₂ have the same inductance L
 All power semiconductors are ideal
 The coupling capacitor CB is large enough to be considered as a voltage
source

Fig. 3 Proposed IBC with voltage polarities

3.1 STEADY STATE OPERATION WHEN D ≤ 0.5

Mode 1 (t₀ – t₁) :
Mode 1 begins when Q₁ is turned ON at t₀. Then the current of L₁, iL₁(t),
flows through Q₁, CB, and L₁ and the voltage of the coupling capacitor VCB is charged.
The current of L₂ , iL₂ (t), freewheels through D₂. During this mode, the voltage across L₁,
VL₁(t), is the difference of the input voltage VS, the voltage of the coupling capacitor VCB,
and the output voltage Vо, and its level is positive. Hence, i L₁(t) increases linearly from
the initial value. The voltage across L₂ , VL₂(t), is the negative output voltage, and hence,
iL₂(t) decreases linearly from the initial value. The voltage across Q₂, VQ₂(t), becomes the
input voltage and the voltage across D1 , VD₁(t), is equal to the difference of VS and VCB.

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(a) (b)

(c)
Fig. 4 Operating circuits when D ≤ 0.5 (a) Mode 1. (b) Mode 2 or 4. (c) Mode 3.

The voltages and currents can be expressed as follows:

VL₁(t) = Vs − VCB − Vo
VL₂(t) = −Vo
Vs − VCB – Vo
iL₁(t) =
L
(t − t₀) + iL₁(t₀) = iQ₁(t) = iCB(t)

−Vo
iL₂(t) = (t − t₀) + iL₂(t₀) = iD₂(t)
L
VQ₂ = Vs
VD₁ = Vs − VCB
Io
VCB ≈ VCB(t₀) + (t − t₀)
2CB
Mode 2 (t₁ - t₂) :
Mode 2 begins when Q₁ is turned OFF at t₁. Then, iL₁(t) and iL₂(t)
freewheel through D₁ and D₂, respectively. Both VL₁ (t) and VL₂ (t) become the negative
VO, and hence, , iL₁(t) and iL₂(t) decrease linearly. During this mode, the voltage across
Q₁, VQ₁(t), is equal to the difference of VS and VCB and VQ₂(t) becomes VCB. The voltages
and currents can be expressed as follows:
VL₁(t) = VL₂(t) = −Vo

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Seminar Report Interleaved Buck Converter Having Low Switching Losses &
Improved Step-Down Conversion Ratio

Vo
iL₁(t) = iL₁(t1 ) − (t − t₁) = iD₁(t)
L
Vo
iL₂(t) = iL₂(t1 ) − (t − t₁) = iD₂(t)
L
VQ₁(t) = Vs − VCB
VQ₂(t) = VCB.
Mode 3 (t₂ – t₃) :
Mode 3 begins when Q₂ is turned ON at t₂. At the same time, D₂ is turned
OFF. Then, iL₁(t) freewheels through D₁ and iL₂(t) flows through D₁ , CB , Q₂, and L₂.
Thus, VCB is discharged. During this mode, VL₂(t) is equal to the difference of VCB and
Vo and its level is positive. Hence, iL₂(t) increases linearly. VL₁(t) is the negative Vo, and
hence, iL₁(t) decreases linearly. The voltages and currents can be expressed as follows:
VL₁(t) = −Vo
VL₂(t) = VCB − Vo
Vo
iL₁(t) = − (t − t₂) + iL₁(t₂)
L
VCB − Vo
iL₂(t) = (t − t₂) + iL₂(t₂) = iQ₂(t) = −iCB(t)
L
iD₁(t) = iL₁(t) + iL₂(t)
VQ₁ = Vs − VCB
VD₂ = VCB
Io
VCB ≈ VCB(t₂) − (t − t₂)
2CB
Mode 4 (t₃ – t₄):
Mode 4 begins when Q2 is turned OFF at t3 , and its operation is the same
with that of mode 2.
The steady-state operation of the proposed IBC operating with the duty
cycle of D ≤ 0.5 has been described. From the operation principles, it is known that the
voltage stress of all semiconductor devices except Q2 is not the input voltage, but is
determined by the voltage of coupling capacitor VCB. The maximum voltage of Q2 is the
input voltage, but the voltage before turn-on or after turn-off is equal to VCB. As these
results, the capacitive discharging and switching losses on Q1 and Q2 can be reduced

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Seminar Report Interleaved Buck Converter Having Low Switching Losses &
Improved Step-Down Conversion Ratio

considerably. In addition, since diodes with good characteristics such as schottky can be
used for D1 and D2 , the reverse-recovery and conduction losses can be also improved.

Fig. 5 Operating Waveforms When D ≤ 0.5

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3.2 STEADY STATE OPERATION WHEN D > 0.5

Mode 1 (t₀ – t₁) :
Mode 1 begins when Q₂ is in on-state and Q₁ is turned ON at t₀. Then, iL₁
(t) flows through Q₁ , CB , and L₁ and VCB(t) is charged. iL₂(t) flows through Q₁ , Q₂, and
L₂ . VL₁(t) is equal to the difference of VS, VCB, and VO and its level is positive. Thus,
iL₁(t) increases linearly from the initial value. VL₂(t) is equal to the difference of VS and
VO and iL₂(t) also increases linearly from the initial value. The voltages and currents can
be expressed as follows:
VL₁(t) = VS − VCB − VO
VL₂(t) = VS − VO
VD₁ = VS − VCB
VD₂ = VS
iQ₁ = iL₁(t) + iL₂(t)

iQ₂ = iL₂(t)

(a) (b)

(c)

Fig. 6 Operating circuits when D > 0.5 (a) Mode 1 or 3 (b) Mode 2 (c) Mode 4

Mode 2 (t₁ - t₂) :

Mode 2 begins when Q₂ is turned OFF at t₁. Then, iL₁(t) flows through Q₁,
CB , and L₁ and iL₂(t) freewheels through D₂. The operation during this mode is the same
with mode 1 in the case of D ≤ 0.5

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Seminar Report Interleaved Buck Converter Having Low Switching Losses &
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Fig. 7 Operating Waveforms When D > 0.5

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Mode 3 (t₂ – t₃) :

Mode 3 begins when Q₂ is turned ON at t₂ , and the operation is the same
with mode 1.
Mode 4 (t₃ – t₄):
Mode 4 begins when Q₁ is turned OFF at t₃ . Then, iL₁(t) freewheels
through D₁ and iL₂(t) flows through D₁ , CB , Q₂ , and L₂ . Thus, VCB is discharged. The
operation during this mode is the same with mode 3 in the case of D ≤ 0.5.
When D > 0.5, the voltage stress of Q₁ and D₁ is determined by VCB, but
the voltage stress of Q₂ and D₂ is determined by the input voltage. In addition, since
VL₂(t) is much larger than VL₁(t) during mode 1 or mode 3, the unbalance between iL₁(t)
and iL₂(t) occurs, as shown in Fig. 7. The current of Q₁ , iQ₁(t), is the sum of iL₁(t) and
iL₂(t) and the current of Q₂, iQ₂(t), is equal to iL₂(t) in mode 1 or mode 3. Therefore, it can
be said that switches Q₁ and Q₂ experience high current stress in the case of D > 0.5.

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Seminar Report Interleaved Buck Converter Having Low Switching Losses &
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4. RESULT ANALYSIS

4.1 DC CONVERSION RATIO

The dc conversion ratio of the proposed IBC can be derived using the
principle of inductor volt-second-balance(VSB). In the case of D ≤ 0.5, the following
equations can be obtained from the VSB of L₁ and L₂ respectively

(VS − VCB − VO )DTS = VO (1 − D)TS ...........................(1)

(VCB − VO )DTS = VO (1 − D)TS ...................................(2)

The voltage of the coupling capacitor can be obtained by substituting (2)

in (1) and is equal to half of the input voltage as follows:
VCB = VS / 2

Then, the dc conversion ratio M can be obtained as

M = VO / VS = D / 2

In the case of D > 0.5, the voltage of the coupling capacitor and the dc
conversion ratio can be obtained by the same procedure and are expressed as
VCB = VS (1 − D)
M = D²

Fig. 8 shows the curve of M of

proposed IBC. As shown, this
IBC has a higher step-down
conversion ratio than the
conventional IBC. As a result the
proposed IBC can overcome the
extremely short duty cycle, which
appears in the conventional IBC.

Fig. 8 DC Voltage Conversion Ratio

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4.2 INDUCTOR CURRENT RIPPLE

Fig. 9 shows the voltage and current waveforms of the output inductor of
the buck converter. From the figure, the current ripple can be expressed as follows:
𝑉𝑘1 𝑉𝑘2
Δi ripple = DkTS or (1 − Dk )TS
L L

In the case of D ≤ 0.5, the parameters for the

proposed IBC are as follows:
Vk1 = 0.5VS − VO, Vk2 = VO, Dk = D
The parameters for the conventional IBC can
be expressed as
Vk1 = VS − VO, Vk2 = VO, Dk = 0.5D
Then, the current ripple ratio N of both IBCs
can be obtained as follows:

Δ𝑖ripple proposed 1−𝐷 Fig. 9 Voltage & Current Waveforms of inductor

N= =
Δ𝑖ripple conventional 1 − 0.5𝐷

In the case of D > 0.5, N can be obtained by the same procedure as follows:

1
N=
1+𝐷
Fig. 10 shows the curve of N. As shown in Fig. 10, the current ripple ratio
is smaller than unity. Therefore, it can be said that the proposed IBC has a smaller current
ripple than the conventional IBC. Consequently, for the given current ripple specification,
the inductors with a smaller inductance can be used in the proposed IBC, which results in
a faster transient response.

Fig. 10 Current Ripple Ratio of proposed & conventional IBC

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4.3 COUPLING CAPACITOR

The voltage across the coupling capacitor is equal to half of the input
voltage when the operating duty cycle D is smaller than or equal to 0.5, but decreases
linearly as D increases over 0.5. As a result, the voltage stress of Q₁ increases to the input
voltage. Fig. 11 shows the voltage of coupling capacitor when input voltage is 200V.

1 𝑡₁ 𝐼𝑜𝐷
ΔVCB = ∫ iCB(t)dt =
𝐶𝐵 𝑡₀ 2𝐶𝐵𝑓𝑠

A capacitor with low capacitance is

used for CB , the voltage ripple can
be reduced by increasing the
switching frequency.

Fig. 11 Voltage of Coupling Capacitor

4.4 STRESS ANALYSIS

For stress analysis, it is assumed that the IBC operate with the duty cycle
of D ≤ 0.5. The results of stress analysis can be summarized as in Table 1.

Table 1: Stress Analysis Result at Steady State

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Seminar Report Interleaved Buck Converter Having Low Switching Losses &
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5. SIMULATION RESULTS

The proposed and conventional IBCs are simulated using the software
‘MATLAB/Simulink version R2013a’ with the specifications shown below.

 Input voltage = 200V

 Duty ratio = 0.4
 Load resistance = 10Ω
 Switching frequency = 300kHz
 Inductance = 5mH
 Capacitance = 10μF

5.1 SIMULATION OF CONVENTIONAL IBC

Conventional IBC is simulated and Fig.12 shows the simulink diagram.

Fig.12 : Simulink diagram of conventional IBC

Fig.13 shows the output voltage and current waveforms of conventional

IBC. Fig.14 and Fig.15 are the losses in semiconductor switch and diode respectively.

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Fig.13 : Output voltage and current of conventional IBC

Fig.14 : Losses in semiconductor switch

Fig.15 : Losses in diode

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Seminar Report Interleaved Buck Converter Having Low Switching Losses &
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5.2 SIMULATION OF PROPOSED IBC

Fig.16 shows the simulink diagram of the proposed IBC circuit.

Fig.16 : Simulink diagram of proposed IBC

Fig.17 shows the output voltage and current waveforms of the proposed
IBC. Fig.18 and Fig.19 show the losses in semiconductor switches and diodes
respectively.

Fig.17 : Output voltage and current of proposed IBC

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Fig.18 : Losses in semiconductor switches

Fig.19 : Losses in diodes

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6. CONCLUSION

The new IBC proposed here, not only keeping the good characteristics of
the conventional IBC but also providing some advantages. The main advantage of the
proposed IBC is that since the voltage stress across active switches is half of the input
voltage before turn-on or after turn-off when the operating duty is below 50%, the
capacitive discharging and switching losses can be reduced considerably. In addition,
since the voltage stress of the freewheeling diodes is half of the input voltage in the
steady state and can be quickly reduced below the input voltage during the cold startup,
the use of lower voltage-rated diodes is allowed. From these results, the efficiency of the
proposed IBC is higher than that of the conventional IBC and the improvement gets
larger as the switching frequency increases. Moreover, it is confirmed that the proposed
IBC has a higher step-down conversion ratio and a smaller inductor current ripple than
the conventional IBC. Therefore, the proposed IBC becomes attractive in applications
where non-isolation, step-down conversion ratio with high input voltage, high output
current with low ripple, higher power density, and low cost are required.

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REFERENCES

[1] Il-Oun Lee, Shin-Young Cho and Gun-Woo Moon, “Interleaved Buck converter
having Low Switching Losses and Improved Step-down Conversion Ratio”, IEEE
Trans. Power electron., vol.27, no.8, pp. 3664-3675, Aug. 2012
[2] D. Lakshmi, S. Zabiullah and Dr. N.M. Venugopal, “Improved Step-down
Conversion in Interleaved Buck Converter and Low Switching Losses”, Research
Inventy: International journal of Engineering and Science, vol.4, issue 3, March
2014
[3] Arya Raveendran, Geetha B and Annie P Oommen, “ A Novel Interleaved Buck
Converter with Closed Loop Control ”, International Journal of Engineering
Research and Development, Vol. 10, Issue 1, Feb. 2014

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