ELET1400 Tutorial #3 (Tuesday/Wednesday March 12 / 13, 2013)

1. With reference to the JK flip-flop in Fig. 3.1, if it is in the RESET state and the clock, J and K signals are
applied as shown, what is its corresponding waveform at Q?
i. waveform a
ii. waveform b
iii. waveform c
iv. waveform d

Fig. 1.11

2. When replacing digital IC’s, a similar device with the same number from any manufacturer can be used.

(a) Yes, because the devices are the same if the numbers are the same
(b) No, the specifications must be checked from the manufacturer’s data sheet as there might be
differences even though the pin out’s are the same
(c) Yes, because small differences will not affect the circuit operation
(d) No, because all similar IC’s must be from the same manufacturer.

3. Which of the following is correct for the circuit in Fig. 1.12 below?
(a) The pulse width of the output pulse is equal to the pulse width of the trigger pulse.
(b) The pulse width of the output pulse is 100 milliseconds
(c) The pulse width of the output pulse is 70 milliseconds
(d) The pulse width of the output pulse is 100 seconds
 Fig. 1.12

4. Which of the following is FALSE for edge triggered flip flops?

(a) Flip Flops may be triggered from the positive edge of the clock
(b) Flip Flops may be triggered from the negative edge of the clock
(c) Flip flops may be triggered from a single pulse
(d) Flip flops can only be triggered by a 50% duty cycle waveform
5. Which of the following memory cells is NOT non-volatile

(a) DRAM
(b) PROM
(c) EEPROM
(d) Flash

6. The storage cell in a SRAM is:

(a) a D-type flip/flop

(b) a capacitor
(c) a fuse
(d) a MOS transistor

7. A 3-input AND gate is used to trigger an alarm when its output is high. The inputs of the AND gate are
driven by sensors with outputs as shown below. When does the alarm activate?

(a) only on the second pulse of sensor 1

(b) every time the output of sensor 3 goes high
(c) on the first, second and third pulse of the output of sensor 2
(d) every time all three sensor output goes high
Section 2:

1. Fig.4.b shows two negative edge triggered J-K Flip flops connected together to control a LED. Each flip
flop is initially in the reset state. If the clock input is obtained from triggering a monostable 555 timer circuit
(as shown), answer the following:

a. Neglecting propagation delay, how long after triggering the 555 timer before the LED light goes off?
b. Determine the rate at which the LED light will turn on and off when the 555 timer is triggered once
per minute.

Fig. 2.1

2. Design a circuit that will generate a 1 kHz output signal with variable Duty Cycle from an 8 kHz input TTL
signal. The Duty Cycle must vary in accordance with a 2-bit input code as shown in the Table below.

B A Duty Cycle

0 1 25%

1 0 50%

1 1 75%