Gate driver circuits

Anandarup Das
Asst. Professor
Room-402A, Department of Electrical Engineering, IIT Delhi.
anandarup@ee.iitd.ac.in
Content
• Gate driver for IGBT/MOSFET
• Bootstrap circuit design example

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 2

 Purpose of gate driver circuit
• The gate drive circuit helps in
• amplifying the control signal from the microcontroller by boosting up the voltage and
current to an adequate level.
• providing isolation between the low voltage side microcontroller and the high voltage
side of the power circuit.
• switching on/off of the power device; it also controls the losses in the device during
switching as well as steady conduction states.
• providing protection features like overcurrent shutdown, over temperature monitoring,
under-voltage lockout etc.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 3

MOSFET/IGBT based gate drivers
• The optocoupler provides isolation
between control side and power side.
• Transformer based isolation is also
possible.
• The microcontroller usually cannot
provide high values (several Amperes)
to the gate drive circuit.
• So, buffer stages are usually used.
• Totem pole drivers using BJTs or
MOSFETs are used.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 4

Characteristics
• Two characteristics are useful to understand the behaviour of any power
device.
• Static characteristic
• Switching characteristic
• Both these are controlled by the gate driver circuit.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 5

Static characteristics IGBT
• The static (or ON state) characteristics is
useful because it tells us the power loss
when the device is fully turned on.
• The on state Vce is important here. VceON in
IGBTs should be low to ensure low power
losses when ON.
• VceON is a function of VGE. VGE=15V is a good
starting point.

Data taken from datasheet of SKM300GB12E4

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA
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 Static characteristics MOSFET
• In a similar way, RDSON in MOSFETs should be low to ensure low power
losses during ON state.

Low RDSON 46A MOSFET

High RDSON 9A MOSFET

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 7

MOSFET/IGBT switching characteristics
• The input gate side of IGBT has a similar MOS
structure like that of a MOSFET and hence IGBT and
MOSFET gate drive circuits are very similar.
• The difference is the dynamic latch up that can
occur in IGBTs during turn off, to be discussed.
• The input side capacitances (CGS and CGD for MOSFET
and CGE and CGC for IGBT ) are important parameters
that control the dynamics of the switching process
in these devices.
• The capacitances are dependent on the geometry of
the device and are nonlinear in nature (changes
with the voltage across them), especially CGD /CGC.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 8

Components used in driver circuit

Driver side

Power device/s

• The left side shows the driver circuit, often available nowadays in an IC (e.g.
Skyper32, ACPL337J etc.).
• Some external components are required, most notably the gate resistance Rgate.
• RGI is the internal gate resistance (~1-2 ohm), VDD and RHI are the voltage applied
and internal resistance of the MOSFET totem pole output.
ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 9
Components used in driver circuit

Driver side

Power device/s

• Bipolar supply (i.e. +VDD and -VEE) are often used.

• It gives faster turn off and immunity against spurious turn on.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 10

Turn on in IGBT

• The turn on process in IGBT takes place in four stages. At first, CGE is charged to VTH (e.g.
5V). This period is also called turn on delay (tdon).
• Beyond threshold voltage, the IGBT starts to conduct current. This is the linear region
of IGBT, also denoted by tri. Both VGE and Ic rises linearly. VCE is not falling because the
other device in the circuit (e.g. lower diode in half bridge) is still conducting.
ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 11
Turn on in IGBT

• Once the IGBT conducts, the gate driver sees an input capacitance CISS=CGE+CGC.
• At the third stage, the VCE voltage starts to fall. The capacitor CGC is rapidly
discharging. The entire gate current is utilized in discharging CGC. It is called the
Miller plateau region.
• Observe that CGC was charged to DC bus voltage before this time.
ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 12
Turn on in IGBT

• At the fourth stage, VGE rises to a higher voltage close to applied voltage VDD. (e.g. 15V:
good design practice).
• The final VCE of the IGBT depends on the final VGE that gets impressed. Too high VCE will
cause a high current during short circuit. Too low VCE will cause higher conduction losses
after turn on.
• The gate current is almost zero after the IGBT has fully turned on.
ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 13
Turn on in IGBT

• As the device turns on, it moves from cutoff region to active region, and
then to saturation region.
• The turn on process is similar in MOSFET.
ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 14
 Gate current required

• How much current do we need to turn on/off the IGBT within a given time?
• Note that the main turn on losses take place in stage 2 and 3, so that part is
most crucial.
ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 15
Gate current during turn on

(𝑉𝐷𝐷 −𝑉𝐸𝐸 ) (15−(−5))

• In stage 1, IG1 = = = 3.63𝐴.
𝑅𝐻𝐼 +𝑅𝐺𝑎𝑡𝑒 +𝑅𝐺𝐼 1+2+2.5
1 1
(𝑉𝐷𝐷 )−2(𝑉𝐺𝐸𝑚𝑖𝑙𝑙𝑒𝑟 +𝑉𝑇𝐻 ) (15)−2(10+6)
• In stage 2, IG2 = = = 1.27𝐴.
𝑅𝐻𝐼 +𝑅𝐺𝑎𝑡𝑒 +𝑅𝐺𝐼 1+2+2.5
(𝑉𝐷𝐷 )− 𝑉𝐺𝐸𝑚𝑖𝑙𝑙𝑒𝑟 (15)−10
• In stage 3, IG3 = = = 0.9 𝐴
𝑅𝐻𝐼 +𝑅𝐺𝑎𝑡𝑒 +𝑅𝐺𝐼 1+2+2.5
ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 16
 Timing

𝑉𝐺𝐸𝑚𝑖𝑙𝑙𝑒𝑟 −𝑉𝑇𝐻
• Approximate time required in stage 2, t 2 = × 𝐶𝐼𝑆𝑆
𝐼𝐺2
𝑉𝐺𝐸𝑚𝑖𝑙𝑙𝑒𝑟
• Approximate time required in stage 3, t 3 = × 𝐶𝐺𝐶
𝐼𝐺3

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 17

VGE versus QG for an IGBT
• Another way to know the average gate current
required is to look into the gate charge profile.
• During the whole process of turn on/off, we
need to inject/retrieve certain amount of
charge to/from the gate terminals. During red
portion, CGE is charging. During blue portion,
CGC is discharging (Miller plateau).
• More charge is required if blocked VCE is higher,
since CGC is charged to a higher voltage.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 18

VGE versus QG for an IGBT
• In this curve, the IGBT requires 1250nC with
VGE=10V for VCE=600V and 300A current (point A).
B . • But it requires 1750nC with VGE=15V (point B).
.
A
• If the IGBT is switched within 200ns, then
QG 1250−400
• IG = = = 4.25 𝐴
𝑡𝑜𝑛 200

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 19

Turn off in IGBT

• The reverse process happens during turn off.

• First, the capacitances (CISS=CGE+CGC) discharges from its initial value to the
Miller plateau level.
ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 20
Turn off in IGBT

• Next, the collector to emitter voltage starts to rise to the blocking voltage
level. The gate current during this time is charging CGC.
• At the third interval, CGE starts discharging. VGE starts to decrease further.
ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 21
Turn off in IGBT

• At the last stage, VGE is reduced to zero, or a negative value. The IGBT now turns off.
Recommended value is -5V.
• A negative value helps to reduce the time of the tail current. It also helps in preventing
spurious turn on of the IGBT (to be discussed).
ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 22
Power loss in gate driver
• How much is the power loss during turn on in the gate driver circuit?
• The power loss in gate driver circuit is 𝑃𝑙𝑜𝑠𝑠 = 𝑄𝐺 𝑉𝐷𝐷 + 𝑉𝐸𝐸 𝑓𝑆 .
• If the IGBT switches at 10 kHz, QG=1700 nC and VDD +VEE =(15+5)V, then
Ploss=340 mW.

• The power loss in the gate driver IC is

𝑅𝐻𝐼
𝑃𝑙𝑜𝑠𝑠 ×
𝑅𝐻𝐼 +𝑅𝐺𝑎𝑡𝑒 +𝑅𝐺𝐼

• A similar power loss will take place

during turn off.
ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 23
 RGon and RGoff
• For IGBTs rise time, fall time, and delays
between turn on and turn off are usually
different, and thus require separate
consideration.
• e.g. SKM300GB12E4 (IGBT) 𝑡𝑜𝑛 =
260𝑛𝑠 𝑎𝑛𝑑 𝑡𝑜𝑓𝑓 = 550𝑛𝑠
• So we need different gate resistance during
Turn-ON and Turn-OFF process
• Usually RGon is taken about two times RGoff .

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 24

Selecting the Gate Resistor(RG)
• With change in gate resistance we can have multiple effects and hence has to be
selected carefully.

• Low gate resistance will

• Increase the gate current and hence faster turn on.
• Increase the chances of high dv/dt across the device
• Radiated EMI increases

• High gate resistance will

• Decrease the gate current and hence more switching losses.
• Decrease surge voltage on gate emitter terminal

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 25

Summary of turn on and off a device
• The lengths of all the four intervals in turn on and off process are functions
of the capacitances, the required voltage change across them and the
available gate drive current.
• This shows the importance of proper gate drive design for high frequency
switching applications.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 26

Additional considerations
• Some additional considerations need to be kept in mind while designing
gate driver circuits.
• Ringing due to parasitic inductance
• Parasitic turn on
• dv/dt protection

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 27

Ringing due to parasitic components
• The PCB wiring inductance is one important parasitic
inductance in the gate drive circuit.
• Another inductance is present inside the device due
to e.g. bond-wires, interconnection etc.
• It can cause oscillatory spikes in the gate circuit
(overshoot) and can also delay the turn on or turn off
process.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 28

Ringing due to parasitic components
• Wider PCB traces and close proximity to the power
device can reduce the parasitic inductance.
• Twisting the gate emitter wires reduce the loop.
• To reduce ringing further, additional gate resistance
can be included in the gate circuit.
• Smaller resistance means higher chances of ringing and
more overshoot but faster turn on.
• Larger resistance means overdamped response but
slower turn on. Efficiency goes down.
• Use Kelvin source in high switching MOSFET to
reduce parasitic inductance.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 29

Kelvin Source
• Kelvin source are used often in high
switching frequency MOSFETs.
• Due to parasitic inductance (Lsource) inside
the body of the device, the turn on process
in the MOSFET gets slower causing more
losses, as the gate source voltage reduces
due to parasitic inductance.
𝑑𝑖
• 𝑉𝐺𝑆 = 𝑉𝐷𝑅𝑉 − 𝑉𝐿𝑆 = 𝑉𝐷𝑅𝑉 − 𝐿
𝑑𝑡
• The Kelvin source is an additional terminal
available in the device.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 30

Parasitic turn on
• Suppose the IGBT is in the process of turning
off.
• A high dv/dt appears across collector-emitter.
• CGC starts to conduct and the current is given
by, CGC .dVCG/dt.
• This flows through RG and causes VGE to go up.
• The device can accidentally turn on or delay the
turn off process.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 31

Negative VGS during turn off
• Parasitic turn on phenomenon could get
more critical if one takes the
temperature drift of the gate-emitter
voltage threshold into account.
• A negative turn-off gate voltage can help
in this situation and keeps the IGBT in
off-state.
• Usually it is recommended for VGE vary
from +15V to (-5 to -8V).
• Another solution is to lower RGoff.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 32

Additional consideration
• The resistance RGE (about 10k) is often
recommended.
• It prevents unintentional charging of the
gate emitter capacitance when gate
voltage builds up without gate pulses.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 33

Power to gate driver board
• In many high power multilevel converters, gate driver boards are not
separately powered from an external source.
• They are powered from the DC link.
• Isolated DC-DC converters e.g. a flyback converter may be used.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 34

A picture of gate driver circuit

3 cm

4 cm

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 35

Bootstrap circuit
• This gate drive technique can be
implemented for half bridge or
similar structure.
• It requires one source for driving two
switches.
• Rboot limits the current.
• Dboot limits the reverse flow of the
current from Cboot.
• Generally Rboot, Cboot, and Dboot are
given externally.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 39

Bootstrap circuit
• When Q3 is on, lower transistor T2 is on.
Cboot charges up to VDD.
• The upper transistor T1 can be turned on by
making Q1 on. Cboot discharges through Q1
and provides the required gate charge to T1.
• Cboot should not discharge much to keep VGE
of T1 a high value.
• In the next cycle, Cboot charges up to VDD
through Rboot .
• When T1 is on, there is a path of current to
flow through Rboot and VDD. Dboot prevents
this from happening.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 40

Bootstrap circuit component design
• Cboot will be charged to {VDD – drop across (Rboot+ Dboot)+
drop in T2)}.
• Cboot should not discharge much.
• The bootstrap capacitor can be calculated by,
CBS = Idis*t/  VBS
t = maximum on pulse width of high side IGBT
 VBS = the allowable discharge voltage of the CBS
Idis = average gate charging current of T1

The capacitance is selected to be 2-3 times higher than

the calculated one.
The CBS is only charged when lower side IGBT is on, so
on-time of lower side IGBT must be sufficient to ensure
that the CBS is fully charged.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 43

Bootstrap circuit design example
Example design of bootstrap circuit components for IPM IGCM15F60GA:
• If DC-link voltage rating = 600 V.
• Rating of Dboot is equal to DC voltage = 600 V
• Value of Rboot can be taken in 20 - 40 .
• Let, Idis = 1mA and  VBS = 0.1V and if fswitching = 10 kHz

𝐼𝑑𝑖𝑠 × Δ𝑡 𝐼𝑑𝑖𝑠 1𝑚𝐴

𝐶𝐵𝑆 = = = = 1𝜇𝐹
Δ𝑉𝐵𝑆 𝑓𝑠𝑤𝑡𝑖𝑐ℎ𝑖𝑛𝑔 × Δ𝑉𝐵𝑆 10 × 103 × 0.1

• So, the bootstrap capacitor value can be selected approximately = 2 - 3 μF

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 44

Value of bootstrap capacitor as a function of switching
frequency

Generally the manufacturers give a recommended bootstrap capacitance for a continuous sinusoidal modulation
method for a range of switching frequencies.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 45

Features of Gate driver
• Gate Drivers available in the market perform several jobs:
• Isolation
• CMTI
• Under-voltage lockout
• Desaturation detection with soft-shutdown protection

• ACPL33J, Skyper32 etc. are some of the available gate drivers.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 46

 Isolation
• Isolation is important for system reliability and human safety.
• An isolation electrically isolates circuitry from low voltage gate side to the
high voltage power side by having separate grounds.
• This provides safety to the personnel involved and also protects the control
circuit during short circuits in the power circuit.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 47

Isolation
• Three main types of electrical isolation : Optical, magnetic and
Capacitive.

• The main considerations when choosing the right kind of isolation

barrier are the isolation level and CMTI rating.

Gate side Power side

Gate side Power side

Fig. Optical isolation Fig. Magnetic isolation

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 48

Common mode transient immunity (CMTI)
• High power switches e.g. SiC MOSFETs can change
voltage within hundreds of nanoseconds.
• This generates very large voltage transients, in the
order of several hundred volts/ns.
• The isolation barrier in the gate driver circuit is not
ideal and there always exist parasitic capacitance
between the control and power grounds.
• It can cause current to flow which results in jitter in the
gate drive voltage.
• In the worst case, shoot through fault can happen.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 49

Common mode transient immunity (CMTI)
• A quantitative measure for the gate driver circuit
against such common mode noise is CMTI.
• Thus, the driver needs to be able to withstand CMTI
above the rated level to prevent noise on the low-
voltage circuitry side.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 50

How to choose Gate driver’s CMTI

• VDC=400V, transition time=70ns so CMTI=5.71KV/µs

• So we will use a Gate driver having CMTI higher than 5.71KV/µs for this
application.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 51

Under Voltage Lockout (UVLO)
• We have seen earlier that if the VGE gate voltage goes down, the losses in the IGBT will
increase.
• Hence, UVLO pin in the gate driver IC monitors the gate driver voltage to make sure
that the voltage remains above a certain threshold.
• The threshold voltage may be set at 13.7 V for a 15V supply.
• Transient noise can generate a false UVLO signal. To avoid this, UVLO pin outputs have
passive pull-up resistors and filtering capacitor.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 52

Short Circuit Protection
• Short circuits can occur due to many unforeseen circumstances during operation of the
converter.
• Short-circuit currents can cause large heat dissipation and hotspots.
• Thus, it is necessary to use protection circuits to detect when a short circuit occurs and
subsequently shut down the power devices before a failure.

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 DESAT Short Circuit Protection
• When the IGBT de-saturates, it moves from saturation region
to active region.
• When short circuit current flows, VCE continues to increase.,
reaching up to 7-10 V.
• Protection circuits are designed to detect this transition,
usually IGBTs are shut down within 10 us.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 54

 DESAT Short Circuit Protection
• During normal operation, VDESAT > VCE
• When VDESAT < VCE, the DESAT is triggered.
• The circuit will then safely shut down.

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 Short circuit protection for MOSFETs

• For MOSFETs a different strategy to detect short circuit is adopted.

• The IGBT limits the power dissipated because the current saturates but in MOSFET, the
current continues to increase, causing the device breakdown at faster rate due to high
power dissipation.
• The Desaturation voltage for an IGBT is typically 7 V- 10 V while for MOSFET there is no
clearly defined region.

ANANDARUP DAS, INDIAN INSTITUTE OF TECHNOLOGY, DELHI, INDIA 56

Short circuit or over current protection for MOSFETs
• Shunt resistors methods are used for short circuit
or overcurrent protection in MOSFETs The shunt
resistor values are usually in milliohms range.

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