INSTRUCTION DIVISIO

3rd SEMESTER 2020-2021

Course Handout

In Addition to part-I (General Handout for all courses appended to the time table)
this portion gives further specific details regarding the course

Course No. : BTEC-301-18

Course Title : ELECTRONIC DEVICES
Instructors : Er. Malika Arora, (E-mail) malika.j540@cgc.ac.in

1. Scope and Objective:

This is one of the fundamental course of Electronics branch which is design to
familiarize the students with the principal of operation, analysis, design and fabrication
of junction diode, BJT and FET transistors

By the end of the course, Students are expected to:

1. Students will be able to understand physics of semiconductors and behavior of
charge carriers within semiconductors
2. Students will be able to illustrate the working of different types of diodes, operation
and its characteristics
3. Students will be able to analyze the design & working of BJT and MOSFET with
their equivalent small signal models
4. Students will be able to understand the fabrication process of integrated circuits.

2. Text and References

Text Book:
T1: Electronic Devices and Circuits by Sanjeev Gupta

References:
R1: G. Streetman, and S. K. Banerjee, Solid State Electronic Devices, Pearson
R2: D. Neamen, D. Biswas, Semiconductor Physics and Devices, McGraw-Hill Education
R3: S. M. Sze and K. N. Kwok, Physics of Semiconductor Devices, John Wiley & Sons
R4: C. T. Sah, Fundamentals of solid state electronics, World Scientific Publishing Co. Inc.
 3. Course Plan:

3a. Modules

Modul Theme Learning Objective

e
1 Semiconductor Physics Understand physics of semiconductors and behavior of
charge carriers within semiconductors
2 Diodes Illustrate the working of different types of diodes,
operation and its characteristics
3 Transistor Analyze the design & working of BJT and MOSFET with
their equivalent small signal models
4 Fabrication Processes Understand the fabrication process of integrated
circuits.

3b. Lecture Schedule.

Lecture Module Topics Readings

1 Introduction about subject, Course Outcomes & syllabus R1, R3,T1
2 Review of quantum mechanics R1, R3,T1
3 Electrons in periodic lattices R1, R3
4,5 E-k diagrams R1, R3,T1
1
6 Energy bands in intrinsic and extrinsic silicon R1, R3,T1
7 Diffusion current, Drift current R1, R3,T1
8 Mobility and resistivity T1, T3
9 Sheet resistance R1, R3,T1
10 Design of resistors R1, R3,T1
11 Generation and recombination of carriers R1, R3
12,13 Poisson and continuity equation R1, R3
13,14 P-N junction Characteristics R1, R3
15,16 Small signal switching models R1, R3
17 Zener breakdown and Avalanche breakdown R1, R3,T1
18 Zener diode R1, R3
2
19 Schottky diode R1, R3
20 Light emitting diode R1, R3
21 Tunnel diode R1, R3
 22 Varactor diode R1, R3
23 Solar cell R1, R3
24 Rectifier Circuits R1, R3
25 Regulator Circuits R1, R3
26 Bipolar Junction Transistor R1, R3,T1
27 Working of BJT R1, R3,T1
28 V-I characteristics R1, R3,T1
29 CB Configuration R1, R3,T1
30 CE configuration R1, R3,T1
31 CC configuration R1, R3,T1
32,33 Ebers Moll Model R1, R3,T1
3
35 Field Effect Transistors R1, R3,T1
36 Working of FETs R1, R3,T1
37 Introduction to MOSFETs R1, R3
38 Construction and Working of MOSFET R1, R3
39 I-V Characteristics R1, R3
40 Depletion type MOS R1, R3
41 Enhancement Type MOS R1, R3
42 Fabrication Processes: Introduction R1, R3
43 Oxidation R1, R3
44 Diffusion R1, R3
45 Ion Implantation R1, R3
46 Annealing R1, R3
4
47 Photo lithography R1, R3
48 Etching R1, R3
49 Chemical Vapor Deposition R1, R3
50 Sputtering R1, R3
51 Twin tub CMOS Process R1, R3

3c. Practicum :

4. Evaluation
4a. Evaluation Scheme:

Component Weight age Date Remarks

Assignments (2) 7.10.2021 & 14.11.2021

Mid-Term Test 1 Open Book / Online

Mid-Term Test 2 Offline

Quiz Twice in a Month Open Book / Online

4b. Make-up Policy:

Assignments:
●No Make-up will be available for assignments. Late submissions will be
evaluated at 25% less weight for that component for a delay of upto 24%
hours after which no submissions will be accepted.
Test:
●Prior Permission of the Instructor-in-Charge is usually required to get a
make-up for a test.
●A make-up test shall be granted only in genuine cases where - in the
Instructor’s judgment - the student would be physically unable to appear
for the test. Instructor’s decision in this matter would be final.

Comprehensive Exam:
● Make-up for the comprehensive exam may be applied only with the
Associate Dean of Instruction.

4c. Fairness Policy:

- Students are expected to work within their team on assignments / project

expect where explicitly instructed / permitted otherwise.
-
 - When students are allowed to consult/discuss with other students/teams such
consultation/discussion should be explicitly acknowledged and reported to

the instructor prior to evaluation.

- When students are expected to collaborate within a team:
oIndividual contributions should be identified and documented in
qualitative and quantitative terms by each team member.
oInstructor may assess and mark each individual in a team separately.
oThe instructor’s assessment of the contributions in this matter would be
final.

5. Consultation Hours: 3hrs/week

6. Notices: All notices concerning this course will be displayed online only. If there is a need email
would be used on short notice (12 hours) – only CEC, JHANJERI email would be used.

Instructor –In- Charge

Er. MALIKA ARORA

AP - ECE