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LED LCD TV
SERVICE MANUAL
CHASSIS : LJ03R

MODEL : 55LX6500 55LX6500-SD

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL63261815 (1008-REV00) Printed in Korea


CONTENTS

CONTENTS .............................................................................................. 2

PRODUCT SAFETY ................................................................................. 3

SPECIFICATION ....................................................................................... 6

ADJUSTMENT INSTRUCTION .............................................................. 12

EXPLODED VIEW .................................................................................. 20

SVC. SHEET ...............................................................................................

Copyright LG Electronics. Inc. All right reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE


Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer, AC Volt-meter

always perform an AC leakage current check on the exposed


metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical Good Earth Ground
shock. such as WATER PIPE,
To Instrument’s CONDUIT etc.
0.15 uF
Leakage Current Cold Check(Antenna Cold Check) exposed
With the instrument AC plug removed from AC source, connect an METALLIC PARTS
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC 1.5 Kohm/10W
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc. When 25A is impressed between Earth and 2nd Ground
If the exposed metallic part has a return path to the chassis, the for 1 second, Resistance must be less than 0.1 Ω
measured resistance should be between 1 MΩ and 5.2 MΩ.
*Base on Adjustment standard
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright LG Electronics. Inc. All right reserved. -3- LGE Internal Use Only
Only for training and service purposes
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or
NOTE: If unforeseen circumstances create conflict between the exposure of the assembly.
following servicing precautions and any of the safety precautions on 3. Use only a grounded-tip soldering iron to solder or unsolder ES
page 3 of this publication, always follow the safety precautions. devices.
Remember: Safety First. 4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board 6. Do not remove a replacement ES device from its protective
module or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug or (Most replacement ES devices are packaged with leads
other electrical connection. electrically shorted together by conductive foam, aluminum foil
c. Connecting a test substitute in parallel with an electrolytic or comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective material
installation of electrolytic capacitors may result in an to the chassis or circuit assembly into which the device will be
explosion hazard. installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
2. Test high voltage only by measuring it with an appropriate high and observe all other safety precautions.
voltage meter or other voltage measuring device (DVM, 8. Minimize bodily motions when handling unpackaged
FETVOM, etc) equipped with a suitable high voltage probe. replacement ES devices. (Otherwise harmless motion such as
Do not test high voltage by "drawing an arc". the brushing together of your clothes fabric or the lifting of your
3. Do not spray chemicals on or near this receiver or any of its foot from a carpeted floor can generate static electricity
assemblies. sufficient to damage an ES device.)
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the General Soldering Guidelines
contacts with a pipe cleaner, cotton-tipped stick or comparable 1. Use a grounded-tip, low-wattage soldering iron and appropriate
non-abrasive applicator; 10 % (by volume) Acetone and 90 % tip size and shape that will maintain tip temperature within the
(by volume) isopropyl alcohol (90 % - 99 % strength) range or 500 °F to 600 °F.
CAUTION: This is a flammable mixture. 2. Use an appropriate gauge of RMA resin-core solder composed
Unless specified otherwise in this service manual, lubrication of of 60 parts tin/40 parts lead.
contacts in not required. 3. Keep the soldering iron tip clean and well tinned.
5. Do not defeat any plug/socket B+ voltage interlocks with which 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
receivers covered by this service manual might be equipped. bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
6. Do not apply AC power to this instrument and/or any of its Do not use freon-propelled spray-on cleaners.
electrical assemblies unless all solid-state device heat sinks are 5. Use the following unsoldering technique
correctly installed. a. Allow the soldering iron tip to reach normal temperature.
7. Always connect the test receiver ground lead to the receiver (500 °F to 600 °F)
chassis ground before connecting the test receiver positive b. Heat the component lead until the solder melts.
lead. c. Quickly draw the melted solder with an anti-static, suction-
Always remove the test receiver ground lead last. type solder removal device or with solder braid.
8. Use with this receiver only the test fixtures specified in this CAUTION: Work quickly to avoid overheating the circuit
service manual. board printed foil.
CAUTION: Do not connect the test fixture ground strap to any 6. Use the following soldering technique.
heat sink in this receiver. a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
Electrostatically Sensitive (ES) Devices b. First, hold the soldering iron tip and solder the strand against
Some semiconductor (solid-state) devices can be damaged easily the component lead until the solder melts.
by static electricity. Such components commonly are called c. Quickly move the soldering iron tip to the junction of the
Electrostatically Sensitive (ES) Devices. Examples of typical ES component lead and the printed circuit foil, and hold it there
devices are integrated circuits and some field-effect transistors and only until the solder flows onto and around both the
semiconductor "chip" components. The following techniques component lead and the foil.
should be used to help reduce the incidence of component CAUTION: Work quickly to avoid overheating the circuit
damage caused by static by static electricity. board printed foil.
1. Immediately before handling any semiconductor component or d. Closely inspect the solder area and remove any excess or
semiconductor-equipped assembly, drain off any electrostatic splashed solder with a small wire-bristle brush.
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
unit under test.

Copyright LG Electronics. Inc. All right reserved. -4- LGE Internal Use Only
Only for training and service purposes
IC Remove/Replacement Circuit Board Foil Repair
Some chassis circuit boards have slotted holes (oblong) through Excessive heat applied to the copper foil of any printed circuit
which the IC leads are inserted and then bent flat against the board will weaken the adhesive that bonds the foil to the circuit
circuit foil. When holes are the slotted type, the following technique board causing the foil to separate from or "lift-off" the board. The
should be used to remove and replace the IC. When working with following guidelines and procedures should be followed whenever
boards using the familiar round hole, use the standard technique this condition is encountered.
as outlined in paragraphs 5 and 6 above.
At IC Connections
Removal To repair a defective copper pattern at IC connections use the
1. Desolder and straighten each IC lead in one operation by gently following procedure to install a jumper wire on the copper pattern
prying up on the lead with the soldering iron tip as the solder side of the circuit board. (Use this technique only on IC
melts. connections).
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the 1. Carefully remove the damaged copper pattern with a sharp
IC. knife. (Remove only as much copper as absolutely necessary).
Replacement 2. carefully scratch away the solder resist and acrylic coating (if
1. Carefully insert the replacement IC in the circuit board. used) from the end of the remaining copper pattern.
2. Carefully bend each IC lead against the circuit foil pad and 3. Bend a small "U" in one end of a small gauge jumper wire and
solder it. carefully crimp it around the IC pin. Solder the IC connection.
3. Clean the soldered areas with a small wire-bristle brush. 4. Route the jumper wire along the path of the out-away copper
(It is not necessary to reapply acrylic coating to the areas). pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
"Small-Signal" Discrete Transistor excess jumper wire.
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as At Other Connections
possible to the component body. Use the following technique to repair the defective copper pattern
2. Bend into a "U" shape the end of each of three leads remaining at connections other than IC Pins. This technique involves the
on the circuit board. installation of a jumper wire on the component side of the circuit
3. Bend into a "U" shape the replacement transistor leads. board.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with 1. Remove the defective copper pattern with a sharp knife.
long nose pliers to insure metal to metal contact then solder Remove at least 1/4 inch of copper, to ensure that a hazardous
each connection. condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
Power Output, Transistor Device break and locate the nearest component that is directly
Removal/Replacement connected to the affected copper pattern.
1. Heat and remove all solder from around the transistor leads. 3. Connect insulated 20-gauge jumper wire from the lead of the
2. Remove the heat sink mounting screw (if so equipped). nearest component on one side of the pattern break to the lead
3. Carefully remove the transistor from the heat sink of the circuit of the nearest component on the other side.
board. Carefully crimp and solder the connections.
4. Insert new transistor in the circuit board. CAUTION: Be sure the insulated jumper wire is dressed so the
5. Solder each transistor lead, and clip off excess lead. it does not touch components or sharp edges.
6. Replace heat sink.

Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor

Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.

Copyright LG Electronics. Inc. All right reserved. -5- LGE Internal Use Only
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range
This specification is applied to the LCD TV used LJ03R chassis.

2. Requirement for Test


Each part is tested as below without special appointment.

1) Temperature
: 25 ºC ± 5 ºC (77 ºF ± 9 ºF), CST : 40 ºC ± 5 ºC
2) Relative Humidity : 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~ 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
BOM.
5) The receiver must be operated for about 20 minutes prior to the adjustment.

3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety: CE, IEC specification
- EMC:CE, IEC

4. General Specification(TV)
No Item Specification Remark
1 Receivable System 1) SBTVD / NTSC / PAL-M / PAL-N
2 Available Channel VHF : 02 ~ 13
UHF : 14 ~ 69
DTV : 07 ~ 69
CATV : 01 ~ 135
3 Input Voltage 1) AC 100 ~ 240V 50/60Hz
4 Market Central and South AMERICA
5 Screen Size 42 inch Wide (1920 x 1080) LX6500
47 inch Wide (1920 x 1080) LX6500, LX9500
55 inch Wide (1920 x 1080) LX6500, LX9500
6 Aspect Ratio 16:9
7 Tuning System FS
8 LCD Module LC420EUS-SCA1 42LX6500-SD
LC470EUS-SCA1 47LX6500-SD
LC550EUC-SCA1 55LX6500-SD
LC470MUT-SCA1 47LX9500-SA
LC550MUT-SCA1 55LX9500-SA
9 Operating Environment Temp : 0 ~ 40 deg
Humidity : ~ 80 %
10 Storage Environment Temp : -20 ~ 60 deg
Humidity : -85 %

Copyright LG Electronics. Inc. All right reserved. -6- LGE Internal Use Only
Only for training and service purposes
5. Chrominance & Luminance Specification
1) LJ03R

No Item Min Typ Max Unit Remark


1 Max Luminance Module 360 450 Edge LED CAS spec
(Center 1-point / 2D 350 430 cd/m2 42/47/55LX6500-SD
Full White Pattern) 2D 350 430 cd/m 2
47LX9500-SA
2D 294 368 cd/m2 55LX9500-SA
3D 48 61 cd/m 2
47LX9500-SA
3D 40 51 cd/m 2
55LX9500-SA
3D 48 61 cd/m2 42/47LX6500-SD
3D 38 51 cd/m 2
55LX6500-SD
2 Color coordinate RED X Typ. 0.642 Typ. 42LX6500-SD
Y -0.03 0.335 +0.03
GREEN X 0.308
Y 0.602
BLUE X 0.156
Y 0.061
WHITE X 0.279
Y 0.292
RED X Typ. 0.642 Typ. 47LX6500-SD
Y -0.03 0.333 +0.03
GREEN X 0.307
Y 0.605
BLUE X 0.149
Y 0.058
WHITE X 0.272
Y 0.292
RED X Typ. 0.644 Typ. 55LX6500-SD
Y -0.03 0.333 +0.03
GREEN X 0.308
Y 0.605
BLUE X 0.149
Y 0.059
WHITE X 0.279
Y 0.292

Copyright LG Electronics. Inc. All right reserved. -7- LGE Internal Use Only
Only for training and service purposes
No Item Min Typ Max Unit Remark
RED X Typ. 0.651 Typ. 47LX9500-SA
Y -0.03 0.334 +0.03
GREEN X 0.312
Y 0.598
BLUE X 0.150
Y 0.068
WHITE X 0.280
Y 0.290
RED X Typ. 0.640 Typ. 55LX9500-SA
Y -0.03 0.330 +0.03
GREEN X 0.300
Y 0.600
BLUE X 0.150
Y 0.050
WHITE X 0.280
Y 0.290
3 3D Grosstalk 10 12 % 47/55LX9500-SA
14 18 42/47/55LX6500-SD
4 Contrast ratio 1000 1300 42/47/55LX6500-SD
1000 1400 47/55LX9500-SA
5 Dynamic CR 6,000,000 7,000,000
6 Color Temperature Cool 0.267 0.269 0.271 <Test Condition>
0.271 0.273 0.275 85% Full white pattern
Medium 0.283 0.285 0.287 The W/B Tolerance is ±0.015 for
0.291 0.293 0.295 Adjustment
Warm 0.311 0.313 0.315
0.327 0.329 0.331
7 Color Distortion, DG 10.0 %
8 Color Distortion, DP 10.0 deg
9 Color S/N, AM/FM 43.0 dB
10 Color Killer Sensitivity -80 dBm

Copyright LG Electronics. Inc. All right reserved. -8- LGE Internal Use Only
Only for training and service purposes
6. Component Video Input (Y, CB/PB, CR/PR)
No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
1. 720*480 15.73 60 13.5135 SDTV ,DVD 480I
2. 720*480 15.73 59.94 13.5 SDTV ,DVD 480I
3. 720*480 31.50 60 27.027 SDTV 480P
4. 720*480 31.47 59.94 27.00 SDTV 480P
5. 720*576 15.625 50* 13.5 SDTV 576I
6. 720*576 31.25 50* 13.5 SDTV 576P
7. 1280*720 37.5 50* 74.25 HDTV 720P
8. 1280*720 45.00 60.00 74.25 HDTV 720P
9. 1280*720 44.96 59.94 74.176 HDTV 720P
10. 1929*1080 28.125 50* 74.25 HDTV 1080I
11. 1920*1080 33.75 60.00 74.25 HDTV 1080I
12. 1920*1080 33.72 59.94 74.176 HDTV 1080I
13. 1920*1080 56.25 50* 148.5 HDTV 1080P
14. 1920*1080 67.50 60 148.50 HDTV 1080P
15. 1920*1080 67.432 59.94 148.352 HDTV 1080P
16. 1920*1080 27.00 24.00 74.25 HDTV 1080P
17. 1920*1080 26.97 23.976 74.176 HDTV 1080P
18. 1920*1080 33.75 30.00 74.25 HDTV 1080P
19. 1920*1080 33.71 29.97 74.176 HDTV 1080P

8. RGB Input (PC)


No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
PC DDC
1. 640*350 31.468 70.09 25.17 EGA X
2. 720*400 31.469 70.08 28.32 DOS O
3. 640*480 31.469 59.94 25.17 VESA(VGA) O
4. 800*600 37.879 60.31 40.00 VESA(SVGA) O
5. 1024*768 48.363 60.00 65.00 VESA(XGA) O
6. 1280*768 47.776 59.87 79.50 CVT(WXGA) O
7. 1360*768 47.712 60.015 85.50 VESA(WXGA) O
8. 1280*1024 63.981 60.020 108.00 VESA(SXGA) O
9. 1600*1200 75.00 60.00 162 VESA(UXGA) O
10. 1920*1080 67.50 60 148.5 HDTV 1080P O

• RGB PC Monitor Range Limits


Min Vertical Freq - 56 Hz
Max Vertical Freq - 62 Hz
Min Horiz. Freq - 30 kHz
Max Horiz. Freq - 80 kHz
Pixel Clock - 170 MHz

Copyright LG Electronics. Inc. All right reserved. -9- LGE Internal Use Only
Only for training and service purposes
9. HDMI input (PC/DTV)
No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
PC DDC
1. 640*350 31.468 70.09 25.17 EGA X
2. 720*400 31.469 70.08 28.32 DOS O
3. 640*480 31.469 59.94 25.17 VESA(VGA) O
4. 800*600 37.879 60.31 40.00 VESA(SVGA) O
5. 1024*768 48.363 60.00 65.00 VESA(XGA) O
6. 1280*768 47.776 59.870 79.50 CVT(WXGA) X
7. 1360*768 47.712 60.015 85.50 VESA(WXGA) X
8. 1280*1024 63.981 60.020 108.00 VESA(SXGA) O
9. 1600*1200 75.00 60.00 162 VESA(UXGA) O
10. 1920*1080 67.5 60 148.5 HDTV 1080P O
DTV
1. 720*480 31.50 60 27.027 SDTV 480P
2. 720*480 31.47 59.94 27.00 SDTV 480P
3. 720*576 31.25 50* 13.5 SDTV 576P
4. 1280*720 37.5 50* 74.25 HDTV 720P
5. 1280*720 45.00 60.00 74.25 HDTV 720P
6. 1280*720 44.96 59.94 74.176 HDTV 720P
7. 1929*1080 28.125 50* 74.25 HDTV 1080I
8. 1920*1080 33.75 60.00 74.25 HDTV 1080I
9. 1920*1080 33.72 59.94 74.176 HDTV 1080I
10. 1920*1080 56.25 50* 148.5 HDTV 1080P
11. 1920*1080 67.50 60 148.50 HDTV 1080P
12. 1920*1080 67.432 59.94 148.352 HDTV 1080P
13. 1920*1080 27.00 24.00 74.25 HDTV 1080P
14. 1920*1080 26.97 23.976 74.176 HDTV 1080P
15. 1920*1080 33.75 30.00 74.25 HDTV 1080P
16. 1920*1080 33.71 29.97 74.176 HDTV 1080P

• HDMI Monitor Range Limits


Min Vertical Freq - 56 Hz Max Vertical Freq - 62 Hz
Min Horiz. Freq - 30 kHz Max Horiz. Freq - 80 kHz
Pixel Clock - 170 MHz

Copyright LG Electronics. Inc. All right reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
10. Only 3D TV(LX6500, LX9500)
1) 3D Mode (HDMI Input)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed
1 1280*720 45.00 60.00 74.25 Side by Side HDTV 720P
Top & Bottom
HDMI1.4 Frame Packing
2 1920*1080 33.75 60.00 74.25 Side by Side HDTV 1080I
Top & Bottom
3 1920*1080 67.50 60.00 148.50 Side by Side HDTV 1080P
Top & Bottom
Checkerboard
Single Frame Sequential
HDMI1.4 Frame Packing
4 1920*1080 27.00 24.00 74.25 Side by Side HDTV 1080P
Top & Bottom
Checkerboard
HDMI1.4 Frame Packing
5 1920*1080 33.75 30.00 74.25 Side by Side HDTV 1080P
Top & Bottom
Checkerboard

2) USB Input
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed
1 1920*1080 33.75 30.000 74.25 Side by Side HDTV 1080P
Top & Bottom
Checkerboard

3) 3D Input

No Side by Side Top & Bottom Checkerboard Single Frame Sequential Frame Packing Remark

Copyright LG Electronics. Inc. All right reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range 4. PCB Assembly Adjustment
This specification sheet is applied all of the LJ03R LCD TV 4.1. MAC Address
models, which produced in manufacture department or similar
LG TV factory
4.1.1. Equipment & Condition
• Play file: Serial.exe
• MAC Address edit
• Input Start / End MAC address
2. Notice
(1) Because this is not a hot chassis, it is not necessary to use 4.1.2 Download method
an isolation transformer. However, the use of isolation 4.1.2.1 Communication Prot connection
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of PCBA PC(RS-232C)
25 ºC ± 5 ºC of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-220
V~ 50 / 60Hz. RS-232C Po rt
(5) Before adjustment, execute Heat-Run for 5 minutes.
Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port
A After Receive 100% Full white pattern (06CH) then
process Heat-run 4.1.2.2 MAC Address Download
(or “8. Test pattern” condition of Ez-Adjust status) • Com 1,2,3,4 and 115200(Baudrate)
A How to make set white pattern • Port connection button click(1)
1) Press Power ON button of Service Remocon
2) Press ADJ button of Service remocon. Select “8. Test
pattern” and, after select “White” using navigation
button, and then you can see 100% Full White pattern.

* In this status you can maintain Heat-Run useless any


pattern generator
* Notice: if you maintain one picture over 20 minutes
(Especially sharp distinction black with white
pattern – 13Ch, or Cross hatch pattern – 09Ch)
then it can appear image stick near black level.

3. Adjustment Items
3.1. PCB Assembly Adjustment • Load button click(2) for MAC Address write.
A MAC Address Download • Start MAC Address write button(3)
• Check the OK Or NG
A Adjust 480i Comp1
A Adjust 1080p Comp1/RGB 4.1.3 Equipment & Condition
• If it is necessary, it can adjustment at Manufacture Line • Each other connection to LAN Port of IP Hub and Jig
• You can see set adjustment status at “1. ADJUST
CHECK” of the “In-start menu”
A EDID (The Extended Display Identification Data)/DDC

(Display Data Channel) download

3.2. Set Assembly Adjustment


A Color Temperature (White Balance) Adjustment
A Using RS-232C
A PING Test
A Selection Factory output option

Copyright LG Electronics. Inc. All right reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
4.1.4 LAN inspection solution 4.2. Using RS-232C
• LAN Port connection with PCB Adjust 3 items at 3.1 PCB assembly adjustments “adjustment
• Network setting at MENU Mode of TV sequence” one after the order.
• Setting automatic IP
• Setting state confirmation A Adjustment protocol
- If automatic setting is finished, you confirm IP and MAC
Address.

4.1.5 LAN Port Inspection (PING Test) See ADC Adjustment RS232C Protocol_Ver1.0

A Necessary items before Adjustment items


• Pattern Generator : (MSPG-925FA)
•Adjust 480i Comp1 (MSPG-925FA:model :209 , pattern
:65) – Comp1 Mode
• Adjust 1080p Comp1 (MSPG-925FA:model :225 ,
pattern :65) – Comp1 Mode
4.1.5.1 Equipment setting • Adjust RGB (MSPG-925FA:model :225 , Pattern :65) –
1) Play the LAN Port Test PROGRAM. RGB-PC Mode
2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2 * If you want more information then see the below
Adjustment method (Factory Adjustment)
4.1.6 LAN Port Inspection (PING Test)
1) Play the LAN Port Test Program. A Adjustment sequence
2) connect each other LAN Port Jack. • aa 00 00: Enter the ADC Adjustment mode.
3) Play Test (F9) button and confirm OK Message. • xb 00 40: Change the mode to Component1 (No actions)
4) remove LAN CABLE • ad 00 10: Adjust 480i Comp
• ad 00 10: Adjust 1080p Comp
• xb 00 60: Change to RGB-PC mode(No action)
• ad 00 10: Adjust 1080p RGB
• xb 00 90: Endo of Adjustmennt

Copyright LG Electronics. Inc. All right reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
5 Factory Adjustment 5.2 EDID (The Extended Display
5.1 Manual Adjust Component 480i/1080p Identification Data) / DDC (Display Data
RGB 1080p Channel) Download.

A Summary : Adjustment component 480i/1080i and RGB A Summary


1080p is Gain and Black level setting at Analog to Digital • It is established in VESA, for communication between PC
converter, and compensate the RGB deviation and Monitor without order from user for building user
condition. It helps to make easily use realize “Plug and
A Using instrument Play” function.
• Adjustment remocon, 801GF(802B, 802F, 802R) or
MSPG925FA pattern generator (It can output 480i/1080i • For EDID data write, we use DDC2B protocol.
horizontal 100% color bar pattern signal, and its output
level must setting 0.7V±0.1V p-p correctly) A Auto Download
• After enter Service Mode by pushing “ADJ” key,
• Enter EDID D/L mode.
• Enter “START” by pushing “OK” key.

=> Caution : - Never connect HDMI & D-sub Cable when


the user downloading .
- Use the proper cables below for EDID
Writing.

<Pic.4 Adjustment pattern : 480i / 1080p 60Hz Pattern >

A You must make it sure its resolution and pattern cause


every instrument can have different setting

A Adjustment method 480i Comp1, Adjust 1080p Comp1/RGB


(Factory adjustment)
• ADC 480i Component1 adjustment
- Check connection of Component1
- MSPG-925FA -> Model: 209, Pattern 65
• Set Component 480i mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”
• ADC 1080p Component1 / RGB adjustment
- Check connection both of Component1 and RGB
- MSPG-925FA -> Model: 225, Pattern 65
• Set Component 1080p mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL” § Edid data and Model option download (RS232)
• After get each the signal, wait more a second and enter
the “IN-START” with press IN-START key of Service
remocon. After then select “7. External ADC” with
navigator button and press “Enter”.
• After Then Press key of Service remocon “Right
Arrow(VOL+)”
• You can see “ADC Component1 Success”
• Component1 1080p, RGB 1080p Adjust is same method.
• Component 1080p Adjustment in Component1 input
mode
• RGB 1080p adjustment in RGB input mode
• If you success RGB 1080p Adjust. You can see “ADC
RGB-DTV Success”

Copyright LG Electronics. Inc. All right reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
5.2.1 Manual Download - HDMI-3 EDID table (0x04, 0xE0)
A Write HDMI EDID data
• Using instruments
- Jig. (PC Serial to D-Sub connection) for PC, DDC
adjustment.
- S/W for DDC recording (EDID data write and read)
- D-sub jack
- Additional HDMI cable connection Jig.

• Preparing and setting.


- Set instruments and Jig. Like pic.5), then turn on PC and
Jig.
- Operate DDC write S/W (EDID write & read)
- It will operate in the DOS mode.

PC
VSC - HDMI-4 EDID table (0x04, 0xD0)
B/D

Pic.3) For write EDID data, setting Jig and another instruments.

• EDID data for LJ03R Chassis (Model name = LG TV)

- HDMI-1 EDID table (0x04, 0x00)

- Analog (RGB) EDID table (0x1D)

- HDMI-2 EDID table (0x04, 0xF0)

Copyright LG Electronics. Inc. All right reserved. - 15 - LGE Internal Use Only
Only for training and service purposes
5.3 Adjustment Color Temperature (White A White Balance Adjustment
If you can’t adjust with inner pattern, then you can adjust it
balance) using HDMI pattern. You can select option at “Ez-Adjust
Menu – 7. White Balance” there items “NONE, INNER,
A Using Instruments HDMI”. It is normally setting at inner basically. If you can’t
• Color Analyzer: CA-210 (CH 9) adjust using inner pattern you can select HDMI item, and
- Using LCD color temperature, Color Analyzer (CA-210) you can adjust.
must use CH 9, which Matrix compensated (White, Red,
Green, Blue compensation) with CS-2100. See the In manual Adjust case, if you press ADJ button of service
Coordination bellowed one. remocon, and enter “Ez-Adjust Menu – 7. White Balance”,
• Auto-adjustment Equipment (It needs when Auto- then automatically inner pattern operates. (In case of
adjustment – It is availed communicate with RS-232C : “Inner” originally “Test-Pattern. On” will be selected in The
Baud rate: 115200) “Test-Pattern. On/Off”.
• Video Signal Generator MSPG-925F 720p, 216Gray
(Model: 217, Pattern 78) • Connect all cables and equipments like Pic.5)
• Set Baud Rate of RS-232C to 115200. It may set 115200
A Connection Diagram (Auto Adjustment) orignally.
• Using Inner Pattern • Connect RS-232C cable to set
• Connect HDMI cable to set

F u l l W h i t e P at t er n C A -100+

COL OR
A NA L Y ZER
T Y PE ; C A -100+

R S-232C

• Using HDMI input

A RS-232C Command (Commonly apply)

<Pic.5 Connection Diagram for Adjustment White balance>


• “wb 00 00”: Start Auto-adjustment of white balance.
• “wb 00 10”: Start Gain Adjustment (Inner pattern)
• “jb 00 c0” :
•…
• “wb 00 1f”: End of Adjustment
* If it needs, offset adjustment (wb 00 20-start, wb 00 2f-
end)
• “wb 00 ff”: End of white balance adjustment (inner pattern
disappear)

Copyright LG Electronics. Inc. All right reserved. - 16 - LGE Internal Use Only
Only for training and service purposes
O Notice) Adjustment Mapping information • Using CA-210 Equipment. (9 CH)
- Contrast value: 216 Gray

- White Balance adjustment coordination and color


temperature for Edge(IOP) LED (LJ03D/E)
• When Color temperature (White balance) Adjustment
(Automatically)
- Press “Power only key” of service remocon and operate
automatically adjustment.
- Set BaudRate to 115200.

• If it needs, then adjustment “Offset”.

A White Balance Adjustment (Manual adjustment)


• Test Equipment: CA-210
- Using LCD color temperature, Color Analyzer (CA-210)
must use CH 9, which Matrix compensated (White, Red,
Green, Blue compensation) with CS-2100. See the
Coordination bellowed one.
-White Balance adjustment table for Edge (IOP) LED
(LJ03D/E/R-for LX6500)
• Manual adjustment sequence is like bellowed one.
- Turn to “Ez-Adjust” mode with press ADJ button of Aging time
Cool Medium Warm

service remocon. GP2 X y x y x y


(Min)
- Select “10.Test Pattern” with CH+/- button and press 269 273 285 293 313 329

enter. Then set will go on Heat-run mode. Over 30 1 0-2 280 291 296 311 319 340

minutes set let on Heat-run mode. 2 3-5 278 288 294 308 317 338

- Let CA-210 to zero calibration and must has gap more 3 6-9 276 285 292 305 315 335

10cm from center of LCD module when adjustment. 4 10-19 274 282 290 302 313 332

- Press “ADJ” button of service remocon and select 5 20-35 273 279 289 299 312 329

“7.White-Balance” in “Ez-Adjust” then press “ G ” button 6 36-49 270 276 287 296 310 326

7 50-79 269 273 286 293 308 323


of navigation key.
8 Over 80 269 273 285 293 308 323
(When press “ G ” button then set will go to full white
mode)
- Adjust at three mode (Cool, Medium, Warm)
-LGD 3D IOP LED (for LX9500)
- If “cool” mode
Let B-Gain to 192 and R, G, B-Cut to 64 and then Aging time Cool Medium Warm

control R, G gain adjustment High Light adjustment. GP2 (Min) x y x y x y

- If “Medium” and “Warm” mode 269 273 285 293 313 329

Let R-Gain to 192 and R, G, B-Cut to 64 and then 1 0-2 287 301 303 321 326 351

control G, B gain adjustment High Light adjustment. 2 3-5 286 299 302 319 325 349

- All of the three mode 3 6-9 285 297 301 317 324 347

Let R-Gain to 192 and R, G, B-Cut to 64 and then 4 10-19 283 295 299 315 322 345

control G, B gain adjustment High Light adjustment. 5 20-35 281 291 297 311 320 341

- With volume button (+/-) you can adjust. 6 36-49 277 285 293 305 316 335

- After all adjustment finished, with Enter (A key) turn to 7 50-79 273 281 289 301 312 331

Ez-Adjust mode. Then with ADJ button, exit from 8 80-149 271 277 287 297 310 327

adjustment mode 9 Over 150 269 273 285 293 308 323

Attachment: White Balance adjustment coordination and


color temperature.

• Using CS-1000 Equipment.


- COOL : T=11000K, ∆uv=0.000, x=0.276 y=0.283
- MEDIUM : T=9300K, ∆uv=0.000, x=0.285 y=0.293
- WARM : T=6500K, ∆uv=0.000, x=0.313 y=0.329

Copyright LG Electronics. Inc. All right reserved. - 17 - LGE Internal Use Only
Only for training and service purposes
5.4 EYE-Q function check 6. GND and ESD Testing
6.1 Prepare GND and ESD Testing.
1) Turn on TV
A Check the connection between set and power cord
2) Press EYE key of Adj. R/C
3) Cover the Eye Q II sensor on the front of the using your
hand and wait for 6 seconds
4) Confirm that R/G/B value is lower than 10 of the “Raw Data 6.2 Operate GND and ESD auto-test.
(Sensor data, Back lignt )” . If after 6 seconds, R/G/B value A Fully connected (Between set and power cord) set enter the
is not lower than 10, replace Eye Q II sensor Auto-test sequence.
5) Remove your hand from the Eye Q II sensor and wait for 6 A Connect D-Jack AV jack test equipment.
seconds A Turn on Auto-controller(GWS103-4)
6) Confirm that “ok” pop up. A Start Auto GND test.
If change is not seen, replace Eye Q II sensor A If its result is NG, then notice with buzzer.
A If its result is OK, then automatically it turns to ESD Test.
A Operate ESD test
A If its result is NG, then notice with buzzer.
A If its result is OK, then process next steps. Notice it with
Good lamp and STOPER Down.Check Items.
A Test Voltage
• GND: 1.5KV/min at 100mA
• Signal: 3KV/min at 100mA
A Test time: just 1 second.
A Test point
• GND test: Test between Power cord GND and Signal
cable metal GND.
• ESD test: Test between Power cord GND and Live and
neutral.
A Leakage current: Set to 0.5mA(rms)

5.5 HDCP (High-Bandwidth Digital


Contents Protection) Setting 7. Preset Ch information.
• No Need.

5.6 Test of RS-232C control.


Press In-Start button of Service Remocon then set the
“4.Baud Rate” to 115200. Then check RS-232C control and

5.7 Selection of Country option.


Selection of country option is allowed only North American
model (Not allowed Korean model). It is selection of Country
about Rating and Time Zone. In case of POWER ONLY, System color is operated multi
• Models: All models which use LJ03X Chassis (See the first system
page.) In case of IN STOP, System color is operated default system
• Press “In-Start” button of Service Remocon, then enter the (PAN-M)
“Option” Menu with “PIP CH-“ Button
• Select one of these three (USA, CANADA, MEXICO)
defends on its market using “Vol. +/-“button.

* Caution : Don’t push The INSTOP KEY after completing


the function inspection.

Copyright LG Electronics. Inc. All right reserved. - 18 - LGE Internal Use Only
Only for training and service purposes
8. Default Service option. 9. USB DOWNLOAD (*.epk file
download)

9.1 Put the USB Stick to the USB socket

9.2 Press Menu key, and move OPTION

8.1 ADC-Set.
A R-Gain adjustment Value (default 128)
A G-Gain adjustment Value (default 128)
9.3 Press “FAV” Press 7 times.
A B-Gain adjustment Value (default 128)
A R-Offset adjustment Value (default 128)
A G-Offset adjustment Value (default 128)
A B-Offset adjustment Value (default 128)

8.2 White balance. Value.

9.4 Select download file (epk file)

9.5 After download is finished, remove the


USB stick.

9.6 Press “IN-START” key of ADJ remote


control, check the S/W version.

Copyright LG Electronics. Inc. All right reserved. - 19 - LGE Internal Use Only
Only for training and service purposes
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

300

570
LV1
200

830

120
500 540
820
810 520
880

541
820 400

530

800
840
850

920

A2 710
A9 A10

A5
910

900

Copyright LG Electronics. Inc. All right reserved. - 20 - LGE Internal Use Only
Only for training and service purposes
DDR_RAS 002:F34;002:U31;002:AI34;002:BB32
DDR_CAS 002:F34;002:U32;002:AI34;002:BB32

DDR_BA0 002:F36;002:U33;002:AI36;002:BB34
DDR_BA1 002:F36;002:U33;002:AI36;002:BB33
002:E39;002:W39;002:AH39;002:BD39

DDR_CS 002:F34;002:U33;002:AI34;002:BB33
DDR_WE 002:F34;002:U32;002:AI34;002:BB32
002:N40;002:AQ40
DDR_ADDR[0-12]

DDR_DATA[0-31]
IC102
LG1120

002:F35;002:AI35

DDR_CLK 002:F35;002:AI35
P101 IC102
B1 W13

002:AI33
002:AI32
002:AI33
002:AI32
12505WR-10 LG1120 VSS_1 VSS_127

002:F33
002:F32
002:F33
002:F32
B34 W14
P102 +3.3V_IO +2.5LVDS_RX VSS_2 VSS_128
C1 W15

002:AI32
002:AI32
+3.3VD

002:F32
002:F32
YFW254-06 VSS_3 VSS_129
D3 AM18 C34 W16
1 TCON_SCL 004:AA9 VDD33_1 LVRX_VDD1 VSS_4 VSS_130
D4 AM20 D1 W17
OPT VDD33_2 LVRX_VDD2 VSS_5 VSS_131
D5 AM22 D2 W18
VDD33_3 LVRX_VDD3 VSS_6 VSS_132
1 2 D6 AM24 D33 W19

DDR_DQS0
DDR_DQS0
DDR_DQS1
DDR_DQS1
DDR_DQS2
DDR_DQS2
DDR_DQS3
DDR_DQS3
TCON_SDA 004:AE9

DDR_CLK

DDR_CKE

DDR_ODT

DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
VDD33_4 LVRX_VDD4 VSS_7 VSS_133
D7 D34 W20

DDR_ADDR[0]
DDR_ADDR[1]
DDR_ADDR[2]
DDR_ADDR[3]
DDR_ADDR[4]
DDR_ADDR[5]
DDR_ADDR[6]
DDR_ADDR[7]
DDR_ADDR[8]
DDR_ADDR[9]
DDR_ADDR[10]
DDR_ADDR[11]

DDR_ADDR[12]

DDR_DATA[0]
DDR_DATA[1]
DDR_DATA[2]
DDR_DATA[3]
DDR_DATA[4]
DDR_DATA[5]
DDR_DATA[6]
DDR_DATA[7]
DDR_DATA[8]
DDR_DATA[9]
DDR_DATA[10]
DDR_DATA[11]
DDR_DATA[12]
DDR_DATA[13]
DDR_DATA[14]
DDR_DATA[15]
DDR_DATA[16]
DDR_DATA[17]
DDR_DATA[18]
DDR_DATA[19]
DDR_DATA[20]
DDR_DATA[21]
DDR_DATA[22]
DDR_DATA[23]
DDR_DATA[24]
DDR_DATA[25]
DDR_DATA[26]
DDR_DATA[27]
DDR_DATA[28]
DDR_DATA[29]
DDR_DATA[30]
DDR_DATA[31]
R1210 VDD33_5 +1.8V_DDRS VSS_8 VSS_134
22 D28 E3 W21
2 FRC_TDI 3 VDD33_6 VSS_9 VSS_135
D29 H1 E4 W22
VDD33_7 DDRS_VDDQ_1 VSS_10 VSS_136
R1211 D30 K4 E5 W23
22 VDD33_8 DDRS_VDDQ_2 VSS_11 VSS_137
3 FRC_TMS 4 TMODE[0] 001:H22 D31 L3 E6 W32
VDD33_9 DDRS_VDDQ_3 VSS_12 VSS_138
D32 M4 E7 Y12
R1212 VDD33_10 DDRS_VDDQ_4 VSS_13 VSS_139
22 AJ5 N4 E8 Y13
+0.9VREF 4 FRC_TCK 5 VDD33_11 DDRS_VDDQ_5 VSS_14 VSS_140

22
22
22
22
22
22
22
22
22
22

22
22
22
22
22
22

22
22
22
22

22
22
AK5 P4 E10 Y14

22
22
22
22
22
22
22
22
22
22
22
22

22

22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
VDD33_12 DDRS_VDDQ_6 VSS_15 VSS_141
R1213 AK6 R4 E12 Y15
22 VDD33_13 DDRS_VDDQ_7 VSS_16 VSS_142
5 FRC_TDO 6 SPI_DI 001:H18;001:AX5 AK7 T4 E14 Y16
VDD33_14 DDRS_VDDQ_8 VSS_17 VSS_143
AK8 U3 E16 Y17

R124

R126
R128
AL33 R130
AL34 R132
AF34 R134
AF33 R136
R138
R140
R142
R144

R146
R148
R150
R152
R154
R156

AM32 R158
AD32 R160
R162
R164

R166
R168
T33 R1100
W34 R1101
T32 R1102
AA32R1103
W33 R1104

AM33R1105
AH32R1106
AN34R1107
AG32R1108
AJ32R1109
AN33R1110
AK32R1111
AM34R1112
AG33R1113
AC33R1114
AH34R1115
AD34R1116
AC34R1117
AJ33R1118
AD33R1119
AG34R1120
G33 R1121
F34 R1122
H31 R1123
E34 R1124
E33 R1125
H32 R1126
F33 R1127
G34 R1128
K33 R1129
H34 R1130
L34 R1131
J33 R1132
J34 R1133
L33 R1134
H33 R1135
K34 R1136
U34 R193
Y34 R194
U33 R195
Y33 R196
AA34R197
Y32 R198
AA33R199
VDD33_15 DDRS_VDDQ_9 VSS_18 VSS_144
AK9 U4 E18 Y18
6 7 SPI_SCLK
001:H19;001:BD4 VDD33_16 DDRS_VDDQ_10 VSS_19 VSS_145
AK10 Y4 E20 Y19

AF31

AC32
W31
K31

N34

V34
V33

F32
F31
J31
J32

T34
R34
N33
P33
R33
P34

G32
K32

V32
U32

N32
P32
VDD33_17 DDRS_VDDQ_11 VSS_20 VSS_146
AJ30 AA3 E22 Y20
VDD33_18 DDRS_VDDQ_12 VSS_21 VSS_147
8 SPI_DO 001:H18;001:BD4 AK27 AA4 E24 Y21
VDD33_19 DDRS_VDDQ_13 VSS_22 VSS_148

DDR_VREF0
DDR_VREF1
DDR_VREF2

DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[6]
DDR_A[7]
DDR_A[8]
DDR_A[9]
DDR_A[10]
DDR_A[11]
DDR_A[12]

DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]
DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]

DDR_CK
DDR_CK_N
DDR_DQS[0]
DDR_DQS_N[0]
DDR_DQS[1]
DDR_DQS_N[1]
DDR_DQS[2]
DDR_DQS_N[2]
DDR_DQS[3]
DDR_DQS_N[3]

DDR_CKE
DDR_CS_N
DDR_WE_N
DDR_RAS_N
DDR_CAS_N
DDR_ODT

DDR_DM[0]
DDR_DM[1]
DDR_DM[2]
DDR_DM[3]

DDR_BA[0]
DDR_BA[1]
DDR_TAOUT

DDR_TDOUT[0]
DDR_TDOUT[1]
AK28 AB4 E26 Y22
R104 R108 R112 R113 R114 R120 R170 R171 R172 R174 R176 R179 VDD33_20 DDRS_VDDQ_14 VSS_23 VSS_149
100 100 100 100 100 100 100 100 100 100 100 100 AK29 AC4 E28 Y23
9 SPI_CS 001:H19;001:AX5 VDD33_21 DDRS_VDDQ_15 VSS_24 VSS_150
AK30 AD4 E29 AA12
AN18 AN24 VDD33_22 DDRS_VDDQ_16 VSS_25 VSS_151
008:W20 LVRX1_CLKP RCLK1P RCLK2P LVRX2_CLKP 008:W15 AF1 E30 AA13
AP18 AP24 +2.5LVDS_TX DDRS_VDDQ_17 VSS_26 VSS_152
008:W20 LVRX1_CLKM RCLK1M RCLK2M LVRX2_CLKM 008:W16 10 AG4 E31 AA14
AP15 AN21 DDRS_VDDQ_18 VSS_27 VSS_153
008:W22 LVRX1_AP RA1P RA2P LVRX2_AP 008:W17 D8 AJ4 E32 AA15
AN15 AP21 LVTX_VDD_1 DDRS_VDDQ_19 VSS_28 VSS_154
008:W23 LVRX1_AM RA1M RA2M LVRX2_AM 008:W18 11 D10 AK1 F1 AA16
AP16 AN22 LVTX_VDD_2 DDRS_VDDQ_20 VSS_29 VSS_155
008:W22 LVRX1_BP RB1P RB2P LVRX2_BP 008:W17 D12 P1 F5 AA17
AN16 AP22 LVTX_VDD_3 DDRS_VDDQ_21 VSS_30 VSS_156
008:W22 LVRX1_BM RB1M RB2M LVRX2_BM 008:W17 D14 P3 F30 AA18
AP17 AN23 LVTX_VDD_4 DDRS_VDDQ_22 VSS_31 VSS_157
008:W21 LVRX1_CP RC1P RC2P LVRX2_CP 008:W16 D20 G3 AA19
AN17 AP23 LVTX_VDD_5 +1.8V_DDR VSS_32 VSS_158
008:W21 LVRX1_CM RC1M RC2M LVRX2_CM 008:W17 D22 G31 AA20
AN19 AN25 LVTX_VDD_6 VSS_33 VSS_159
008:W19 LVRX1_DP RD1P RD2P LVRX2_DP 008:W14 D24 L31 H2 AA21
AP19 AP25 LVTX_VDD_7 DDR_VDDQ_1 VSS_34 VSS_160
008:W20 LVRX1_DM RD1M RD2M LVRX2_DM 008:W15 D26 M31 J3 AA22
AN20 AN26 LVTX_VDD_8 DDR_VDDQ_2 VSS_35 VSS_161
008:W19 LVRX1_EP RE1P RE2P LVRX2_EP 008:W14 D16 M34 K1 AA23
AP20 AP26 PVCC1 DDR_VDDQ_3 VSS_36 VSS_162
008:W19 LVRX1_EM RE1M RE2M LVRX2_EM 008:W14 D18 N31 L32 AB12
PVCC2 DDR_VDDQ_4 VSS_37 VSS_163
P31 M12 AB13
A4 A20 +1.0VDC DDR_VDDQ_5 VSS_38 VSS_164
009:E22 LVTX1_CLK+ TCLK1P TCLK5P LVTX5_CLK+ 009:E36 R31 M13 AB14
B4 B20 DDR_VDDQ_6 VSS_39 VSS_165
009:E22 LVTX1_CLK- TCLK1N TCLK5N LVTX5_CLK- 009:E37 E9 R32 M14 AB15
A2 A18 VDD_1 DDR_VDDQ_7 VSS_40 VSS_166
009:O11 LVTX1_A+ TA1P TA5P LVTX5_A+ 009:E35 E11 T31 M15 AB16
B2 B18 VDD_2 DDR_VDDQ_8 VSS_41 VSS_167
009:O11 LVTX1_A- TA1N TA5N LVTX5_A- 009:E35 E13 U31 M16 AB17
C3 C19 VDD_3 DDR_VDDQ_9 VSS_42 VSS_168
009:O9 LVTX1_B+ TB1P TB5P LVTX5_B+ 009:E35 E15 V31 M17 AB18
C2 C18 VDD_4 DDR_VDDQ_10 VSS_43 VSS_169
009:O9 LVTX1_B- TB1N TB5N LVTX5_B- 009:E35 E17 Y31 M18 AB19
B3 B19 VDD_5 DDR_VDDQ_11 VSS_44 VSS_170
009:O8 LVTX1_C+ TC1P TC5P LVTX5_C+ 009:E33 E19 AA31 M19 AB20
A3 A19 VDD_6 DDR_VDDQ_12 VSS_45 VSS_171
009:O8 LVTX1_C- TC1N TC5N LVTX5_C- 009:E34 +2.5VQ +2.5LVDS_TX +2.5VPLL +2.5LVDS_RX E21 AB31 M20 AB21
C5 C21 VDD_7 DDR_VDDQ_13 VSS_46 VSS_172
009:O6 LVTX1_D+ TD1P TD5P LVTX5_D+ 009:E5 E23 AB34 M21 AB22
C4 C20 VDD_8 DDR_VDDQ_14 VSS_47 VSS_173
009:O6 LVTX1_D- TD1N TD5N LVTX5_D- 009:E5 L100 E25 AC31 M22 AB23
B5 B21 120-ohm VDD_9 DDR_VDDQ_15 VSS_48 VSS_174
009:O5 LVTX1_E+ TE1P TE5P LVTX5_E+ 009:E33 E27 AD31 M23 AB32
A5 A21 VDD_10 DDR_VDDQ_16 VSS_49 VSS_175
009:O6 LVTX1_E- TE1N TE5N LVTX5_E- 009:E33 G5 AE31 M32 AB33
L101 VDD_11 DDR_VDDQ_17 VSS_50 VSS_176
120-ohm H5 AE32 M33 AC12
A8 A24 VDD_12 DDR_VDDQ_18 VSS_51 VSS_177
009:E21 LVTX2_CLK+ TCLK2P TCLK6P LVTX6_CLK+ 009:H22 J5 AE34 N12 AC13
B8 B24 VDD_13 DDR_VDDQ_19 VSS_52 VSS_178
009:E21 LVTX2_CLK- TCLK2N TCLK6N LVTX6_CLK- 009:H22 L102 K5 AG31 N13 AC14
A6 A22 120-ohm VDD_14 DDR_VDDQ_20 VSS_53 VSS_179
009:E16 LVTX2_A+ TA2P TA6P LVTX6_A+ 009:E32 L5 AH31 N14 AC15
B6 B22 VDD_15 DDR_VDDQ_21 VSS_54 VSS_180
009:E17 LVTX2_A- TA2N TA6N LVTX6_A- 009:E32 M5 AK34 N15 AC16
C7 C23 VDD_16 DDR_VDDQ_22 VSS_55 VSS_181
009:O5 LVTX2_B+ TB2P TB6P LVTX6_B+ 009:E28 C1162 C1163 C1164 N5 N16 AC17
C6 C22 VDD_17 +1.0VPLL VSS_56 VSS_182
LVTX2_B- LVTX6_B- 22uF 22uF 22uF P5 N17 AC18
009:O5 TB2N TB6N 009:E29
B7 B23 10V 10V 10V VDD_18 VSS_57 VSS_183
009:E14 LVTX2_C+ TC2P TC6P LVTX6_C+ 009:E27 R5 AM14 N18 AC19
A7 A23 VDD_19 SS_DISP_DVDD VSS_58 VSS_184
009:E14 LVTX2_C- TC2N TC6N LVTX6_C- 009:E27 T5 AN12 N19 AC20
C9 C25 VDD_20 DDRPLL_DVDD VSS_59 VSS_185
009:E15 LVTX2_D+ TD2P TD6P LVTX6_D+ 009:E31 U5 N20 AC21
C8 C24 VDD_21 +2.5VPLL VSS_60 VSS_186
009:E15 LVTX2_D- TD2N TD6N LVTX6_D- V5 N21 AC22
009:E17
009:E17
LVTX2_E+
LVTX2_E-
B9
A9
TE2P
TE2N
IC102 TE6P
TE6N
B25
A25
LVTX6_E+
LVTX6_E-
009:E31
009:E36
009:E36
W5
Y5
VDD_22
VDD_23
VDD_24
DDRPLL_AVDD
SS_AVDD
AL13
AN13
N22
N23
VSS_61
VSS_62
VSS_63
VSS_187
VSS_188
VSS_189
AC23
AD3
AA5 AP14 P2 AE33
009:E20
009:E20
LVTX3_CLK+
LVTX3_CLK-
A12
B12
TCLK3P
TCLK3N
LG1120 TCLK7P
TCLK7N
A28
B28
LVTX7_CLK+
LVTX7_CLK-
009:H21
009:H21 +3.3V +3.3VD +3.3V_IO
AB5
AC5
VDD_25
VDD_26
VDD_27
DISP_AVDD
P12
P13
VSS_64
VSS_65
VSS_66
VSS_190
VSS_191
VSS_192
AF2
AF32
A10 A26
009:E16 LVTX3_A+ TA3P TA7P LVTX7_A+ 009:E31 AD5 P14 AG3
B10 B26 VDD_28 VSS_67 VSS_193
009:E16 LVTX3_A- TA3N TA7N LVTX7_A- 009:E32 L103 AE5 P15 AH5
C11 C27 120-ohm VDD_29 VSS_68 VSS_194
009:E11 LVTX3_B+ TB3P TB7P LVTX7_B+ 009:E29 AG5 P16 AH30
C10 C26 VDD_30 VSS_69 VSS_195
009:E12 LVTX3_B- TB3N TB7N LVTX7_B- 009:E30 AF5 P17 AH33
B11 B27 L104 VDD_31 VSS_70 VSS_196
009:E8 LVTX3_C+ TC3P TC7P LVTX7_C+ 009:E29 120-ohm G30 P18 AJ31
A11 A27 VDD_32 VSS_71 VSS_197
009:E8 LVTX3_C- TC3N TC7N LVTX7_C- 009:E29 H30 P19 AJ34
C13 C29 VDD_33 VSS_72 VSS_198
009:E12 LVTX3_D+ TD3P TD7P LVTX7_D+ 009:E26 J30 P20 AK2
C12 C28 VDD_34 VSS_73 VSS_199
009:E12 LVTX3_D- TD3N TD7N LVTX7_D- 009:E27 C1165 C1166 K30 P21 AK11
B13 B29 22uF 22uF VDD_35 VSS_74 VSS_200
009:E10 LVTX3_E+ TE3P TE7P LVTX7_E+ 009:E26 L30 P22 AK12
A13 A29 10V 10V VDD_36 VSS_75 VSS_201
009:E11 LVTX3_E- TE3N TE7N LVTX7_E- 009:E26 M30 P23 AK13
VDD_37 VSS_76 VSS_202
N30 R12 AK14
A16 A32 VDD_38 VSS_77 VSS_203
009:E5 LVTX4_CLK+ TCLK4P TCLK8P LVTX8_CLK+ 009:O24 P30 R13 AK15
B16 B32 VDD_39 VSS_78 VSS_204
009:E5 LVTX4_CLK- TCLK4N TCLK8N LVTX8_CLK- 009:O23 R30 R14 AK16
A14 A30 VDD_40 VSS_79 VSS_205
009:E10 LVTX4_A+ TA4P TA8P LVTX8_A+ 009:E28 T30 R15 AK17
B14 B30 VDD_41 VSS_80 VSS_206
009:E10 LVTX4_A- TA4N TA8N LVTX8_A- 009:E28 U30 R16 AK18
C15 C31 VDD_42 VSS_81 VSS_207
009:E8 LVTX4_B+ TB4P TB8P LVTX8_B+ 009:O34 V30 R17 AK19
C14 C30 VDD_43 VSS_82 VSS_208
009:E8 LVTX4_B- TB4N TB8N LVTX8_B- 009:O34 W30 R18 AK20
+3.3VD B15 B31 +1.0VDC +1.0VPLL VDD_44 VSS_83 VSS_209
009:E7 LVTX4_C+ TC4P TC8P LVTX8_C+ 009:E25 Y30 R19 AK21
A15 A31 VDD_45 VSS_84 VSS_210
009:E7 LVTX4_C- TC4N TC8N LVTX8_C- 009:E26 AA30 R20 AK22
C17 C33 VDD_46 VSS_85 VSS_211
009:E6 LVTX4_D+ TD4P TD8P LVTX8_D+ 009:O35 AB30 R21 AK23
C16 C32 VDD_47 VSS_86 VSS_212
009:E6 LVTX4_D- TD4N TD8N LVTX8_D- 009:O35 AC30 R22 AK24
B17 B33 VDD_48 VSS_87 VSS_213
009:E11 LVTX4_E+ TE4P TE8P LVTX8_E+ 009:O33 L105 AD30 R23 AK25
A17 A33 120-ohm VDD_49 VSS_88 VSS_214
009:E11 LVTX4_E- TE4N TE8N LVTX8_E- 009:O33 AE30 T12 AK26
R102 R103 R105 R109 +3.3VD VDD_50 VSS_89 VSS_215
3.3K 3.3K 3.3K 3.3K 001:AP38 AF30 T13 AK33
TMODE[0] R119 10K AL12 AL30 VDD_51 VSS_90 VSS_216
SMODE M_VS AG30 T14 AL1
AN10 AM30 R177 C1167 VDD_52 VSS_91 VSS_217
TMODE[0] M_SCLK 4.7K AL14 T15 AL3
AP10 AN30 Serial Flash Boot Mode 0.1uF VDD_53 VSS_92 VSS_218
TMODE[1] M_MOSI OPT 16V AL15 T16 AL25
AL11 AP5 - GPIO[0]=1 : 50MHz Booting VDD_54 VSS_93 VSS_219
TMODE[2] S_VS - GPIO[0]=0 : 25MHz Booting AL16 T17 AL26
AM11 AN5 VDD_55 VSS_94 VSS_220
TMODE[3] S_SCLK AL17 T18 AL32
[TEST MODE SETTING] AM5 R178 VDD_56 VSS_95 VSS_221
- SMODE = 0 : Serial Flash Setting S_MOSI 4.7K AL18 T19 AM3
+3.3VD AP31 VDD_57 VSS_96 VSS_222
- TMODE(All) = 1 : Normal Mode TRST_N AL19 T20 AN2
AN31 AL4 +3.3VD VDD_58 VSS_97 VSS_223
FRC_TCK AL20 T21 AN3
R121 TCK GPIO[0]
AM31 AM4 VDD_59 VSS_98 VSS_224
FRC_TMS R1190 33 AL21 T22 AN32
3.3K TMS GPIO[1] WP_EEPROM_TCON 004:AL21;005:AK5
AK31 AN4 VDD_60 VSS_99 VSS_225
FRC_TDI R1219 33 L/R_SYNC R1227 AL22 T23 AP2
TDI GPIO[2] 004:K10;005:J9 4.7K
AL31 AP4 VDD_61 VSS_100 VSS_226
R107 R110 R1181 R1182 FRC_TDO
TDO GPIO[3]
R173 33 PWM_SEQ AL23 U12 AP3
For 3D Formatter I2C (Ready) 1K 1K 3.3K 3.3K AL5 R1223 VDD_62 VSS_101 VSS_227
OPT OPT GPIO[4] 0 TCON_POWER_EN 007:Q15;006:P14 AL24 U13 AP32
VDD_63 VSS_102 VSS_228
FPGA_SCL R1183 0 OPT AN8 AL6 0 DPM_CTRL AM15 U14 AP33
M_SCL GPIO[5] LVDS_IN 004:AM14
VDD_64 VSS_103 VSS_229
FPGA_SDA R1184 0 OPT AM8 AM6 OPT AM16 U15
M_SDA GPIO[6] LVDS_OUT R1224
AL9 AN6 VDD_65 VSS_104
I2C_SCL
005:AB15;008:E19;008:W25;008:AN4;009:AP8 R115 33 R1197 R175 AM25 U16 D9
SCL GPIO[7] 10K 10K VIDEO_OUT +3.3VD +3.3VD +3.3VD
AP8 AP6 VDD_66 VSS_105 LVTX_VSS_1
I2C_SDA
005:AB15;008:M19;008:W25;008:AN4;009:AP11 R116 33 R180 33 AM26 U17 D11
SDA GPIO[8] OPT M_TCON_EN 005:AB13
AL7 VDD_67 VSS_106 LVTX_VSS_2
GPIO[9] I2CEN U18 D13
+3.3VD AL10 AM7 R1187 R1189 R1199 VSS_107 LVTX_VSS_3
001:AP36;001:AX5 R117 33 SPI_CS GPIO[10]
R1220 33 4.7K 4.7K 4.7K U19 D15
+3.3VD SPI_CS S_TCON_EN 005:AH12
AP9 AN7 OPT OPT VSS_108 LVTX_VSS_4
001:AP37;001:BD4 SPI_SCLK R118 33 R1214 0 FPGA_D/L_CTRL U20 D21
SPI_SCLK GPIO[11]
AN9 AL27 LVDS_IN LVDS_OUT VIDEO_OUT VSS_109 LVTX_VSS_5
001:AP37;001:AX5 SPI_DI SPI_DI GPIO[12] INCH_OPT_1 U21 D23
AM9 AN28 VSS_110 LVTX_VSS_6
R106 R122 33 INCH_OPT_2 U22 D25
001:AP36;001:BD4 SPI_DO SPI_DO GPIO[13] R1188 R1198 R1200
10K AP29 VSS_111 LVTX_VSS_7
OPT R101 OPT R1215 33 TCON_SCL_M 4.7K 4.7K 4.7K U23 D27
GPIO[14]
IC100 001:F12 UART_RX AL8 AN29 OPT VSS_112 LVTX_VSS_8
SW100 1K R1216 33 TCON_SDA_M V12
UART_RXD GPIO[15]
JTP-1127WEM OPT KIA7029AF 001:F12 UART_TX AP7 AN27 VSS_113
R123 33 R1217 33 TCON_SCL_S V13 D17
UART_TXD GPIO[16]
1

008:W24 AP27 VSS_114 PGND1


FRC_RESET R1218 33 TCON_SDA_S V14 D19
R111 GPIO[17] +3.3VD
OPT I O AM10 AP30 R1192 VSS_115 PGND2
1 3 33 V15
PORES_N GPIO[18] Input LVDS Data Mapping Selection Output LVDS Data Mapping Selection Video Output Selection
OPT 33 AM27 R1193 VSS_116
2 33 R1222 V16 AM17
GPIO[19] 10K - GPIO[5] = 1 : JEIDA - GPIO[6] = 1 : JEIDA - GPIO[7] = 1 : Reverse(LED Model)
AP11 AP28 VSS_117 LVRX_VSS1
2

001:AX10
XTAL_IN R1194 33 - GPIO[5] = 0 : VESA - GPIO[6] = 0 : VESA - GPIO[7] = 0 : Normal(LAMP Model) V17 AM19
C112 G XTALI GPIO[20] VSYNC 008:Z25
C123 AN11 AM28 R1195 VSS_118 LVRX_VSS2
0.1uF 001:BA10
XTAL_OUT 33 /FPGA_RESET V18 AM21
0.1uF XTALO GPIO[21] 009:AN29
50V AL28 R1196 VSS_119 LVRX_VSS3
33 V19 AM23
DDRS_DQS_N[0]

DDRS_DQS_N[1]

DDRS_DQS_N[2]

DDRS_DQS_N[3]

DDRS_TDOUT[0]
DDRS_TDOUT[1]
OPT 50V GPIO[22] 3D_FRAME_INFO 010:AM12 R1225 0
OPT AM29 VSS_120 LVRX_VSS4
DDRS_DQ[10]
DDRS_DQ[11]
DDRS_DQ[12]
DDRS_DQ[13]
DDRS_DQ[14]
DDRS_DQ[15]
DDRS_DQ[16]
DDRS_DQ[17]
DDRS_DQ[18]
DDRS_DQ[19]
DDRS_DQ[20]
DDRS_DQ[21]
DDRS_DQ[22]
DDRS_DQ[23]
DDRS_DQ[24]
DDRS_DQ[25]
DDRS_DQ[26]
DDRS_DQ[27]
DDRS_DQ[28]
DDRS_DQ[29]
DDRS_DQ[30]
DDRS_DQ[31]

DDRS_DQS[0]

DDRS_DQS[1]

DDRS_DQS[2]

DDRS_DQS[3]

GPIO[23] GAMMA_BKSEL 008:M20 V20


DDRS_VREF0
DDRS_VREF1
DDRS_VREF2

DDRS_A[10]
DDRS_A[11]
DDRS_A[12]

DDRS_DQ[0]
DDRS_DQ[1]
DDRS_DQ[2]
DDRS_DQ[3]
DDRS_DQ[4]
DDRS_DQ[5]
DDRS_DQ[6]
DDRS_DQ[7]
DDRS_DQ[8]
DDRS_DQ[9]

DDRS_RAS_N
DDRS_CAS_N

DDRS_DM[0]
DDRS_DM[1]
DDRS_DM[2]
DDRS_DM[3]

DDRS_BA[0]
DDRS_BA[1]

DDRS_TAOUT
AL29 R1221 OPT VSS_121
DDRS_A[0]
DDRS_A[1]
DDRS_A[2]
DDRS_A[3]
DDRS_A[4]
DDRS_A[5]
DDRS_A[6]
DDRS_A[7]
DDRS_A[8]
DDRS_A[9]

DDRS_CK_N

DDRS_CS_N
DDRS_WE_N

GPIO[24] 33 L/R_SYNC_FRC_OUT
0 10:AG3 DPM_CTRL1 004:AM14 V21 AM12
DDRS_CKE

DDRS_ODT

VSS_122 DDRPLL_DVSS
DDRS_CK

R1185 R1226 0 V22 AM13


OPT
OPT VSS_123 SS_AVSS
10K V23 AN14
VSS_124 DISP_AVSS
W4 AP12
+0.9VREFS VSS_125 DDRPLL_AVSS
For 3D Formatter W12 AP13
+3.3VD +3.3VD VSS_126 SS_DISP_DVSS
L4
V4
AE4

W1
T1
W2
T2
R1
T3
R2
Y2
U1
Y3
R3
U2
AC1

F3
H4
E1
J4
H3
E2
G4
F2
K3
N2
J1
M1
N1
J2
M2
K2
AJ2
AM1
AH4
AN1
AM2
AH3
AL2
AJ1
AE2
AH1
AD1
AG2
AG1
AD2
AH2
AE1

V1
V2
G2
G1
L1
L2
AK3
AK4
AF4
AF3

Y1
AA1
AC2
AB2
AA2
AB1

F4
M3
AJ3
AE3

V3
W3

N3
AB3
AC3 R1204 R1206
4.7K 4.7K
22
22
22
22
22
22
22
22
22
22
22
22

22

22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22

22
22
22
22
22
22
22
22
22
22

22
22
22
22
22
22

22
22
22
22

22
22

INCH_1_HIGH INCH_2_HIGH
INCH_OPT_1 INCH_OPT_2
R1137
R1138
R1139
R1140
R1141
R1142
R1143
R1144
R1145
R1146
R1147
R1148

R1149
R1150
R1151
R1152
R1153
R1154
R1155
R1156
R1157
R1158
R1159
R1160
R1161
R1162
R1163
R1164
R1165
R1166
R1167
R1168
R1169
R1170
R1171
R1172
R1173
R1174
R1175
R1176
R1177
R1178
R1179
R1180
R125

R1205 R1207
R127
R129
R131
R133
R135
R137
R139
R141
R143
R145

R147
R149
R151
R153
R155
R157

R159
R161
R163
R165

R167
R169

P100 4.7K 4.7K


DDRS_ADDR[10]
DDRS_ADDR[11]
DDRS_ADDR[12]

+3.3VD
DDRS_ADDR[0]
DDRS_ADDR[1]
DDRS_ADDR[2]
DDRS_ADDR[3]
DDRS_ADDR[4]
DDRS_ADDR[5]
DDRS_ADDR[6]
DDRS_ADDR[7]
DDRS_ADDR[8]
DDRS_ADDR[9]

12505WR-04A00 INCH_1_LOW INCH_2_LOW


DDRS_DATA[10]
DDRS_DATA[11]
DDRS_DATA[12]
DDRS_DATA[13]
DDRS_DATA[14]
DDRS_DATA[15]
DDRS_DATA[16]
DDRS_DATA[17]
DDRS_DATA[18]
DDRS_DATA[19]
DDRS_DATA[20]
DDRS_DATA[21]
DDRS_DATA[22]
DDRS_DATA[23]
DDRS_DATA[24]
DDRS_DATA[25]
DDRS_DATA[26]
DDRS_DATA[27]
DDRS_DATA[28]
DDRS_DATA[29]
DDRS_DATA[30]
DDRS_DATA[31]
DDRS_DATA[0]
DDRS_DATA[1]
DDRS_DATA[2]
DDRS_DATA[3]
DDRS_DATA[4]
DDRS_DATA[5]
DDRS_DATA[6]
DDRS_DATA[7]
DDRS_DATA[8]
DDRS_DATA[9]

OPT +3.3V
1
C113 INCH_1 INCH_2
0.1uF
GND
002:F12;002:AK13 DDRS_CLK
002:F12;002:AK12 DDRS_CLK
DDRS_DQS0
DDRS_DQS0
DDRS_DQS1
DDRS_DQS1
DDRS_DQS2
DDRS_DQS2
DDRS_DQS3
DDRS_DQS3

002:F12;002:U7;002:AK12;002:BB6 DDRS_CKE
DDRS_CS
DDRS_WE
002:F11;002:U6;002:AK11;002:BB5 DDRS_RAS
002:F11;002:U6;002:AK11;002:BB5 DDRS_CAS
002:F11;002:U5;002:AK12;002:BB4 DDRS_ODT

DDRS_DM0
DDRS_DM1
DDRS_DM2
DDRS_DM3

002:F13;002:U8;002:AK13;002:BB7 DDRS_BA0
002:F13;002:U7;002:AK13;002:BB6 DDRS_BA1

2 50V
42 LOW LOW
002:E16;002:W13;002:AK17;002:BD12

R1186
RX 33
3 UART_RX 001:H18 47 LOW HIGH
002:F11;002:U7;002:AK12;002:BB6
002:F11;002:U6;002:AK11;002:BB5

002:AK10
002:AK10
002:F9
002:F9

TX
4 UART_TX 001:H18 55 HIGH LOW
DDRS_ADDR[0-12]

002:F10

002:F10

002:AK10

002:AK10
002:F9

002:AK9

002:AK9
002:F9

5
XTAL
002:N17;002:AT17
DDRS_DATA[0-31]

. R191
1M

X100
25MHz
XTAL_IN XTAL_OUT
001:H17 001:H17
C1159 C1160
15pF 15pF
50V 50V

+3.3V_IO +1.8V_DDRS +1.0VPLL

C100 C105 C106 C109 C114 C117 C120 C126 C127 C130 C133 C137 C139 C142 C145 C148 C151 C154 C156 C159 C162 C165 C168 C170 C173 C176 C179 C181 C182 C183 C186 C189 C193 C195 C198 C1101 C1104 C1107 C1110 C1113 C1116 C1121 C1122 C1127 C1129 C1133 C1136 C1139 C1140 C1143 C1148 C1151 C1152 C1153 C1154 C1155 C1157 C1158
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF 22uF 22uF 22uF 22uF 0.1uF 0.1uF
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 10V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 10V 10V 10V 10V 10V 16V 16V

+2.5LVDS_RX +2.5VPLL SPI FLASH(2Mbit) +3.3VD


+2.5LVDS_TX +1.0VDC

C101 C103 C107 C110 C115 C119 C121 C124 C128 C131 C134 C136 C140 C143 C146 C149 C152 C157 C160 C163 C166 C172 C175 C177 C184 C187 C190 C192 C196 C199 C1102 C1105 C1108 C1111 C1114 C1117 C1119 C1123 C1125 C1130 C1131 C1134 C1137 C1141 C1144 C1146 C1149 IC101
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF 22uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF 10uF
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 10V 10V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 10V 10V R188 R190 W25X20AVSNIG C1161
4.7K 10K 0.1uF

CS VCC
1 8
SPI_CS
001:H19;001:AP36
R189 DO HOLD R192
2 7
SPI_DI
001:H18;001:AP37 33 3.3K
+1.8V_DDR +1.0VDC WP CLK
3 6 SPI_SCLK
001:H19;001:AP37
GND DIO
4 5 SPI_DO
C102 C104 C108 C111 C116 C118 C122 C125 C129 C132 C135 C138 C141 C144 C147 C150 C153 C155 C158 C161 C164 C167 C169 C171 C174 C178 C180 C185 C188 C191 C194 C197 C1100 C1103 C1106 C1109 C1112 C1115 C1118 C1120 C1124 C1126 C1128 C1132 C1135 C1138 C1142 C1145 C1147 001:H18;001:AP36
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF 22uF 22uF 22uF 22uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF C1150
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 10V 10V 10V 10V 10V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 10V 10uF
10V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 3D + 240 FRC + TCON BOARD 2009. 11. 13
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. ฀
LG1120(FRC 240Hz Chip) 1 10
IC200 IC205
+0.9VREF H5PS5162FFR-S6C +0.9VREF H5PS5162FFR-S6C
DDR_DATA[0-31] DDR_DATA[0-31] 001:O40;002:N40
001:O40;002:AQ40
For Termination of DDR
VREF DQ0 VREF DQ0
DDR_ADDR[0-12] J2 G8 DDR_DATA[0] For Termination of DDR DDR_ADDR[0-12] J2 G8 DDR_DATA[16]
G2 DQ1 DDR_DATA[1] G2 DQ1 DDR_DATA[17]
001:L40;002:W39;002:AH39;002:BD39 001:L40;002:E39;002:W39;002:BD39
H7 DQ2 DDR_DATA[2] H7 DQ2 DDR_DATA[18]
DDR_ADDR[0] A0 M8 DDR_ADDR[0] A0 M8
H3 DQ3 DDR_DATA[3] H3 DQ3 DDR_DATA[19] +0.9VTT DDR_ADDR[0-12]
DDR_ADDR[1] A1 M3 DDR_ADDR[1] A1 M3
H1 DQ4 DDR_DATA[4] +0.9VTT DDR_ADDR[0-12] H1 DQ4 DDR_DATA[20]
DDR_ADDR[2] A2 M7 DDR_ADDR[2] A2 M7 001:L40;002:E39;002:W39;002:AH39
H9 DQ5 DDR_DATA[5] 001:L40;002:E39;002:AH39;002:BD39 H9 DQ5 DDR_DATA[21]
DDR_ADDR[3] A3 N2 DDR_ADDR[3] A3 N2
F1 DQ6 DDR_DATA[6] F1 DQ6 DDR_DATA[22]
DDR_ADDR[4] A4 N8 DDR_ADDR[4] A4 N8
F9 DQ7 DDR_DATA[7] F9 DQ7 DDR_DATA[23]
DDR_ADDR[5] A5 N3 DDR_ADDR[5] A5 N3 150 R2212 DDR_ADDR[0]
C8 DQ8 DDR_DATA[8] C8 DQ8 DDR_DATA[24] DDR_ADDR[1]

C1230
A6 150 R288 A6 150 R2213

C1220

C1226

C1232

C1234
DDR_ADDR[0]

0.1uF

0.1uF

C1228

0.1uF

0.1uF

0.1uF
DDR_ADDR[6] N7 DDR_ADDR[6] N7

0.1uF
C2 DQ9 DDR_DATA[9] C2 DQ9 DDR_DATA[25]
A7 150 R289 DDR_ADDR[1] A7 150 R2214 DDR_ADDR[2]

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
DDR_ADDR[7] P2 DDR_ADDR[7] P2

0.1uF

C248
DQ10 DQ10

C240

C242

C250

C252
C246
A8 D7 DDR_DATA[10] 150 R290 A8 D7 DDR_DATA[26] 150 R2215
DDR_ADDR[8] P8 DDR_ADDR[2] DDR_ADDR[8] P8 DDR_ADDR[3]
D3 DQ11 DDR_DATA[11] D3 DQ11 DDR_DATA[27]
DDR_ADDR[9] A9 P3 150 R291 DDR_ADDR[3] DDR_ADDR[9] A9 P3
D1 DQ12 DDR_DATA[12] D1 DQ12 DDR_DATA[28]
DDR_ADDR[10] A10/AP M2 DDR_ADDR[10] A10/AP M2
D9 DQ13 DDR_DATA[13] D9 DQ13 DDR_DATA[29]
DDR_ADDR[11] A11 P7 DDR_ADDR[11] A11 P7 150 R2216 DDR_ADDR[4]
B1 DQ14 DDR_DATA[14] B1 DQ14 DDR_DATA[30]
DDR_ADDR[12] A12 R2 150 R292 DDR_ADDR[4] DDR_ADDR[12] A12 R2 150 R2217 DDR_ADDR[5]
B9 DQ15 DDR_DATA[15] B9 DQ15 DDR_DATA[31]
150 R293 DDR_ADDR[5] 150 R2218 DDR_ADDR[6]
+1.8V_DDR 150 R294 DDR_ADDR[6] +1.8V_DDR 150 R2219 DDR_ADDR[7]
BA0 L2 BA0 L2
001:Z38;002:U33;002:AI36;002:BB34 DDR_BA0 150 R295 DDR_ADDR[7] 001:Z38;002:F36;002:U33;002:BB34 DDR_BA0
BA1 L3 BA1 L3
001:AA38;002:U33;002:AI36;002:BB33 DDR_BA1 A1 VDD5 001:AA38;002:F36;002:U33;002:BB33 DDR_BA1 A1 VDD5
R204 VDD4 R246 VDD4
E1 E1
150 R2220 DDR_ADDR[8]
200 CK J8 J9 VDD3 200 CK J8 J9 VDD3
001:V38;002:AI35 DDR_CLK 150 R296 DDR_ADDR[8] 001:V38;002:F35 DDR_CLK 150 R2221 DDR_ADDR[9]
CK K8 M9 VDD2 CK K8 M9 VDD2
001:V38;002:AI35 DDR_CLK 150 R297 001:V38;002:F35 DDR_CLK 150 R2222 DDR_ADDR[10]
CKE VDD1 DDR_ADDR[9] CKE VDD1
001:X38;002:U32;002:AI35;002:BB33 DDR_CKE K2 R1 K2 R1
150 R298 DDR_ADDR[10] 001:X38;002:F35;002:U32;002:BB33 DDR_CKE 150 R2223 DDR_ADDR[11]
150 R299 DDR_ADDR[11]
ODT K9 ODT K9
001:Y38;002:U31;002:AI34;002:BB31 DDR_ODT 001:Y38;002:F34;002:U31;002:BB31 DDR_ODT 150 R258 DDR_ADDR[12]
CS L8 A9 VDDQ10 CS L8 A9 VDDQ10
001:X38;002:U33;002:AI34;002:BB33 DDR_CS 150 R215 DDR_ADDR[12] 001:X38;002:F34;002:U33;002:BB33 DDR_CS
RAS K7 C1 VDDQ9 RAS K7 C1 VDDQ9
001:Y38;002:U31;002:AI34;002:BB32 DDR_RAS 001:Y38;002:F34;002:U31;002:BB32 DDR_RAS
CAS L7 C3 VDDQ8 CAS L7 C3 VDDQ8
001:Y38;002:U32;002:AI34;002:BB32 DDR_CAS 001:Y38;002:F34;002:U32;002:BB32 DDR_CAS
WE K3 C7 VDDQ7 WE K3 C7 VDDQ7 150 R259
001:X38;002:U32;002:AI34;002:BB32 DDR_WE 001:X38;002:F34;002:U32;002:BB32 DDR_WE DDR_BA0 001:Z38;002:F36;002:U33;002:AI36
R202 R205 C9 VDDQ6 150 R216 R247 R249 C9 VDDQ6
DDR_BA0 001:Z38;002:F36;002:AI36;002:BB34 150 R260
E9 VDDQ5 E9 VDDQ5 DDR_BA1 001:AA38;002:F36;002:U33;002:AI36
100 100 LDQS F7 150 R217 100 100 LDQS F7
001:V38 DDR_DQS0 G1 VDDQ4 DDR_BA1 001:AA38;002:F36;002:AI36;002:BB33 001:W38 DDR_DQS2 G1 VDDQ4
OPT OPT UDQS OPT OPT UDQS 150 R261
001:W38 DDR_DQS1 B7 VDDQ3 DDR_DQS3 B7 VDDQ3 DDR_CS
G3 150 R218 001:W38 G3 001:X38;002:F34;002:U33;002:AI34
DDR_CS 001:X38;002:F34;002:AI34;002:BB33
G7 VDDQ2 G7 VDDQ2 150 R262
DDR_CKE 001:X38;002:F35;002:U32;002:AI35
LDM F3 G9 VDDQ1 150 R219 LDM F3 G9 VDDQ1
001:Y38 DDR_DM0 DDR_CKE 001:X38;002:F35;002:AI35;002:BB33 001:Z38 DDR_DM2 150 R263
UDM B3 UDM B3 DDR_WE 001:X38;002:F34;002:U32;002:AI34
001:Z38 DDR_DM1 150 R220 001:Z38 DDR_DM3
DDR_WE 001:X38;002:F34;002:AI34;002:BB32 150 R264
DDR_CAS 001:Y38;002:F34;002:U32;002:AI34
LDQS VSS5 150 R221 LDQS VSS5
001:V38 DDR_DQS0 E8 A3 DDR_CAS 001:Y38;002:F34;002:AI34;002:BB32 001:W38 DDR_DQS2 E8 A3 150 R265
UDQS A8 E3 VSS4 UDQS A8 E3 VSS4 DDR_RAS 001:Y38;002:F34;002:U31;002:AI34
001:W38 DDR_DQS1 150 R222 001:X38 DDR_DQS3
J3 VSS3 DDR_RAS 001:Y38;002:F34;002:AI34;002:BB32 J3 VSS3
150 R266
N1 VSS2 N1 VSS2 DDR_ODT 001:Y38;002:F34;002:U31;002:AI34
NC4 L1 150 R223 NC4 L1
P9 VSS1 DDR_ODT 001:Y38;002:F34;002:AI34;002:BB31 P9 VSS1
NC5 R3 NC5 R3
NC6 R7 NC6 R7

B2 VSSQ10 B2 VSSQ10
NC1 A2 NC1 A2
B8 VSSQ9 B8 VSSQ9
NC2 E2 NC2 E2
A7 VSSQ8 A7 VSSQ8
NC3 R8 NC3 R8
D2 VSSQ7 D2 VSSQ7
D8 VSSQ6 D8 VSSQ6
VSSDL E7 VSSQ5 VSSDL E7 VSSQ5 0.9V DDR VREF POWER DIVIDER
J7 J7
+1.8V_DDR F2 VSSQ4 +1.8V_DDR F2 VSSQ4
F8 VSSQ3 F8 VSSQ3
H2 VSSQ2 H2 VSSQ2
+3.3VD - For Main Chip Side
VDDL J1 H8 VSSQ1 VDDL J1 H8 VSSQ1

+1.8V_DDR +1.8V_DDR +1.8V_DDR


+0.9VTT

+0.9VREF +0.9VREF +0.9VREF


R250 R276 R284
4.7K 4.7K 4.7K
C259 C255 C253
IC202 OPT OPT OPT
R224
0.1uF 4.7uF 68uF 10K BD35331F-E2
+1.8V_DDR 16V 10V 10V +1.8V_DDRS

GND VTT C1216 C1222 C1236 C1240 C1244 C1246


1 8 R251 R277 R285
0.1uF 0.01uF 4.7K 0.1uF 0.01uF 4.7K 0.1uF 0.01uF 4.7K
16V 50V OPT 16V 50V OPT 16V 50V OPT
C200 C203 C206 C209 C212 C215 C218 C221 C223 C225 C227 C229 C231 C233 C235 C237 C243 EN VTT_IN C275 C278 C281 C284 C287 C290 C293 C296 C298 C1200 C1202 C1204 C1206 C1208 C1210 C1212 C1214
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF 2 7 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 10V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 10V
+0.9VREF VTTS VCC +1.8V_DDR
C267
3 6
RC FILTER 10uF
R236 6.3V
VREF VDDQ 220
4 5
+1.8V_DDRS +1.8V_DDRS +1.8V_DDRS
C263 C261 C257 C265 C269 C273 C271
0.01uF 0.1uF 10uF 1uF 2.2uF 0.01uF 0.1uF
50V 6.3V 10V 25V 50V 16V
16V
+0.9VREFS +0.9VREFS +0.9VREFS
+1.8V_DDRS R252 R278 R286
+1.8V_DDR 4.7K 4.7K 4.7K
OPT OPT OPT

C276 C279 C282 C285 C288 C291 C294 C297 C299 C1201 C1203 C1205 C1207 C1209 C1211 C1213 C1215
C201 C204 C207 C210 C213 C216 C219 C222 C224 C226 C228 C230 C232 C234 C236 C238 C244 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF C1217 C1223 R253 C1237 C1241 R279 C1245 C1247 R287
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 10V 0.1uF 0.01uF 4.7K 0.1uF 0.01uF 4.7K 0.1uF 0.01uF 4.7K
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 10V
16V 50V OPT 16V 50V OPT 16V 50V OPT

+3.3VD

+0.9VREF +0.9VREFS
+0.9VTTS - For SDRAM Side

+1.8V_DDR +1.8V_DDR
C202 C205 C208 C211 C214 C217 C220 C277 C280 C283 C286 C289 C292 C295
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C260 C256 C254
IC203 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16V 16V 16V 16V 16V 16V 16V R225 16V 16V 16V 16V 16V 16V 16V
0.1uF 4.7uF 68uF 10K BD35331F-E2
16V 10V 10V +0.9VREF +0.9VREF
R254 R280
4.7K 4.7K
GND VTT OPT
1 8 OPT

EN VTT_IN
2 7
C1218 C1224 R255 C1238 C1242 R281
+0.9VREFS 0.1uF 0.01uF 4.7K 0.1uF 0.01uF 4.7K
VTTS VCC 16V 50V OPT 16V 50V
3 6 C268 +1.8V_DDRS OPT
RC FILTER
10uF
R237
VREF VDDQ 220 6.3V
4 5

C274 C272
C264 C262 C258 C266 C270 0.01uF 0.1uF IC204
0.01uF 0.1uF 10uF 1uF 2.2uF 50V 16V
50V 16V 6.3V 10V 25V +0.9VREFS H5PS5162FFR-S6C
IC201 DDRS_DATA[0-31]
+0.9VREFS +1.8V_DDRS +0.9VREFS +1.8V_DDRS
+0.9VREFS H5PS5162FFR-S6C 001:N11;002:N17
DDRS_DATA[0-31] 001:N11;002:AT17 VREF J2 G8 DQ0 DDRS_DATA[16]
DDRS_ADDR[0-12]
G2 DQ1 DDRS_DATA[17]
001:K12;002:E16;002:W13;002:BD12
VREF J2 G8 DQ0 DDRS_DATA[0] H7 DQ2 DDRS_DATA[18] R256 R282
DDRS_ADDR[0-12] DDRS_ADDR[0] A0 M8 4.7K 4.7K
G2 DQ1 DDRS_DATA[1] H3 DQ3 DDRS_DATA[19]
001:K12;002:W13;002:AK17;002:BD12 DDRS_ADDR[1] A1 M3 OPT OPT
H7 DQ2 DDRS_DATA[2] H1 DQ4 DDRS_DATA[20]
DDRS_ADDR[0] A0 M8 DDRS_ADDR[2] A2 M7
H3 DQ3 DDRS_DATA[3] H9 DQ5 DDRS_DATA[21]
DDRS_ADDR[1] A1 M3 DDRS_ADDR[3] A3 N2
H1 DQ4 DDRS_DATA[4] F1 DQ6 DDRS_DATA[22]
DDRS_ADDR[2] A2 M7 DDRS_ADDR[4] A4 N8
H9 DQ5 DDRS_DATA[5] F9 DQ7 DDRS_DATA[23] C1219 C1225 R257 C1239 C1243 R283
DDRS_ADDR[3] A3 N2 DDRS_ADDR[5] A5 N3 0.1uF 0.01uF 4.7K 0.1uF 0.01uF 4.7K
F1 DQ6 DDRS_DATA[6] C8 DQ8 DDRS_DATA[24]
DDRS_ADDR[4] A4 N8 DDRS_ADDR[6] A6 N7 16V 50V OPT 16V 50V OPT
F9 DQ7 DDRS_DATA[7] C2 DQ9 DDRS_DATA[25]
DDRS_ADDR[5] A5 N3 DDRS_ADDR[7] A7 P2
C8 DQ8 DDRS_DATA[8] D7 DQ10 DDRS_DATA[26]
DDRS_ADDR[6] A6 N7 DDRS_ADDR[8] A8 P8
C2 DQ9 DDRS_DATA[9] D3 DQ11 DDRS_DATA[27]
DDRS_ADDR[7] A7 P2 DDRS_ADDR[9] A9 P3
D7 DQ10 DDRS_DATA[10] D1 DQ12 DDRS_DATA[28]
DDRS_ADDR[8] A8 P8 DDRS_ADDR[10] A10/AP M2
D3 DQ11 DDRS_DATA[11] D9 DQ13 DDRS_DATA[29]
DDRS_ADDR[9] A9 P3 DDRS_ADDR[11] A11 P7
D1 DQ12 DDRS_DATA[12] B1 DQ14 DDRS_DATA[30]
DDRS_ADDR[10] A10/AP M2 DDRS_ADDR[12] A12 R2
DQ13 DQ15
DDRS_ADDR[11] A11 P7
D9 DDRS_DATA[13] For Termination of DDR B9 DDRS_DATA[31]
B1 DQ14 DDRS_DATA[14]
DDRS_ADDR[12] A12 R2 +1.8V_DDRS
B9 DQ15 DDRS_DATA[15] BA0 L2
001:Z13;002:F13;002:U8;002:BB7 DDRS_BA0
BA1 L3
+1.8V_DDRS 001:AA13;002:F13;002:U7;002:BB6 DDRS_BA1 VDD5
BA0 +0.9VTTS DDRS_ADDR[0-12] A1
L2 R245
001:Z13;002:U8;002:AK13;002:BB7 DDRS_BA0 E1 VDD4
BA1 001:K12;002:E16;002:AK17;002:BD12
001:AA13;002:U7;002:AK13;002:BB6 DDRS_BA1
L3
A1 VDD5 200 CK J8 J9 VDD3 For Termination of DDR
R200 001:V13;002:F12 DDRS_CLK
E1 VDD4 CK K8 M9 VDD2
001:V13;002:F12 DDRS_CLK
200 CK J8 J9 VDD3 CKE K2 R1 VDD1
001:V13;002:AK13 DDRS_CLK 001:X13;002:F12;002:U7;002:BB6 DDRS_CKE
CK K8 M9 VDD2 150 R2200 DDRS_ADDR[0]
001:V13;002:AK12 DDRS_CLK +0.9VTTS DDRS_ADDR[0-12]
CKE VDD1 150 R2201 DDRS_ADDR[1]
0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

K2 R1
0.1uF

C247

DDRS_CKE
C239

C241

C249

C251

001:X13;002:U7;002:AK12;002:BB6 ODT 001:K12;002:E16;002:W13;002:AK17


C245

150 R2202 001:Y13;002:F11;002:U5;002:BB4 K9


DDRS_ADDR[2] DDRS_ODT
CS L8 A9 VDDQ10
150 R2203 DDRS_ADDR[3] 001:X13;002:F11;002:U7;002:BB6 DDRS_CS
ODT K9 RAS K7 C1 VDDQ9
001:Y13;002:U5;002:AK12;002:BB4 DDRS_ODT 001:Y13;002:F11;002:U6;002:BB5 DDRS_RAS
CS L8 A9 VDDQ10 CAS L7 C3 VDDQ8
001:X13;002:U7;002:AK12;002:BB6 DDRS_CS 001:Y13;002:F11;002:U6;002:BB5 DDRS_CAS 150 R2224 DDRS_ADDR[0]
RAS K7 C1 VDDQ9 WE K3 C7 VDDQ7

C1231
001:Y13;002:U6;002:AK11;002:BB5 150 R2204 001:X13;002:F11;002:U6;002:BB5 150 R2225

C1221

C1227

C1233

C1235
DDRS_RAS DDRS_ADDR[4] DDRS_WE DDRS_ADDR[1]

0.1uF

0.1uF

C1229

0.1uF

0.1uF

0.1uF
0.1uF
CAS L7 C3 VDDQ8 R244 R248 C9 VDDQ6
001:Y13;002:U6;002:AK11;002:BB5 DDRS_CAS 150 R2205 DDRS_ADDR[5] 150 R2226 DDRS_ADDR[2]
WE K3 C7 VDDQ7 E9 VDDQ5
001:X13;002:U6;002:AK11;002:BB5 DDRS_WE 150 R2206 DDRS_ADDR[6] LDQS 150 R2227 DDRS_ADDR[3]
VDDQ6 100 100 F7 VDDQ4
R201 R203 C9 001:W13 DDRS_DQS2 G1
150 R2207 DDRS_ADDR[7] OPT OPT UDQS B7
E9 VDDQ5 001:W13 DDRS_DQS3 G3 VDDQ3
100 100 LDQS F7
001:V13 DDRS_DQS0 G1 VDDQ4 G7 VDDQ2
OPT OPT UDQS B7 150 R2228 DDRS_ADDR[4]
001:W13 DDRS_DQS1 G3 VDDQ3 LDM F3 G9 VDDQ1
001:Z13 DDRS_DM2 150 R2229 DDRS_ADDR[5]
G7 VDDQ2 150 R2208 DDRS_ADDR[8] UDM B3
001:Z13 DDRS_DM3 150 R2230 DDRS_ADDR[6]
LDM F3 G9 VDDQ1 150 R2209 DDRS_ADDR[9]
001:Y13 DDRS_DM0 150 R2231 DDRS_ADDR[7]
UDM B3 150 R2210 DDRS_ADDR[10]
001:Z13 DDRS_DM1 LDQS E8 A3 VSS5
150 R2211 DDRS_ADDR[11] 001:W13 DDRS_DQS2
UDQS A8 E3 VSS4
001:X13 DDRS_DQS3
LDQS E8 A3 VSS5 J3 VSS3
001:V13 DDRS_DQS0 150 R2232 DDRS_ADDR[8]
UDQS A8 E3 VSS4 150 R206 DDRS_ADDR[12] N1 VSS2
001:W13 DDRS_DQS1 NC4 L1 150 R2233 DDRS_ADDR[9]
J3 VSS3 P9 VSS1
NC5 R3 150 R2234 DDRS_ADDR[10]
N1 VSS2
NC4 L1 NC6 R7 150 R2235 DDRS_ADDR[11]
P9 VSS1
NC5 R3 150 R207
DDRS_BA0 001:Z13;002:F13;002:AK13;002:BB7
NC6 R7 B2 VSSQ10
150 R208 NC1 A2 150 R267 DDRS_ADDR[12]
DDRS_BA1 001:AA13;002:F13;002:AK13;002:BB6 B8 VSSQ9
NC2 E2
B2 VSSQ10 A7 VSSQ8
NC1 150 R209 001:X13;002:F11;002:AK12;002:BB6 NC3
A2 VSSQ9 DDRS_CS R8 VSSQ7
NC2 B8 D2
E2 VSSQ8 150 R210 VSSQ6 150 R268
NC3 A7 DDRS_CKE D8 DDRS_BA0 001:Z13;002:F13;002:U8;002:AK13
R8 001:X13;002:F12;002:AK12;002:BB6
D2 VSSQ7 VSSDL E7 VSSQ5
150 R211 J7 150 R269
D8 VSSQ6 DDRS_WE 001:X13;002:F11;002:AK11;002:BB5 +1.8V_DDRS F2 VSSQ4 DDRS_BA1 001:AA13;002:F13;002:U7;002:AK13
VSSDL E7 VSSQ5 150 R212 F8 VSSQ3
J7 001:Y13;002:F11;002:AK11;002:BB5 150 R270 001:X13;002:F11;002:U7;002:AK12
+1.8V_DDRS VSSQ4 DDRS_CAS VSSQ2 DDRS_CS
F2 H2
F8 VSSQ3 150 R213 VDDL J1 H8 VSSQ1 150 R271
DDRS_RAS 001:Y13;002:F11;002:AK11;002:BB5 DDRS_CKE 001:X13;002:F12;002:U7;002:AK12
H2 VSSQ2
150 R272
VDDL J1 H8 VSSQ1 150 R214 001:Y13;002:F11;002:AK12;002:BB4 DDRS_WE 001:X13;002:F11;002:U6;002:AK11
DDRS_ODT
150 R273
DDRS_CAS 001:Y13;002:F11;002:U6;002:AK11
150 R274
DDRS_RAS 001:Y13;002:F11;002:U6;002:AK11

150 R275
DDRS_ODT 001:Y13;002:F11;002:U5;002:AK12

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 3D + 240 FRC + TCON BOARD 2009. 11. 13
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR2 SDRAM 2 10
+1.8V_DDR
IC307
+2.5VQ +5V_NORMAL AP2132MP-2.5TRG1
[EP]
VOUT : 1.8
R371
DDR2 SDRAM SOURCE POWER for FRC L319 10K PG
1 8
GND
BCD R373-*1
120-ohm 12K

THERMAL
BCD R373 1% SEMTECH
R372 15K R2
BCD_REGULATOR 91K EN ADJ R2

9
MAIN 3.3V & 3.3V IO POWER SEMTECH
2 7
R374-*1
R374 15K
30K R1 1%
VLCD_POWER R369 VIN VOUT BCD SEMTECH
VLCD_POWER 1K 3 6 R1
(+12V) C330 BCD_REGULATOR SEMTECH
IC307-*1
SC4215ISTRT

1uF C334 C394 NC_1


1 8
GND

25V 0.1uF R366 VCTRL NC


10uF
EN ADJ

C395 4
2 7

5
50V 0.1uF
VIN
3 6
VO

C397 C398 C399


16V
NC_2 NC_3
4 5

L301 0 10uF
IC301 +3.3V
L304 BCD
10uF 0.1uF
120-ohm MP8706EN-C247-LF-Z 120-ohm
C396
16V 16V
Vout= 0.8*(1+R1/R2)
2.2uF BCD

VIN_1

VIN_2

VIN_3

VIN_4

VIN_5

VIN_6
C380 C320 C381 16V

VLDO

VOUT
IN GND 47uF 10uF 1uF VLCD_POWER

V5V

R370
1 8 25V

91K
25V 25V

OPT
(+12V)
C308 +2.5VQ
1uF C311 R308

10

11

P2

4
SW_1 VCC 39K C377 C374 C317 L307
2 7 50V 100pF 1% LX_1
PGOOD

1%
1/16W

6.8K
R367
C384 C301 50V R1 22uF 22uF 22uF 22 15 3.3uH
C378
10uF 10uF 47uF OPT 10V 10V 10V LX_2 4.1A
25V 25V 25V SW_2 FB 20
3 6 R310 OPT
C302 100K EN/PSV LX_3
VLCD_POWER 25 21
0.1uF

1%
1/16W

5.1K
R368
BST EN/SYNC R309 LX_4 R320 C338 C368 C371 C372 C373
R334
4 5
R307
(+12V) 12.4K
1%
P3 8.2K 0.1uF 39K
OPT
0.01uF
OPT
22uF
10V
22uF
10V
22uF
10V
1.8V DDR SDRAM POWER
R301 ENL IC304 50V OPT
22 100K R2 28
C309 R306
0.47uF SC424MLTRT LXBST
50V 39K 12
OPT LXS
FB 1 24 +1.8V_DDRS
L305
ILIM IC308
3.6uH 23
4.9A C325 +2.5VQ +5V_NORMAL AP2132MP-2.5TRG1
[EP]
0.1uF TON 27 VOUT : 1.8
C340 R335 C369
16V BST 1000pF 10K 100pF R379
7 OPT 1% 50V 10K PG GND
R318 L317 1 8 R382-*1
100K R1 BCD

26

P1

13

14

16

17

18

19
120-ohm 12K

THERMAL
BCD R382

3
15K R2 1% SEMTECH
R380
BCD_REGULATOR 100K EN ADJ R2

9
AGND_1

AGND_2

AGND_3

PGND_1

PGND_2

PGND_3

PGND_4

PGND_5

PGND_6
2 7
SEMTECH R383-*1
R383 15K
30K R1 1%
R377 VIN VOUT BCD SEMTECH
1K 3 SEMTECH
6 R1
IC308-*1
SC4215ISTRT

BCD_REGULATOR
C3001
NC_1 GND
1 8

EN ADJ
2 7

R381 VCTRL NC
10uF
VIN VO

C3002 4
3 6

5
0.1uF
NC_2
4 5
NC_3

C3004 C3005 C3006


R338 16V 0
4.3K 10uF 10uF 0.1uF
1% BCD
R2 C3003
16V 16V
2.2uF BCD
16V
VLCD_POWER

100K
R378

OPT
(+12V)

1%
1/16W

6.8K
R375
1.0V DIGITAL CORE POWER OPT

DDR2 SDRAM SOURCE POWER for FPGA

1%
1/16W

5.1K
R376
+3.3V

VLCD_POWER OPT
VOUT=0.6*(R1+R2)/R2
L303
120-ohm
L310 2V5
IC310
R305 120-ohm MP8706EN-C247-LF-Z Vout= 0.8*(1+R1/R2)
100K
IN GND

IC302
1 8
C335 C375 C376 C370
VOUT=0.6*(R1+R2)/R2
C314 1uF C339 R336
C304 R302 MP2212DN SW_1 VCC
100pF
10K 22uF 22uF 22uF
0.01uF 2 7 50V 1% 10V 10V 10V
100pF 3K C321 50V
50V C385 C382 C379 R1
1% 10uF 10uF 22uF 1uF OPT
R1 FB EN/SYNC 25V 25V SW_2 FB 2V5 1V8
1 8 +1.0VDC 25V 35V 3 6 IC306
R303 L306 C326 VLCD_POWER +5V_NORMAL AP2132MP-2.5TRG1
[EP]
Vout= 0.8*(1+R1/R2) 9.1K 0.1uF
1% GND SW_2 3.6uH BST EN/SYNC VOUT : 1.8
R2 2 7 4 5 (+12V) R337
R321 4.7K R387
NR8040T3R6N R311 1% 10K PG GND
22 100K L318 1 8 R390-*1
IN SW_1 C337 R319 R2 BCD
120-ohm 12K

THERMAL
3 6 0.47uF BCD R390 1% SEMTECH
C316 C318 C319 50V 39K R388 15K R2
BCD_REGULATOR 91K EN ADJ R2

9
C315 22uF 22uF 0.1uF 2 7
C306 BS VCC 0.1uF 10V 10V 16V SEMTECH R391-*1
4 5 50V L314 R391 15K
C303 10uF 30K R1 1%
10uF 3.6uH R386 VIN VOUT BCD SEMTECH
25V 6.3V 0 3 6 R1
4.9A
OPT BCD_REGULATOR SEMTECH
IC306-*1
SC4215ISTRT

C3007 NC_1
1 8
GND

R389 VCTRL NC
10uF
EN ADJ

C3008 4
2 7

5
0.1uF
VIN
3 6
VO

C3010 C3011 C3012


16V
NC_2 NC_3
4 5

0 10uF
BCD
10uF 0.1uF
R304 16V
C3009 16V
10 C312 0.22uF BCD
1% 1uF 50V
10V VLCD_POWER

R392
91K

OPT
(+12V)

1.2V FPGA CORE POWER

1%
1/16W

6.8K
R384
OPT

1%
1/16W

5.1K
R385
+3.3V Vout= 0.8*(1+R1/R2)

OPT
1.8V FPGA DDR SDRAM POWER
L308
120-ohm R314
100K

C327 100pF
C332
0.47uF

VLCD_POWER
R312
10K
R313
0
R317
5.1K
50V
1.8V FPGA DDR SDRAM VTT & VREF +3.3V

(+12V) MAX 350mA DDR_VTT


+5V_NORMAL
IC303 IC305
BCD_REGULATOR
AOZ1072AI L316 MP2212DN
3.6uH
BCD_REGULATOR
L315 1V2
PGND LX_2 FB EN/SYNC
CIC21J501NE 1 8 NR8040T3R6N 1 8
VLCD_POWER
BCD_REGULATOR
(+12V)
L309 IC309
VIN LX_1 GND SW_2 3.6uH C310 C305 C307 C344 C347 BD35331F-E2
R342

2 7 BCD_REGULATOR 2 7 22uF 22uF 22uF 10uF 0.1uF


1%
47K

C388 10V 10V 10V 16V 16V 1V8


1%
1/16W 1/16W

20K

OPT
R341 R340

BCD_REGULATOR BCD_REGULATOR
0.1uF
BCD_REGULATOR AGND
3
2A 6
EN C390 C391 BCD_REGULATOR
R1
C393 IN
3 6
SW_1 C331
22uF
C333
0.1uF
C336
22uF
GND
1 8
VTT
5.6K

R325
22uF 22uF 0.1uF
1%
R343
1%

10K

10K
C386 C387 16V 50V 16V
BCD_REGULATOR 10V 10V 16V C322 C323 C383 C324
10uF 10uF BCD_REGULATOR OPT
FB COMP 22uF 0.1uF 10uF 10uF BS VCC EN VTT_IN
25V
BCD_REGULATOR
25V 4 DEV 5 BCD_REGULATOR
OPT 16V 50V 25V 25V 4 5
DDR_VREF0
2 7
12K C389 C392
BCD_REGULATOR
EAN60922901 R339 2200pF 100pF VTTS VCC
BCD_REGULATOR 50V 3 6
OPT
BCD_REGULATOR D302 L311
1N4148W_DIODES R315 BLM18PG121SN1D R329
10 VREF VDDQ 220
R344

4 5
1%
10K

R2 100V C328 OPT


C359 C363 C367
Vout=0.8*(1+R1/R2) BCD_REGULATOR C343 C346 C351 C358

OPT
R326
R316 0.1uF 10uF 2.2uF 0.1uF
10 0.1uF 0.1uF 0.1uF 0.1uF

1M
DDR_VREF1 25V 10V 16V
16V 16V 16V 16V
C329
1uF
25V L312
BLM18PG121SN1D

C342 C345
0.1uF 0.1uF
16V 16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 3D + 240 FRC + TCON BOARD 2009. 11. 13

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR


FRC & FPGA Power Block
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 3 10
001:AF18;004:AE10;004:AL20;005:AB1
001:AF18;004:AA10;004:AL20;005:AB1
+1.8V_TCON +1.8V_TCON_M

L400
120-ohm

TCON_AGP_M 004:AC20
TCON_SCL_M
TCON_SDA_M
LVDS_SEL_M 004:C8

004:C5
004:G8
004:K5
C400 C402 C404 C409 C410 C412 C414 C416
[T-CON LEFT => Master] 0.1uF
16V
0.1uF
16V
0.1uF
16V
0.1uF
16V
0.1uF
16V
0.1uF
16V
1uF
10V
1uF
10V

REVERSE_M
BIT_SEL_M
FRC_ON_M
33
R44333

R444
+3.3V_TCON +3.3V_TCON_M

L401
120-ohm

C401 C403 C405 C407 C411 C413 C415 C417 C418 C419 C423 C424 C425 C426 C427 C429 C430 C432 C433 C435

INT_SSC2

INT_VCO2

TCON_AGP
CVDD_11
OGND_11

CGND_11
CVDD_10
EOVSS_6
EOVDD_7

EOVDD_6
EOVSS_5

EOVSS_4
EOVDD_5
OGND_10
CGND_10

EOVDD_4
EOVSS_3

REVERSE

EIVDD_4
EIVSS_4

EOVDD_3

EOVSS_2
EOVDD_2

EOVSS_1
EOVDD_1
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF 1uF 1uF 1uF

LGND_5
LVDD_5

OVDD_9

CVDD_9

OVDD_8

CVDD_8
OGND_9
OVDD_7

OGND_8
OVDD_6
OGND_7

CGND_9
CVDD_7

CGND_8
CGND_7
CVDD_6
OGND_6
OVDD_5
OGND_5
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 10V 10V 10V 10V

C10S8
FRCON

SCLKO

SCLKI
DISN

SCL
SDA

NC
+3.3V_TCON_M +1.8V_TCON_M

208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
R1AN 1 156 RLV0+ +3.3V_TCON
004:R6;009:O8 TA5-
R1AP 2 155 RLV0-
004:U6;009:O7 TA5+
R1BN 3 154 NLVDD_6
004:R5;009:O10 TB5-
R1BP 4 153 RLV1+
004:U5;009:O10 TB5+ RRMV6N 008:AE10
R1CN 5 152 RLV1-
004:R5;009:O11 TC5- RRMV6P 008:AE10
R1CP 6 151 NLVSS_6
004:U5;009:O11 TC5+ +3.3V_TCON_M
R1CLKN 7 150 RLV2+
004:R5;009:O13TCLK5- RRMV5N 008:AE10
R1CLKP 8 149 RLV2- IC401
004:U5;009:O13TCLK5+ RRMV5P 008:AE11 C428
R1DN 9 148 RLV3+ M24C16-WMN6T R448
004:R5;009:O12 TD5- RRMV4N 008:AE11 0.1uF R433 R434
R1DP 10 147 RLV3- 16V 3.3K 3.3K 3.3K
004:U5;009:O12 TD5+ RRMV4P 008:AE11 OPT
R1EN 11 146 NLVDD_5 R415 R417 R422 R425 R427
004:R5;009:O14 TE5- 2K 2K 2K 2K 2K NC/E0 VCC
R1EP 12 145 RLV4+ 1 8
004:U5;009:O13 TE5+ RRMVCLKN 008:AE11
004:R4;009:O14
004:U4;009:O14
TA6-
TA6+
R2AN
R2AP
13
14
IC400 144
143
RLV4-
RLV5+
RRMVCLKP 008:AE12 MS_SEL_M 004:N10
NC/E1
2 7
WC
WP_EEPROM_TCON001:AD21;005:AK5
R2BN RLV5- I2CEN_M004:O10;004:X8
15 142
004:R3;009:O15
004:U3;009:O15
TB6-
TB6+
R2BP
LVDD_1
16 TL2425MC (GLORY) 141 NLVSS_5
RLV6+
VCO_SYNC_M004:P10 NC/E2
3 6
SCL
TCON_SCL_M
17 140 RRMV2N 008:AE12 001:AF18;004:L27;004:AA10;005:AB14
R2CN RLV6- SSC_SYNC_M004:R10
004:R3;009:Y6 18 139 RRMV2P 008:AE12
TC6-
R2CP 19 138 RLV7+ VSS SDA
004:U3;009:Y5 TC6+ RRMV1N 008:AE12 TCON_AGP_M004:S26 4 5
R2CLKN RLV7- TCON_SDA_M
001:AF18;004:L27;004:AE10;005:AB14
004:R3;009:Y5 TCLK6- 20 137 RRMV1P 008:AE13 R416 R418 R423 R426 R428
R2CLKP 21 136 NLVDD_4 2K 2K 2K 2K 2K
004:U3;009:Y5 TCLK6+
LGND_1 RLV8+ OPT OPT OPT OPT OPT
22 135 RRMV0N 008:AE13
R2DN 23 134 RLV8- Write Protection
004:R3;009:Y8 TD6- RRMV0P 008:AE13
R2DP 24 133 LLV0+ Low/NC : Normal Operation
004:U3;009:Y7 TD6+ High : Write Protection
R2EN 25 132 LLV0-
004:R3;009:Y7 TE6-
R2EP 26 131 NLVSS_4 I2C Slave Address : 0xA0
004:U3;009:Y7 TE6+
R3AN 27 130 LLV1+
004:X6;009:Y6 TA7- RLMV6N 008:AE13
R3AP 28 129 LLV1-
004:AA6;009:Y6 TA7+ RLMV6P 008:AE14
R3BN 29 128 LLV2+
004:X5;009:Y8 TB7- RLMV5N 008:AE14
R3BP 30 127 LLV2-
004:AA5;009:Y8 TB7+ RLMV5P 008:AE14 R421 R436 R446
LVDD_2 31 126 NLVDD_3
33 100 33
R3CN 32 125 LLV3+ GOE_A GOE POL_A POL GSC_A GSC
004:X5;009:Y9 TC7- RLMV4N 008:AE14 004:R10
R3CP LLV3- 004:M10 008:AE23;008:AL12 008:AE18;008:AL18 004:M10 008:AE23;008:AL12
004:AA5;009:Y9 33 124 RLMV4P 008:AE14
TC7+
R3CLKN 34 123 LLV4+
004:X5;009:Y10TCLK7- RLMVCLKN 008:AE15 C406 C420 C431
R3CLKP 35 122 LLV4- 10pF 220pF 10pF
004:AA5;009:Y10TCLK7+ RLMVCLKP 008:AE15
LGND_2 36 121 NLVSS_3 OPT OPT OPT
R3DN 37 120 LLV5+
004:X5;009:Y12 TD7-
R3DP 38 119 LLV5-
004:AA5;009:Y12 TD7+
R3EN 39 118 LLV6+
004:X5;009:Y14 TE7- RLMV2N 008:AE15
R3EP 40 117 LLV6-
004:AA5;009:Y14 TE7+ RLMV2P 008:AE16 R419 R437 R447
R4AN 41 116 NLVDD_2
004:X4;009:Y13 TA8- 33 33 33
R4AP 42 115 LLV7+ GSP_A GSP FLK_A FLK DPM_A DPM
004:AA4;009:Y12 TA8+ RLMV1N 008:AE16 004:M10 004:L10
R4BN LLV7- 008:AE18;008:AL18 006:D12 004:L10 007:W8;006:D12;006:Q5
004:X3;009:Y11 43 114 RLMV1P 008:AE16
TB8-
R4BP 44 113 NLVSS_2 C436
004:AA3;009:Y10 TB8+ R420 C408 C421 10pF
R4CN 45 112 LLV8+ 10pF 10pF
004:X3;009:Y11 TC8- RLMV0N 008:AE16 33 OPT
R4CP LLV8- GSP_R_A OPT R477 R480
46 111 RLMV0P 50V 0
004:AA3;009:Y11 TC8+ 008:AE16 OPT 0
R4CLKN NLVSS_1 004:M10
004:X3;009:Y13TCLK8- 47 110 OPT OPT
R4CLKP 48 109 NLVDD_1 R414
004:AA3;009:Y13TCLK8+ 18K
R4DN 49 108 RNLVDS
004:X3;009:Y14 TD8-
R4DP CGND_6

001:AH16
001:AJ20
004:AA3;009:Y14 50 107
TD8+
R4EN CVDD_5

DPM_CTRL1
51 106

DPM_CTRL
004:X3;009:Y16 TE8-
R4EP 52 105 CGND_5
004:AA3;009:Y16 TE8+

100
101
102
103
104
R424 R438
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
150 220
SOE_A SOE_L SOE_A SOE_R
LVDD_3
LGND_3
LVDD_4
LGND_4
EIVSS_1
EIVDD_1
CGND_1
RBF
INT_SSC1
RESET
CVDD_1
PWR_SEO
PAT_DET
INT_VCO1
FLK1
OVDD_1
OGND_1
DPN
GOE
GSC
GSP
GSP_R
OVDD_2
CGND_2
CVDD_2
EIVSS_2
OGND_2
N_S_SEL
VCORES
EIVDD_2
H_CONV
I2C_EN
CVDD_3
CGND_3
VCO_SYNC
TESTA
TESTB
TESTC
OVDD_3
OGND_3
CVDD_4
CGND_4
OVDD_4
SSC_SYNC
POL
SOE
OPT_P
OPT_N
FSEL
OGND_4
EIVSS_3
EIVDD_3
004:R10;004:AF13 008:AL18 004:R10;004:AA13 008:AE17

C437 C422
10pF 10pF

50V 50V
OPT

[TCON Reset Block]


0 R479
0 R478

SW400
OPT

JS2235S
R410

R411
0

+3.3V_TCON
TCON_SCL_M 1 6 TCON_SDA_M
001:AF18;004:L27;004:AL20;005:AB14 001:AF18;004:L27;004:AL20;005:AB14
RBF_M
005:H26 INT_SSC1_M
004:AN7;005:I9 TCON_RST

005:I26 INT_VCO1_M
FLK_A

DPM_A
GOE_A
GSC_A
GSP_A
GSP_R_A

POL_A
SOE_A
OPT_P
OPT_N
MS_SEL_M

004:X8;004:AC21 I2CEN_M

004:AC20 VCO_SYNC_M

004:AC20 SSC_SYNC_M
PWM_SEQ

2 5
H_CONV

TCON_SCL TCON_SDA
001:AP39 001:AP39
+3.3V_TCON_M +3.3V_TCON_M
TCON_SCL_S 3 4 TCON_SDA_S
008:AE17;008:AL19

R440
001:AF17;005:K26;005:AB12;005:AK4
008:AE24
004:AA13;004:AF13

001:AF18;005:J26;005:AB13;005:AK4 6.8K
R400 R404
004:AC21

+1.8V_TCON_M
004:AF17
001:AF20;005:J9

004:AF15

004:AK15
004:AA17
004:AK17
004:AA15
004:AA14
004:G5

3.3K 3.3K
OPT

R412 R445
R475 1K Q400
LVDS_SEL_M004:K26 BIT_SEL_M004:O26
008:AE17;008:AL18

1K 33 2SA1530A-T112-1R
1% I2CEN_M
R401 LVDS Data mapping seletion R405
10bit or 8bit Seletion I2CEN
10K 10K R413 R476
L:VESA format OPT L:8bit 33
H:JEIDA format H:10bit 1K I2CEN_S R450
1%
R441 10K
20K TCON_RST
1% 004:K10;005:I9
R449 C434
+3.3V_TCON_M +3.3V_TCON_M +3.3V_TCON_M 10K 0.47uF
50V

R451 100 R463 100


TA5- TA5+ TA7- R464 TA7+
R402 R406 R408 R452 100 100
3.3K 3.3K 3.3K TB5- TB5+ TB7- TB7+
R453 R465 100
100 TC7- TC7+
OPT OPT TC5- TC5+ R466
R454 100 100
TCLK5- TCLK5+ TCLK7- TCLK7+
R455 R467 100
100 TD7- TD7+
REVERSE_M 004:N26 TD5- TD5+ R468
RBF_M 004:J10 FRC_ON_M 004:O26 R456 100
100 TE7- TE7+
FRC Funtion Seletion TE5- TE5+
R403 R407 L:Disable(8Bit)
Reverse option Selection 10K When No Video input, Pattern Selection R409
10K H:Enable(10Bit(D))
L : Normal operation 10K
L:Black Pattern
H : Reverse operation H:Rotate Pattern OPT
R457 R469 100
100 TA8- TA8+
TA6- TA6+ R470 100
R458 100
TB6- TB6+ TB8- TB8+
R459 R471 100
100 TC8- TC8+
TC6- TC6+ R472 100
R460 100 TCLK8- TCLK8+
TCLK6- TCLK6+ R473 100
R461 100 TD8- TD8+
TD6- TD6+ R474 100
R462 100 TE8- TE8+
TE6- TE6+

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 3D + 240 FRC + TCON BOARD 2009. 11. 13
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 240Hz T-Con (Master,Left) 4 10
+1.8V_TCON +1.8V_TCON_S

001:AF18;004:AA9;005:AB13;005:AK4
+3.3V_TCON +3.3V_TCON_S

001:AF17;004:AE9;005:AB12;005:AK4
L500
120-ohm L501
120-ohm

C501 C503 C505 C506 C509 C511 C513 C516 C517 C518 C519 C520 C521 C522 C523 C524 C525 C526 C527 C528
C500 C502 C504 C507 C508 C510 C512 C515 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF 1uF 1uF 1uF

004:K10

004:L10

TCON_AGP_S 005:AD23
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF 1uF

TCON_SCL_S
TCON_SDA_S
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 10V 10V 10V 10V

LVDS_SEL_S 005:C6

005:C4
005:G6
005:K4
16V 16V 16V 16V 16V 16V 10V 10V

[T-CON RIGHT => Slave]

INT_SSC1_M

INT_VCO1_M

REVERSE_S
BIT_SEL_S
FRC_ON_S
R525 33
R524 33
+3.3V_TCON_S

R513 R515 R517 R519 R521


2K 2K 2K 2K 2K
OPT
MS_SEL_S 005:M9

I2CEN_S 004:X7;005:N9

INT_SSC2

INT_VCO2

TCON_AGP
+3.3V_TCON_S +1.8V_TCON_S VCO_SYNC_S 005:N9

CVDD_11
OGND_11

CGND_11
CVDD_10
EOVSS_6
EOVDD_7

EOVDD_6
EOVSS_5

EOVSS_4
EOVDD_5
OGND_10
CGND_10

EOVDD_4
EOVSS_3

REVERSE

EIVDD_4
EIVSS_4

EOVDD_3

EOVSS_2
EOVDD_2

EOVSS_1
EOVDD_1
LGND_5
LVDD_5

OVDD_9

CVDD_9

OVDD_8

CVDD_8
OGND_9
OVDD_7

OGND_8
OVDD_6
OGND_7

CGND_9
CVDD_7

CGND_8
CGND_7
CVDD_6
OGND_6
OVDD_5
OGND_5
C10S8
FRCON

SCLKO

SCLKI
SSC_SYNC_S 005:P9

DISN

SCL
SDA

NC
TCON_AGP_S 005:R26
R514 R516 R518 R520 R522

208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
2K 2K 2K 2K 2K
R1AN 1 156 RLV0+
005:Q7;009:Y26 TA3- OPT OPT OPT OPT
R1AP 2 155 RLV0-
005:T7;009:Y27 TA3+
R1BN 3 154 NLVDD_6
005:Q6;009:Y28 TB3-
R1BP 4 153 RLV1+
005:T6;009:Y28 TB3+ LRMV6N 008:AL19
R1CN 5 152 RLV1-
005:Q6;009:Y27 TC3- LRMV6P 008:AL19
R1CP 6 151 NLVSS_6
005:T6;009:Y27 TC3+
R1CLKN 7 150 RLV2+
005:Q6;009:Y29 TCLK3- LRMV5N 008:AL19
R1CLKP 8 149 RLV2-
005:T6;009:Y29 TCLK3+ LRMV5P 008:AL20
R1DN 9 148 RLV3+
005:Q6;009:Y30 TD3- LRMV4N 008:AL20
R1DP 10 147 RLV3-
005:T6;009:Y31 TD3+ LRMV4P 008:AL20
R1EN 11 146 NLVDD_5
005:Q6;009:Y31 TE3-
R1EP 12 145 RLV4+
005:T6;009:Y31 TE3+ LRMVCLKN 008:AL20
005:Q4;009:Y29
005:T4;009:Y29
TA4-
TA4+
R2AN
R2AP
13
14
IC500 144
143
RLV4-
RLV5+
LRMVCLKP 008:AL21
+3.3V_TCON +3.3V
R2BN 15 142 RLV5-
005:Q4;009:Y32
005:T4;009:Y33
TB4-
TB4+
R2BP
LVDD_1
16 TL2425MC (GLORY) 141 NLVSS_5
RLV6+
17 140 LRMV2N 008:AL21
R2CN 18 139 RLV6-
005:Q4;009:Y24 TC4- LRMV2P 008:AL21 L502 L503
R2CP 19 138 RLV7+ 120-ohm 120-ohm
005:T4;009:Y25 TC4+ LRMV1N 008:AL21 OPT +3.3V_HUB
R2CLKN 20 137 RLV7-
005:Q3;009:Y25 TCLK4- LRMV1P 008:AL22
R2CLKP 21 136 NLVDD_4
005:T3;009:Y26 TCLK4+
LGND_1 22 135 RLV8+
LRMV0N 008:AL22
R2DN 23 134 RLV8-
005:Q3;009:Y33 TD4- LRMV0P 008:AL22
R2DP 24 133 LLV0+
005:T3;009:Y33 TD4+
R2EN 25 132 LLV0-
005:Q3;009:Y34 TE4-
R2EP 26 131 NLVSS_4
005:T3;009:Y34 TE4+
R3AN 27 130 LLV1+ +3.3V_HUB
005:W7;009:Y30 TA1- LLMV6N 008:AL22
R3AP 28 129 LLV1-
005:Z7;009:Y30 TA1+ LLMV6P 008:AL23
R3BN 29 128 LLV2+
005:W6;009:Y32 TB1- LLMV5N 008:AL23
R3BP 30 127 LLV2-
005:Z6;009:Y32 TB1+ LLMV5P 008:AL23
LVDD_2 31 126 NLVDD_3
R3CN 32 125 LLV3+
005:W6;009:Y36 TC1- LLMV4N 008:AL23
R3CP LLV3- C535
005:Z6;009:Y36 33 124 LLMV4P 008:AL23
TC1+
R3CLKN 34 123 LLV4+ 0.1uF
005:W6;009:Y35 TCLK1- LLMVCLKN 008:AL24 C533
R3CLKP LLV4-
R595 R596 R597 R598
10pF
IC502
35 122

3.3K
3.3K

3.3K
3.3K 3.3K 3.3K

R1515
3.3K

R1514

R1516
008:AL24

R1513
005:Z6;009:Y35 TCLK1+ LLMVCLKP 3.3K OPT PA9516APW
LGND_2 36 121 NLVSS_3 OPT OPT OPT OPT
C534
R3DN 37 120 LLV5+
005:W6;009:Y35 TD1- 10pF
R3DP 38 119 LLV5- 001:E19;008:E19;008:W25;008:AN4;009:AP8 OPT SCL0 VCC
005:Z6;009:Y35 TD1+ I2C_SCL R599 33 1 16
R3EN 39 118 LLV6+
005:W6;009:O28 TE1- LLMV2N 008:AL24
R3EP 40 117 LLV6-
005:Z6;009:O29 TE1+ LLMV2P 008:AL25
R4AN NLVDD_2 SDA0 EN4 2K
41 116 I2C_SDA R1500 33 2 15
005:W4;009:O32 TA2-
R4AP 42 115 LLV7+ 001:E19;008:M19;008:W25;008:AN4;009:AP11 R1512
005:Z4;009:O32 TA2+ LLMV1N 008:AL25
R4BN 43 114 LLV7- SCL1 SDA4
005:W4;009:O31 TB2- LLMV1P 008:AL25
R4BP NLVSS_2 R1501 33 3 14
44 113 TCON_SCL_M
005:Z4;009:O31 TB2+
R4CN 45 112 LLV8+
005:W4;009:O26 TC2- LLMV0N 008:AL25
R4CP LLV8- SDA1 SCL4
46 111 LLMV0P 008:AL25 R1502 33 4 13
005:Z4;009:O27 TC2+ TCON_SDA_M
R4CLKN 47 110 NLVSS_1
005:W4;009:O27 TCLK2-
R4CLKP 48 109 NLVDD_1 R512 001:AF19 EN1 EN3
005:Z4;009:O28 TCLK2+ R1503 33 5 12 2K
R4DN RNLVDS 18K M_TCON_EN
005:W3;009:O35 49 108 R1511
TD2- R1506
R4DP 50 107 CGND_6 2K
005:Z3;009:O35 TD2+ SCL2 SDA3
R4EN 51 106 CVDD_5 R1504 33 6 11
005:W3;009:O30 TE2- TCON_SCL_S
R4EP 52 105 CGND_5
005:Z3;009:O30 TE2+
100
101
102
103
104
SDA2 SCL3
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99

R1505 33 7 10
TCON_SDA_S
LVDD_3
LGND_3
LVDD_4
LGND_4
EIVSS_1
EIVDD_1
CGND_1
RBF
INT_SSC1
RESET
CVDD_1
PWR_SEO
PAT_DET
INT_VCO1
FLK1
OVDD_1
OGND_1
DPN
GOE
GSC
GSP
GSP_R
OVDD_2
CGND_2
CVDD_2
EIVSS_2
OGND_2
N_S_SEL
VCORES
EIVDD_2
H_CONV
I2C_EN
CVDD_3
CGND_3
VCO_SYNC
TESTA
TESTB
TESTC
OVDD_3
OGND_3
CVDD_4
CGND_4
OVDD_4
SSC_SYNC
POL
SOE
OPT_P
OPT_N
FSEL
OGND_4
EIVSS_3
EIVDD_3 S_TCON_EN
GND EN2 R1508
8 9
33
001:AF19

OPT 0
R1507

OPT 0
R1517

R1520
OPT 0
R1518

R1519
OPT 0
2K
TCON_RST

MS_SEL_S

004:X7;005:AD24I2CEN_S

005:AD24 VCO_SYNC_S

005:AD24 SSC_SYNC_S
PWM_SEQ
RBF_S

001:AF20;004:K10

[TCON EEPROM(16Kbit)]
005:AD25
005:G4

004:K10;004:AN7

+3.3V_TCON_S +3.3V_TCON_S +3.3V_TCON

R500 R504
3.3K 3.3K +1.8V_TCON_S
OPT
R527 100 R539 100
R510 TA3- TA3+ TA1- TA1+
LVDS_SEL_S 005:J26 BIT_SEL_S 005:M26 R528 100 R540 100
1K TB3- TB3+ TB1- TB1+
R529 100 R541 100
1% TC3- TC3+ TC1- TC1+ IC501
R501 LVDS Data mapping seletion R505 R530 100 R542 100 C514
10K 10K
10bit or 8bit Seletion TCLK3- TCLK3+ TCLK1- TCLK1+ M24C16-WMN6T R526 R551
L:8bit R531 0.1uF R552
L:VESA format R511 100 R543 100 3.3K 3.3K 3.3K
OPT TD3- TD3+ TD1- TD1+ 16V
H:JEIDA format H:10bit R532 OPT
1K 100 R544 100
1% TE3- TE3+ TE1- TE1+ NC/E0 VCC
1 8

+3.3V_TCON_S +3.3V_TCON_S +3.3V_TCON_S


NC/E1 WC
2 7
WP_EEPROM_TCON001:AD21;004:AL21

NC/E2 SCL
R502 R506 R508 3 6
3.3K TCON_SCL_S
001:AF18;004:AA9;005:J26;005:AB13
3.3K 3.3K R545 100
OPT R533 100 TA2- TA2+
OPT TA4- TA4+ R546 100
R534 100 TB2- TB2+ VSS SDA
TB4- TB4+ R547 4 5 TCON_SDA_S
100 001:AF17;004:AE9;005:K26;005:AB12
R535 100 TC2- TC2+
REVERSE_S 005:M26 TC4- TC4+ R548 100
RBF_S 005:I9 FRC_ON_S 005:M26 R536 TCLK2- TCLK2+
100 R549
TCLK4- TCLK4+ 100
R503 R507 R537 100 TD2- TD2+
R509 FRC Funtion Seletion TD4- TD4+ R550 100
10K Reverse option Selection 10K When No Video input, Pattern Selection R538 TE2- TE2+
10K L:Disable(8Bit) 100
L : Normal operation L:Black Pattern TE4- TE4+ Write Protection
OPT H:Enable(10Bit(D)) Low/NC : Normal Operation
H : Reverse operation H:Rotate Pattern
High : Write Protection

I2C Slave Address : 0xA0

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 3D + 240 FRC + TCON BOARD 2009. 11. 13
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 240Hz T-Con(Slave,Right) 5 10
VLCD_POWER
[POWER-VDD/VCC/VGH/VGL] (+12V)

C611 C697
10uF 47uF
25V 25V

D603-*1
R615 1K VLCD_LCM_OUT
L600 (+16V)
ONSEMI_DIODE
22uH
008:AE22 VCOMROUT D603
2.2A
SMAB34

008:AE22 VCOMRFB R638 0 R616 1K VLCD_LCM_OUT 40V


KEC_DIODE C622 C626 C629
(+16V) R623 22uF 22uF 0.1uF VDD_LCM
5.6K 25V 25V 50V (+16V)
R637 0
OPT D604
C617 DPM_VDD 006:Q12;006:S5
22000pF
50V
008:AL13 VCOMLFB R639 0 R618 1K

R617 1K R624 C624 C632 C635 C638 C640 C644 C645 C646 C647 C648 C641
C630 C649 C650 C694 C693 R1521
33K 680pF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 0.1uF 47uF 47uF 47uF 47uF 7.5K
VDD_LCM 1% 25V 25V 25V 25V
50V 25V 25V 25V 25V 25V 25V 50V 25V 25V 25V 25V
(+16V)

001:AJ20;007:Q15
TCON_POWER_EN
C606 R625 R629
1uF 20K 3.3K
25V 1% 1%
R609
P_VCOM
008:M25 0
VLCD_POWER

NEG1
OGND
OUT2
POS2
NEG2
AVIN

NC_3

SW_2
SW_1
R602 R605

SWO

SWI
R613 (+12V)

FB
0 330K 0

R646
OPT
5% 1%
1/10W OPT

0
1/8W

48
47
46
45
44
43
42
41
40
39
38
37
R626 R630 VLCD_POWER
POS1 PGND3 5.6K 15K
1 36 (+12V)
OUT1 2 35 PGND2
008:AL13 VCOMLOUT C642
VDD PGND1

0
3 34

OPT
CE 4 33 EN1 OPT

R633
VFLK IC600 EN2
004:AI15 FLK 5 32 DPM_VDD 006:S16;006:S5
VDPM 6 TPS65162RGZR 31 VC C625 22000pF VLCD_POWER
007:W8;004:AN15;006:Q5 DPM
R603 R608 0 R610 1.2K RE 7 30 SS 50V C627 (+12V)
0 22000pF

R634
C601 VGHM 8 29 DLY2 50V

1K
R607 C604
VGH_I 100pF VGH FREQ C621
VGH_M 82K 68pF 9 28 R632
(+27V) 50V 22000pF
C600 OPT 5% 50V FBP VIN 10
(+24V) 10 27 50V
1uF GND PVIN_2
25V 11 26 1/10W
DRVP 12 25 PVIN_1 1%

13
14
15
16
17
18
19
20
21
22
23
24
C618 C623
1uF 10uF C695 C634 C637
25V 25V 47uF 10uF 10uF
SUP
DRVN
AGND
FBN
REF
DLY1
NC_1
NC_2
FBB
CBOOT
SWB_1
SWB_2
VLCD_LCM_OUT 25V 25V 25V VCC_LCM
R611 (+12V) (+3.3V)
R604 C699 C605
4.7K C602 C691 270K
10uF 10uF 10uF 1uF
1%
R606 35V 35V 35V 1/16W 50V L601
D600 OPT OPT
C698 C688 C696 C612 22uH
BAV99W_NXP OPT
10uF 10uF 10uF C690 0.047uF
R645 R614 50V
4.7K 35V 35V 35V R612 1uF C607 2.2A

SMAB34
OPT 27K 24K 1uF OPT C616
50V

D602
1%

40V
1% 25V 0.1uF R635
IOP_VGH_55 IOP_VGH_55 50V C619 R627 R631 C633 C636 C639 5.1K
C613 470pF 4.7K 3.9K 22uF 22uF 22uF
0.22uF KEC_DIODE 50V 1% 1% 10V 10V 10V
R612-*1 R614-*1 16V
43K 20K

IOP_VGH_47 IOP_VGH_47
VGL(-7V)
C608 R619 D602-*1
33K C620 R628
0.47uF 1% 1.3K
470pF
50V 1%
50V
ONSEMI_DIODE OPT
R620
100K
1%
D601
BAV99W_NXP VGL
1/16W
R621

VGH VGH_I (-5V)


30K

1%

(+24V) (+24V)

R600
0
C609 C610 C614 R622
VGH_M 1K
(+24V) 10uF 10uF 10uF
10V 10V 10V 1%

R601 R640
0 33
DPM DPM_VDD
OPT
007:W8;004:AN15;006:D12 006:Q12;006:S16

C643
10pF
OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
3D + 240 FRC + TCON BOARD 2009. 11. 13
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR Power Block (TCON) 6 10
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
VLCD_POWER VLCD_POWER
(+12V) (+12V)

C742 C744 C730 C734


C704 C711 C747 C741 47uF 10uF 10uF 0.1uF
0.1uF 10uF 10uF 47uF 25V 25V 25V 50V
50V 25V 25V 25V Q700 Q702
SI4804BDY
SI4804BDY

R719 R728
10 10
5 4 4 5
D2_1 G2 G2 D2_1

+3.3V_TCON C722 C724 +1.8V_TCON


L700 6 3 3 6 L702
10uH D2_2 S2 0.22uF 0.22uF S2 D2_2 10uH
3.1A 16V 16V 3.1A
R745 R746
R1 7 2 4.7 2 7 R1
D1_1 G1 4.7 G1 D1_1
C700 C701 C703 R734 C708 C733 C735 C737 C738
R700 R705 R713 9.1K R736 R742

BST2

BST1
0.1uF 22uF 22uF 2.2 22uF 22uF 22uF 22uF 0.1uF

LX2

DH2

DH1

LX1
8 1 1 8
5.1K 50V 10V 10V 1K D1_2 S1 S1 D1_2 1K 10V 10V 10V 10V 50V 5.1K
1% 1%
C729
2200pF

12

11

10

7
C713 50V
2200pF
50V 13 6
R704 R706 PGND2 PGND1 R735
510 30K 510
1% R718 14 5 R729
0 OPT DL2 DL1 0 OPT
C706
820pF
PGOOD2 15 IC700 4 PGOOD1
R737
50V C720 36K
MAX15023ETG+T 3 TCON_POWER_EN 001:AJ20;006:P14 C732
VCC 16 EN2
10uF 820pF
25V 50V
Vout = 0.6*(1+R1/R2) FB2 17 2 EN1

COMP2 18 1 FB1
R707 R716 C717

19

20

21

22

23

24
R2 10K 2200pF
6.8K 50V Vout = 0.6*(1+R1/R2)
1% VLCD_POWER R738
R2

RT

SGND

IN

LIM2

LIM1

COMP1
(+12V) 18K
C716
47pF 1%
50V

C727 R731
2200pF 10K
R722 R725 50V
27K 16K
C728
47pF
50V
C723 R723
1uF 11K
50V

VLCD_POWER
(+12V)

C709 C745 C746 C712 C714 C743


0.1uF 10uF 10uF 10uF 10uF 47uF
50V 25V 25V 25V 25V 25V Q701
SI4804BDY

R721
IOP_HVDD_55

10 D700
HVDD 5 4 OPT
(+8V) D2_1 G2
R710-*1
5.1K
1%
L701 6 3
R1 10uH D2_2 S2 R701
3.1A 22K
VLCD_POWER DPM DPM_HVDD
7 2 (+12V) IC701 004:AN15;006:D12;006:Q5 007:O6
IOP_HVDD_47

D1_1 G1
MAX15026BETD+
C702 C705 C707 R710 R715 C731
R703 C726
0.1uF 22uF 22uF 9.1K 2.2 8 1 1uF
5.1K 1% D1_2 S1 1uF
50V 10V 10V 50V IN DH
1 14 C725
C721 0.22uF
C715 10uF 16V
2200pF 25V VCC LX
50V 2 13
R708 R711
510 120K
1%
C710 PGOOD BST
3 12
820pF
R720 R747
50V
0 4.7
EN DL
OPT 4 11
007:Z8 DPM_HVDD
R748
R726
11K LIM DRV 2.2
5 10
R712 R2 C740
C718 2.2uF
10K 47pF
1% 50V COMP GND 25V
6 9

Vout = 0.592*(1+R1/R2) R717 C719


10K 2200pF
50V FB RT
7 8

R724
27K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
3D + 240 FRC + TCON BOARD 2009. 11. 13
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR Power Block (TCON) 7 10
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
VDD_LCM
(+16V)
[RIGHT FFC CONNECTOR] [LEFT FFC CONNECTOR]
VDD_LCM VCC_LCM
L800
120-ohm (+16V) (+3.3V)
P802
FI-R51S-HF P805 P806
For LED Sync from 3D Formatter
104060-8017 104060-8017
C801 C802 C803 C804 C807 C808 C814 C815 C810 C816 C817
0.1uF 0.1uF 10uF 10uF 10uF 10uF For Shutter Glasses Sync R804 0.1uF 10uF 10uF 0.1uF 0.01uF
IC801 50V 50V 25V 25V 25V 25V 1 50V 25V 25V 50V 50V
FPGA_VSYNC
BUF16821AIPWPR OPT OPT 010:AX10 1 1
2 0
R801 0 3D_SYNC_OUT 2 2
009:AK20 LLMV0P 005:T14
3 R812 OPT 3 3
VCOM2 VCOM1 VSYNC LLMV0N 005:T14
1 28 R809 0 P_VCOM 006:H14 0 001:AD17 4 4 LLMV1P 005:T14
4 HVDD
I2C_SDA 5 5 LLMV1N
(+8V) 005:T15
OUT1 OUT16 5 001:E19;005:AB15;008:M19;008:AN4;009:AP11 6 6
V1 R805 0 2 27 R810 0 I2C_SCL LLMV2P 005:T15
008:AE21;008:AL17 V18 008:AE18;008:AL14 7 VGL 7
6 R821 33 001:E19;005:AB15;008:E19;008:AN4;009:AP8 (-5V) LLMV2N 005:T15
FRC_RESET 8 8
OUT2 OUT15 001:I17
008:AE21;008:AL17 R822 0 3 26 R828 0 V17 008:AE18;008:AL14 7 9 9 LLMVCLKP 005:T16
V2
10 OPT_P 004:R10 10 LLMVCLKN 005:T16
8 R813 0
OUT3 OUT14 L/R_SYNC 11 11
008:AE21;008:AL17 R823 0 4 25 R829 0 V16 008:AE19;008:AL15
V3 9 R802 0 12 12
3D_DIMMING LLMV4P 005:T16
010:AY5 13 VGH 13
OUT4 GNDA_2 10 R803 0 GOE 004:AC17;008:AL12
(+24V) LLMV4N 005:T17
R824 0 5 24 3D_DIMMING_2 14 14
008:AE21;008:AL17 V4 OPT 010:BF5 GSC 004:AN17;008:AL12 LLMV5P 005:T17
11 15 15 LLMV5N 005:T17
OUT5 VS_2 16 16 LLMV6P 005:T17
008:AE20;008:AL16 R825 0 6 23 12 LVRX1_AM 001:E35
V5 17 17 LLMV6N 005:T18
13 LVRX1_AP 001:E35 18 VCOMRFB 006:H17 18
OUT6 OUT13
008:AE20;008:AL16 R826 0 7 22 R830 0 V15 008:AE19;008:AL15 19 VCOMROUT 006:H18 19 LRMV0P 005:T18
V6 14 LVRX1_BM 001:E34 20 20 LRMV0N 005:T19
GNDA_1 OUT12 15 LVRX1_BP 001:E34 21 Z_OUT 008:AL14 21 LRMV1P 005:T19
8 21 R831 0 V14 008:AE19;008:AL15 22 22 LRMV1N 005:T19
VCC_LCM 16 LVRX1_CM 001:E34 23 V1 23 LRMV2P 005:T19
(+3.3V) VS_1 OUT11 008:E25;008:AL17
9 20 R832 0 V13 008:AE19;008:AL15 17 LVRX1_CP 001:E34 24 V2 24 LRMV2N 005:T20
008:E24;008:AL17
25 V3 25
18 008:E24;008:AL17
OUT7 OUT10 26 V4 26 LRMVCLKP 005:T20
R827 0 10 19 R833 0 008:E23;008:AL17
008:AE20;008:AL16 V7 V12 008:AE19;008:AL15 19 27 27
LVRX1_CLKM001:E35 V5 008:E23;008:AL16 LRMVCLKN 005:T21
28 V6 28
OUT8 GNDD 20 008:E22;008:AL16
R806 0 11 18 LVRX1_CLKP001:E35 29 29
008:AE20;008:AL16 V9 V7 008:E21;008:AL16 LRMV4P 005:T21
21 30 V9 30 LRMV4N 005:T21
008:E20;008:AL16
OUT9 BKSEL 31 V10 31 LRMV5P 005:T21
R807 0 12 17 R834 0 22 008:E20;008:AL16
008:AE20;008:AL16 V10 GAMMA_BKSEL 001:AH16 LVRX1_DM 001:E33 32 32
R835 OPT V12 008:M21;008:AL15 LRMV5N 005:T22
23 LVRX1_DP 001:E34 33 V13 33 LRMV6P 005:T22
VSD AO 1K 008:M21;008:AL15
13 16 34 V14 34 LRMV6N 005:T22
24 008:M22;008:AL15
LVRX1_EM 001:E33 35 35
V15 008:M22;008:AL15
R808 SCL SDA R811 25 LVRX1_EP 001:E33 36 V16 36 OPT_N 004:R10;008:AE17
I2C_SCL 33 14 15 33 008:M24;008:AL15
I2C_SDA 37 37
26 V17 008:M24;008:AL14 H_CONV 004:O10;008:AE17
001:E19;005:AB15;008:W25;008:AN4;009:AP8 001:E19;005:AB15;008:W25;008:AN4;009:AP11 38 38
C825 V18 008:M25;008:AL14 GSP 004:AD15;008:AE18
C824 OPT 27 39 39 POL 004:AI17;008:AE18
OPT
40 GSP 40
28 004:AD15;008:AL18
LVRX2_AM 001:AG35 41 41
POL 004:AI17;008:AL18 SOE_L 004:AD13
29 LVRX2_AP 001:AG35 42 42
43 SOE_R 004:AI13 43 V1 008:E25;008:AE21
30 LVRX2_BM 001:AG34 44 H_CONV 004:O10;008:AL18 44 V2 008:E24;008:AE21
31 LVRX2_BP 001:AG34 45 OPT_N 004:R10;008:AL19 45 V3 008:E24;008:AE21
46 46 V4 008:E23;008:AE21
32 LVRX2_CM 001:AG34 47 RLMV0P 004:V14 47 V5 008:E23;008:AE20
P803 33 48 48
LVRX2_CP 001:AG34 RLMV0N 004:V14 V6 008:E22;008:AE20
12507WR-04L 49 49
34 RLMV1P 004:V15 V7 008:E21;008:AE20
50 RLMV1N 004:V15 50 V9 008:E20;008:AE20
35 LVRX2_CLKM001:AG35 51 RLMV2P 004:V15 51 V10 008:E20;008:AE20
L802
1 VLCD_POWER 52 RLMV2N 004:V16 52 V12 008:M21;008:AE19
36 LVRX2_CLKP001:AG35 53 53 V13 008:M21;008:AE19
120-ohm
37 54 RLMVCLKP 004:V16 54 V14 008:M22;008:AE19
2
55 RLMVCLKN 004:V17 55 V15 008:M22;008:AE19
38 LVRX2_DM 001:AG33 56 56 V16 008:M24;008:AE19
3 39 LVRX2_DP 001:AG34 57 RLMV4P 004:V17 57 V17 008:M24;008:AE18
58 RLMV4N 004:V17 58 V18 008:M25;008:AE18
40 LVRX2_EM 001:AG33 59 RLMV5P 004:V17 59
4
41 LVRX2_EP 001:AG33 60 RLMV5N 004:V18 60
61 RLMV6P 004:V18 61 Z_OUT
5 42 008:AE22 VGH
62 RLMV6N 004:V18 62 (+24V)
43 63 63 VCOMLOUT 006:D13
64 RRMV0P 004:V19 64 VCOMLFB
44 006:H16
65 RRMV0N 004:V19 65
45 66 RRMV1P 004:V19 66
67 RRMV1N 004:V20 67 VGL
46 (-5V)
68 RRMV2P 004:V20 68 GSC 004:AN17;008:AE23
P804
47 69 RRMV2N 004:V20 69 GOE 004:AC17;008:AE23
12507WR-06L HVDD
70 70 (+8V)
48
71 RRMVCLKP 004:V21 71
49 72 RRMVCLKN 004:V21 72
1
73 73
50
74 RRMV4P 004:V21 74
L801 VCC_LCM
2 E_TCK 51 VLCD_POWER 75 RRMV4N 004:V22 75
(+3.3V)
76 RRMV5P 004:V22 76
120-ohm
52 77 RRMV5N 004:V22 77
3 E_TDO C805 C828 C829 78 RRMV6P 78
C827 004:V22
10uF 1uF 10uF 10uF 79 79 C818 C820
25V 25V RRMV6N 004:V23 0.1uF 0.01uF
4 25V 25V 80 80
E_TMS 50V 50V

81 81
5 E_TDI
VDD_LCM
(+16V)
6

7
C819 C821 C809
0.1uF 10uF 10uF
50V 25V 25V
OPT

+3.3V 2V5 +3.3V 2V5 +3.3V 2V5 +3.3V 2V5


For P-Gamma Data Download
P807
12505WR-04A00 VDD_LCM
(+16V)

OPT
1
5.6K
R815

R816

4.7K
R817

5.6K
R820

R836

4.7K
R837

5.6K
R840

R841

4.7K
R842

5.6K
R845

R846

4.7K
R847
R849 R850 R851 R852
OPT

OPT

OPT

OPT
2K

2K

2K

2K
TCK_FLASH TDO_FLASH TMS_FLASH TDI_FLASH
22 22 22 22 2
G

G
OPT OPT OPT OPT
R814 R818 R819 R838 R839 R843 R844 R848 3 I2C_SCL
E_TCK TCK E_TDO TDO E_TMS TMS E_TDI TDI
D

S
0 22 0 22 0 22 0 22
FDV301N C811 FDV301N C812 FDV301N C813 FDV301N C822 4
18pF 18pF 18pF 18pF I2C_SDA
Q801 OPT Q802 OPT Q803 OPT Q804 OPT OPT OPT
50V 50V 50V 50V
5
ZD800 ZD801
5.5V 5.5V
TVS TVS

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 1 3D + 240 FRC + TCON BOARD 2009. 11. 13
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Interface 8 10
2V5

L901
BLM18PG121SN1D

OPT P901
2V5 1V2 2V5 1V2 2V5 +3.3V
12505WS-10A00

L902
BLM18PG121SN1D R995
22
1

R944
TCK

10K
C901 C903 C905 C907 2V5
0.1uF 0.1uF 0.1uF 0.1uF C917 C919 C920
16V 16V 16V 16V X901 10uF 0.1uF 100pF
54.0000MHz 16V 16V 50V 2
TRISTATE/OPEN VDD R991 1K
1 4 R949 R996
GND OUTPUT 22 OPT 22
2 3 SYSCLK 3
TDO

C909

R992

R993
0.1uF EJTAG_TO_FLASH 4

1K

1K
16V IC904
R945 16V
0 EPCS16SI8N_ R997
TMS_FLASH C924 22
5
IC1000 IC1000 IC1000 0.1uF TMS
R964
EP3C55F484C6N 2V5 1V2 EP3C55F484C6N EP3C55F484C6N 22 NCS VCC_2
1 8
/CSO 6
EJTAG_TO_FLASH
R965
A11 F6 T2 2V5 27 DATA VCC_1 R947
LVTX5_CLK- B8_IO[0] VCCD_PLL3 CLK2 2 7 0
DATA0 7
R901 100 TCK_FLASH
LVTX5_CLK+ B11 B8_IO[1] F5 GNDA3 T1 CLK3 R946 R967
0 VCC DCLK 22
D10 G6 L6 3 6 DCLK
LVTX6_E- B8_IO[2] VCCA3 TC1+ B2_IO[0] TDI_FLASH 8
R950
R916 100 10K EJTAG_TO_FLASH R968
LVTX6_E+ E10 B8_IO[3] TC1- M6 B2_IO[1] CONFIG_DONE GND ASDI R994
22
4 5 ASDO 22
A10 G4 M2 9
LVTX5_A- B8_IO[4] TD2+ B1_IO[0] TCLK1+ B2_IO[2] TDI
R951 R956
R903 100 B10 G3 M1 10K C921 0
LVTX5_A+ B8_IO[5] TD2- B1_IO[1] TCLK1- B2_IO[3] /STATUS TDO_FLASH
10pF 10
LVTX5_B- A9 B8_IO[6] LVTX8_D+ B2 B1_IO[2] TD1+ M4 B2_IO[4] EJTAG_TO_FLASH
R904 100 B9 R913 100 B1 M3 R952 11
LVTX5_B+ B8_IO[7] LVTX8_D- B1_IO[3] TD1- B2_IO[5] 10K
/CONFIG
C10 B8_IO[8] G5 B1_IO[4] TE4+ N2 B2_IO[6]
G11 B8_IO[9] LVTX8_B+ E4 B1_IO[5] TE4- N1 B2_IO[7]
A8 R902 100 E3 M5
LVTX5_C- B8_IO[10] LVTX8_B- B1_IO[6] B2_IO[8] R953
1K
R905 100 B8 C2 P2 /CE
LVTX5_C+ B8_IO[11] LVTX8_E+ B1_IO[7] TD4+ B2_IO[9] OPT
A7 R917 100 C1 P1
LVTX5_E- B8_IO[12] LVTX8_E- B1_IO[8] TD4- B2_IO[10]
R907 100 B7 D2 R2
LVTX5_E+ B8_IO[13] B1_IO[9] TB4+ B2_IO[11]

LVTX6_A- A6 B8_IO[14] ASDO D1 B1_IO[10] TB4- R1 B2_IO[12]


R909 100 B6 H7 N5 +3.3V
LVTX6_A+ B8_IO[15] B1_IO[11] B2_IO[13]
FPGA Reset Level Shifter (3.3V to 2.5V)
E9 B8_IO[16] TA2+ H6 B1_IO[12] TB1+ P4 B2_IO[14]

LVTX7_A- C8 B8_IO[17] TA2- J6 B1_IO[13] TB1- P3 B2_IO[15]

OPT
R954

R958
4.7K
R912 100 OPT
C7 H4 U2

OPT
LVTX7_A+ B8_IO[18] TB2+ B1_IO[14] TE3+ B2_IO[16]

1K
IC901 +3.3V 2V5
OPT
LVTX6_D- D8 B8_IO[19] TB2- H3 B1_IO[15] TE3- U1 B2_IO[17] SW901 KIA7029AF
R915 100 JTP-1127WEM R948 R959
LVTX6_D+ E8 B8_IO[20] /CSO E2 B1_IO[16] TD3+ V2 B2_IO[18] 1 2 330 I O 0
1 3 /3D_FPGA_RESET
A5 B8_IO[21] E1 B1_IO[17] TD3- V1 B2_IO[19] OPT
OPT OPT 2 OPT
3 4 R1907 R1909
B5 F2 P5 C911 G C914 10K 4.7K
B8_IO[22] TE2+ B1_IO[18] TA1+ B2_IO[20]
0.1uF 0.1uF R963 R1910
G10 F1 N6 16V 16V 22
LVTX7_B- B8_IO[23] TE2- B1_IO[19] TA1- B2_IO[21] 0 /RESET2V5
R914 100 F10 J5 R4 C
LVTX7_B+ B8_IO[24] B1_IO[20] TA4+ B2_IO[22]
R1908 B Q902
LVTX7_C- C6 B8_IO[25] H5 B1_IO[21] TA4- R3 B2_IO[23] 2SC3052
/FPGA_RESET 10K
R934 100 D7 K6 W2 E
LVTX7_C+ B8_IO[26] /STATUS nSTATUS TCLK3+ B2_IO[24]
C
LVTX6_B- A4 B8_IO[27] TE1+ J7 B1_IO[22] TCLK3- W1 B2_IO[25] R1906 B Q901
R908 100 B4 K7 Y2 /3D_FPGA_RESET 2SC3052
LVTX6_B+ B8_IO[28] TE1- B1_IO[23] TB3+ B2_IO[26] 10K
F8 J4 Y1 E
LVTX8_A- B8_IO[29] B1_IO[24] TB3- B2_IO[27]
R932 100 G8 H2 T3
LVTX8_A+ B8_IO[30] TCLK2+ B1_IO[25] B2_IO[28]

LVTX6_C- A3 B8_IO[31] TCLK2- H1 B1_IO[26] TC3+ N7 B2_IO[29]


R911 100 B3 J3 P7
LVTX6_C+ B8_IO[32] B1_IO[27] TC3- B2_IO[30]

LVTX7_D- D6 B8_IO[33] TC2+ J2 B1_IO[28] TA3+ AA2 B2_IO[31]


R936 100 E7 J1 AA1
LVTX7_D+ B8_IO[34] TC2- B1_IO[29] TA3- B2_IO[32]

LVTX7_E- C3 B8_IO[35] DCLK K2 DCLK V4 B2_IO[33]


R935 100 C4 K1 V3
LVTX7_E+ B8_IO[36] DATA0 B1_IO[30] B2_IO[34]

LVTX8_C- F7 B8_IO[38] /CONFIG K5 nCONFIG TCLK4+ P6 B2_IO[35]


R910 100 G7 L5 R5
LVTX8_C+ B8_IO[39] TDI TDI TCLK4- B2_IO[36]
FPGA DOWNLOAD CONTROL
F9 B8_IO[40] TCK L2 TCK T4 B2_IO[37]
E6 L1 1V2 2V5 T5 IR Emitter Vsync Level Shift (2.5V to 3.3V)
B8_IO[41] TMS TMS TC4+ B2_IO[38]
E5 B8_IO[42] TDO L4 TDO TC4- R6 B2_IO[39]
2V5
G9 B8_IO[43] /CE L3 nCE T6 VCCA1

LVTX8_CLK+ G2 CLK0 U5 GNDA1


R937 100 G1 U6
LVTX8_CLK- CLK1 VCCD_PLL1
R2237 4.7K
R2238
22
/CE
+3.3V +3.3V C
R2236 B Q908
FPGA_D/L_CTRL
2SC3052
10K
LVTX1_CLK- LVTX6_CLK-
E
R1901 100 R1904 100 R2239
3.3K R1929 10K R1931 0
LVTX1_CLK+ LVTX6_CLK+
R1928
22

LVTX2_CLK- LVTX7_CLK- C
Q906 B R1930
R1902 100 R1905 100
2SC3052 /CONFIG
LVTX2_CLK+ LVTX7_CLK+ 2V5 1V2 2V5 1V2 R955 10K
0 E
C915 C
18pF
LVTX3_CLK- OPT R1932
50V Q907 B VS_STATUS2V5
3D_SYNC_OUT 2SC3052
R1903 100 C902 C904 C906 C908 10K
LVTX3_CLK+ 0.1uF 0.1uF 0.1uF 0.1uF E
16V 16V 16V 16V

+3.3V 2V5

IC1000 IC1000 IC1000


EP3C55F484C6N EP3C55F484C6N 2V5 1V2 EP3C55F484C6N

4.7K OPT
R1922

R1923

R1924
5.6K
LVTX2_E- F16 B7_IO[0] /RESET2V5 G22 CLK5 V17 VCCD_PLL4 2V5

2K
R926 100 E16 G21 V18
LVTX2_E+ B7_IO[1] SYSCLK CLK4 GNDA4

G
LVTX2_A- F15 B7_IO[2] CONFIG_DONE M18 CONF_DONE U18 VCCA4
R1921 R1925 OPT
R943 100 G16 M17 AA22 VS_STATUS2V5
LVTX2_A+ B7_IO[3] MSEL[0] MSEL0 TE8- B5_IO[0]

S
22 OPT 22
LVTX3_A- G15 B7_IO[4] MSEL[1] L18 MSEL1 TE8+ AA21 B5_IO[1] FDV301N

OPT

OPT
R925 100 F14 L17 T17 Q905

R982

R984

R986

R988
LVTX3_A+ B7_IO[5] MSEL[2] MSEL2 B5_IO[2]

0
LVTX2_D- C18 B7_IO[6] MSEL[3] K20 MSEL3 T18 B5_IO[3] AR901
R923 100 D18 L22 W20 MSEL[3]
LVTX2_D+ B7_IO[7] TB6- B6_IO[0] B5_IO[4]
MSEL[2]
D17 B7_IO[8] TB6+ L21 B6_IO[1] W19 B5_IO[5] MSEL[1]
C19 K19 Y22 MSEL[0]
LVTX2_C- B7_IO[9] B6_IO[2] TD8- B5_IO[6]

OPT

OPT
R921 100 D19 K22 Y21 1/16W

R983

R985

R987

R989
LVTX2_C+ B7_IO[10] TA6- B6_IO[3] TD8+ B5_IO[7] 22

0
A20 B7_IO[11] TA6+ K21 B6_IO[4] TE7- U20 B5_IO[8]
B20 B7_IO[12] TE5- J22 B6_IO[5] TE7+ U19 B5_IO[9] FPGA I2C Level Shift (3.3V <-> 2.5V)
VS_STATUS2V5 C17 B7_IO[13] TE5+ J21 B6_IO[6] TCLK8- W22 B5_IO[10] 2V5 +3.3V

SDA2V5 B19 B7_IO[14] TCLK5- H22 B6_IO[7] TCLK8+ W21 B5_IO[11]

SCL2V5 A19 B7_IO[15] TCLK5+ H21 B6_IO[8] TA8- T20 B5_IO[12]

LVTX3_D- A18 B7_IO[16] TD5- K17 B6_IO[9] TA8+ T19 B5_IO[13]


R918 100 B18 K18 R17

R1912

R1913

R1914
LVTX3_D+ B7_IO[17] TD5+ B6_IO[10] TD7- B5_IO[14]

5.6K
OPT
D15 J18 P17

2K

2K
LVTX3_B- B7_IO[18] B6_IO[11] TD7+ B5_IO[15]
R920 100 E15 F22 V22
LVTX3_B+ B7_IO[19] LVTX1_A- B6_IO[12] TC8- B5_IO[16]

G
G14 R938 100 F21 V21
LVTX4_E- B7_IO[20] LVTX1_A+ B6_IO[13] TC8+ B5_IO[17] R1911 R1915 GAS5-*1
SDA2V5 I2C_SDA
R929 100

D
LVTX4_E+ G13 B7_IO[21] TC5- J20 B6_IO[14] R20 B5_IO[18] 22 0 MDS62110201
C910 FDV301N GAS5_4.5T
LVTX3_E- A17 B7_IO[22] TC5+ J19 B6_IO[15] TB8- U22 B5_IO[19] 18pF
OPT Q903 R1927
R924 100 50V GAS1-*1 GAS2-*1 GAS3-*1 GAS4-*1
B17 J17 U21 0
LVTX3_E+ B7_IO[23] B6_IO[16] TB8+ B5_IO[20] FPGA_SDA
OPT MDS62110201 MDS62110201 MDS62110201 MDS62110201
LVTX4_A- A16 B7_IO[24] TB5- H20 B6_IO[17] TCLK7- R18 B5_IO[21] GAS1_4.5T GAS2_4.5T GAS3_4.5T GAS4_4.5T
R927 100 B16 H19 R19 2V5 +3.3V
LVTX4_A+ B7_IO[25] TB5+ B6_IO[18] TCLK7+ B5_IO[22]
GAS6-*1 GAS7-*1 GAS8-*1 GAS9-*1
C15 B7_IO[26] LVTX1_B- E22 B6_IO[19] N16 B5_IO[23] MDS62110201 MDS62110201 MDS62110201 MDS62110201
E14 R939 100 E21 R22 GAS6_4.5T GAS7_4.5T GAS8_4.5T GAS9_4.5T
B7_IO[27] LVTX1_B+ B6_IO[20] TC7- B5_IO[24]
F13 B7_IO[28] H18 B6_IO[21] TC7+ R21 B5_IO[25] GAS1 GAS2 GAS3 GAS4

R1917

R1918

R1919
A15 H16 P20 MDS62110208 MDS62110208 MDS62110208 MDS62110208

5.6K
LVTX4_B- B7_IO[29] B6_IO[22] B5_IO[26]

OPT
2K

2K
R928 100 GAS1 GAS2 GAS3 GAS4
LVTX4_B+ B15 B7_IO[30] LVTX1_C- D22 B6_IO[23] TB7- P22 B5_IO[27]
R940 100

G
LVTX3_C- C13 B7_IO[31] LVTX1_C+ D21 B6_IO[24] TB7+ P21 B5_IO[28]
GAS5 GAS6 GAS7 GAS8
R919 100 D13 F20 N20 R1916 R1920
LVTX3_C+ B7_IO[32] TA5- B6_IO[25] TD6- B5_IO[29] SCL2V5 I2C_SCL MDS62110208 MDS62110208 MDS62110208 MDS62110208

D
E13 F19 N19 22 0 GAS5 GAS6 GAS7 GAS8
B7_IO[33] TA5+ B6_IO[26] TD6+ B5_IO[30] C913 FDV301N
A14 G18 N17 18pF
LVTX4_C- B7_IO[34] B6_IO[27] TE6- B5_IO[31] OPT Q904 R1926
50V
0
R930 100 B14 H17 N18 FPGA_SCL GAS9
LVTX4_C+ B7_IO[35] B6_IO[28] TE6+ B5_IO[32] OPT
MDS62110208
LVTX4_D- A13 B7_IO[36] LVTX1_D- C22 B6_IO[29] TA7- N22 B5_IO[33] GAS9
R931 100 B13 R941 100 C21 N21
LVTX4_D+ B7_IO[37] LVTX1_D+ B6_IO[30] TA7+ B5_IO[34]
E12 B7_IO[38] LVTX1_E- B22 B6_IO[31] TC6- M22 B5_IO[35]
E11 R942 100 B21 M21
LVTX5_D- B7_IO[39] LVTX1_E+ B6_IO[32] TC6+ B5_IO[36]
R906 100 F11 C20 M20
LVTX5_D+ B7_IO[40] LVTX2_B- B6_IO[33] TCLK6- B5_IO[37]
A12 R922 100 D20 M19
LVTX4_CLK- CLK8 LVTX2_B+ B6_IO[34] TCLK6+ B5_IO[38]
1V2 2V5
R933 100 B12 F17 M16
LVTX4_CLK+ CLK9 B6_IO[35] B5_IO[39]
G17 B6_IO[36] T22 CLK7
F18 VCCA2 T21 CLK6
E18 GNDA2
E17 VCCD_PLL2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 3D + 240 FRC + TCON BOARD 2009. 11. 13
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. EP3C55_C6N (FPGA IC) 9 10
DDR_VREF1
DDR_VREF0

C1004 C1006 IC1001


C1028 C1031 IC1002 1V2 IC1000 IC1000
0.1uF 470pF EP3C55F484C6N 2V5 EP3C55F484C6N
0.1uF 470pF
16V 50V H5PS5162FFR-S6C
16V 50V H5PS5162FFR-S6C
SDDR_DQ[15-0] SDDR_DQ[31-16]
DDR_A[12-0] DDR_DQ[16] DDR_DQ[21] AR1005 SDDR_DQ[21] J11 VCCINT[0] VCCIO1[0] D4 L10 GND[0] GND[42] C12
DDR_DQ[0] VREF J2 G8 DQ0
DDR_A[12-0] VREF J2 G8 DQ0 DDR_DQ[17] DDR_DQ[18] SDDR_DQ[18]
DDR_DQ[1] DDR_DQ[5] AR1001 SDDR_DQ[5] G2 DQ1 C1047 C1050 C1053 J12 VCCINT[1] VCCIO1[1] F4 C1066 C1068 C1070 L11 GND[1] GND[43] C14
G2 DQ1 DDR_DQ[18] DDR_DQ[16] SDDR_DQ[16] 10uF 0.1uF 100pF 100pF 0.1uF 10uF
DDR_DQ[2] DDR_DQ[2] SDDR_DQ[2] DDR_A[0] H7 DQ2
DDR_A[0] H7 DQ2 A0 M8 DDR_DQ[19] DDR_DQ[23] SDDR_DQ[23] 16V 16V 50V L14 VCCINT[2] VCCIO1[2] K4 50V 16V 16V M10 GND[2] GND[44] C16
A0 DQ3 33
M8 DQ3 DDR_DQ[3] DDR_DQ[0] SDDR_DQ[0] DDR_A[1] A1 H3
DDR_A[1] A1 H3 M3 DQ4 DDR_DQ[20] M14 M11 A22
M3 DQ4 DDR_DQ[4] DDR_DQ[7] 33 SDDR_DQ[7] DDR_A[2] A2 H1 VCCINT[3] GND[3] GND[45]
AR1006

DDR_A[12-0]
DDR_A[2] A2 H1 M7 DQ5 DDR_DQ[21] DDR_DQ[29] SDDR_DQ[29]
DDR_A[12-0]

M7 DDR_DQ[5] DDR_A[3] H9

DDR_DQ[31-16]
DDR_A[3] H9 DQ5 A3 N2 DDR_DQ[22] DDR_DQ[26] SDDR_DQ[26] P11 VCCINT[4] VCCIO2[0] N4 L12 GND[4] GND[46] E20

DDR_DQ[15-0]
A3 N2 DDR_DQ[6] DDR_DQ[13] AR1002 SDDR_DQ[13] DDR_A[4] F1 DQ6
DDR_A[4] F1 DQ6 A4 N8 DDR_DQ[23] DDR_DQ[24] SDDR_DQ[24]
A4 N8 DDR_DQ[7] DDR_DQ[10] SDDR_DQ[10] DDR_A[5] F9 DQ7 P12 VCCINT[5] VCCIO2[1] U4 L13 GND[5] GND[47] G20
DDR_A[5] F9 DQ7 A5 N3 DDR_DQ[24] DDR_DQ[31] SDDR_DQ[31]
A5 DQ8 33
N3 DQ8 DDR_DQ[8] DDR_DQ[8] SDDR_DQ[8] DDR_A[6] A6 C8 L9 W4 1V8 M12 L20
DDR_A[6] A6 C8 N7 DQ9 DDR_DQ[25] VCCINT[6] VCCIO2[2] GND[6] GND[48]
N7 DQ9 DDR_DQ[9] DDR_DQ[15] 33 SDDR_DQ[15] DDR_A[7] A7 C2
DDR_A[7] C2 P2 DDR_DQ[26] DDR_DQ[30] AR1007 SDDR_DQ[30] M9 M13 P19
A7 P2 DDR_DQ[10] DDR_A[8] D7 DQ10 VCCINT[7] GND[7] GND[49]
DDR_A[8] D7 DQ10 A8 P8 DDR_DQ[27] DDR_DQ[25] SDDR_DQ[25]
A8 P8 DDR_DQ[11] DDR_DQ[14] AR1003 SDDR_DQ[14] DDR_A[9] D3 DQ11
DDR_A[9] D3 DQ11 A9 P3 DDR_DQ[28] DDR_DQ[28] SDDR_DQ[28] J13 VCCINT[8] VCCIO3[0] AB2 N11 GND[8] GND[50] V20
A9 P3 DDR_DQ[12] DDR_DQ[9] SDDR_DQ[9] DDR_A[10] D1 DQ12
DDR_A[10] D1 DQ12 A10/AP M2 DDR_DQ[29] DDR_DQ[27] SDDR_DQ[27]
A10/AP DQ13 33 J14 W5 C1067 C1069 C1071 K11 Y20
M2 DQ13 DDR_DQ[13] DDR_DQ[12] SDDR_DQ[12] DDR_A[11] A11 D9 VCCINT[9] VCCIO3[1] GND[9] GND[51]
DDR_A[11] A11 D9 P7 DQ14 DDR_DQ[30] 100pF 0.1uF 10uF
P7 DQ14 DDR_DQ[14] DDR_DQ[11] 33 SDDR_DQ[11] DDR_A[12] A12 B1 K14 W9 50V 16V 16V N12 AB22
DDR_A[12] B1 R2 DDR_DQ[31] DDR_DQ[22] AR1008 SDDR_DQ[22] VCCINT[10] VCCIO3[2] GND[10] GND[52]
A12 R2 DDR_DQ[15] B9 DQ15 1V8
B9 DQ15 1V8 DDR_DQ[17] SDDR_DQ[17]
DDR_DQ[6] AR1004 SDDR_DQ[6] J10 VCCINT[11] VCCIO3[3] W11 K12 GND[11] GND[53] Y18
BA0 DDR_DQ[19] SDDR_DQ[19]
BA0 DDR_DQ[1] SDDR_DQ[1] DDR_BA[0] L2 K9 K13 Y16
DDR_BA[0] L2 BA1 DDR_DQ[20] 33 SDDR_DQ[20] VCCINT[12] GND[12] GND[54]
BA1 DDR_DQ[3] SDDR_DQ[3] DDR_BA[1] L3 VDD5 1V8
DDR_BA[1] L3 VDD5 1V8 A1 N9 N13 Y12
A1 DDR_DQ[4] 33 SDDR_DQ[4] DDR2_CLK VDD4 VCCINT[13] AB21 GND[13] GND[55]
E1 VCCIO4[0]

R1006
DDR2_CLK E1 VDD4 C1042
P9 N10 Y11

100
C1019 CK VDD3
R1001

CK VDD3 J8 J9 100pF VCCINT[14] W12 GND[14] GND[56]


J8 J9 100pF VCCIO4[1]
100

CK K8 M9 VDD2 50V
CK K8 M9 VDD2 50V /DDR2_CLK P10 VCCINT[15] K10 GND[15] GND[57] Y9
/DDR2_CLK CKE K2 R1 VDD1 VCCIO4[2] W16
CKE K2 R1 VDD1 DDR2_CKE 2V5
DDR2_CKE P13 VCCINT[16] J9 GND[16] GND[58] Y5
VCCIO4[3] W18

DDR2_ODT ODT K9 P14 VCCINT[17] F12 GND[17] GND[59] AB1


DDR2_ODT ODT K9
/DDR_CS CS L8 A9 VDDQ10
/DDR_CS CS L8 A9 VDDQ10 N14 VCCINT[18] H12 GND[18] GND[60] N3
/DDR_RAS RAS K7 C1 VDDQ9
/DDR_RAS RAS K7 C1 VDDQ9 VCCIO5[0] P18
/DDR_CAS CAS L7 C3 VDDQ8 J16 VCCINT[19] H13 GND[19] GND[61] U3
/DDR_CAS CAS L7 C3 VDDQ8
/DDR_WE WE K3 C7 VDDQ7 VCCIO5[1] V19
/DDR_WE WE K3 C7 VDDQ7 K15 VCCINT[20] J15 GND[20] GND[62] W3
C9 VDDQ6
C9 VDDQ6 VCCIO5[2] Y19
R1007 33 E9 VDDQ5 L16 VCCINT[21] K16 GND[21] GND[63] D3
R1002 33 E9 VDDQ5 DDR_LDQS[1] LDQS F7
DDR_LDQS[0] LDQS F7 G1 VDDQ4
G1 VDDQ4 DDR_UDQS[1] UDQS B7 M15 VCCINT[22] L15 GND[22] GND[64] F3
DDR_UDQS[0] UDQS B7 G3 VDDQ3
G3 VDDQ3 R1008 33 VCCIO6[0] E19
R1003 33 G7 VDDQ2 R12 VCCINT[23] N15 GND[23] GND[65] K3
G7 VDDQ2
DDR_LDM[1] LDM F3 G9 VDDQ1 VCCIO6[1] G19
DDR_LDM[0] LDM F3 G9 VDDQ1 R10 VCCINT[24] R13 GND[24]
DDR_UDM[1] UDM B3
DDR_UDM[0] UDM B3 VCCIO6[2] L19
R8 VCCINT[25] R11 GND[25]
R1009 1K LDQS VSS5 H9 R9
R1004 1K LDQS VSS5 E8 A3 VCCINT[26] GND[26]
E8 A3 UDQS VSS4 A21
UDQS VSS4 A8 E3 G12 VCCIO7[0] P8
A8 E3 VSS3 VCCINT[27] GND[27]
VSS3 R1010 1K J3 D12
R1005 1K J3 VSS2 J8 VCCIO7[1] H14
VSS2 NC4 N1 VCCINT[28] GND[28]
NC4 N1 L1 VSS1 D14
L1 VSS1 NC5 P9 M8 VCCIO7[2] H10
NC5 P9 R3 VCCINT[29] GND[29]
R3 NC6 D16
NC6 R7 T7 VCCIO7[3] H8
R7 VCCINT[30] GND[30]

B2 VSSQ10 T9 VCCINT[31] N8 GND[31]


B2 VSSQ10 NC1 A2
NC1 A2 B8 VSSQ9
B8 VSSQ9 NC2 E2 T13 VCCINT[32] VCCIO8[0] A2 R7 GND[32]
NC2 E2 A7 VSSQ8
A7 VSSQ8 NC3 R8
NC3 R8 D2 VSSQ7 P15 VCCINT[33] VCCIO8[1] D5 T8 GND[33]
D2 VSSQ7
D8 VSSQ6
D8 VSSQ6 H15 VCCINT[34] VCCIO8[2] D9 T12 GND[34]
VSSDL E7 VSSQ5
VSSDL E7 VSSQ5 J7
J7 F2 VSSQ4 H11 VCCINT[35] VCCIO8[3] D11 P16 GND[35]
F2 VSSQ4
F8 VSSQ3
F8 VSSQ3 K8 VCCINT[36] L8 GND[36]
H2 VSSQ2
H2 VSSQ2
VDDL J1 H8 VSSQ1 L7 VCCINT[37] M7 GND[37]
VDDL J1 H8 VSSQ1
A1 GND[38]
C5 GND[39]
C9 GND[40]
C11 GND[41]

DDR_VTT

1V8
1V8
1V2 2V5

C1002 C1003 C1005 C1007 C1008 C1010 C1012 C1013 C1014 C1015 C1016 C1017 C1018 C1020 C1021 C1022 C1023 C1024 C1025 C1026 C1029 C1032 C1033 C1034 C1035 C1036 C1037 C1038 C1039 C1040 C1041 C1043 C1044 DDR2_ODT DDR2_ODT
C1001 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
10uF /DDR_CS /DDR_CS C1072 C1077 C1082 C1087 C1092 C1097 C2002 C2007 C2012 C2016 C1074 C1079 C1084 C1089 C1094 C1099 C2004 C2009 C2014 C2017
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16V DDR_A[0] DDR_A[0] 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
DDR_A[2] DDR_A[2]

56 56
AR1009 AR1014 1V2
2V5
DDR_A[4] DDR_A[4]
DDR_A[6] DDR_A[6]
DDR_A[8] DDR_A[8]
DDR_A[11] DDR_A[11] C1073 C1078 C1083 C1088 C1093 C1098 C2003 C2008 C2013
DDR_VREF0 DDR_VREF1 C1075 C1080 C1085 C1090 C1095 C2000 C2005 C2010 C2015 C2018
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16V 16V 16V 16V 16V 16V 16V 16V 16V 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
56 56 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
AR1010 AR1015
/DDR_CAS /DDR_CAS
/DDR_RAS /DDR_RAS
C1009 C1011 C1027 C1030 DDR_A[1] DDR_A[1]
0.1uF 470pF 0.1uF 470pF
16V 50V 16V 50V DDR_A[5] DDR_A[5]
IC1000 IC1000 1V8
EP3C55F484C6N EP3C55F484C6N
56 56
AR1011 AR1016
AA12 V6 DDR_A[9] DDR_A[9]
CLK13 LVDS_STABLE_1V8 B3_IO[0] C1076 C1081 C1086 C1091 C1096 C2001 C2006 C2011
DDR_A[12] DDR_A[12]
SDDR_DQ[15-0] AB12 V5 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
CLK12 DDR_LDM[1] B3_IO[1] DDR_A[7] DDR_A[7] 16V 16V 16V 16V 16V 16V 16V 16V
SDDR_DQ[14] AA13 U7 DDR_A[3] DDR_A[3]
B4_IO[0] SDDR_DQ[31-16] L/R_SYNC_1V8 B3_IO[2]
SDDR_DQ[9] AB13 U8
B4_IO[1] 3D_DIMMING_1V8 B3_IO[3] 56 56
SDDR_DQ[8] AA14 Y4 AR1012 AR1017
B4_IO[2] /DDR_WE B3_IO[4]
DDR_BA[0] DDR_BA[0]
SDDR_DQ[15] AB14 SDDR_DQ[20] Y3
B4_IO[3] B3_IO[5] DDR_BA[1] DDR_BA[1] 3D Frame Info Level Shift (3.3V to 1.8V)
V12 Y6 DDR2_CKE DDR2_CKE
B4_IO[4] DDR_BA[0] B3_IO[6]
/DDR_WE /DDR_WE FPGA V-SYNC Level Shift (1.8V to 3.3V)
SDDR_DQ[12] W13 AA3
B4_IO[5] DDR2_CKE B3_IO[7]

DDR_UDQS[0] Y13 B4_IO[6] DDR_BA[1] AB3 B3_IO[8] 56 56 +3.3V 1V8


AR1013 AR1018
SDDR_DQ[13] AA15 SDDR_DQ[22] W6
B4_IO[7] B3_IO[9]
SDDR_DQ[10] AB15 V7
B4_IO[8] B3_IO[10]
SDDR_DQ[11] U12 SDDR_DQ[19] AA4
B4_IO[9] B3_IO[11] R1011 R1012
56 56 R1014 10K R1016 3.3K
Y14 AB4 DDR_A[10] DDR_A[10]
/DDR_CAS B4_IO[10] B3_IO[12] R1017
22
Y15 SDDR_DQ[17] AA5 FRAME_INFO_1V8
DDR_A[11] B4_IO[11] B3_IO[13]
C
DDR_LDM[0] AA16 B4_IO[12] DDR_A[10] AA6 B3_IO[14] R1015 B Q1002
SDDR_DQ[4] AB16 AB6 2SC3052
B4_IO[13] B3_IO[15] 10K
V13 AB5 E
DDR_LDQS[0] B4_IO[14] B3_IO[16] C
W14 SDDR_DQ[21] W7 R1013 B Q1001
DDR_A[1] B4_IO[15] B3_IO[17] 3D_FRAME_INFO
2SC3052 +3.3V +3.3V
U13 SDDR_DQ[18] Y7 10K
B4_IO[16] B3_IO[18]
E
SDDR_DQ[1] V14 U9
B4_IO[17] DDR_A[3] B3_IO[19]
U14 SDDR_DQ[23] V8
DDR_A[9] B4_IO[18] B3_IO[20]
U15 SDDR_DQ[16] W8 R1019 10K R1021 1K
/DDR_RAS B4_IO[19] B3_IO[21]
DDR_VTT R1022
SDDR_DQ[3] V15 AA7 22
B4_IO[20] DDR_UDM[1] B3_IO[22] FPGA_VSYNC
SDDR_DQ[6] W15 SDDR_DQ[27] AB7 C
B4_IO[21] B3_IO[23]
R1020 B Q1004
T14 SDDR_DQ[25] Y8 C1045 C1048 C1051 C1054 C1056 C1058 C1060 C1062 C1064 C1065
B4_IO[22] B3_IO[24] 2SC3052
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10K
SDDR_DQ[7] T15 T10 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
B4_IO[23] 3D_DIMMING_2_1V8 B3_IO[25] E
C
SDDR_DQ[2] AB18 T11
B4_IO[24] FRAME_INFO_1V8 B3_IO[26] R1018 B Q1003
FPGA_VSYNC_1V8
AA17 V9 2SC3052
DDR_A[0] B4_IO[25] B3_IO[27] 10K
AB17 V10 E
DDR_A[2] B4_IO[26] DDR_LDQS[1] B3_IO[28]
DDR_VTT
AA18 SDDR_DQ[26] U10
B4_IO[27] B3_IO[29]
AA19 SDDR_DQ[30] AA8
DDR2_ODT B4_IO[28] B3_IO[30]
AB19 SDDR_DQ[28] AB8 C1046 C1049 C1052 C1055 C1057 C1059 C1061 C1063
/DDR_CS B4_IO[29] B3_IO[31]
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
SDDR_DQ[0] W17 SDDR_DQ[31] AA9 16V 16V 16V 16V 16V 16V 16V 16V
B4_IO[30] B3_IO[32]

DDR_A[4] Y17 B4_IO[31] DDR_UDQS[1] AB9 B3_IO[33]


AA20 B4_IO[32] U11 B3_IO[34]
+3.3V 1V8 +3.3V 1V8
SDDR_DQ[5] AB20 SDDR_DQ[29] V11 +3.3V +3.3V
B4_IO[33] B3_IO[35] +3.3V +3.3V
V16 B4_IO[34] DDR_A[12] W10 B3_IO[36]
U16 SDDR_DQ[24] Y10
DDR2_CLK B4_IO[35] B3_IO[37]
U17 AA10 R1024 10K R1026 3.3K R1030 10K R1032 3.3K OPT
/DDR2_CLK B4_IO[36] DDR_UDM[0] B3_IO[38] OPT OPT R1035 10K R1037 1K
R1027 R1033 R1040 10K R1042 1K
T16 AB10 22 22 R1038
DDR_A[8] B4_IO[37] DDR_A[7] B3_IO[39] L/R_SYNC_1V8 LVDS_STABLE_1V8 22 R1043
3D_DIMMING 22
R16 AA11 C OPT C 3D_DIMMING_2
DDR_A[6] B4_IO[38] CLK15 C
R1025 B Q1006 R1031 B Q1008 C
R14 AB11 R1036 B Q1010
DDR_A[5] B4_IO[39] CLK14 2SC3052 2SC3052 R1041 B Q1012
10K 10K OPT 2SC3052
R15 10K 2SC3052
FPGA_VSYNC_1V8 B4_IO[40] E E 10K
OPT C C E
C E
R1023 B Q1005 R1029 B Q1007 C
L/R_SYNC FPGA_D/L_CTRL R1034 B Q1009
2SC3052 2SC3052 3D_DIMMING_1V8 R1039 B Q1011
10K 10K OPT 2SC3052 3D_DIMMING_2_1V8
OPT 10K 2SC3052
R1028 E E 10K
L/R_SYNC_FRC_OUT E
E
10K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 3D + 240 FRC + TCON BOARD 2009. 11. 13
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR2 10 10
EXT IRQ
SMD GASKET GPIO_00, GPIO_01, GPIO_02,
RESET GPIO_11, GPIO_11, GPIO_39

MDS62110206

MDS62110206

MDS62110206

MDS62110206

MDS62110206
MDS62110206

MDS62110206
MDS62110206

MDS62110206
NON_3DTV

6.5T_GAS

6.5T_GAS
6.5T_GAS

6.5T_GAS
IR_INT : GPIO_23

6.5T_GAS

6.5T_GAS
IC100

GAS4

GAS5

GAS6

GAS8

GAS9
GAS3

GAS7
GAS1

GAS2
LGE3556C (C0 VERSION) IR1_IN : GPIO_25
CI_A[0-13] IR2_IN : GPIO_29
IR_OUT : GPIO_26
J23 N26 OPT R1047
CI_A[3] 0
EBI_ADDR3 GPIO_00 POWER_DET INTERRUPT PIN PWM0 : GPIO_24
CI_A[4] J24 L26 0 R192
EBI_ADDR4 GPIO_01 DC INTERRUPT PIN DC 17page : Motion Remocon
PWM1 : GPIO_09

OPT

OPT
+3.3V_NORMAL CI_A[2] H25 N25
EBI_ADDR2 GPIO_02 ERROR_OUT INTERRUPT PIN
+3.3V_NORMAL CI_A[1] H24 L25

R1027
EBI_ADDR1 GPIO_03 MODEL_OPT_4
CI_A[0] H23 K27
3D

10K
EBI_ADDR0 GPIO_04 MODEL_OPT_5
CI_A[5] J25 K28 3DTV

R1045 EBI_ADDR5 GPIO_05 SIDE_AV_DET IC100-*1


CI_A[6] F26 K24 LGE3556CP (C0 3D PIP)

EBI_ADDR6 GPIO_06 CI_5V_CTL For CI

MDS62110204
4.7K

MDS62110204

MDS62110204
MDS62110204

MDS62110204

MDS62110204
J23 N26

CI_A[8] H28 K26 1K R114 EBI_ADDR3 GPIO_00

5.5T_GAS
J24 L26

R1030 0

5.5T_GAS

5.5T_GAS

5.5T_GAS
EBI_ADDR4 GPIO_01

GAS2-*1
HDMI_HPD_4

5.5T_GAS
H25 N25
EBI_ADDR8 GPIO_07

GAS4-*1

GAS5-*1
5.5T_GAS

GAS1-*1

GAS6-*1

GAS7-*1
EBI_ADDR2 GPIO_02
H24 L25

SOC_RESET SYS_RESETb CI_A[9] J26 K25 22 R113


H23
J25
EBI_ADDR1
EBI_ADDR0
GPIO_03
GPIO_04
K27
K28

EBI_ADDR9 GPIO_08 DEMOD_RESET 28page : ISDB Demod 17page:M_RFMODULE_RESET F26


EBI_ADDR5
EBI_ADDR6
GPIO_05
GPIO_06
K24

EBI_CS CI_A[13] H27 AA27 DEMOD_RESET


H28
J26
EBI_ADDR8 GPIO_07
K26
K25

EBI_ADDR13 GPIO_09 PWM_DIM H27


EBI_ADDR9
EBI_ADDR13
GPIO_08
GPIO_09
AA27

CI_A[12] G26 AA28 R1029 1K R1042 22 G26


J27
EBI_ADDR12
EBI_ADDR11
GPIO_10
GPIO_11
AA28
AA26

EBI_ADDR12 GPIO_10 HDMI_HPD_3 R1053 2.7K +3.3V_NORMAL


J28
F27
EBI_ADDR10 GPIO_12
L1
L3

CI_A[11] J27 AA26 G24


H26
EBI_ADDR7
EBI_TAB
GPIO_13
GPIO_14
L2
Y25

EBI_ADDR11 GPIO_11 MODEL_OPT_1 G27


EBI_WE1B
EBI_CLK_IN
GPIO_15
GPIO_16
Y26

CI_A[10] J28 L1 G28


K23
EBI_CLK_OUT
EBI_RWB
GPIO_17
GPIO_18
M27
AA25

EBI_ADDR10 GPIO_12 DSUB_DET G25


EBI_CS0B GPIO_19
R25
N28

CI_A[7] F27 L3 GPIO_20


GPIO_21
N27

EBI_ADDR7 GPIO_13 BT_RESET BT_RESET 43page : Bluetooth U24


T26
NAND_DATA0 GPIO_22
AH18
P23

22 R116 G24 L2 T27


U26
NAND_DATA1
NAND_DATA2
GPIO_23
GPIO_24
M23
AD19
/CI_WAIT EBI_TAB GPIO_14 /RST_HUB U27
NAND_DATA3
NAND_DATA4
GPIO_25
GPIO_26
AE19

22 R122 H26 Y25 V26


V27
NAND_DATA5 GPIO_27
M4
M5
EBI_WE EBI_WE1B GPIO_15 BCM_RX V28
NAND_DATA6
NAND_DATA7
GPIO_28
GPIO_29
L23

R117 G27 Y26


T24
R23
NAND_CS0B
NAND_ALE
GPIO_30
GPIO_31
Y28
Y27
T23 G2

33 EBI_CLK_IN GPIO_16 BCM_TX T25


NAND_REB GPIO_32
G3

G28 M27 SC_RE1 ==> USB_PWRFLT3


R24
NAND_CLE GPIO_33
G5

MDS62110205
NAND_WEB GPIO_34

EBI_CLK_OUT GPIO_17 SC_RE1 U25 G6

MDS62110205

MDS62110205

MDS62110205

MDS62110205

MDS62110205
NAND_RBB GPIO_35

22 R127 K23 AA25 69page : 3DIR GPIO_36


G4
L24

7.5T_GAS

7.5T_GAS

7.5T_GAS
GAS2-*2
GPIO_37

7.5T_GAS

7.5T_GAS
EBI_RW SC_RE2 SC_RE2 ==> USB_PWRON3 W24 P25

7.5T_GAS

GAS1-*2

GAS4-*2

GAS5-*2

GAS6-*2

GAS7-*2
SF_MISO GPIO_38
EBI_RWB GPIO_18 U23
V23
SF_MOSI GPIO_39
L5
K4
22 G25 R25 R111 22 V24
SF_SCK GPIO_40
K1

EBI_CS EBI_CS0B GPIO_19 CI_MOD_RESET


SF_CSB GPIO_41
GPIO_42
L27
M26
R140 N28 GPIO_43
GPIO_44
N23
R28

GPIO_20 MODEL_OPT_0 GPIO_45


GPIO_46
R27

NAND_DATA[0-7] N27 BT_MUTE GPIO_47


R26
P28

GPIO_21 DD DD 17page : Motion Remocon GPIO_48


GPIO_49
P27

+3.3V_NORMAL NAND_DATA[0] U24 AH18 R105 56 GPIO_50


GPIO_51
K6
K5

NAND_DATA0 GPIO_22 AUD_MASTER_CLK GPIO_52


P26
M3

NAND_DATA[1] T26 P23 R199 1K GPIO_53


GPIO_54
M2
M1

NAND_DATA1 GPIO_23 HDMI_HPD_2 IR_IN GPIO_55


GPIO_56
L4

NAND_DATA[2] T27 M23 GPIO_57


L6
W27

NAND_DATA2 GPIO_24 A_DIM SGPIO_00

4.7K
4.7K
W28
SGPIO_01
W26
NAND_DATA[3] U26 AD19 R106 1K 12K R1041 EMI
SGPIO_02
SGPIO_03
W25

NAND_DATA3 GPIO_25 HDMI_HPD_1 IR_IN C173 SGPIO_04


J2
J1

NAND_DATA[4] U27 AE19 R1048 100 C180 SGPIO_05


SGPIO_06
K3
K2

NAND_DATA4 GPIO_26 5V_HDMI_1 100pF 22uF SGPIO_07

NAND_DATA[5] V26 M4 R109 100 BB Add. 16V


NAND_DATA5 GPIO_27 EPHY_ACTIVITY 50V
NAND_DATA[6] V27 M5 R110 100

R194
R193
NAND_DATA6 GPIO_28 EPHY_LINK
NAND_DATA[7] V28 L23
NAND_DATA7 GPIO_29 OPT /CI_CD1 For CI /CI_CD1==> M_RFMODULE_RESET
T24 Y28 R1054 0 17page : Motion Remocon
NVRAM NAND_CEb
NAND_ALE
NAND_REb
R23
T23
NAND_CS0B
NAND_ALE
GPIO_30
GPIO_31
Y27
G2
R1055
OPT BCM_AVC_DEBUG_TX1
0
BCM_AVC_DEBUG_RX1
M_REMOTE_TX
M_REMOTE_RX R1043 0
L/R_SYNC
M_REMOTE_TX 17page : Motion Remocon
M_REMOTE_RX M_REMOTE_RX ==> L/R_SYNC
NAND_REB GPIO_32 VREG_CTRL VREG_CTRL 43page : Bluetooth
NAND_CLE T25 G3
+3.3V_NORMAL NAND_CLE GPIO_33 TUNER_RESET
From wireless_I2C to micom I2C NAND_WEb R24 G5 R107 100
NAND_WEB GPIO_34 DTV_ATV_SELECT 15page:CHB_RESET
+3.3V_NORMAL NAND_RBb U25 G6 R108 100
NAND_RBB GPIO_35 5V_HDMI_2 R115 1.8K
G4 For CI
+3.3V_NORMAL GPIO_36 AV_CVBS_DET
L24 0 R1044
GPIO_37 CI_OUTCLK
W24 P25 R1033 22 R1031 R1016
SF_MISO GPIO_38 /CI_CD2
R1025

C103
4.7K

IC102 U23 L5 R1046 22 M_REMOTE 0 0 M_REMOTE


M24M01-HRMN6TP 0.1uF SF_MOSI GPIO_39 /CI_IREQ
V23 K4
SF_SCK GPIO_40 MODEL_OPT_6

R173
V24 K1

10K
OPT
NC VCC SF_CSB GPIO_41 MODEL_OPT_3
1 8 L27 R126 0
GPIO_42 WIRELESS_DL_RX
R1032 M26 R125 0
0 E1 WP GPIO_43 WIRELESS_DL_TX
2 7 N23 R132 22
GPIO_44 FE_TS_VAL_ERR External Demod.
R28 R1050 100
GPIO_45 5V_HDMI_3
E2
3 A8’h 6
SCL
R1026 22
SCL3_3.3V
R27 R161 100
GPIO_46 5V_HDMI_4
R26 R133 22
VSS SDA GPIO_47 MODEL_OPT_2
4 5 R1028 22 P28
SDA3_3.3V GPIO_48 SCART1_DET

G
Q103 P27
C171 C167 FDV301N GPIO_49 SIDE_COMP_DET SIDE_COMP_DET
8pF 8pF K6 R103 0
GPIO_50 RF_SWITCH_CTL_CHB RF_SWITCH_CTL_CHB 15page : CHB_SUB_TUNER
OPT OPT WIRELESS_SDA K5 22 R129

S
SDA2_3.3V GPIO_51 RGB_DDC_SCL
P26 100 R160 R1052 +3.3V_NORMAL

G
OPT FRC_RESET 4.7K R187-*1 R184-*1 +3.3V_NORMAL
Q104 GPIO_52 2.2K 2.2K
M3 22 R102
FDV301N * I2C MAP GPIO_53
M2 22 R1049
RGB_DDC_SDA
NON_EU NON_EU
WIRELESS_SCL SCL2_3.3V GPIO_54

S
M1
OPT GPIO_55 COMP2_DET
* I2C_0 :

1.2K

1.2K

1.2K

1.2K

1.2K

1.2K

1.2K

1.2K
R187

R184

R183

R180

R177

R176

R171

R170
L4 22 R1051
GPIO_56 LG5111_RESET
R123-*1 L6 LOCAL DIMMING
GPIO_57 HP_DET LG5111_RESET
R123 0 33 * I2C_1 : W27 EU EU
SGPIO_00 SCL0_3.3V
WIRELESS_NON_AU WIRELESS_AU W28
SGPIO_01 SDA0_3.3V
R124 0 R124-*1 * I2C_2 : W26
33 SGPIO_02 SCL1_3.3V
WIRELESS_NON_AU W25
SGPIO_03 SDA1_3.3V
WIRELESS_AU * I2C_3 : J2
SGPIO_04 SCL2_3.3V
J1
SGPIO_05 SDA2_3.3V
K3
SGPIO_06 SCL3_3.3V
K2
SGPIO_07 SDA3_3.3V

Boot Strap * NAND FLASH MEMORY 4Gbit (512M for BB)


Default Res. of all NAND pin is Pull-down
+3.3V_NORMAL
ALTERA DL GPIO
+3.3V_NORMAL
NAND_DATA[0-7] R1000 ALTRA DL GPIO
2.7K CI_MOD_RESET E_TCK
0 R1056
NAND_DATA[0] OPT R1008
R1036 2.7K ALTRA DL GPIO
OPT 2.7K IC101 CI_OUTCLK E_TDO
NAND04GW3B2DN6E OPT 0 R1057
NAND_DATA[1] SC_RE1
R1005 R1060 0 ALTRA DL GPIO
2.7K /CI_CD2 E_TMS
R1040
OPT 2.7K 0 R1058
NC_1 NC_29
NAND_DATA[2] R169 1 48 ALTRA DL GPIO
NAND FLASH /CI_IREQ E_TDI
R1039 2.7K NC_2 NC_28 0 R1059
2.7K

2.7K

2.7K 2 47
NAND_DATA[3] OPT R1004 NC_3 NC_27
3 46
2.7K
R1037OPT NC_4 NC_26 NAND_DATA[0-7]
NAND_DATA[4]
2.7K 4 45 MODEL OPTION
R191

R1003
R134

NC_5 I/O7 NAND_DATA[7] LOW


R1002 2.7K 5 44 PIN NAME PIN NO. HIGH
OPT 2.7K
NAND_DATA[5] NC_6 I/O6 NAND_DATA[6]
R1035 6 43 MODEL_OPT_0 N28 URSA3 NON_URSA3
R1034 2.7K Open Drain RB I/O5
2.7K NAND_RBb 7 42 NAND_DATA[5] +3.3V_NORMAL
MODEL_OPT_1 AA26 MAIN_MINI_LVDS MAIN_LVDS

EXTERNEL FRC/T_CON FRC


NAND_DATA[6] R I/O4

MINI_LVDS/NO LOCAL_D
OPT R1007 NAND_DATA[4]
NAND_REb 8 41
R1006OPT 2.7K MODEL_OPT_2 R26 DDR-256M DDR-512M
2.7K E NC_25
NAND_DATA[7] NAND_CEb 9 40

1K

1K

1K

1K
1K

1K
1K

DDR_512MB
R1038 MODEL_OPT_3 K1 FHD HD
NC_7 NC_24
+3.3V_NORMAL
R158 OPT 2.7K 10 39
C116

FHD

FRC
GIP
2.7K

OLED
NAND_DATA[0-7]
4700pF NC_8 NC_23

R1017

R1022

R1011

R1020
MODEL_OPT_4 NON_FRC

R1009

R1013
11 38 C136 10uF L25 FRC

R118
R156 10V
NAND_ALE 2.7K
R157 OPT VDD_1 VDD_2 MODEL_OPT_5 NON-GIP
2.7K C114 12 37 C115 K27 GIP
0.1uF VSS_1 VSS_2 0.1uF
R1001 R1012 100
NAND_CLE 13 36 IF_AGC_SEL MODEL_OPT_0 MODEL_OPT_6 K4 OLED NON_OLED
2.7K R1019 100
NC_9 NC_22 LNA2_CTL/BOSTER_CTL MODEL_OPT_1
14 35 R1024 100
RF_SWITCH_CTL MODEL_OPT_2
NAND_IO[0] : Flash Select (1) NC_10 NC_21 R181 100
0 : Boot From Serial Flash 15 34 BT_ON/OFF MODEL_OPT_3 *MODEL_OPT_0 & MODEL_OPT_4
1 : Boot From NAND Flash BCM BT MODULE REFER TO THIS OPTION
CL NC_20 BT_ON/OFF MODEL_OPT_4 15page:TW_9910_RESET
NAND_CLE 16 33
NAND_IO[1] : NAND Block 0 Write (DNS) AL I/O3 NAND_DATA[3] 43page : Bluetooth MODEL_OPT_5 MODEL_OPT_0 MODEL_OPT_4
0 : Enable Block 0 Write NAND_ALE 17 32 R130 22

NO FRC/INTERNER FRC
/CI_SEL MODEL_OPT_6 LOW LOW NO FRC
1 : Disable Block 0 Write W I/O2 NAND_DATA[2]
NAND_WEb 18 31 HIGH LOW URSA3 Internal

LVDS/LOCAL_D
1K

1K

1K

1K

1K
1K

1K
NAND_IO[3:2] : NAND ECC (1, DNS) HIGH HIGH URSA3 External

DDR_256MB
WP I/O1 NAND_DATA[1]

NON_OLED
+3.3V_NORMAL

NON_GIP
00 : No ECC 19 30

NO_FRC
LOW HIGH PWIZ Pannel T-con
01 : 1 ECC Bit

HD
NC_11 I/O0 NAND_DATA[0] with LG FRC
10 : 4 ECC Bit 20 29

R119
R136
4.7K

R1021

R1015

R1014

R1018
R1023

R1010
11 : 8 ECC Bit NC_12 NC_19
21 28
NAND_IO[4] : CPU Endian (0) NC_13 NC_18
0 : Little Endian 22 27
1 : Big Endian NC_14 NC_17
FOR ESD 12V Pattern
C 23 26
NAND_IO[6:5] : Xtal Bias Control (1, DNS) B Q101 NC_15 NC_16
00 : 1.2mA (Fundmental Recommand) FLASH_WP 24 25 +12V
KRC103S
01 : 1.8mA
10 : 2.4mA (3rd over tune Recommand) E
11 : 3.0mA

NAND_IO[7] : MIPS Frequency (DNS)


C178 C179
0 : 405MHz
0.1uF 0.1uF
1 : 378MHz
50V 50V
NAND_ALE : I2C Level (DNS)
0 : 3.3V Switching
1 : 5V Switching

NAND_CLE
0 : Enable D2CDIFF AC (DNS)
1 : Disabe D2CDIFF AC

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM (EUROBBTV) 2009.06.18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM3556 & NAND FLASH 1
When usding FUNDMENTAl then series R = 0 ohm and CL = 8 pF
IC100 54MHz X-TAL
LGE3556C (C0 VERSION) When usding Dip-type X-tal then series R = 22 ohm and CL = 12 pF

NON_3DTV
D23 B4
FE_TS_DATA_CLK C24
PKT0_CLK LVDS_TX_0_DATA0_P
A4
LVDS_TX_1_DATA4_N013:E7;035:AK20
FE_TS_SERIAL B26
PKT0_DATA LVDS_TX_0_DATA0_N
C6
LVDS_TX_1_DATA4_P013:E7;035:AK19
FE_TS_SYNC PKT0_SYNC LVDS_TX_0_DATA1_P LVDS_TX_1_DATA3_N013:E7;035:AK19 C230
A25 B6 22
RMX0_CLK LVDS_TX_0_DATA1_N LVDS_TX_1_DATA3_P013:E7;035:AK19 12pF
TP4021 B25 B3 R212
TP4022 RMX0_DATA LVDS_TX_0_DATA2_P LVDS_TX_1_DATA2_N013:E7;035:AK17
A26 A3
TP4023 RMX0_SYNC LVDS_TX_0_DATA2_N LVDS_TX_1_DATA2_P013:E7;035:AK17
A1
CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID

1008LS-272XJLC 33pF
LVDS_TX_0_DATA3_P LVDS_TX_1_DATA1_N013:E7;035:AK17

C257
045:V14 A2
LVDS_TX_0_DATA3_N LVDS_TX_1_DATA1_P013:E7;035:AK16
CI_A[14] G23 D5
POD2CHIP_MCLKI LVDS_TX_0_DATA4_P LVDS_TX_1_DATA0_N013:E7;035:AK16
CI_OUTDATA[0] D25 D6

2
POD2CHIP_MDI0 LVDS_TX_0_DATA4_N LVDS_TX_1_DATA0_P013:E7;035:AK16

54MHz
CI_OUTDATA[1] D24 C5

X903

3
POD2CHIP_MDI1 LVDS_TX_0_CLK_P LVDS_TX_1_CLK_N 013:E7;035:AK18

L208
CI_OUTDATA[2] C25 B5 54MHz_XTAL_N
POD2CHIP_MDI2 LVDS_TX_0_CLK_N LVDS_TX_1_CLK_P 013:E7;035:AK18
CI_OUTDATA[3] E27 B1

1
POD2CHIP_MDI3 LVDS_TX_1_DATA0_P LVDS_TX_0_DATA4_N013:F7;035:AK15 54MHz_XTAL_P
CI_OUTDATA[4] E26 B2
POD2CHIP_MDI4 LVDS_TX_1_DATA0_N LVDS_TX_0_DATA4_P013:F7;035:AK14
CI_OUTDATA[5] D28 C2

R243
POD2CHIP_MDI5 LVDS_TX_1_DATA1_P LVDS_TX_0_DATA3_N013:F7;035:AK14

604
CI_OUTDATA[6] D27 C3
POD2CHIP_MDI6 LVDS_TX_1_DATA1_N LVDS_TX_0_DATA3_P013:F7;035:AK14
CI_OUTDATA[7] D26 D1
POD2CHIP_MDI7 LVDS_TX_1_DATA2_P LVDS_TX_0_DATA2_N013:F7;035:AK12
CI_OUTSTART E23 D2
POD2CHIP_MISTRT LVDS_TX_1_DATA2_N LVDS_TX_0_DATA2_P013:F7;035:AK12
CI_OUTVALID E24 E1
POD2CHIP_MIVAL LVDS_TX_1_DATA3_P LVDS_TX_0_DATA1_N013:E7;035:AK12
F25 E2 22
CHIP2POD_MCLKO LVDS_TX_1_DATA3_N LVDS_TX_0_DATA1_P013:E7;035:AK11 R211 12pF
C27 E3
CHIP2POD_MDO0 LVDS_TX_1_DATA4_P LVDS_TX_0_DATA0_N013:E7;035:AK11 C229
C26 E4
CHIP2POD_MDO1 LVDS_TX_1_DATA4_N LVDS_TX_0_DATA0_P013:E7;035:AK11
B28 D3 A1.2V A2.5V
CHIP2POD_MDO2 LVDS_TX_1_CLK_P LVDS_TX_0_CLK_N 013:E7;035:AK13
B27 D4
CHIP2POD_MDO3 LVDS_TX_1_CLK_N LVDS_TX_0_CLK_P 013:E7;035:AK13
A27
F24
CHIP2POD_MDO4 LVDS_PLL_VREG
F5
F1
C228
10uF
OPT
VIDEO INCM
CHIP2POD_MDO5 LVDS_TX_AVDDC1P2
F23 F4
CHIP2POD_MDO6 LVDS_TX_AVDD2P5_1
A3.3V A1.2V A2.5V E25 F2
CHIP2POD_MDO7 LVDS_TX_AVDD2P5_2
C28
A28
CHIP2POD_MOSTRT LVDS_TX_AVSS_1
C1
F3
PLACE NEAR BCM CHIP
CHIP2POD_MOVAL LVDS_TX_AVSS_2

0.1uF

0.1uF

0.1uF
4.7uF

4.7uF
C4

C2013
0

0
R236

R237

C236

C239

C242

C295
L202 LVDS_TX_AVSS_3
A5
BLM18PG121SN1D LVDS_TX_AVSS_4 C258 0.1uF
AC18 E5 Near Q1705 TU_CVBS_INCM
VDAC_AVDD2P5 LVDS_TX_AVSS_5 Run Along TUNER_CVBS_IF_P Trace
AF20 E6 003:A3
VDAC_AVDD1P2 LVDS_TX_AVSS_6
AG20 D7
VDAC_AVDD3P3_1 LVDS_TX_AVSS_7

4.7uF
AG21 E7

0.1uF

0.1uF

0.1uF
VDAC_AVDD3P3_2 LVDS_TX_AVSS_8

C214

C219

C223
C212
F7
BROAD BAND STUDIO LVDS_TX_AVSS_9
G7
C2019 0.1uF
SC1_RGB_INCM
LVDS_TX_AVSS_10 A1.2V
Near J1500 003:A4
AF19 H7 Run Along SC1_R,SC_G,SC_B Trace
VDAC_AVSS_1 LVDS_TX_AVSS_11
AD20 A2.5V
R220 : BCM recommened resistor 562 ohm VDAC_AVSS_2

0.1uF
C2012
+3.3V_NORMAL AE20
R220 560AH22 VDAC_AVSS_3
AD27

0.1uF
P200 C215 VDAC_RBIAS CLK54_AVDD1P2 C261 0.1uF

C251
AH20 AD28 REAR_AV_CVBS_INCM
TJC2508-4A 0.1uF VDAC_1 CLK54_AVDD2P5
AG19 AD26 003:A3
VDAC_2 CLK54_AVSS
C213 AC26
54MHz_XTAL_N

R244

R248

R250
0.01uF CLK54_XTAL_N 002:I1

R238
75
1%
AH21 AC27
4.7uF
C2028

R200
1.5K

34

34

34
54MHz_XTAL_P
R201
1.5K

1 VDAC_VREG CLK54_XTAL_P 002:I2


AE25
CLK54_MONITOR
DTV/MNT_V_OUT Y23
PM_OVERRIDE
2 M25
BSC_S_SCL
M24 C262 0.1uF
BSC_S_SDA
AA23
Near J1603 Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace
COMP2_VID_INCM
A1.2V
3 VCXO_AGND_1
AB24
VCXO_AGND_2

R245
R6 AC24 L203
USB_AVSS_1 VCXO_AGND_3

34
T6 AF25 BLM18PG121SN1D
4 USB_AVSS_2
A3.3V VCXO_AVDD1P2
R7 AF24 C233 C235
A1.2V USB_AVSS_3 VCXO_PLL_AUDIO_TESTOUT 0.1uF 4.7uF
A2.5V T7
USB_AVSS_4
T8
USB_AVSS_5 +3.3V_NORMAL
R3 P24
USB_AVDD1P2 RESET_OUTB
U3 F6 SYS_RESETb
USB_AVDD1P2PLL RESETB 001:A6;001:B7 C2015 0.1uF
L200 T4 N24 4.7K Near P1600 R_VID_INCM
BLM18PG121SN1D USB_AVDD2P5 NMIB Run Along DSUB_R Trace 003:A5
T3 J5 R221
USB_AVDD2P5REF TMODE_0 E_TCK
R4 J4 A2.5V +3.3V_NORMAL
USB_AVDD3P3 TMODE_1 C2016 0.1uF
U4 J6 L211 E_TDI G_VID_INCM
USB_RREF TMODE_2 BLM18PG121SN1D Run Along DSUB_G Trace 003:A5
V1 J3
0.1uF
0.1uF
0.1uF

4.7uF
0.1uF

43page : Bluetooth BT_DM USB_DM1 E_TDO


BT_DM TMODE_3
V2 V25 A1.2V C264 0.1uF
Route INCM between associated 43page : Bluetooth BT_DP USB_DP1 SPI_S_MISO C231 C234 E_TMS B_VID_INCM
BT_DP C201 R209 U1 AH3 10uF 0.1uF

OPT1K R2312

OPT1K R2314

OPT1K R2315
OPT1K R2313
003:A5

R246

R247
left and right signals of same channel 3.9K SIDE_USB_DM Run Along DSUB_B Trace

R251
100pF USB_DM2 POR_OTP_VDD2P5
U2 AB8

34

34

34
D3.3V SIDE_USB_DP USB_DP2 POR_VDD1P2
The INCM trace ends at the T5 +3.3V_NORMAL
C207

C208
C209
C202
C203

same point where the connector R210 USB_MONCDR


120 R5 H4
ground connects to the board ground USB_MONPLL EJTAG_TCK E_TCK
R266 R1 H3
(thru-hole connector pin). E_TDI OPT OPT
R235 USB_PWRFLT_1 EJTAG_TDI
2.7K R2 H2 R224 R225
Place test points, resistors USB_PWRFLT_2 EJTAG_TDO E_TDO
2.7K T2 H1 2.7K 2.7K
near audio connector. USB_PWRON_1 EJTAG_TMS E_TMS
T1 G1 1K R249
Connect the other side of C2011 0.1uF
USB_PWRON_2 EJTAG_TRSTB
the resistor to GND as close H6 Near J1500 SC1_CVBS_INCM 003:A3
as possible to the ground EJTAG_CE0 Run Along SC1_CVBS_IN Trace
H5
connection of the associated EJTAG_CE1
audio connector. R218 P6

R260
240 1K R219 EPHY_VREF R226
P5 L204 A1.2V R227

34
EPHY_RDAC BLM18PG121SN1D 2.7K 2.7K
P3 AB26
EPHY_RDN EPHY_RDN PLL_MAIN_AVDD1P2
P2 AC25
EPHY_RDP EPHY_RDP PLL_MAIN_AGND
N3 AB27 R240
A2.5V A1.2V
EPHY_TDN EPHY_TDN PLL_MAIN_MIPS_EREF_TESTOUT
BLM18PG121SN1D N2 M6 390 L207 A1.2V C2023 0.1uF
EPHY_TDP EPHY_TDP PLL_RAP_AVD_TESTOUT Near J1501 SIDE_AV_CVBS_INCM 003:A3
P1 N6 OPT BLM18PG121SN1D
BLM18PG121SN1D L209 Run Along SC2_CVBS_IN Trace
EPHY_AVDD1P2 PLL_RAP_AVD_AVDD1P2
P4 N7

0.1uF

4.7uF
0.1uF
BLM18PG121SN1D

4.7uF

C240
C241

C237
EPHY_AVDD2P5 PLL_RAP_AVD_AGND

C238

R261
N4
L212 EPHY_PLL_VDD1P2

34
C2026 C244 N1
0.1uF

4.7uF

L210
C2020

C2021

C2018
0.1uF

4.7uF

4.7uF 0.1uF EPHY_AGND_1


C247

N5 AA24
16V EPHY_AGND_2 BYP_CPU_CLK
P7 Y24
EPHY_AGND_3 BYP_DS_CLK
AE24 1K R222
BYP_SYS216_CLK
AD25 1K R262
BYP_SYS175_CLK
041:B5 R204 51 C206 0.015uF AE6
REAR_AV_L_IN AUDMX_LEFT1 TP is Necessory
041:B5 REAR_AV_R_IN
002:J6 REAR_AV_LR_INCM
R214 51 C210 0.015uF AD7
AF6
AUDMX_RIGHT1 AUDIO INCM
AUDMX_INCM1
COMP2_L_IN R215 51 C211 0.015uF AH4
COMP2_R_IN R228 51 C232 0.015uF AG5
AUDMX_LEFT2 PLACE NEAR BCM CHIP
AUDMX_RIGHT2
002:J6 COMP2_LR_INCM
AG4
AUDMX_INCM2
PLACE NEAR Jacks
041:B5 R229 51 C220 0.015uF AG6
SC1_L_IN AUDMX_LEFT3 5.1
041:B5 R230 51 C221 0.015uF AF7
SC1_R_IN AUDMX_RIGHT3 SIDE_AV_LR_INCM
002:J7 AE7 Near J1501
SC1_LR_INCM AUDMX_INCM3 R256 002:C6
AH5 Route Between SC2_L_IN & SC2_R_IN 0.15uF
041:B5 R231 51 C224 0.015uF
SIDE_AV_L_IN AUDMX_LEFT4 C2014 0.47uF
041:B5 R232 51 C225 0.015uF AG7
SIDE_AV_R_IN AUDMX_RIGHT4 C271
AH6
002:J6 SIDE_AV_LR_INCM AUDMX_INCM4
009:I3 R233 51 C226 0.015uF AD8
PC_L_IN AUDMX_LEFT5 5.1
009:I3 R234 51 C227 0.015uF AF8
PC_R_IN AUDMX_RIGHT5 002:C6
REAR_AV_LR_INCM
002:J7
AE8 Near J1600 R258 Route Between AV1_L_IN & AV1_R_IN
PC_LR_INCM AUDMX_INCM5 0.15uF
AH7
AUDMX_LEFT6 C2024 0.47uF
AH8
AUDMX_RIGHT6 C2017
AG8
AUDMX_INCM6
AF5
AUDMX_AVSS_1
AB9
AUDMX_AVSS_2 5.1
AA10
C2027 0.047uF
0.047uF

0.047uF
0.047uF
0.047uF
0.047uF
0.047uF
0.047uF
0.047uF
0.047uF

COMP2_LR_INCM
AUDMX_AVSS_3
AB10 Near J1603 R259 Route Between COMP1_L_IN & COMP1_R_IN 0.15uF 002:C6
AUDMX_AVSS_4 C2025
0

AA11
0

C265
C222 AUDMX_AVSS_5 0.47uF
AB11
0.1uF AUDMX_AVSS_6
AC8
C277
C279
C296
C298
C299
C252
C253
C254
C256

AUDMX_LDO_CAP
R264

R265

AE5
AUDMX_AVDD2P5
5.1
SC1_LR_INCM
Near J1500 R257 Route Between SC1_L_IN & SC1_R_IN 0.15uF
002:C6
C2022 0.47uF
A2.5V C270

C217 5.1
10uF PC_LR_INCM
Near J1602 R252 Route Between PC_L_IN & PC_R_IN 0.15uF
002:C6
C269 0.47uF
C2010

Near Q1704
TU_SIF_INCM 003:A3
Route Along With TUNER_SIF_IF_N
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM (EUROBBTV) 2009.06.18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM3556 AUD_IN/LVDS 2
D1.2V
D3.3V
Place here for common circuit with ATSC D1.2V

+1.8V_AMP +1.8V_HDMI +3.3V_NORMAL A3.3V


C245 C255 C377 C375 C263 C373 C267 C289 C291
L111 C383 C246 C378 C376 C259 C374 C366 C266 C288 C290 4.7uF 1000pF 0.01uF 0.1uF 4.7uF 1000pF 0.01uF 0.1uF 10uF
BLM18PG121SN1D L112 C243 C249 C250 C382 C381 C380 C379 C286 C287 1000pF 0.01uF 0.1uF 4.7uF 1000pF 0.01uF 0.1uF 4.7uF 1000pF 0.01uF
CIC21J501NE 0.1uF 4.7uF 1000pF 0.01uF 0.1uF 10uF 10uF 33uF 100uF

C2008 FOR ESD


C2007
0.1uF 0.1uF
16V 16V

NON_3DTV D3.3V D1.8V


IC100
26page : TUNER(HALF NIM) LGE3556C (C0 VERSION)

AG28 AE18 C216 C268 C371 C370 C369 C292 C293 C294
TU_IF_AGC_1 DS_AGCI_CTL I2S_CLK_IN C274 C272 C275 C276 C278 C280 C297
AH28 AF18 0.1uF 1000pF 0.01uF 0.1uF 4.7uF 1000pF 0.01uF 0.1uF C2004
TU_IF_AGC_2 DS_AGCT_CTL I2S_CLK_OUT AUD_SCK 0.1uF 0.1uF 0.1uF 0.1uF 4.7uF 4.7uF 4.7uF 33uF
AA21 AD17
EDSAFE_AVSS_1 I2S_DATA_IN
A2.5V AB22 AH19
TU_IF_AGC_1 EDSAFE_AVSS_2 I2S_DATA_OUT AUD_LRCH
AF26 AD18
EDSAFE_AVSS_3 I2S_LR_IN
TU_IF_AGC_2 A1.2V AF27 AG18
BLM18PG121SN1D EDSAFE_AVSS_4 I2S_LR_OUT AUD_LRCK
AF28 AG26
L102 EDSAFE_AVSS_5 AUD_LEFT0_N HP_LOUT_N A2.5V
AG27 AH26
EDSAFE_AVDD2P5 AUD_LEFT0_P HP_LOUT_P
TU_IF_N_1 AE26 AF23
EDSAFE_DVDD1P2 AUD_AVDD2P5_0
TU_IF_P_1 AE28 AA20 C147 C155 C162
C113 C172 EDSAFE_IF_N AUD_AVSS_0_1 0.01uF 0.1uF 10uF
A1.2V AE27 AB21
0.1uF 4.7uF EDSAFE_IF_P AUD_AVSS_0_2
C144 AD24 AC22
TU_IF_N_1 L103 0.1uF PLL_DS_AGND AUD_AVSS_0_3 D1.8V
AB19 AC23
PLL_DS_AVDD1P2 AUD_AVSS_0_4
TU_IF_P_1 C119 C122 AB25 AD23
BLM18PG121SN1D PLL_DS_TESTOUT AUD_AVSS_0_5
0.1uF 4.7uF AH25 D1.8V
A1.2V AUD_RIGHT0_N HP_ROUT_N
A2.5V AG25
AUD_RIGHT0_P HP_ROUT_P
AB18 AH23
BLM18PG121SN1D SD_V5_AVDD1P2 AUD_LEFT1_N BT_LOUT_N
C111 C112 AC17 AG23
SD_V5_AVDD2P5 AUD_LEFT1_P BT_LOUT_P
0.1uF 0.1uF AB17 AG24 C282 C283 C284 C285 C2005 C2006
L104 C120 C123 SD_V5_AVSS AUD_RIGHT1_N BT_ROUT_N
C248 C281 C365 C364 C363 C357 C348 C320 C319 C318 C304
1000pF 0.01uF AD14 AH24 1000pF 1000pF 1000pF 1000pF 0.01uF 0.01uF 0.01uF 0.01uF C356
0.1uF 0.1uF 0.1uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
BLM18PG121SN1D SD_V1_AVDD1P2 AUD_RIGHT1_P BT_ROUT_P
AD16 AE22 16V 16V 16V 10V 16V 16V 16V 16V 16V 16V
SD_V1_AVDD2P5 AUD_AVDD2P5_1
L105 AB15 AB20 C148 C156 C163
SD_V1_AVSS_1 AUD_AVSS_1_1 0.01uF 0.1uF 10uF
C117 AC15 AC21
SD_V1_AVSS_2 AUD_AVSS_1_2
1000pF C118 AD13 AE23
0.01uF SD_V2_AVDD1P2 AUD_AVSS_1_3
AE13 AF21 SCART1_Lout_N
SD_V2_AVDD2P5 AUD_LEFT2_N
DSUB AC13 AE21 SCART1_Lout_P
SD_V2_AVSS_1 AUD_LEFT2_P
AB14 AF22
SD_V2_AVSS_2 AUD_RIGHT2_N SCART1_Rout_N
DSUB_R AC14 AG22
SD_V2_AVSS_3 AUD_RIGHT2_P SCART1_Rout_P
R_VID_INCM AC12 AD21
DSUB_G SD_V3_AVDD1P2 AUD_AVDD2P5_2
AD12 AC20 C149 C157 C164
SD_V3_AVDD2P5 AUD_AVSS_2_1 0.01uF 0.1uF 10uF
G_VID_INCM AB13 AD22
DSUB_B SD_V3_AVSS_1 AUD_AVSS_2_2
AA14 AH2
COMPONENT SD_V3_AVSS_2 AUD_SPDIF SPDIF_OUT
B_VID_INCM AC11 AC6
SD_V4_AVDD1P2 SPDIF_AVDD2P5
R195 10 AD11 AE4
COMP2_Y SD_V4_AVDD2P5 SPDIF_AVSS C150 NON_3DTV
C169 47pF

1% AB12 AF3 0.1uF


COMP2_Pr +5V_NORMAL IC100
C101 47pF

SD_V4_AVSS SPDIF_IN_N
C17047pF

C127 0.1uF AD10 AH1


COMP2_Pb
AC10
SD_R SPDIF_IN_P LGE3556C (C0 VERSION)

R2035
COMP2_VID_INCM SD_INCM_R
C104 OPT

C128 0.1uF AE9


R312 75

NON_3DTV
R131 75

R2036
R120 82

SD_G 1K D1.2V

0
AF9 AG1 IC100
1%

SD_INCM_G HDMI_RX_0_CEC_DAT AD5 P16


C129 0.1uF AH9 AA6 LGE3556C (C0 VERSION) DVSS_1 DVSS_62
1%

1%

SD_B HDMI_RX_0_HTPLG_IN AD6 R16


R138-*1 AG9 AA5 R309 10K DVSS_2 DVSS_63
A2.5V J7 T16
C130 SD_INCM_B HDMI_RX_0_HTPLG_OUT
0.1uF AG15 AB3 0 R307 DVSS_3 DVSS_64
SC1_RGB(EU)/COMPNENT1[NON_EU] EU 0 SD_Y1 HDMI_RX_0_DDC_SCL HDMI_SCL K7 U16
C131 0.1uF AE15 Y6 0 R308 H8 DVSS_4 DVSS_65
NON_EU SD_PR1 HDMI_RX_0_DDC_SDA HDMI_SDA VDDC_1 L7 V16
COMP1_Y ==> C132 0.1uF AF15 AC4 499 R152 J8 DVSS_5 DVSS_66
SC1_G VDDC_2 M7 AA16
R138 10 SD_PB1 HDMI_RX_0_RESREF C3006 K8
COMP1_Pr ==> SC1_R AH15 AC1 DVSS_6 DVSS_67
SD_INCM_COMP1 HDMI_RX_0_CLK_N HDMI_CLK- 0.1uF VDDC_3 AB7 D17
COMP1_Pb ==> SC1_B C133 0.1uF AG16 AC2 L8 DVSS_7 DVSS_68
SD_Y2 HDMI_RX_0_CLK_P HDMI_CLK+ 16V VDDC_4 AC7 L17
C134 0.1uF AF16 AD1 M8 DVSS_8 DVSS_69
SC1_RGB_INCM VDDC_5 G8 M17
C105 OPT

HDMI_RX0-
75

75

75

SD_PR2 HDMI_RX_0_DATA0_N N8
0.1uF AH17 AD2 DVSS_9 DVSS_70
OPT 1%

C135 A3.3V VDDC_6 D9 N17


NON_EU SD_PB2 HDMI_RX_0_DATA0_P HDMI_RX0+
ONLY USE NON_EU P8 DVSS_10 DVSS_71
NON_EU

AH16 AE1
NON_EU
1%

AA9 P17
R135

1%

R135-*1 HDMI_RX1- VDDC_7


R315

R313

FOR COMP 1 SD_INCM_COMP2 HDMI_RX_0_DATA1_N R8


82 1% C174 0.1uF AG14 AE2 DVSS_11 DVSS_72
SD_Y3 HDMI_RX_0_DATA1_P HDMI_RX1+ VDDC_8 G10 R17
C175 0.1uF AE14 AF1 BLM18PG121SN1D AA8 DVSS_12 DVSS_73
SIDE COMPONENT SD_PR3 HDMI_RX_0_DATA2_N HDMI_RX2- VDDC_9 A11 T17
0.1uF AF14 AF2 L109 H9 DVSS_13 DVSS_74
R196 C176 VDDC_10 L11 U17
SD_PB3 HDMI_RX_0_DATA2_P HDMI_RX2+
10 AH14 AD3 A1.2V A2.5V H10 DVSS_14 DVSS_75
SIDE_COMP_Y SD_INCM_COMP3 HDMI_RX_0_VDD3P3 VDDC_11 M11 V17
1% AH10 AE3 H11 DVSS_15 DVSS_76
SIDE_COMP_Pr SD_L1 HDMI_RX_0_VDD1P2 VDDC_12 N11 AA17
C177 OPT

H12
R165 82

R166 75

AG10 AC3 DVSS_16 DVSS_77


R167 75

SIDE_COMP_Pb SD_C1 HDMI_RX_0_VDD2P5 VDDC_13 P11 AC19


AE10 AD4 C145 C153 C160 H13 DVSS_17 DVSS_78
1%

SIDE_COMP_INCM NON_EU_CN NON_EU_CN SD_INCM_LC1 HDMI_RX_0_AVSS_1 4.7uF 0.1uF 0.1uF VDDC_14 R11 G18
AE11 AB5 H14 DVSS_18 DVSS_79
1%

R2112-*1 R141-*1
1%

SD_L2 HDMI_RX_0_AVSS_2 BLM18PG121SN1D VDDC_15 T11 L18


SIDE_COMP_Y AF11 AB6 H15 DVSS_19 DVSS_80
5% 12 5% 62 SD_C2 HDMI_RX_0_AVSS_3 L107 VDDC_16 U11 M18
SIDE_COMP_Pr AH11 AG2 H16 DVSS_20 DVSS_81
SD_INCM_LC2 HDMI_RX_0_AVSS_4 VDDC_17 V11 N18
SIDE_COMP_Pb R100 62 AH13 AB4 H17 DVSS_21 DVSS_82
SD_L3 HDMI_RX_0_AVSS_5 VDDC_18 D12 P18
SIDE_COMP_INCM R142 OPT AE12 AA7 H18 DVSS_22 DVSS_83
CVBS R143 62 SD_C3 HDMI_RX_0_AVSS_6 VDDC_19 G12 R18
EU_CN AF12 Y8 H19 DVSS_23 DVSS_84
R2112
R141 75 1% EU_CN SD_INCM_LC3 HDMI_RX_0_PLL_AVSS C158 C151 C165 VDDC_20 L12 T18
C110 0.1uF AD9 AC5 H21 DVSS_24 DVSS_85
TU_CVBS SD_CVBS1 HDMI_RX_0_PLL_DVDD1P2 1000pF 0.01uF 10uF VDDC_21 M12 U18
1% 18 R2113 C124 0.1uF AG11 W8 J21 DVSS_25 DVSS_86
REAR_AV_CVBS SD_CVBS2 HDMI_RX_0_PLL_DVSS VDDC_22 N12 V18
12 R2114 C125 0.1uF AG12 K21 DVSS_26 DVSS_87
SC1_CVBS_IN SD_CVBS3 D3.3V VDDC_23 P12 D20
10K
10K

10K

10K
0 R2115 C100 0.1uF AF13 L21 DVSS_27 DVSS_88
R2037

SD_CVBS4 VDDC_24 R12 G20


OPT

SIDE_AV_CVBS M21 DVSS_28 DVSS_89


12 AC9 AA3
TU_CVBS_INCM SD_INCM_CVBS1 HDMI_RX_1_CEC_DAT VDDC_25 T12 H20
AF10 V4 N21 DVSS_29 DVSS_90
REAR_AV_CVBS_INCM VDDC_26 U12 A21
R310

R2039

SD_INCM_CVBS2 HDMI_RX_1_HTPLG_IN
R2038

A2.5V A2.5V AH12 U6 P21 DVSS_30 DVSS_91


SC1_CVBS_INCM SD_INCM_CVBS3 HDMI_RX_1_HTPLG_OUT VDDC_27 V12 E21
AG13 V5 R21 DVSS_31 DVSS_92
SD_INCM_CVBS4 HDMI_RX_1_DDC_SCL VDDC_28 L13 F21
SIDE_AV_CVBS_INCM AF17 V3 T21 DVSS_32 DVSS_93
SD_SIF1 HDMI_RX_1_DDC_SDA VDDC_29 M13 G21
R137 R4020 AG17 W4 499 R153 A3.3V U21 DVSS_33 DVSS_94
10K SD_INCM_SIF1 HDMI_RX_1_RESREF VDDC_30 N13 E22
10K AD15 W2 V21 DVSS_34 DVSS_95
0.1uF OPT VDDC_31 P13 F22
SD_FB HDMI_RX_1_CLK_N W21
R128 C106 A1.2V AE16 W3 DVSS_35 DVSS_96
SC1_ID SD_FS HDMI_RX_1_CLK_P R205 VDDC_32 R13 G22
0 L106 AE17 Y1 Y21 DVSS_36 DVSS_97
TU_SIF BLM18PG121SN1D SD_FS2 HDMI_RX_1_DATA0_N 20 VDDC_33 T13 H22
AB16 Y2 DVSS_37 DVSS_98
OPT

R3055 HDMI_RX_1_DATA0_P A3.3V U13 J22


R139 AA15 PLL_VAFE_AVDD1P2 AA2 DVSS_38 DVSS_99
240 C121 C140 V13 K22
12K PLL_VAFE_AVSS HDMI_RX_1_DATA1_N AH27
0.1uF 4.7uF AC16 AA1 DVSS_39 DVSS_100
HDMI_RX_1_DATA1_P AGC_VDDO G14 L22
TU_SIF_INCM AG3 PLL_VAFE_TESTOUT AB2 BLM18PG121SN1D D3.3V DVSS_40 DVSS_101
RGB_HSYNC HDMI_RX_1_DATA2_N L14 M22
R4021

AF4 AB1 L110 DVSS_41 DVSS_102


M14 N22
12K

C4020 RGB_VSYNC HDMI_RX_1_DATA2_P C2003


120
R3056

Y3 A1.2V A2.5V AA12 DVSS_42 DVSS_103


OPT

0.1uF HDMI_RX_1_VDD3P3 0.1uF VDDO_1 N14 P22


Y4 AA13 DVSS_43 DVSS_104
HDMI_RX_1_VDD1P2 VDDO_2 P14 R22
W5 AA18 DVSS_44 DVSS_105
HDMI_RX_1_VDD2P5 VDDO_3 R14 T22
W1 AA19 DVSS_45 DVSS_106
HDMI_RX_1_AVSS_1 VDDO_4 T14 U22
U5 C146 C154 C161 E28 DVSS_46 DVSS_107
RGB_HSYNC HDMI_RX_1_AVSS_2 VDDO_5 U14 V22
W6 4.7uF 0.1uF 0.1uF L28 DVSS_47 DVSS_108
RGB_VSYNC HDMI_RX_1_AVSS_3 VDDO_6 V14 W22
CONNECT NEAR BCM CHIP U7 U28 DVSS_48 DVSS_109
HDMI_RX_1_AVSS_4 FOR ESD VDDO_7 L15 Y22
V7 AB28 DVSS_49 DVSS_110
R2117 HDMI_RX_1_AVSS_5 VDDO_8 M15 AA22
0 W7 BLM18PG121SN1D D1.8V DVSS_50 DVSS_111
SC1_FB HDMI_RX_1_AVSS_6 L108 C384 N15 W23
U8 33uF DVSS_51 DVSS_112
HDMI_RX_1_AVSS_7 P15 AB23
V8 10V A9 DVSS_52 DVSS_113
HDMI_RX_1_AVSS_8 DDRV_1 R15 F28
Y5 G9 DVSS_53 DVSS_114
HDMI_RX_1_AVSS_9 DDRV_2 T15 M28
0
R2116
OPT

V6 G11 DVSS_54 DVSS_115


HDMI_RX_1_PLL_AVSS DDRV_3 U15 T28
AA4 G13 DVSS_55 DVSS_116
HDMI_RX_1_PLL_DVDD1P2 DDRV_4 V15 AC28
Y7 C159 C152 C166 A14 DVSS_56 DVSS_117
HDMI_RX_1_PLL_DVSS DDRV_5 A16
1000pF 0.01uF 10uF G15 DVSS_57
DDRV_6 G16
G17 DVSS_58
DDRV_7 L16
A19 DVSS_59
DDRV_8 M16
G19 DVSS_60
DDRV_9 N16
DVSS_61

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EUROBBTV 2009.06.18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. BCM3556 VIDEO IN 3
D1.8V
NON_3DTV A1.2V
IC100
LGE3556C (C0 VERSION) D1.8V

A6 0.1uF C403

0.047uF
0.047uF
DDR_BVDD0

0.047uF

0.047uF

0.047uF
C451

C454

C455

C456

C457

C458

C459

C460

C461
C441
0.047uF

C442
0.1uF

C443

C444

C445

C446

C447

C448

470pF

470pF

0.047uF

0.047uF
A24

C440
470pF

0.1uF

0.1uF

C469
10uF

C470

C471

C472

C473

C474

C475

C476

C477

C478

C479

C480

C481

C482

C495
0.1uF C404

10uF

10uF

C462

C465

C468
0.1uF

470pF

470pF
10uF

470pF

0.1uF

10uF

22uF

0.1uF

0.1uF
470pF

0.1uF

470pF

10uF

10uF

10uF
22uF
DDR_BVDD1

10uF
10uF
B7
DDR_BVSS0
B24
DDR_BVSS1
F20
DDR_PLL_TEST
B23 R411 0
DDR_PLL_LDO
B17 OPT DDR01_CKE
DDR01_CKE
C22
DDR_VTT
R412 240
DDR_COMP
E16
IC400 IC402
1% DDR01_ODT DDR1_DQ[0-7]
DDR01_ODT NT5TU128M8DE_BD NT5TU128M8DE_BD
C23 DDR0_DQ[0-7] 004:B6 004:B5
DDR_EXT_CLK
DDR0_CLK
B12 DDR0_CLK 004:C7;004:C4 004:A7;004:C4 DDR0_CLK 004:A7;004:F4 DDR1_CLK DDR01_A[0-3,7-13] SI
C12 R406 R407
DDR0_CLKb 004:C7;004:C4 E8 C8 DDR0_DQ[0] E8 C8 DDR1_DQ[0] DDR01_RASb
DDR0_CLKB 100 CK DQ0 100 CK DQ0
A13 DDR1_CLK 004:F7;004:F4 1% F8 C2 DDR0_DQ[1] F8 C2
DDR1_CLK 004:A7;004:C4 DDR0_CLKb 004:A7;004:F4 DDR1_CLKb 1% DDR1_DQ[1] DDR01_A[2] C485
A12 CK DQ1 CK DQ1
DDR1_CLKb 004:F7;004:F4 DDR01_CKE F2 D7 DDR0_DQ[2] DDR01_CKE F2 D7 DDR1_DQ[5] DDR1_A[4-6] DDR01_A[0] 0.1uF
DDR1_CLKB CKE DQ2 CKE DQ2
B15 DDR01_A[0] D3 DDR0_DQ[3] D3
DDR01_A00 DDR1_DQ[3] DDR1_A[6] 75
E14 DDR01_A[1] DQ3 DQ3 AR400
DDR01_A[0-3] D1 DDR0_DQ[4] D1 DDR1_DQ[4] DDR0_A[4-6] DDR01_CASb
DDR01_A01 DQ4 DQ4 C486
A15 DDR01_A[2] F7 D9 DDR0_DQ[5] F7 D9 R408 75 0.1uF
DDR01_A02 DDR01_RASb DDR01_RASb DDR1_DQ[2]
D15 DDR01_A[3] RAS DQ5 RAS DQ5
DDR01_CASb G7 B1 DDR0_DQ[6] DDR01_CASb G7 B1 DDR1_DQ[6] DDR01_A[12] R409 75
DDR01_A03 CAS DQ6 CAS DQ6
E13 DDR0_A[4] DDR0_A[4-6] F3 B9 DDR0_DQ[7] F3 B9
DDR0_A04 DDR01_WEb DDR01_WEb DDR1_DQ[7] DDR01_A[9] C487
E12 DDR0_A[5] WE DQ7 WE DQ7
DDR0_A05 G8 G8 DDR01_A[7] 0.1uF
F13 DDR0_A[6] CS CS
DDR0_A06 DDR01_BA0 DDR01_BA0 DDR1_A[5] 75
C14 DDR01_A[7] B7 B7 AR401
DDR01_A07 DDR01_BA1 DDR0_DQS0 004:A4 DDR01_BA1 DDR1_DQS0 004:A4 DDR1_A[4] C488
F14 DDR01_A[8] DQS DQS
DDR01_A08 G2 A8 DDR0_DQS0b 004:A4 G2 A8 DDR1_DQS0b 004:A3 DDR01_A[11] 75 0.1uF
B14 DDR01_A[9] BA0 DQS BA0 DQS
DDR01_A[7-13] G3 B3 DDR0_DM0 G3 B3 DDR1_DM0 004:A4 DDR01_A[8]
DDR01_A09 BA1 DM/RDQS 004:A4 BA1 DM/RDQS
D14 DDR01_A[10] G1 A2 G1 A2
DDR01_A10 DDR01_BA2 DDR01_BA2 DDR01_A[13] C489
C13 DDR01_A[11] NC_1/BA2 NU/RDQS NC_1/BA2 NU/RDQS
DDR01_A11 DDR01_A[0-3,7-13] DDR01_A[0-3,7-13] DDR01_A[3] AR402 0.1uF
D13 DDR01_A[12] D1.8V D1.8V
DDR01_A12 DDR01_A[1]
B13 DDR01_A[13] H8 A9 H8 A9
DDR0_A[4-6] DDR01_A[0] DDR01_A[0] DDR01_A[10]
DDR01_A13
F15 DDR1_A[4] A0 VDDQ_1 004:B6;004:F3;004:I7 DDR1_A[4-6] A0 VDDQ_1 C490
DDR1_A[4-6] DDR01_A[1] H3 C1 DDR01_A[1] H3 C1 DDR01_BA1 75 0.1uF
DDR1_A04 A1 VDDQ_2 A1 VDDQ_2
C15 DDR1_A[5] H7 C3 H7 C3 AR403
DDR1_A05 DDR01_A[2] DDR01_A[2] DDR01_BA0
D16 DDR1_A[6] A2 VDDQ_3 A2 VDDQ_3
DDR1_A06 DDR01_A[3] J2 C7 DDR01_A[3] J2 C7 DDR01_BA2
F16 A3 VDDQ_4 A3 VDDQ_4
DDR01_BA0 DDR01_BA0 DDR0_A[4] J8 C9 DDR1_A[4] J8 C9 DDR01_WEb
B16 A4 VDDQ_5 A4 VDDQ_5
DDR01_BA1 DDR0_A[5] J3 A1 DDR1_A[5] J3 A1 75
DDR01_BA1 A5 VDD_1 A5 VDD_1 DDR01_CKE C499
E15 DDR01_BA2 DDR0_A[6] J7 L1 DDR1_A[6] J7 L1 AR404 0.1uF
DDR01_BA2 A6 VDD_2 A6 VDD_2 DDR01_ODT
A17 DDR01_CASb K2 E9 K2 E9
DDR01_CASB DDR01_A[7] DDR01_A[7] R410 75
A8 A7 VDD_3 A7 VDD_3 C421
DDR0_DQ[0] DDR0_DQ[0-7] DDR01_A[8] K8 H9 DDR01_A[8] K8 H9 0.1uF
DDR0_DQ00 A8 VDD_4 A8 VDD_4
B11 DDR0_DQ[1] K3 K3
DDR0_DQ01 DDR01_A[9] DDR01_A[9]
B8 A9 A9 DDR_VTT
DDR0_DQ02
D11
DDR0_DQ[2]
DDR0_DQ[3]
DDR01_A[10] H2
K7
A10/AP VSSQ_1
A7
B2
DDR01_A[10] H2
K7
A10/AP VSSQ_1
A7
B2
PI
DDR0_DQ03 DDR01_A[11] DDR01_A[11]
E11 DDR0_DQ[4] A11 VSSQ_2 A11 VSSQ_2
DDR01_A[12] L2 B8 DDR01_A[12] L2 B8
DDR0_DQ04 A12 VSSQ_3 A12 VSSQ_3
C8 DDR0_DQ[5] DDR01_A[13] L8 D2 L8 D2
DDR0_DQ05 DDR01_A[13]
C11 DDR0_DQ[6] A13 VSSQ_4 A13 VSSQ_4
DDR0_DQ06 D8 D8 DDR01_RASb
C9 DDR0_DQ[8-15] VSSQ_5 VSSQ_5
DDR0_DQ[7] A3 A3 DDR01_A[2]
DDR0_DQ07 VSS_1 VSS_1 C491
D8 DDR0_DQ[8] E3 E3 0.1uF
DDR0_DQ08 DDR01_A[0]
E10 L3 VSS_2 L3 VSS_2
DDR0_DQ[9] NC_2/A14 J1 NC_2/A14 J1 DDR0_A[6] 75
DDR0_DQ09 L7 VSS_3 DDR0_VREF0 L7 VSS_3 DDR1_VREF0
E9 DDR0_DQ[10] K9 K9 AR405
DDR0_DQ10 NC_3/A15 NC_3/A15 DDR01_A[3]
F11 DDR0_DQ[11] VSS_4 VSS_4
DDR0_DQ11 DDR01_A[1] C483
F12 004:A7;004:C5;004:C2;004:F2;004:I4;004:I6
DDR0_DQ[12] F9 E2 F9 E2 DDR01_A[10] 0.1uF
DDR0_DQ12 DDR01_ODT DDR01_ODT
E8 DDR0_DQ[13] ODT VREF ODT VREF
DDR0_DQ13 E1 E1 C463 C466 DDR01_BA1 75
D10 VDDL C449 C452 VDDL
DDR0_DQ[14] E7 E7 DDR01_A[12] AR406
DDR0_DQ14 VSSDL VSSDL
F8 DDR0_DQ[15] DDR1_DQ[0-7] 0.1uF 470pF 470pF 0.1uF
DDR0_DQ15 DDR01_A[9] C484
C18 DDR1_DQ[0] 0.1uF
DDR1_DQ00 DDR01_A[7]
C20 DDR1_DQ[1]
DDR1_DQ01 DDR0_A[5] 75
A18 DDR1_DQ[2] AR407
DDR1_DQ02 DDR0_A[4]
B21 DDR1_DQ[3]
DDR1_DQ03 DDR01_A[11] C492
DDR1_DQ04
C21 DDR1_DQ[4] DDR1_DQ[8-15]
Close to IC Close to IC DDR01_A[8] 0.1uF
B18 DDR1_DQ[5]
DDR1_DQ05 DDR01_A[13] 75
B20 DDR1_DQ[6] AR408
DDR1_DQ06 DDR01_BA0
D18 DDR1_DQ[7]
DDR1_DQ07 DDR01_BA2 C493
E18 DDR1_DQ[8] 0.1uF
DDR1_DQ08 DDR01_WEb
D21 DDR1_DQ[9]
DDR1_DQ09 75
F18 DDR1_DQ[10] DDR01_CKE
AR409
DDR1_DQ10 DDR01_ODT
E20 DDR1_DQ[11]
DDR1_DQ11 R404 75
A22 DDR1_DQ[12] C494
DDR1_DQ12 0.1uF
F17 DDR1_DQ[13]
DDR1_DQ13
B22 DDR1_DQ[14]
DDR1_DQ14
E17 DDR1_DQ[15]
DDR1_DQ15
A10 DDR0_DM0 004:E6
DDR0_DM0
C10
IC401 IC403 DDR1_DQ[8-15] C496
DDR0_DM1 004:E3 NT5TU128M8DE_BD NT5TU128M8DE_BD 0.1uF
DDR0_DM1
A20 DDR1_DM0 004:H6 DDR0_DQ[8-15] 004:B5
DDR1_DM0
F19 DDR1_DM1 004:H3 004:A7;004:C7 DDR0_CLK DDR1_CLK C497
DDR1_DM1 0.1uF
B10 DDR0_DQS0 004:E6 E8 C8 E8 C8
DDR0_DQS0 DDR0_DQ[9] DDR1_DQ[9]
B9 CK DQ0 CK DQ0
DDR0_DQS0b 004:E6 DDR0_CLKb F8 C2 DDR0_DQ[8] DDR1_CLKb F8 C2 DDR1_DQ[8]
DDR0_DQS0B 004:A7;004:C7 CK DQ1 CK DQ1 C498
F10 DDR0_DQS1 004:E3 F2 D7 F2 D7
DDR0_DQS1 DDR01_CKE DDR0_DQ[12] DDR01_CKE DDR1_DQ[12] 0.1uF
F9 CKE DQ2 CKE DQ2
DDR0_DQS1b 004:E3 004:A7;004:C7;004:F7;004:F4 D3 DDR0_DQ[13] D3 DDR1_DQ[13]
DDR0_DQS1B DQ3 DQ3
B19
DDR1_DQS0
C19
DDR1_DQS0 004:H6
DDR1_DQS0b 004:H6 F7
DQ4
D1
D9
DDR0_DQ[15]
DDR0_DQ[11] F7
DQ4
D1
D9
DDR1_DQ[15]
DDR1_DQ[14]
SI
DDR1_DQS0B DDR01_RASb DDR01_RASb
E19 RAS DQ5 RAS DQ5
DDR1_DQS1 004:H3 DDR01_CASb G7 B1 DDR0_DQ[10] DDR01_CASb G7 B1 DDR1_DQ[10]
DDR1_DQS1 CAS DQ6 CAS DQ6
D19 DDR1_DQS1b 004:H3 F3 B9 F3 B9
DDR1_DQS1B DDR01_WEb DDR0_DQ[14] DDR01_WEb DDR1_DQ[11]
C16 DDR0_VREF0 WE DQ7 WE DQ7
DDR01_RASb G8 G8
DDR01_RASB CS CS
A7 DDR1_VREF0
DDR_VREF0 DDR01_BA0 DDR01_BA0
A23 B7 B7
DDR_VREF1 DDR01_BA1 DDR0_DQS1 004:A4 DDR01_BA1 DDR1_DQS1 004:A3
C17 D1.8V DQS DQS
DDR01_WEb G2 A8 DDR0_DQS1b G2 A8 DDR1_DQS1b 004:A3
C410

DDR01_WEB 004:A4
C401
C400
C409
C405
C402
C408
C407

C7 BA0 DQS BA0 DQS


G3 B3 DDR0_DM1 G3 B3 DDR1_DM1 004:A4
DDR_VDDP1P8_1 BA1 DM/RDQS 004:A4 BA1 DM/RDQS
D22 G1 A2 G1 A2
DDR_VDDP1P8_2 OPT OPT DDR01_BA2 DDR01_BA2
NC_1/BA2 NU/RDQS NC_1/BA2 NU/RDQS
C406 C415 C427 C428
0.1uF
0.1uF

DDR01_A[0-3,7-13] DDR01_A[0-3,7-13]
470pF
470pF
1uF

1uF

D1.8V D1.8V
1uF
1uF

0.1uF 0.1uF
0.1uF 0.1uF 16V 16V
DDR01_A[0] H8 A9 DDR01_A[0] H8 A9
A0 VDDQ_1 DDR1_A[4-6] A0 VDDQ_1
DDR01_A[1] H3 C1 DDR01_A[1] H3 C1
OPT
OPT

DDR0_A[4-6] A1 VDDQ_2 004:B6;004:F6;004:I7 A1 VDDQ_2


DDR01_A[2] H7 C3 DDR01_A[2] H7 C3
A2 VDDQ_3 A2 VDDQ_3
DDR01_A[3] J2 C7 DDR01_A[3] J2 C7
A3 VDDQ_4 A3 VDDQ_4
DDR0_A[4] J8 C9 DDR1_A[4] J8 C9
A4 VDDQ_5 A4 VDDQ_5
DDR0_A[5] J3 A1 DDR1_A[5] J3 A1
A5 VDD_1 A5 VDD_1
DDR0_A[6] J7 L1 DDR1_A[6] J7 L1
A6 VDD_2 A6 VDD_2
* DDR_VTT DDR01_A[7] K2
A7 VDD_3
E9 DDR01_A[7] K2
A7 VDD_3
E9
DDR01_A[8] K8 H9 DDR01_A[8] K8 H9
A8 VDD_4 A8 VDD_4
DDR01_A[9] K3 DDR01_A[9] K3
A9 A9
DDR01_A[10] H2 A7 DDR01_A[10] H2 A7
DDR_VTT D3.3V
DDR01_A[11] K7
A10/AP VSSQ_1
B2 DDR01_A[11] K7
A10/AP VSSQ_1
B2
A11 VSSQ_2 A11 VSSQ_2
DDR01_A[12] L2 B8 DDR01_A[12] L2 B8
A12 VSSQ_3 A12 VSSQ_3
DDR01_A[13] L8 D2 DDR01_A[13] L8 D2
A13 VSSQ_4 A13 VSSQ_4
D8 D8
VSSQ_5 VSSQ_5
A3 A3
IC404 VSS_1 VSS_1
C426 C425 E3 E3
10K

C417 C419 D1.8V


R418

C413 BD35331F-E2 L3 VSS_2 L3 VSS_2


22uF 22uF 10uF 10uF NC_2/A14 J1 NC_2/A14 J1
10V 10V 0.1uF L7 VSS_3 DDR0_VREF0 L7 VSS_3
10V 10V K9 K9 DDR1_VREF0
16V NC_3/A15 NC_3/A15
VSS_4 VSS_4
GND VTT
1 8 F9 E2 F9 E2
DDR01_ODT DDR01_ODT
ODT VREF ODT VREF
E1 E1
VDDL C450 C453 VDDL C464 C467
EN VTT_IN E7 E7
2 7 VSSDL VSSDL
DDR1_VREF0 0.1uF 470pF 470pF 0.1uF
VTTS VCC
3 6
DDR0_VREF0
R417
R414 0 VREF VDDQ 220
4 5

R415 0 C418
Close to IC Close to IC
C422 C416 C420
1uF
1uF 10uF 0.1uF
10V
10V 10V 16V
16V

C423
C414

C411 C412
0.1uF 0.1uF 10uF
0.1uF

16V 16V 10V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM (EUROBBTV) 2009.06.18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR HONG YEON HYUK
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR Memory 4
COMPONENT1
COMPONENT2
AV1
JK1100
COMPONENT1
PPJ237-01 +3.3V_NORMAL AV <Practically COMP2>
[RD1]E-LUG +3.3V_NORMAL
6C
R1101
10K R1104 NON_SCART
5C [RD1]O-SPRING AV_CVBS_DET
D1100 C1100 1K 9:G3 R1112
100pF 10K
5.6V 50V 1K
4C [RD1]CONTACT SCART1_DET ==> COMP1_DET DTV/MNT_V_OUT
TP1100
D1115 C1112R1116
C1101 1uF 5.6V 100pF
REAR_AV_R_IN
5B [WH1]O-SPRING 25V R1105 C1103 50V TP1101 SC1_FB
D1101 R1102 0 10:B5;AF24
100pF
5.6V 470K 50V
TP1102 SC1_ID
4A [YL1]CONTACT
C1102 1uF
REAR_AV_L_IN TP1103 DTV_ATV_SELECT
[YL1]O-SPRING 25V R1106 10:B5;AF22
5A D1102 R1103 0 C1104
470K 100pF SCART1_Rout_P
5.6V 50V TP1104
C1114
6A [YL1]E-LUG 25V
1uF
REAR_AV_CVBS TP1105 SCART1_Rout_N
D1103 R1107 C1105 11:C4;AL18 SC1_R_IN ==> COMP1_R_IN
[RD2]E-LUG 5.1V 0 47pF R1114
6H D1116 50V D1105 R1109
0
C1125
5.6V 470K 100pF
5.1V
[RD2]O-SPRING_2 TP1107 SC1_CVBS_IN
5H C1113
25V
1uF
SC_RE1
R1100

SC1_L_IN ==> COMP1_L_IN TP1108


OPT

4H [RD2]CONTACT
R1113
0
0

D1104 R1108 C1124 SC_RE2


100pF TP1109
5.6V 470K
5G [WH2]O-SPRING
TP1110 SCART1_Lout_N
L1102
5F [RD2]O-SPRING_1 270nH
SC1_R SCART1_Lout_P
==> COMP1_Pr TP1111
D1106 C1108 C1120
[RD2]E-LUG-S 5.5V 27pF 27pF
7F 50V 50V
L1100
[BL2]O-SPRING 270nH
5E
SC1_B ==> COMP1_Pb
D1107 C1106 C1118
[BL2]E-LUG-S 5.5V 27pF 27pF
7E 50V 50V

4D [GN2]CONTACT

L1101
5D [GN2]O-SPRING 270nH
SC1_G ==> COMP1_Y
[GN2]E-LUG
D1108
5.1V C1107
27pF
C1119
27pF
New Item Development
6D 50V 50V
D1117
5.1V
EARPHONE BLOCK
6N [RD3]E-LUG
HP_LOUT

OPT
5N [RD3]O-SPRING_2
C1130
1000pF
50V

OPT
R1121 OPT C E JK1101
4N [RD3]CONTACT 1K OPT +3.3V_NORMAL KJA-PH-0-0177
Q1100 B
MMBT3904-(F)
MMBT3904-(F) GND 5
B Q1103

R1125
E

10K
5M [WH3]O-SPRING C
L 4
R1123
1K DETECT 3
5L [RD3]O-SPRING_1 COMPONENT2 HP_ROUT HP_DET
<Practically COMP1> R 1

[RD3]E-LUG-S +3.3V_NORMAL
7L OPT
C1131
1000pF OPT C E
R1115 OPT
[BL3]O-SPRING 50V

OPT
5K Q1101 B
10K R1122
MMBT3904-(F)
MMBT3904-(F) +3.5V_ST
R1119 1K B Q1102
1K E C
[BL3]E-LUG-S COMP2_DET

OPT
7K C1115 R1124
D1109 100pF 10K
5.6V 50V SIDE_HP_MUTE
4J [GN3]CONTACT

5J [GN3]O-SPRING
C1117
25V
1uF
6J [GN3]E-LUG +3.3V_NORMAL

R1118 COMP2_R_IN EARPHONE AMP


D1114 0
R1111 C1127
100pF L1106
5.6V 470K 10uH

C1137 C1139
C1116 10uF 0.1uF
25V 10V 16V
1uF R1131 L1107
0 BG2012B080TF
HP_LOUT
R1117 1/16W C1142
D1110 0 COMP2_L_IN Close to the IC
C1136
0.22uF
R1110 C1126 1uF
100pF 16V
5.6V 470K 10V

OUTL

SGND

VDD
+3.3V_NORMAL

EN
R1129
L1103 C1140 100K
270nH C1132 16 15 14 13 2.2uF OPT
COMP2_Pr 1uF 10V R1132 OPT
10V INL- HPVDD 4.7K R1133
D1111 C1109 C1121 1 12
0
HP_LOUT_N
5.5V 27pF 27pF C1133
50V 1uF C
50V 10V INL+ CPP R1134
2 11 1K
HP_LOUT_P Q1104 B
L1104 C1134 IC1100 C1141 2SC3052 SIDE_HP_MUTE
270nH 1uF
INR+ TPA6132A2 PGND 2.2uF
COMP2_Pb 10V 3 10 10V E
HP_ROUT_N
D1112 C1110 C1122 C1135
1uF
5.5V 27pF 27pF 10V INR- CPN
4 EAN60724701 9
50V 50V HP_ROUT_P

5 6 7 8

R1127
4.7K
R1120
4.7K

OUTR

G0

G1

HPVSS
L1105
270nH R1130 L1108

R1128
BG2012B080TF

R1126
COMP2_Y 0

OPT
OPT
HP_ROUT
D1113 C1111 C1123 C1138 1/16W C1143
5.1V 27pF 27pF 2.2uF 0.22uF
50V 10V
D1118 50V 16V
5.1V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP2_BCM 09/10/19
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
HP/COMP/REAR AV(NON_EU_CN)
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 11
Motion Remote controller

Motion Remocon Interface

P1700 +3.3V_NORMAL

+3.3V_NORMAL
12507WR-08L

L1700
120-ohm
1

R1706

R1707
2.7K

2.7K
BLM18PG121SN1D
2

R1700
100
3 M_REMOTE_RX
9:F3;9:G4
R1701
100
4 M_REMOTE_TX
R1702 9:F3;9:G4
100
5 M_RFMODULE_RESET
R1703 9:F3;9:G4
100
6 DC 9:F3;9:G3 R1712
0
R1704 /CI_CD1
100 M_RFMODULE_RESET
7 DD 9:F3;9:G3

ALL M_REMOTE OPTION

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP2_BCM_ATSC 09/10/xx
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MOTION_REMOCON 20 100
+24V_AMP
Sub AMP.
SPK2_L+
D2100 3AMP OPT
C2173
1N4148W R2127 R2136 L2107 0.01uF
3AMP OPT 50V
100V 12 12 AD-9060 R2139
R2121 C2167 3AMP OPT
R2145
3AMP OPT 2S 2F 0.1uF 4.7K
3.3 C2158 50V
390pF 3.3
3AMP OPT 50V C2164
C2155 0.47uF
C2146 1S 1F 50V 3AMP OPT
R2146
C2136 10uF 0.01uF

+3.3V_NORMAL
0.1uF
50V 35V 50V C2159
390pF C2168
0.1uF R2140
3.3 SPEAKER2_L
D2101 50V 15uH 50V 3AMP OPT
C2174
1N4148W R2128 R2134 4.7K 0.01uF

BLM18PG121SN1D
100V 50V
3AMP OPT 12 12
C2134 WAFER-ANGLE
22000pF SPK2_L-
50V C2142
L2104 22000pF R2151
50V 0
SPK2_L+
4

PGND1A_2
PGND1A_1

PVDD1A_2
PVDD1A_1
PVDD1B_2
PVDD1B_1

PGND1B_2
PGND1B_1
C2144 R2152

OUT1A_2
OUT1A_1

OUT1B_2
OUT1B_1
1uF 0

EP_PAD
25V

BST1B
VDR1B
AMP_RESET_N SPK2_L-
3
C2111 R2153
1000pF 0
50V

100
SPK2_R+
2

56
55
54
53
52
51
50
49
48
47
46
45
44
43
R2154
R2100 BST1A NC C2148 SPK2_R+ 0
1 42
AUD_MASTER_CLK C2128 25V1uF SPK2_R-

R2159
56 VDR1A THERMAL 41 VDR2A C2152 1
2
C2110 1uF 25V /RESET 57 22000pF
3 40 BST2A D2102
+1.8V_AMP 100pF R2129 R2135 3AMP OPT
C2175 P2101
AD PGND2A_2 50V 1N4148W 12 L2106
C2118 4 39 12
+1.8V_AMP 0.1uF 100V AD-9060 C2169 R2141 0.01uF
R2161 DGND_1 5 38 PGND2A_1
3AMP OPT 2S 2F 50V
BLM18PG121SN1D

10K GND_IO OUT2A_2 C2160 0.1uF 4.7K 3AMP OPT


R2147
6 IC2100 37
CLK_I 7 DEV 36 OUT2A_1
390pF
50V
C2165
0.47uF
50V 3.3
BLM18PG121SN1D

L2102 50V
C2115 VDD_IO 8 35 PVDD2A_2 1S 1F 3AMP OPT
R2148
L2100
C2106 1000pF
50V DGND_PLL 9 34 PVDD2A_1 C2161
390pF 3.3
SPEAKER2_R
100pF 50V
R2157 AGND_PLL 33 PVDD2B_2 D2103 15uH C2170 R2142 3AMP OPT
50V 10 C2176
3.3K LF PVDD2B_1 1N4148W R2130 R2133 0.1uF 4.7K 0.01uF
11 NTP-7000 32 100V 50V
12 12 50V
AVDD_PLL 12 31 OUT2B_2 3AMP OPT SPK2_R-
DVDD_PLL 13 30 OUT2B_1 +24V_AMP
GND 14 29 PGND2B_2
3AMP OPT EAN60969601
C2100 C2102 3AMP OPT
10uF 0.1uF C2104 C2107

15
16
17
18
19
20
21
22
23
24
25
26
27
28
10V 16V 10uF 0.1uF
10V 16V

DGND_2
DVDD
SDATA
WCK
BCK
SDA
SCL
MONITOR0
MONITOR1
MONITOR2
/FAULT
VDR2B
BST2B
PGND2B_1
+1.8V_AMP C2157
C2154 10uF
0.1uF 35V
50V
3AMP OPT
C2125 C2140
10uF C2132 1uF
0.1uF 25V C2149
10V
16V
22000pF
50V
R2101 100
AUD_LRCH
R2102 100 R2162
AUD_LRCK 0
R2103 100 POWER_DET
AUD_SCK
R2104 100 C2138 3AMP OPT
SDA2_3.3V 1000pF
R2105 100 50V
SCL2_3.3V

C2114 C2120 C2122 C2124 C2130


33pF 33pF 22pF 22pF 22pF
50V 50V 50V 50V 50V
3AMP OPT3AMP OPT3AMP OPT R2118 100
AMP_MUTE1

+24V_AMP
Woofer AMP. D2104 3AMP OPT
C2177
SPK_Woofer+

1N4148W R2131 R2138 L2108 0.01uF


3AMP OPT 50V
100V 12 12 AD-9060 R2143
R2122 C2171 3AMP OPT
R2149
3AMP OPT 2S 2F 0.1uF 4.7K
3.3 C2162 50V
390pF 3.3
3AMP OPT 50V C2166
C2156 0.47uF
C2147 1S 1F 50V 3AMP OPT
R2150
C2137 10uF 0.01uF

+3.3V_NORMAL
0.1uF
50V 35V 50V C2163
390pF C2172
0.1uF R2144
3.3 Woofer
D2105 50V 15uH 50V 3AMP OPT
C2178
1N4148W R2132 R2137 4.7K 0.01uF
BLM18PG121SN1D

100V 50V
12 12
C2135 3AMP OPT
22000pF SPK_Woofer-
50V C2143
L2105 22000pF
50V
PGND1A_2
PGND1A_1

PVDD1A_2
PVDD1A_1
PVDD1B_2
PVDD1B_1

PGND1B_2
PGND1B_1

C2145
OUT1A_2
OUT1A_1

OUT1B_2
OUT1B_1

1uF
EP_PAD

25V
BST1B
VDR1B

AMP_RESET_N

100
3AMP OPT

3AMP OPT
100
C2112
1000pF
50V
100

R2125
56
55
54
53
52
51
50
49
48
47
46
45
44
43

R2126
R2111 BST1A NC C2150
1 42
AUD_MASTER_CLK C2129 25V1uF
56 VDR1A THERMAL VDR2A C2153
R2160

2 41
C2113 1uF 25V /RESET 57 22000pF
3 40 BST2A
+1.8V_AMP 100pF
AD PGND2A_2 50V
C2119 4 39
+1.8V_AMP 0.1uF DGND_1 PGND2A_1
5 38 R2156
R2124
BLM18PG121SN1D

GND_IO 6 IC2101 37 OUT2A_2 0


SPK_Woofer- 1
CLK_I 7 36 OUT2A_1 4.7K
BLM18PG121SN1D

L2103
C2117 VDD_IO PVDD2A_2 R2155
L2101
C2108
100pF
50V
1000pF
50V
R2158
DGND_PLL
AGND_PLL
8
9
10
DEV 35
34
33
PVDD2A_1
PVDD2B_2
+24V_AMP SPK_Woofer+
0
2

3.3K LF 11 NTP-7000 32 PVDD2B_1


AVDD_PLL 12 31 OUT2B_2 FW25001-02(SPK 2P)
DVDD_PLL 13 30 OUT2B_1 P2100
GND PGND2B_2
3AMP OPT
C2101 C2103 3AMP OPT
14
EAN60969601
29 Development Item(Slim Depth)
10uF 0.1uF C2105 C2109
15
16
17
18
19
20
21
22
23
24
25
26
27
28

10V 16V 10uF 0.1uF


10V 16V
DGND_2
DVDD
SDATA
WCK
BCK
SDA
SCL
MONITOR0
MONITOR1
MONITOR2
/FAULT
VDR2B
BST2B
PGND2B_1

+1.8V_AMP

3AMP OPT
C2127 C2141
10uF C2133 1uF R2123
0.1uF 25V C2151
10V
16V
22000pF 4.7K
50V
R2106 100
AUD_LRCH
R2107 100 R2119
AUD_LRCK 0
R2108 100 POWER_DET
AUD_SCK
R2109 100 C2139 3AMP OPT
SDA2_3.3V 1000pF
R2110 100 50V
SCL2_3.3V

C2116 C2121 C2123 C2126 C2131


33pF 33pF 22pF 22pF 22pF
50V 50V 50V 50V 50V
3AMP OPT3AMP OPT3AMP OPT R2120 100
AMP_MUTE1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP2_BCM_ATSC 09.10
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AMP_SUB_NTP 21 100
LG LOGO FOR LE9500

+5V_NORMAL +3.5V_ST

1/10W 1/10W

OPT
P2200
33 0
12507WR-04L
R2228 R2229

LED_B/LG_LOGO
3

100
R2200
C
5
B Q2200
2SC3052

E
D2200
CDS3C05HDMI1
5.6V
OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
GP2_BCM_ATSC 09/10/xx
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR LG_LOGO_LE9500
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 22 100
CAN H-NIM/NIM TUNER for TAIWAN
TU2600-*5
TU2600-*1 TU2600-*2 TDTR-T035F +5V_TU
TDVJ-H031F TDVJ-H001F
Taiwan/Brazil_H
Latin_Tuner_V Latin_Tuner_H RF_S/W_CTL
ANT_PWR[OPT] ANT_PWR[OPT] 1 L2600
1 1
BST_CTL BLM18PG121SN1D
BST_CNTL BST_CNTL 2
2 2
+B1[5V]
+B +B 3
3 3
NC_1[RF_AGC] R2615 Q2601
NC[RF_AGC] 4 R2621
NC[RF_AGC] 0
4 4 E ISA1530AC1 10K
NC_2 R2618
AS AS 5 R2602 0 RF_SWITCH_CTL 2.2K
5 5
SCLT
6
SCL
6
SCL 6
SDAT
TU2600 B
C
R2623
C
SDA SDA 7 R2605 0 10K
7 7
NC_3 TDTR-T055F Q2604
2SC3052
B
LNA2_CTL/BOSTER_CTL
NC(IF_TP) NC(IF_TP) 8
8 8 C2613
SIF E
9
SIF
9
SIF 9 Taiwan/Brazil_V close to TUNER +5V_TU
0.01uF
NC_4 25V
NC NC 10 ANT_PWR[OPT] OPTION : RF AGC
10 10 1 close to TUNER
VIDEO C2609
VIDEO VIDEO 11 C2601
11 C2608 10uF
11
GND BST_CNTL 0.1uF C2606 0.1uF
GND 12 2 16V C2636 C2604 10V
GND 0.1uF 16V OPT
12 12
+B2[1.2V]
22uF 100pF
16V OPT
+5V_TU
1.2V 1.2V 13 +B[5V] 10V 50V C
13 13 3 R2608
+B3[3.3V] 10K R2625
3.3V 14 Q2600 B
3.3V 470 R2626
14 14 NC[RF_AGC] 2SC3052 IF_AGC_SEL 82
RESET R2600 0 OPT L2609-*1
RESET RESET 15 4 OPT
E 33 E
TU_SIF
15 15 NON_TUNER_I2C_LPF
IF/AGC OPT
IF_AGC_CNTL IF_AGC_CNTL 16 AS L2610-*1
16 16 5 33
DIF_1[N] NON_TUNER_I2C_LPF B ISA1530AC1
DIF_1 DIF_1 17
17 R2622 Q2605
17
DIF_2[P] SCL L2609 270nH TUNER_I2C_LPF +5V_TU 4.7K
C
DIF_2 DIF_2 18 6 SCL0_3.3V
18 18
SDA NON_TUNER_I2C_LPF TUNER_I2C_LPF
L2610 270nH TUNER_I2C_LPF
19 7 R2643
19 19 SDA0_3.3V R2616 R2619
C2612 1K
SHIELD C2611-*1 C2612-*1 C2611 C2639 C2638 200 200
SHIELD SHIELD
NC(IF_TP) 18pF 18pF 62pF 62pF 20pF 20pF OPT
8 50V 50V 50V 50V 50V 50V
OPT
SIF C2602 close to TUNER NON_TUNER_I2C_LPF TUNER_I2C_LPF TU_CVBS
9 TUNER_I2C_LPF TUNER_I2C_LPF R2644 0
E
0.1uF 16V R2613 0
NC
TU2600-*4 10
TU2600-*3 +1.2V_TU R2614 B Q2602
TDTJ-S001D 1K ISA1530AC1
TDTJ-S031D VIDEO C
AU_Asia_Tuner_H
11 OPT
AU_Asia_Tuner_V close to TUNER L2605 +3.3V_TU
ANT_PWR[OPT] GND
ANT_PWR[OPT] 1 +3.3V_TU
1 12 BLM18PG121SN1D
BST_CNTL
BST_CNTL 2
2 +B2[1.2V] C2634 C2600 C2603
+B 13 C2607
+B 3 10uF 100pF 0.1uF C2605
3 50V 16V 100pF 0.1uF
NC[RF_AGC] 10V R2607
NC[RF_AGC] 4 +B3[3.3V] 50V 16V R2606 100K
4 14 100 TUNER_RESET
AS
AS 5 C2635
5 RESET 10uF
C2610
SCL 15 0.1uF
SCL 6 10V 16V
6
SDA IF_AGC_CNTL
SDA 7
7 16
NC[IF_TP]
8
NC(IF_TP) 8
DIF_1[N] IF_AGC
R2601 0
SIF 17 R2611 100
SIF 9
9 NIM IF_N_EXT
NC DIF_2[P]
NC 10
10 18 R2612 100
IF_P_EXT
VIDEO
VIDEO 11 NIM
11
GND
GND 12
12 19
1.2V
1.2V 13
13
3.3V SHIELD TU_IF_N_BCM
3.3V 14 INT_DEMOD R2603 0
14
RESET 15
RESET TU_IF_P_BCM
15 INT_DEMOD R2604 0
IF_AGC_CNTL
IF_AGC_CNTL 16
16
DIF_1
DIF_1 17
17
DIF_2
DIF_2 18
18

19
19
SHIELD
SHIELD

IF AGC FILTER CAUTION : Closed BCM IC(IC100)

A3.3V
5%
1/16W

3.9K

+5V_NORMAL
R2624

R2633 R2638
2K 220
TU_IF_AGC_BCM
510
R2642 510

1/16W 1/16W +3.3V_TU


5% 5% IC2600 +3.3V_NORMAL
0.01uF

OPT
0.01uF
5%
1/16W

3.9K

C2629

R2641
R2632

C2627

OPT AZ1117H-ADJTRE1(EH11A) +3.3V_TU


+1.2V_TU L2604
CIC21J501NE 60mA
R2628
INPUT 3 1 ADJ/GND 10
C2621 C2622 C2625 C2633
TU_IF_AGC_1 R2 0.1uF 0.1uF 22uF 0.1uF
16V 16V 10V 16V
TU_IF_AGC_2
C2614
2 GND
R2627 For ESD
0.1uF 1.2K
16V OUTPUT R1
+5V_NORMAL

+5V_TU
IF FILTER OPTION R2629 L2603
V_OUT=V_REF(1+R2/R1) 200mA
1
BLM18PG121SN1D
C2616
0.1uF C2620 C2637 C2623 C2624 C2626
C2615 16V 0.1uF 0.1uF
0.1uF 22uF 22uF
10uF 16V 16V
16V 10V 10V
10V

TU_IF_N_BCM 0.01uF C2631


TU_IF_N_1

TU_IF_P_BCM 0.01uF C2632


TU_IF_P_1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP2_BCM Ver. 1.0
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Tuner (Half Nim) 28
PANASONIC (ISDB-T)
MN884433

ISDB_DEMOD
+1.2V_DE +3.3V_DE R2807 22
FE_TS_VAL_ERR
ISDB_DEMOD ISDB_DEMOD ISDB_DEMOD
ISDB_DEMOD ISDB_DEMOD ISDB_DEMOD R2808 22
C2812 C2815 C2816 C2819 C2821 FE_TS_SYNC
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16V 16V 16V 16V 16V ISDB_DEMOD
R2809 22
FE_TS_SERIAL
ISDB_DEMOD (FE_TS_SERIAL)
ISDB_DEMOD
C2810 R2810 22
0.1uF FE_TS_DATA_CLK
16V

+3.3V_DE

HDVDDL1
VDDH_5

VDDL_7
VSS_11

HDVDDH

VSS_10
VDDH_4
AGC_S

TEST0

HDVPP

TEST2
TEST1
GPO2
DENB
PCKB
SDOB

SCKB

NC_4

NC_3

DENA
PCKA
SDOA
GPI2
SCKA
RON
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
OPT OPT AMP_I2C HAVE PULL-UP
VSS_1 1 75 VSS_9 R2811 R2812
AVDD_S 2 74 INTB 2.2K 2.2K
C2802 0.1uF AII_S 3 73 INTA
ISDB_DEMOD AIQ_S SADR
4 72
AVSS_S VDDH_3 ISDB_DEMOD
5 71
VRT_S SCL C2825 0.1uF
6 70 SCL1_3.3V
VRB_S SDA R2813 22
7 69 SDA1_3.3V
TCPO_S VSS_8 R2814 22
VDDL_1
8
9
IC2800 68
67 HDVDDL0 ISDB_DEMOD
ISDB_DEMOD MSCL_S SADR_S C2826 0.1uF
C2803 0.1uF 10 66
ISDB_DEMOD R2801
R2802
2.2K MSDA_S
2.2K
11 MN884433 65 NC_2
ISDB_DEMOD VSS_2 12 64 SADR_T
VSSH VDDL_6 ISDB_DEMOD
13 63
C2804 0.1uF ISDB_DEMOD PSEL ISDB_DEMOD VSS_7 C2827 0.1uF
14 62
ZSEL 15 61 ERRB
VDDL_2 16 60 SYNCB
C2805 0.1uF ISDB_DEMOD ACKI ERRA
17 59
ISDB_DEMOD TCPO_T SYNCA
R2800 18 58
10K 1% IR_T TDO
19 57
VRT_T 20 56 CSEL1
C2806 0.1uF ISDB_DEMOD VRB_T CSEL0
21 55
C2807 0.1uF ISDB_DEMOD AVDD_T TMS
ISDB_DEMOD 22 54
C2808 0.1uF ISDB_DEMOD AIN_T TRST
IF_N_EXT 23 53 ISDB_DEMOD
C2800 0.1uF AIP_T VDDL_5
24 52
IF_P_EXT C2801 0.1uF AVSS_T VSS_6 C2824 0.1uF
ISDB_DEMOD 25 51
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
VSS_3
MSCL_T
MSDA_T
VDDH_1
GPO1
AGCI_T
AGCR_T
GPO0
VDDL_3
VSS_4
XO
XI
VDDH_2
GPI1
GPI0
TEST4
SHVPP
SHVDDH
NC_1
VSS_5
VDDL_4
TCK
TDI
NRST
TEST3
ISDB_DEMOD
R2804 2.2K DEMOD_RESET
ISDB_DEMOD
R2805 2.2K

ISDB_DEMOD
ISDB_DEMOD C2813 ISDB_DEMOD
C2811 0.1uF C2823
0.1uF 0.1uF
16V 16V 16V

C2817 C2820 C2822


0.1uF 0.1uF 0.1uF
16V 16V 16V
ISDB_DEMOD ISDB_DEMOD
ISDB_DEMOD
R2803 10K
IF_AGC_ISDB ISDB_DEMOD ISDB_OPT
ISDB_DEMOD R2806
1M
C2809
0.1uF
ISDB_DEMOD
X2800 ISDB_DEMOD
ISDB_DEMOD
25MHz C2818
C2814
15pF 15pF
50V 50V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP2_Saturn7M Ver. 1.0
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. ISDB-T Demodulator 28
Panasonic Demodulator Power(3.3V,1.2V)
ISDB_BCD
IC2900
AP2132MP-2.5TRG1
[EP]
ISDB_BCD
+3.3V_DE ISDB_BCD R2903-*1
+3.3V_DE R2904 10K
+3.3V_NORMAL 10K PG GND
1 8 +1.2V_DE
ISDB_SEMTECH

THERMAL
ISDB_POWER ISDB_SEMTECH
R2905
10K EN ADJ R2903

9
L2900 2 7
BLM18PG121SN1D
5.1K
VIN VOUT
ISDB_POWER ISDB_POWER 3 6
ISDB_POWER ISDB_POWER
C2902 C2903 R2906
C2900 C2901 0.1uF 10uF 10K ISDB_BCD VCTRL ISDB_POWER ISDB_POWER
NC

R2902
16V
10V 4 5 C2904 C2905

10K
ISDB_POWER
0.1uF
0.1uF 0.1uF +5V_NORMAL 16V 22uF
16V

OPT
C2906
0.1uF
ISDB_BCD IC2900-*1
L2901 SC4215ISTRT

NC_1 GND
1 8
ISDB_SEMTECH
OPT
C2907 EN ADJ
0.1uF 2 7

VIN VO
3 6

NC_2 NC_3
4 5

IF AGC SELECTION

IF_AGC_ISDB TP2901 IF_AGC_SEL

R2900
0
ISDB_DEMOD

IF_AGC

R2901
0
INT_DEMOD

TU_IF_AGC_BCM

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP2_Saturn7M Ver. 1.0
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
Demodulator
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 29
USB2 OPTION
+3.3V_NORMAL
USB / DVR Ready
IC2202
AP2191SG-13 +5V_USB
R2220
L2202 NC 8 1 GND 4.7K
MLB-201209-0120P-N2 OPT
OUT_2 7 2 IN_1
120-ohm OUT_1 6 3 IN_2

SIDE_USB_DP

SIDE_USB_DM
C2218 C2220
FLG 5 C2222
4 EN 10uF
100uF R2226 0.1uF
EAN60921001 2.7K 10V
16V

C2206
USB_CTL1

1uF
10V
KJA-UB-4-0004
JK2201
R2225 0 /USB_OCD1

1
C2207
0.1uF

USB DOWN STREAM

2
USB_DM1

C2208
C2210
15pF
15pF

3
USB_DP1

SUSP_IND/LOCAL_PWR/NON_REM0
R2202
1M 1%
1/10W 1%

4
D2201 D2203
CDS3C05HDMI1 CDS3C05HDMI1

R2203
R2201

5
5.6V

100K
X2201 5.6V
12K

+3.3V_NORMAL +3.3V_USB 24MHz


L2201
BLM18PG121SN1D
+3.3V_USB
XTAL1/CLKIN
VDD33PLL

VDD18PLL

USBUP_DP

USBUP_DM

VDDA33_3
RBIAS

XTAL2
VSS

C2212
36

35

34

33

32

31

30

29

28

USBDN1_DM VBUS_DET 0.1uF R2209


USB_DM1 1 27 100K
+3.3V_USB R2214
THERMAL OPT 0
USBDN1_DP 2 26 RESET_N
USB_DP1

USB_DM2
USBDN2_DM 3
37

25 HS_IND/CFG_SEL1 R2210
100K
C2215
0.1uF
/RST_HUB
USB +3.3V_NORMAL
+3.3V_USB
USBDN2_DP SCL/SMBCLK/CFG_SEL0 OPT
USB_DP2 4 24
IC2201
VDDA33_1 VDD33 R2212 100K OPT IC2203 +5V_USB
5 USB2512A_AEZG 23 AP2191SG-13
R2221
C2201 NC_1 SDA/SMBDATA/NON_REM1 R2211 100K OPT L2203 NC 8
C2202 C2203 C2204 C2205 6 22 1 GND 4.7K
1uF MLB-201209-0120P-N2 OPT
10V 0.1uF 0.1uF 0.1uF 0.1uF NC_2 NC_8 OUT_2 7 2 IN_1
7 21
R2213 100K OPT
120-ohm OUT_1 6 3 IN_2
NC_3 8 20 NC_7 C2221
C2219 C2223
0 R2207 OPT FLG 5 4 EN 10uF
NC_4 NC_6 SCL2_3.3V 100uF R2223 0.1uF
9 19 EAN60921001 2.7K 10V
0 R2208 KJA-UB-4-0004 16V
OPT
10

11

12

13

14

15

16

17

18

SDA2_3.3V JK2202
R2204

R2205

USB_CTL2
R2206
100K

100K

100K
VDDA33_2

TEST

PRTPWR1

OCS1_N

VDD18

VDD33CR

PRTPWR2

OCS2_N

NC_5

1
+3.3V_USB R2227 0 /USB_OCD2

USB DOWN STREAM


040:J6

2
USB_DM2
C2211

3
0.1uF

C2213 C2214 USB_DP2


4.7uF
0.1uF

4
D2202 D2204
CDS3C05HDMI1 CDS3C05HDMI1

5
5.6V
C2209

5.6V
1uF
10V
/USB_OCD1

/USB_OCD2
USB_CTL2
USB_CTL1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
40
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
USB
BLUETOOTH +3.3V_NORMAL

G
BCM BT MODULE

S
BCM BT MODULE

D
C1898

BCM BT MODULE
Q1801
RTR030P02
R1889
1uF

10
BLUETOOTH FOR BCM BCM BT MODULER1886 BCM BT MODULE
R1887 47K
47K
R1888 C

L1899
BT_ON/OFF 4.7K B

OPT
500
2SC3052
BCM BT MODULE Q1800
E
BCM BT MODULE
11

10
BCM BT MODULE
C1899
22uF
9 10V
R1896
27
BT_DM
8
D1899 BCM BT MODULE
CDS3C05HDMI1
7 5.6V
BCM BT MODULE R1897
27
BT_DP
6 D1898
CDS3C05HDMI1BCM BT MODULE
5.6V
5 BCM BT MODULE
R1898
0
BT_RESET
4
BCM BT MODULE

3
R1899
0
VREG_CTRL
2
BCM BT MODULE

12507WR-10L
P1895
BCM BT MODULE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 43
Bluetooth
CI POWER ENABLE CONTROL

CI CONTROL BUFFER

/CI_SEL CI_A[0]
CI_A[1]
EBI_CS CI_A[2]
CI_A[3]
EBI_WE

CI_A[4]
CI_5V_CTL
CI_A[5]
CI_A[6] 007:H7 [GP27]
CI_A[7]

CI_A[8]
CI_A[9]
CI_A[10]
CI_A[11]

CI_A[12]
CI_A[13]

CI_A[0-13] 007:E6 EBI_RW

CI_A[14]

/CI_CD1

CI_OUTCLK,CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID
CI_OUTDATA[4]
CI_OUTDATA[5]
CI_OUTDATA[6] DVB-CI PULL-DOWN (Near CI Slot)
CI_OUTDATA[7]

CI_OUTCLK
CI_OUTVALID
CI_OUTSTART

/CI_IREQ CI_OUTDATA[0]
[GP39] CI_OUTDATA[1]
007:H5;016:AJ3
CI_OUTDATA[2]
CI_OUTDATA[3]

DVB-CI PULL-UP (Near CI Slot)

CI_MOD_RESET [GP49]
/CI_WAIT

/CI_WAIT

CI_OUTCLK

/CI_CD1
/CI_CD2 [GP38]
/CI_CD2

CI_MOD_RESET

FE_TS_SYNC

FE_TS_VAL_ERR

FE_TS_DATA_CLK

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS High_Common(BCM3556) 2009.10.19
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Non_CI 46
3D IR
+3.3V_NORMAL

Inner_Emitter
P6900 Outer_Emitter IC6900 +5V_NORMAL
AP2191SG-13
KJA-UB-4-0004 R6902
12507WR-03L JK6900 L6900 NC 8 1 GND 4.7K
MLB-201209-0120P-N2 OPT OPT
OUT_2 7 2 IN_1

1
L6902 C6900

USB DOWN STREAM


1 120-ohm OUT_1 6 3 IN_2
OPT C6902
120-ohm 100uF C6903
FLG 5 4 EN 10uF

2
Inner_Emitter 16V R6903 10V 0.1uF
2 3D_IR EAN60921001 2.7K 3D_IR 3D_IR
OPT

3
USB_PWRON3
3 R6906 0
R6901 0
Inner_Emitter USB_PWRFLT3
OPT

4
4 L6901

5
MLB-201209-0120P-N2

120-ohm
3D_IR

R6900
0 R6904 0
3D_SYNC_OUT USB_PWRFLT3 SC_RE1
D6900 3D_IR OPT
C6901
5.5V
0.01uF USB_PWRON3
R6905 0
SC_RE2
3D_IR
50V OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 10.01
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 3DIR 69 100
PANEL_VCC

[51Pin LVDS Connector] P7801


(For FHD 60/120Hz) L7800
120-ohm
TM480Hz
P7800
TF05-51S
TM480Hz
C7800 C7801 C7802
10uF 1000pF 0.1uF
25V 50V 50V
1 OPT TM480Hz TM480Hz

10

11 RRXB4+/RLV0P
12

13
RRXB4-/RLV0N
I2C_#3 Check(LG5111,LG1120,etc)
RRXB3+/RLV1P
14 RRXB3-/RLV1N
15
TM480Hz
16 P7802
RRXBCK+/RLV2P
12507WR-04L
17 RRXBCK-/RLV2N SCAN_BLK1/OPC_OUT
18
OPC_OUT 1 R7812 0 SCL3_3.3V
19 RRXB2+ TM480Hz
20 RRXB2-
OPC_EN 2 R7813 0 SDA3_3.3V
21 TM480Hz
RRXB1+
22 RRXB1- 3D_SYNC_OUT 3

23 RRXB0+/RLCLKP
SCAN_BLK2 4 R7814 0 V_SYNC
24 RRXB0-/RLCLKN TM480Hz
25 5

26

27 RRXA4+/RLV3P
28 RRXA4-/RLV3N
29 RRXA3+
30 RRXA3-
31

32 RRXACK+/RLV4P
33 RRXACK-/RLV4N
34

35 RRXA2+/RLV5P
36 RRXA2-/RLV5N
37 RRXA1+
38 RRXA1-
Formatter for 3DTV
39 RRXA0+
P7803
40 RRXA0- 12507WR-04L
R7806 0 3D_DIMMING_2
41 3D_DIM2
R7805 0 3D_DIMMING
42 R7084 0 L7801
SCL2_3.3V 3D_DIM 1 PANEL_VCC
OPT
43 R7085 0 SDA2_3.3V 120-ohm
OPT 3DTV
44 R7086 0 L/R_SYNC GPIO31 2
3DTV
45
3
46 R7800 0 FRC_RESET
TM480Hz
47 R7801 0 SCL3_3.3V 4
TM480Hz
48 R7802 0 SDA3_3.3V
TM480Hz 5
49 R7803 0 V_SYNC
TM480Hz
50 R7807 0 3D_SYNC_OUT
3DTV
51 R7087 0
R7804
52 12507WR-06L

3DTV R7808
2 0 E_TCK

R7809
3 0 E_TDO

R7810
4 0 E_TMS

R7811
5 0 E_TDI

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 35
LG5111 60Hz LVDS
[To MASTER LED DRIVER]
P7900
12507WR-10L
IOP

1 L_VS

2 M0_MOSI

3 M0_SCLK
+3.3V_NORMAL

5 M1_MOSI

6 M1_SCLK

R7907 R7908 R7909


7 3.3K 3.3K 3.3K
Edge Edge Edge

8 R7904 22 S_CS_N
IOP

9 R7905 22 S_MOSI
IOP

10 R7906 22 S_SCLK
IOP
11 C7901 C7903 C7905 C7907 C7909 C7911 C7913 C7914
100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF
50V 50V 50V 50V 50V 50V 50V 50V
OPT OPT OPT OPT OPT OPT OPT OPT

[To SLAVE LED DRIVER]


P7901
12507WR-08L
Except Edge(42/47")

Edge(55")
1 R7910 22 IOP
R_VS
R7900 0
2

3 R7911 22 IOP
M2_MOSI
R7912 22 Edge(55") M2_SCLK
4 R7913 22 IOP
M2_SCLK
R7901 22
5 Edge(55") R7914 22 Edge(55") M2_MOSI
R7902 22
6 IOP R7918 22 IOP
M3_MOSI
R7916 22
7 Edge(55") R7919 22 IOP
M3_SCLK
R7917 22
8 Edge(55") R7915 22 Edge(55") R_VS

9
R7903 22
IOP
C7900 C7902 C7904 C7906 C7908 C7910 C7912
100pF 100pF 100pF 100pF 100pF 100pF 100pF
50V 50V 50V 50V 50V 50V 50V
OPT OPT OPT OPT OPT OPT OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP2_Saturn7M Ver. 1.0
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Interface for LG5111 72
FROM LIPS & POWER B/D
L_VS
R_VS
MO_SCLK
+3.5V_ST
RT1P141C-T112 M2_SCLK
15V-->3.6V +12V +3.5V_ST
Q8002 MO_MOSI
20V-->3.5V R8068 +3.5V_ST
M2_MOSI
24V-->3.48V 100K

R8075
PD_+3.5V
PD_+12V
R8004

R8067
1 3

R8063
12V-->3.58V

10K
+24V

OPT
4.7K NORMAL_26~52

14K
IC8007

12K
C

1%
R8000 P8000

1%
RL_ON 10K
B Q8000
2SC3052
2
FW20020-24S
+5V_NORMAL ST_3.5V-->3.5V
NCP803SN293
R8081 POWER_DET

NON_PD_+3.5V
100
E PWR ON 1
24V
2 24V
24V
L8005
MLB-201209-0120P-N2
C8024
400Hz_VSYNC/42_47_LOCAL DIMMING
R8078
0
+12V
IC8003
MAX 350mA +5V_NORMAL Power_DET VCC 3
1
2 RESET

R8064

1/16W
3 4 GND

5.1K
GND GND 68uF AOZ1072AI
+3.5V_ST 5 6 35V R_VS

5%
L8003 C8018 ESD
MLB-201209-0120P-N2 GND 7 8 GND
0.1uF 400Hz_VSYNC L8010 C8065
3.5V 9 10 3.5V 50V L8007 PGND LX_2 3.6uH 0.1uF
R8036 1 8 16V
3.5V 11 12 3.5V 0 L_VS CIC21J501NE
C8000 C8004 C8006
100uF GND 13 14 GND NR8040T3R6N
0.1uF 0.1uF
400Hz_MO_SCLK/42_47_LOCAL DIMMING

R8053
16V GND GND/V-sync R8082 0 V_SYNC VIN LX_1
16V 16V 15 16 2 7
R8077 0

1%
47K
12V 17 18 INV ON 400Hz_VSYNC M2_SCLK C8068
0.1uF R8079
12V 19 20 A.DIM R8028 0
MO_SCLK 16V AGND
3
2A 6
EN POWER_ON/OFF2_2
C8047 C8066 C8049
+3.5V_ST +24V 100K not to RESET at 8kV ESD
+12V 12V P.DIM1 R1

5.6K
R8054
21 22 400Hz_MO_SCLK 22uF 10uF 0.1uF

1%
L8002 C8028 C8030 R8050
GND/P.DIM2 23 24 Err OUT 10K 10V 16V 16V IC8008
MLB-201209-0120P-N2 10uF 10uF POWER 18.5V
FB COMP OPT
400Hz_MD_MDSI/42_47_LOCAL DIMMING

+3.3V_NORMAL 25V 25V POWER 24V POWER 20V NCP803SN293


SLIM_32~52 4 5 R8080 R8061-*2 R8061-*1
OPT R8061
400Hz_MD_MDSI

SCAN_LIPS
NON_CMO 22K 1%

R8015
C8003 C8005 R8026 24K 1% R8074
NON_SCAN_LIPS

C8001 25 12K C8046 14K 1% 24K 1%


R8085

0.1uF 0.1uF R8019 1K 2200pF 100


100uF R8049 100pF VCC RESET
0

LD
100 3 2
0

50V 50V SMAW200-H24S2 C8040


25V 50V

0
C8011
0.1uF
0

R8018 POWER 18.5V 1


P8001
OPT
16V
100 R8062-*2 POWER 24V POWER 20V GND
R8005

R8076

C
R8007

R8055
R8023 R8032 4.7K 1% R8062-*1 R8062

1%
CMO

10K
B 10K INV_CTL 4.3K 1% 5.1K 5%
6.8K R2
R8009

SCAN

OPT
E
Q8005
2SC3052
Vout=0.8*(1+R1/R2)
R8039
0

0
10K

SHARP
R8029 OPT
MO_MOSI

M2_MOSI

CMO 0
C8012

R8014
OPT
1uF
25V

AUO R8030 0
SCAN_BLK2

R8031 0 A_DIM
BCM core 1.2V volt

SCAN_PSU

0
LGD_IOP A_DIM_LGD

R8083
R8084 R8021
<OS MODULE PIN MAP> 0 AUO R8027
R8022 0
0 0 PWM_DIM R8044
PWM_NON_OPC
SCAN_PSU MAX 3.1A
AUO
+3.3V_NORMAL

R8047
PIN No LGD CMO(09) SHARP R8020 R8033 10K

3.9K
OPT
NON_SCAN_PSU C8017 C8021 0 POWER_ON/OFF2_1
0 1uF SCAN_BLK1/OPC_OUT
0.1uF SCAN/FHD_OPC ESD +12V
OPT 25V
18 INV_ON A-DIM INV_ON INV_ON OPT R8034
EP D8000 ESD
R8045-*1 MAX 2.3A
0 5.6V
100K D1.2V A1.2V
OPC_OUT
HD_OPC AGND FB R8045
V4:VBR-A 1 14
20 NC Err_out Err_out R8035

THERMAL
0

NON_LED_MODEL
V5:NC 0 +3.3V_NORMAL NON_ESD R8060

15
SS EN/SYNC
2 13 R8043 R8046 R8048 POWER_ON/OFF2_2
+3.3V_NORMAL

R8037
C8026 L8013 10K D3.3V
22 PWM_DIM PWM_DIM A-DIM PWM_DIM

4.7K
R8024 470K 30K 910K
0.1uF PGND_1 PGND_2 CIC21J501NE

R8066
0

3.9K
3 12 1%

OPT
AUO/SHARP ERROR_OUT L8009 1% 1%
IC8001 L8011
Err_out INV_ON PWM_DIM 2uH R1 R2 BLM18PG121SN1D
24 GND R8025
SW_1
4 11
SW_2
L8015 L8016
0 C8069 VIN 3.6uH CIC21J501NE
NON_LED_MODEL 0.1uF
IN_1 IN_2
NON_LED_MODEL C8036

2
5 10

R8069
0.1uF EN 6
+3.5V_ST

1%
27K
NC POK R8040
6 9
IC8005

MLB-201209-0120P-N2
100K FB LX
R8041 C8037 C8041 C8043 C8045 4 7
BS VCC R8042

4.7K
R8070
7 8 22uF 22uF 10uF 0.1uF C8057 C8059 C8063 C8064

1%
0 16V C8051 C8052 C8067
10 10V 10V 16V COMP AOZ1024DI 22uF 22uF 0.1uF 0.1uF
MP2208DL-LF-Z 0.1uF 22uF 5 10uF 16V 16V

L8006
10V 10V
50V 25V
R8058
10V

1
20K
+12V

AGND

PGND
L8000
PANEL_POWER C8054
2200pF

R8071
CIC21J501NE 50V

1%
10K
C8029 C8032 C8033 C8035
C8027 1uF
22uF 0.1uF 22uF
0.1uF 10V
C8009 C8010 16V
C8008
0.1uF 10uF
0.01uF
25V 50V 25V
OPT
Vout=0.8*(1+R1/R2)
Q8004
AO3407A
S

D
R8010
10K

C8013 PANEL_VCC
10uF
G
25V OPT
R8011

R8003 C8015
1.8K

22K 1uF
25V

OPT C
R8002
10K B Q8003
2SC3052
C C8022
R8001
47K B Q8001
R8008
22K
E 0.1uF
50V BCM DDR 1.8V Max 1100 mA
PANEL_CTL

1:AK10
E
2SC3052

+3.5V_ST
+3.3V_NORMAL
A2.5V A2.5V
D1.8V SEMTEK VOUT : 2.533V
Vout=0.9*(1+R1/R2) IC8004
L8012 AP2132MP-2.5TRG1
[EP] BCD VOUT : 2.514V
Replaced Part 3.6uH
CIC21J501NE

L8014
500

L8017
500
NR8040T3R6N R8086 10K PG BCD GND
IC8002 1 8
L8008

MP2108DQ

THERMAL
BCD R8073 R8073-*1
0.01uF

18K R2
C8034

4.7K BCD
EN ADJ

SEMTECH
R8059

9
10K 1% 1%
25V

10K 2 7
BST RUN R8052 SEMTECH R8072 R8072-*1
1 10 POWER_ON/OFF1 39K R1 15K BCD
+5V_USB VIN
2 9
VREF
C8053
+5V_NORMAL
R8087 10K
VIN
3 6
VOUT 1% 1%

+12V
+5V_USB 3A C8042
10uF C8055 BCD
VCTRL
4 5
NC
C8058 C8061 C8062

L8018
0.1uF
16V

BCD

500
LX COMP 0.01uF OPT
MAX 1500mA Placed on SMD-TOP 3 8 50V
10uF 10uF 0.1uF
IC8000 25V
100pF R1 16V 16V
L8001

OPT
MP8706EN-C247-LF-Z
500

PGND FB C8044 R8057 Placed on SMD-TOP C8056


4 7 0.1uF
C8031 OPT
C IN 22uF C8039 R2 10K C8070
IN GND 1% 0.1uF
1 8 10V SGND SS 3300pF
OPT 5 6 R8056
R8016

C8014 50V C8048 C8050 IC8004-*1


C8016 10K
1%
33K

SW_1 VCC 1uF 100pF OPT 1/10W 22uF 0.1uF SC4215ISTRT


C8038 R8051
2 7 50V 50V C8019 1% 10V
0.01uF 6.8K
C8002 100pF C8020 C8023 C8025
R1 25V
10uF
25V
SW_2
3
3A 6
FB
R8012
10K 50V
22uF
10V
0.1uF
16V
0.1uF
16V
NC_1
1 8
GND
C8007
0.1uF
R8017

BST EN/SYNC POWER_ON/OFF2_1 EN ADJ


6.2K
1%

4 5 2 7
SEMTECH
R8006 R8013
22 10K
R2 VIN VO
3 6

L8004 NC_2 NC_3


3.6uH 4 5
+5V_USB

NR8040T3R6N

Vout=(1+R1/R2)*0.8 SEMTEK:Vout=0.8*(1+R1/R2)
BCD:Vout=0.6*(1+R1/R2)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM (EUROBBTV)
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER 15
FLMD0
GND

+3.5V_ST

10K
47K
0

R8143
50V 50V MICOM_DOWNLOAD

OPT
10Mhz Crystal Ready
15pF 15pF R8146
C8101 C8102

R8140
10MHz
X8100

15pF
15pF
X8101-*1
0 32.768KHz

C8106

WIRELESS_DETECT

WIRELESS_PWR_EN
C8105
R8138
MICOM_EPSON
R8139

MICOM_RESET
10K

+3.5V_ST
MICOM_KDS
OPT X8101

32.768KHz
R8175
4.7M

47K
22
+3.5V_ST

R8180

R8184
P122/X2/EXCLK/OCD0B
for Debugger GND SW8100
JTP-1127WEM
2 1

22
+3.5V_ST

P120/INTP0/EXLVI
P8100
12505WS-12A00 C8103

P124/XT2/EXCLKS
0.1uF C8108
4 3

0.1uF
0.1uF
1

R8178
P121/X1/OCD0A
+3.5V_ST
2
MICOM_RESET
R8113 22

C8104
3
NEC_ISP_Tx
4

R8115 22

P123/XT1
5 NEC_ISP_Rx
6
R8186 20K

7 R8116 22 1/16W

FLMD0

RESET
OCD1A 1%

REGC
8

R8185

1/16W
VDD
VSS

P40
P41
R8118 22 EDID_WP

20K
9
OCD1B

1%
C
10
B Q8100
11 R8119 22 2SC3052
FLMD0
12
E

48
47
46
45
44
43
42
41
40
39
38
37
13
R8104 10K

R8127 22
P60/SCL0 1 36 P140/PCL/INTP6 R8187 22
SCL1_3.3V RL_ON

R8128 22
P61/SDA0 2 35 P00/TI000 R8188 22
SDA1_3.3V SCART1_MUTE
+3.5V_ST +3.5V_ST
NEC_EEPROM_SCL
P62/EXSCL0 3 34 P01/TI010/TO00 R8189 10K
R8108 10K
NEC_ISP_Tx
P63 4 33 P130 R8192 22
R8105 10K
NEC_ISP_Rx
OPT
R8126
NEC_EEPROM_SDA
R8129 22 P33/TI51/TO51/INTP4 5
IC8101 32 P20/ANI0 R8194 22
WIRELESS_SW_CTRL

FLASH_WP
10K HDMI_CEC
R8106 10K
OCD1A R8130 22 P75 6 UPD78F0513AGA-GAM-AX 31 ANI1/P21 R8195 22
POWER_ON/OFF2_1 MODEL1_OPT_3

R8107 10K R8131 22 P74 7 30 ANI2/P22 R8196 22


OCD1B AMP_MUTE MODEL1_OPT_2
R8132 22 P73/KR3 NEC_MICOM ANI3/P23
MODEL1_OPT_0 8 29 R8190 22
POWER_ON/OFF1
R8133 22 P72/KR2 9 28 ANI4/P24 R8193 22
SOC_RESET MICOM_DOWNLOAD
R8134 22 P71/KR1 10 27 ANI5/P25 R8191 22
INV_CTL SIDE_HP_MUTE
EEPROM for Micom R8135 22 P70/KR0 11 26 ANI6/P26
+3.5V_ST MODEL1_OPT_1 KEY2
R8136 22 P32/INTP3/OCD1B 12 25 ANI7/P27
OCD1B KEY1
IC8100 NON_M-REMOTE

13
14
15
16
17
18
19
20
21
22
23
24
M24C16-WMN6T

NC/E0 VCC
1 8

P31/INTP2/OCD1A
P30/INTP1
P17/TI50/TO50
P16/TOH1/INTP5
P15/TOH0
P14/RXD6
P13/TXD6
P12/SO10
P11/SL10/RXD0
P10/SCK10/TXD0
AVREF
AVSS
R8122 4.7K

R8125 4.7K
R8100
47K

C8100

0.1uF

NC/E1 WC
2 7
+3.5V_ST
NC/E2 SCL R8117
3 6 NEC_EEPROM_SCL
22
VSS SDA R8114
4 5 NEC_EEPROM_SDA
22

C8107 1uF
FOR ATSC Assy
SCART1_MUTE TP8100

22

22
+3.5V_ST

22 NON_M-REMOTE

R8179
R8177
R8181 10K
+3.5V_ST OPT
MICOM MODEL OPTION
R8182 10K
OPT
10K

10K

10K

10K

TACT_KEY
TOUCH_KEY

LOGO_BUZZ

22

22

22
OLED/3D

MODEL OPTION
PDP/3D
R8109

R8111

R8120

R8123

R8142

R8144

R8145

R8176
PIN NAME PIN NO. HIGH LOW

R8102 100 MODEL_OPT_0


AMP_RESET_N MODEL1_OPT_0 8 OLED/3D LCD/PDP R8183 10K
R8103 100 OPT
PANEL_CTL MODEL1_OPT_1
R8101 100 MODEL_OPT_1 11 LOGO_BUZZ PWM_LED
OPC_EN MODEL1_OPT_2
OPC
MODEL1_OPT_3
MODEL_OPT_2 30 TOUCH_KEY TACT_KEY

LED_R/BUZZ
LED_B/LG_LOGO
10K

10K

10K

10K

POWER_DET

IR

NEC_ISP_Rx

NEC_ISP_Tx

POWER_ON/OFF2_2

NEC_RXD

NEC_TXD
OCD1A
LCD/OLED

TACT_KEY

PWM_LED

LCD/PDP

MODEL_OPT_3 31 PDP/3D LCD/OLED


R8110

R8112

R8121

R8124

LCD PDP OLED 3D

MODEL_OPT_0 0 0 1 1

MODEL_OPT_3 0 1 0 1

LOW LOW_SMALL TBD HIGH

MODEL_OPT_1 0 0 1 1

MODEL_OPT_2 0 1 0 1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP2_Saturn7M Ver. 1.4
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MICOM 5
+3.5V_ST

EYEQ
R8225
IR & KEY NEC_EEPROM_SCL
100 D8204
CDS3C05HDMI1 P8200
R8213 5.6V 12507WR-12L
R8211
10K 10K C8213
1% 1% 1000pF
50V
L8200 OPT
R8209 BLM18PG121SN1D 1
100 EYEQ
KEY1 R8226
L8201 100
R8210 D8201 2
100 BLM18PG121SN1D NEC_EEPROM_SDA
5.6V D8205
KEY2 C8214
AMOTECH CDS3C05HDMI1
C8206 C8207 1000pF
50V 5.6V 3
0.1uF 0.1uF
D8200 OPT
5.6V
AMOTECH 4
+3.5V_ST

+3.5V_ST 5
L8202
BLM18PG121SN1D
+3.5V_ST 6
R8202
47K
R8200
22 +3.5V_ST R8227 1.5K
IR R8204 C8208 C8209 7
0.1uF 1000pF LED_B/LG_LOGO
47K 16V 50V TACT_KEY R8287
R8203
Q8200 C 10K 10K
B R8206 8
2SC3052 LD650/LD750
E 3.3K
R8205 OPT R8224
C 47K 100
B 9
Q8201 E D8206
2SC3052 C8212 5.6V
100pF AMOTECH
+3.5V_ST +3.3V_NORMAL 50V 10
COMMERCIAL L8203
BLM18PG121SN1D
R8201 +3.5V_ST 11
0 R8214
47K
OPT R8207 COMMERCIAL_EU R8276
22 LED_R/BUZZ 12
IR_OUT R8218 C8211
C8210 1.5K
COMMERCIAL 47K 1000pF OPT
0.1uF
R8216 COMMERCIAL 16V 50V R8280 13
Q8202 C 10K 10K
2SC3052 B
COMMERCIAL_EU E R8220
COMMERCIAL_EU C 47K

Q8204 E
B
COMMERCIAL
ETHERNET CONNECT A2.5V
2SC3052
COMMERCIAL
L8204
JK8200
CIC21J501NE
R8212 XRJV-01V-D12-180
0
COMMERCIAL_US R8283
0
Zener Diode is EPHY_TDP
OPT
1

C8218
10pF 2
close to wafer

D8207
50V

5.6V
+3.5V_ST R8284
WIRELESS 0
3
EPHY_TDN OPT
C8220
+3.5V_ST R8285 10pF
R8215 0 50V
EPHY_RDP 4
47K
R8208 WIRELESS

D8212
OPT C8216
22

5.6V
D8208
R8219 C8221 1000pF

5.6V
IR_PASS 10pF 5
WIRELESS 47K 50V 50V
R8217 WIRELESS
Q8203 C 10K R8286
B 0
2SC3052 6
E WIRELESS EPHY_RDN
WIRELESS R8221

D8209
C 47K

5.6V
OPT
B C8222 C8217 7
Q8205 E WIRELESS 10pF
2SC3052 50V 1000pF
WIRELESS
8
D3.3V
R8281 510
D1

D2
EPHY_LINK

D8210

5.6V
R8282 510
D3

EPHY_ACTIVITY D4

D8211

5.6V
9

RS232C
Trace impedance : 100 ohm differenctial impedance to GND plane
10 5 mils trace width with 7 mils air gap on P/N pair.
+3.5V_ST 5
Adjacent TX/RX differential pairs should be separated by more than
15 mils to each other
9
OPT
IR_OUT 4
R8279
0
R8277 8
100
C8200 0.33uF 3

IC8200 7
C8205 R8278
MAX3232CDR 0.1uF 100
2

D8202 D8203 6
C1+ VCC
1 16 CDS3C30GTH CDS3C30GTH
30V 30V 1
C8201
0.1uF V+ GND
2 15
+3.5V_ST
C8202 SPG09-DB-009
0.1uF C1- DOUT1 JK8201
3 14

R8222 R8223
C2+ RIN1 4.7K 4.7K
4 13 OPT OPT
C8203
0.1uF C2- ROUT1 R8273 0
5 12 BCM_RXD1

R8274 0
V- DIN1 NEC_RXD
6 11
C8204
0.1uF DOUT2 DIN2
7 10 R8272 0
BCM_TXD1
RIN2 ROUT2
8 9 R8275 0
NEC_TXD
EAN41348201

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
* HDMI CEC
E E +3.3V_HDMI
+3.3V_NORMAL
JACK_GND
D8302 KRC104S D8308 KRC104S HDMI_HPD_4
HDMI_HPD_1 L8300
5.5V Q8305 B 5.5V GND Q8307 B
GND E E R8321 BLM18PG121SN1D
OPT R8311 ESD 5V_HPD4
SHIELD GND C 4.7K
C 4.7K 5V_HPD1
KRC104S KRC104S
GND GND Q8306 B
20 Q8302 B 20 5V_HDMI_4 C8324
5V_HDMI_1
R8302 HP_DET R8316 C +3.5V_ST 0.1uF
HP_DET C
19 19
5V 1K 5V 1K

18 18
GND
GND D8311
D8305

CDS3C05HDMI1
R8317 JP8306

CDS3C05HDMI1
17 R8307 17 5.5V
DDC_DATA 5.5V DDC_DATA 0
0 OPT DDC_SDA_4 ESD R8326
DDC_SDA_1

G
16 16 22K
DDC_CLK JP8304 DDC_CLK
DDC_SCL_4

ESD
D8313
DDC_SCL_1 15

D8314

100K
15 NC R8318

5.6V
R8308

5.6V
NC JP8305

R8349
ESD
GND 0 JP8307 GND

Q8308
0 14

D
B
S

BSS83
14 CE_REMOTE D8312
CE_REMOTE
CEC_REMOTE CEC_REMOTE
13 13 MMBD301LT1G
CK- CK-
CK-_HDMI1 CK-_HDMI4
12 12
CK_GND
CK_GND

EAG42463001
CEC_REMOTE HDMI_CEC
EAG59023302

11 11 GND
CK+ CK+
JK830210 JK830310 CK+_HDMI4
CK+_HDMI1
D0- D0-
9 9 D0-_HDMI4
D0-_HDMI1
D0_GND D0_GND
8 8
D0+ D0+
7 7 D0+_HDMI4
D0+_HDMI1
D1- D1-
6 6 D1-_HDMI4
D1-_HDMI1
D1_GND D1_GND
5 5
D1+ D1+
4 4 D1+_HDMI4
D1+_HDMI1
D2- D2-
3 3 D2-_HDMI4 +3.3V_HDMI
D2-_HDMI1
D2_GND D2_GND
2 2
D2+ D2+
1 1 D2+_HDMI4
D2+_HDMI1

KJA-ET-0-0032 GND
YKF45-7058V

0.1uF

C8305
0.1uF

C8307
0.1uF

C8308
0.1uF

C8309
0.1uF

C8310
0.1uF

C8311
GND
UI_HW_PORT1 SIDE_HDMI_PORT4
HDMI4
C8319

HDMI_HPD_4
D2-_HDMI4

D1-_HDMI4
D2+_HDMI4

D1+_HDMI4

CK+_HDMI4
HDMI_CLK-
HDMI_CLK+

HDMI_RX0-
HDMI_RX0+

HDMI_RX1-
HDMI_RX1+

D0-_HDMI4

CK-_HDMI4

DDC_SCL_4
DDC_SDA_4
D0+_HDMI4
HDMI_RX2-
HDMI_RX2+
HDMI_SDA
HDMI_SCL
+5V_NORMAL +5V_NORMAL
E 0.1uF
5V_HDMI_1 5V_HDMI_2
HDMI_3 C8320
D8300 KRC104S HDMI_HPD_2
5.5V Q8303 B
GND E 0.1uF

A2

A1

A2

A1
OPT R8309 HDMI_3 5V_HDMI_4
SHIELD HDMI_3 C 4.7K 5V_HPD2 5V_HPD2 HDMI_3 +5V_NORMAL C8321
KRC104S 5V_HPD1 D8309
D8306
20 HDMI_3 GND Q8300 B
5V_HDMI_2 0.1uF

C
HP_DET R8300 C R8325 C8322
3.3K C8312
19
5V 1K 0.1uF

33
33
0.1uF

33
33

33
33
R8312 R8314 R8319 R8322 16V
18
GND R8324

R8329
R8330
HDMI_3 47K 47K 47K 47K

R8331
R8332

R8333
R8334
D8303 3.3K
17 R8303 JP8300 5.5V HDMI_3 HDMI_3
DDC_DATA 0
DDC_SDA_2 OPT
16 DDC_SDA_1 DDC_SDA_2

R8339
DDC_CLK

OPT
DDC_SCL_2 DDC_SCL_1 DDC_SCL_2

0
15
NC R8304 JP8301 GND +1.8V_HDMI
0
14 HDMI_3
CE_REMOTE
CEC_REMOTE
13
CK-
CK-_HDMI2 C8318 C8323
12 C8316
CK_GND 0.1uF 0.1uF
0.1uF
16V

VDDDC[1V8]_3
EAG59023302

16V 16V

VDDH[3V3]_8

VDDH[3V3]_7

RXD_DDC_CLK
RXD_DDC_DAT
11
CK+ +5V_NORMAL
JK830010 +5V_NORMAL

VDDO[1V8]
CK+_HDMI2 5V_HDMI_3 HDMI3
5V_HDMI_4

OUT_D0-
OUT_D0+

OUT_D1-
OUT_D1+

OUT_D2-
OUT_D2+

RXD_D2+
RXD_D2-

RXD_D1+
RXD_D1-

RXD_D0+
RXD_D0-

RXD_HPD
D0-

VSS_12

VSS_11

VSS_10

RXD_C+
RXD_C-

RXD_5V
9 D0-_HDMI2
D0_GND Place close 5V_HDMI_3
A2

A1

A2

A1
8
5V_HPD3 5V_HPD4 to TDA9996
D0+ HDMI1
7 D0+_HDMI2 D8307 D8310

100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
D1-
C

C
6 VSS_1 1 75 VDDH[1V8]_2
D1-_HDMI2 C8317
5V_HDMI_1 OUT_C+ R12K R8344
D1_GND 2 74 0.1uF
5
OUT_C- 3 73 VSS_9 12K 16V
D1+ R8313 R8315 R8320 R8323
4 D1+_HDMI2 VDDO[3V3] 4 72 RXC_D2+
47K 47K 47K 47K D2+_HDMI3
D2- OUT_DDC_CLK 5 71 RXC_D2-
3 C8302 D2-_HDMI3
D2-_HDMI2 DDC_SDA_3 DDC_SDA_4 OUT_DDC_DAT VDDH[3V3]_6
0.1uF 6 70
D2_GND
2 16V VSS_2 7 69 RXC_D1+
DDC_SCL_4 D1+_HDMI3
D2+ DDC_SCL_3 OPT VDDDC[1V8]_1 RXC_D1-
1 D2+_HDMI2 R8328 RXA_HPD
8
9
IC8300 68
67 VSS_8
D1-_HDMI3
HDMI_HPD_1
0 RXA_5V 10 66 RXC_D0+
RXA_DDC_DAT 11 TDA19997 65 RXC_D0-
D0+_HDMI3
D0-_HDMI3
DDC_SDA_1 RXA_DDC_CLK VDDH[3V3]_5
12 64
HDMI_3 DDC_SCL_1 RXA_C- 13 63 RXC_C+
YKF45-7058V
UI_HW_PORT3 EDID Pull-up CK-_HDMI1 RXA_C+ 14 62 RXC_C-
CK+_HDMI3
CK-_HDMI3
GND CK+_HDMI1 VDDH[3V3]_1 15 61 RXC_DDC_CLK
DDC_SCL_3
RXA_D0- 16 60 RXC_DDC_DAT
D0-_HDMI1 DDC_SDA_3
RXA_D0+ 17 59 RXC_5V
D0+_HDMI1 VSS_3 RXC_HPD
18 58 HDMI_HPD_3
RXA_D1- 19 57 CEC R8345
D1-_HDMI1 0 Ready for TDA19997
RXA_D1+ 20 56 VSS_7
OPT
D1+_HDMI1 VDDH[3V3]_2 VDDS[3V3]
E 21 55
+3.3V_HDMI
RXA_D2- 22 54 CDEC_STBY
D8301 KRC104S HDMI_HPD_3 D2-_HDMI1 OPT
5.5V RXA_D2+ 23 53 INT_N/MUTE R8346 0 R8347
GND Q8304 B D2+_HDMI1
OPT E R8310 VDDH[1V8]_1 RXE_DDC_DAT OPT 4.7K
SHIELD 24 52
C 4.7K 5V_HPD3
KRC104S AUX_5V 25 51 RXE_DDC_CLK OPT
GND

C8315
0.1uF
20 Q8301 B 4.7K

26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
5V_HDMI_3 R8348
HP_DET R8301 C

VSS_4
TEST1
RXB_HPD
RXB_5V
RXB_DDC_DAT
RXB_DDC_CLK
RXB_C-
RXB_C+
VDDH[3V3]_3
RXB_D0-
RXB_D0+
VSS_5
RXB_D1-
RXB_D1+
VDDH[3V3]_4
RXB_D2-
RXB_D2+
VSS_6
CDEC_DDC
VDDDC[1V8]_2
VDDDC[1V8]_4
R8336 0 TEST2
PD
I2C_SDA
I2C_SCL
19
5V 1K
+5V_NORMAL
18
GND
D8304 R8327
17 R8305 JP8302
DDC_DATA 0 5.5V
DDC_SDA_3 OPT C8300 0 0 OPT
16
DDC_CLK 0.1uF R8343
15 DDC_SCL_3
NC R8306 JP8303 GND
0 C8313
14
CE_REMOTE 0.1uF C8314
CEC_REMOTE 16V 0.1uF
13
CK- 16V
CK-_HDMI3

R8335
12 5V_HDMI_2

OPT
CK_GND +1.8V_HDMI
EAG59023302

0
11
CK+
JK830110 CK+_HDMI3
D0- C8306

R8338 22
9

R8340
D0-_HDMI3 C8301 C8303 C8304 0.1uF
D0_GND 0.1uF 0.1uF 0.1uF 16V

22
8 16V
16V 16V
D0+
7 D0+_HDMI3 R8337
D1- 0
6 D1-_HDMI3

DDC_SCL_2
DDC_SDA_2

CK-_HDMI2
CK+_HDMI2

D0-_HDMI2
D0+_HDMI2

D1-_HDMI2
D1+_HDMI2

D2-_HDMI2
D2+_HDMI2
HDMI_HPD_2
D1_GND
5
D1+
4 D1+_HDMI3
D2-
3 D2-_HDMI3
D2_GND
2

SDA2_3.3V
SCL2_3.3V
D2+ HDMI2
1 D2+_HDMI3

YKF45-7058V

GND
UI_HW_PORT2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM (EUROBBTV) 2009.06.18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR LEE GI YOUNG
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 8
RGB PC
IC8401-*1
R1EX24002ASAS0A
IC8400 +5V_NORMAL
74F08D A0 VCC
+5V_NORMAL
1 8

A1 WP
D0A VCC 2 7 D8409
1 14 A2 SCL
ENKMC2838-T112
3 6 A1
DEV C
D0B D3B C8401 VSS SDA
2 13 0.1uF
4 5
A2
R8401
22 Q0 D3A RGB_EDID_RENESAS
RGB_HSYNC 3 12

0.1uF
IC8401

C8404

R8414
D1A Q3

R8413
2.7K

2.7K
RGB_VSYNC M24C02-RMN6T

16V
4 11
R8402 R8420
E0 1
22 8 VCC 10K
D1B D2B R8422
5 10 E1 2 7 WC
100
EDID_WP
E2 3 R8416
Q1 D2A 6 SCL RGB_DDC_SCL
6 9 22
VSS R8415
4 5 SDA RGB_DDC_SDA

18pF 50V

18pF 50V
22
GND Q2 0IMMR00014A
7 8

R8417

R8421
ADUC30S03010L_AMODIODE

ADUC30S03010L_AMODIODE

C8405

C8406
RGB_EDID_ST
R8406

0
22
OPT
D8410
CDS3C05HDMI1
5.6V
R8405 OPT OPT +3.3V_NORMAL

C8403
OPT

C8402

22pF
22pF

50V
50V
BCM Reference 22 D8408
CDS3C05HDMI1

D8401

D8403
30V

30V
5.6V R8424
10K
1K
L8408 60-ohm R8425
DSUB_B DSUB_DET
RGB_BEAD
L8409 60-ohm OPT
0 OPT C8409
DSUB_G D8411
R8423 100pF
RGB_BEAD 5.6V
50V
ADMC5M03200L_AMODIODE
L8410 60-ohm
DSUB_R

GREEN_GND

DDC_CLOCK
RGB_BEAD

DDC_DATA

BLUE_GND

SYNC_GND
RED_GND

DDC_GND
H_SYNC

V_SYNC
GND_2

GREEN

GND_1
BLUE
BCM Reference

RED

NC
R8403
75
R8404
75
R8407
75 D8402 D8404 D8405
30V 30V 30V RGB_0OHM
RGB IN
L8408-*1

SHILED
11

12

13

14

15
0

16
10
RGB_0OHM

9
L8409-*1
0

5
RGB_0OHM SPG09-DB-010
L8410-*1 JK8402
0
+3.3V_NORMAL
JK8400
JP8401 JST1223-001
GND RGB AUDIO IN
1

Fiber Optic

JP8402 JK8401
R8400
VCC PEJ027-01
2

1K
JP8400 3 E_SPRING
SPDIF_OUT
VINPUT
3

6A T_TERMINAL1
4

D8400 C8400
30V 0.1uF C8407
OPT 16V FIX_POLE 7A B_TERMINAL1
PC_R_IN
D8406 1uF R8418
4 R_SPRING 0
AMOTECH R8411 25V
5.6V 470K
5 T_SPRING

C8408
7B B_TERMINAL2
PC_L_IN
1uF R8419
T_TERMINAL2 D8407 R8412 0
6B 25V
AMOTECH 470K
5.6V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EUROBBTV 2009.06.18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. ETC SUB BOARD I/F 9
ALL for SIDE_GENDER option

SIDE CVBS PHONE JACK


(New Item Developmen)
SIDE_AV_CVBS
R8603
0
C8605
D8600 47pF
JK8600 5.5V 50V
KJA-PH-1-0177
5 M5_GND
+3.3V_NORMAL

4 M4
R8605
10K
3 M3_DETECT
SIDE_AV_DET
R8608
1K
1 M1 D8601 C8600
5.6V
100pF
6 M6 50V

C8607 R8606
25V 0
SIDE_AV_L_IN
1uF
R8601 C8611
D8602
100pF
5.6V 470K
50V

C8606 R8607
25V 0
SIDE_AV_R_IN
1uF
R8602 C8612
D8603
5.6V 470K 100pF
50V

SIDE COMPONENT PHONE JACK


(New Item Developmen)
L8600
270nH
SIDE_COMP_Y
D8604 C8601 C8608
5.5V 27pF 27pF
50V 50V

+3.3V_NORMAL

C8613 0.1uF
JK8601 SIDE_COMP_INCM
Near J

R8609
KJA-PH-1-0177 R8600
10K Run Along SIDE_COMP_Y_IN,SIDE_COMP_Pr_IN,SIDE_COMP_Pb_IN Trace
R8604

36
5 M5_GND 1K
SIDE_COMP_DET
C8604
4 M4 D8606 100pF
5.6V 50V
3 M3_DETECT
L8602
270nH
1 M1
SIDE_COMP_Pb
D8607 C8603 C8610
5.1V
6 M6 27pF 27pF
D8608
5.1V
50V 50V
L8601
270nH
SIDE_COMP_Pr
D8605 C8602 C8609
5.1V 27pF 27pF
D8609 50V 50V
5.1V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 11
SIDE_GENDER
WIRELESS READY MODEL

JK8700
KJA-PH-3-0168

Wireless power VCC[24V/20V/17V]_1


1
VCC[24V/20V/17V]_2
2
VCC[24V/20V/17V]_3
3
VCC[24V/20V/17V]_4
4
VCC[24V/20V/17V]_5
+24V 5
VCC[24V/20V/17V]_6
6
+3.3V_NORMAL DETECT
7
C8700 R8704
22K C8701 INTERRUPT
0.1uF 8
2.2uF TP8700
50V GND_1
S R8714
9
10K
G RESET
TP8701 10
R8705 Q8701 R8713 1K
2.2K GND_2
AO3407A D L8700 WIRELESS_DETECT 11
I2C_SCL
R8702 C WIRELESS_SCL 12
10K MLB-201209-0120P-N2
WIRELESS_PWR_EN I2C_SDA
B WIRELESS_SDA 13
Q8700 GND_3
C8702 14
E 0.01uF C8704 C8705
50V 10uF 10uF UART_RX
WIRELESS_RX 15
35V 35V
UART_TX
WIRELESS_TX 16
GND_4
17
IR
IR_PASS 18
GND_5
19
GND_6
20

21

SHIELD

+3.5V_ST

NON_WIRELESS WIRELESS
R8703 0
R8707
0
IC8700
NON_3DTV MC14053BDR2G
R8700
WIRELESS_DL_RX
0
Y1 VDD
WIRELESS_TX 1 16
WIRELESS
C8703 RS232C & Wireless
Y0 Y BCM_TXD1 0.1uF
BCM_TX 2 15

Z1 X BCM_RXD1
3 14
R8708 0
WIRELESS_DL_TX WIRELESS_SW_CTRL SELECT PIN STATUS
Z X1 NON_3DTV
4 13
WIRELESS_RX
R8706 HIGH X1/Y1/Z1 WIRELESS Dongle connect --> WIRELESS RS232
0 NON_WIRELESS +3.5V_ST
Z0 X0
5 12 BCM_RX
LOW X0/Y0/Z0 WIRELESS Dongle Dis_con --> S7 RS232
4.7K

INH A
OPT

R8711

6 11

R8701 0 VEE B
7 10
WIRELESS
47K

VSS C
OPT

WIRELESS_SW_CTRL
R8712

8 9

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
12
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
WIRELESS
+24V +24V_AMP

L8803
MLB-201209-0120P-N2

C8827
0.1uF
50V

+1.8V_AMP

+3.3V_NORMAL
IC8800 CCFL = 20V
AP1117E18G-13

R8800
IN 3 Vd=1.4V 1 ADJ/GND Edge_LED 32~47 Inch = 20V
120 mA

1
2
C8800 OUT
C8802 C8803 55 Inch & IOP Module = 24V
0.1uF 10uF 0.1uF
16V 10V 16V

+24V_AMP

SPK_L+
D8800
1N4148W R8812 R8819 L8805
EMI 100V 12 12 AD-9060 R8820
R8809 C8841
OPT 2S 2F 0.1uF 4.7K
3.3 C8835 50V
390pF
EMI
C8832
50V C8839
0.47uF
SPEAKER_L
C8826 1S 1F 50V
C8820 C8824 10uF 0.01uF
0.1uF 0.1uF 50V C8836 C8842
50V 50V 35V 390pF 0.1uF R8821
+3.3V_NORMAL D8801 50V 15uH 50V
1N4148W R8813 R8817 4.7K

BLM18PG121SN1D
100V 12 12
C8819 OPT
22000pF SPK_L-
50V C8823
L8802 22000pF
50V

PGND1A_2
PGND1A_1

PVDD1A_2
PVDD1A_1
PVDD1B_2
PVDD1B_1

PGND1B_2
PGND1B_1
C8825

OUT1A_2
OUT1A_1

OUT1B_2
OUT1B_1
1uF

EP_PAD
25V

BST1B
VDR1B
AMP_RESET_N
C8808

56
55
54
53
52
51
50
49
48
47
46
45
44
43
1000pF
50V
BST1A 1 42 NC C8828 SPK_R+
AUD_MASTER_CLK C8816 25V1uF
VDR1A 2 THERMAL 41 VDR2A C8830
1uF 25V /RESET 57 BST2A 22000pF
3 40 D8802 R8818
+1.8V_AMP 50V R8814
C8811 AD 4 39 PGND2A_2 1N4148W 12 12 L8804
+1.8V_AMP 0.1uF DGND_1 PGND2A_1 100V AD-9060 C8843 R8822
5 38 OPT 2S 2F
BLM18PG121SN1D

GND_IO 37 OUT2A_2 C8837 0.1uF 4.7K


6 IC8801
CLK_I 7 36 OUT2A_1
390pF
50V
C8840
0.47uF
50V SPEAKER_R
BLM18PG121SN1D

L8801 50V
C8810 VDD_IO 8 35 PVDD2A_2 1S 1F
C8806 1000pF EAN60969601 C8838
L8800 50V DGND_PLL 9 34 PVDD2A_1 390pF
100pF 50V
R8806 AGND_PLL 33 PVDD2B_2 D8803 15uH C8844 R8823
50V 10
3.3K LF PVDD2B_1 1N4148W R8815 R8816 0.1uF 4.7K
11 NTP-7000 32 100V 12 12 50V
AVDD_PLL 12 31 OUT2B_2 OPT SPK_R-
DVDD_PLL 13 30 OUT2B_1 +24V_AMP
GND 14 29 PGND2B_2
OPT
C8801 C8804 OPT
10uF 0.1uF C8805 C8807

15
16
17
18
19
20
21
22
23
24
25
26
27
28
10V 16V 10uF 0.1uF
10V 16V

DGND_2
DVDD
SDATA
WCK
BCK
SDA
SCL
MONITOR0
MONITOR1
MONITOR2
/FAULT
VDR2B
BST2B
PGND2B_1
+1.8V_AMP C8834
C8831 C8833 10uF
0.1uF 0.1uF 35V
50V 50V
OPT
C8815 C8822
10uF C8818 1uF
0.1uF 25V C8829
10V
16V
22000pF
50V
R8801 100
AUD_LRCH
R8802 100 R8807
AUD_LRCK 0
R8803 100 POWER_DET
AUD_SCK
R8804 100 C8821 OPT
SDA1_3.3V 1000pF
R8805 100 50V
SCL1_3.3V +3.5V_ST
C8809 C8812 C8813 C8814 C8817
33pF 33pF 47pF 47pF 47pF
50V 50V 50V 50V 50V
R8810 WAFER-ANGLE
EMI EMI EMI R8808 100 10K
C R8824
AMP_MUTE1 0
B R8811 SPK_L+
Q8800 AMP_MUTE 4
2SC3052 10K R8825
0
E SPK_L-
AMP_MUTE1 3
R8826
0
For 3 AMP MODEL SPK_R+
2
R8827
0
SPK_R-
1

P8800

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM (EUROBBTV) 2009.06.18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR KIM JONG HYUN
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. NTP7000 38
IC9701
LG5111
IC9701
LVDS_TX_0_DATA0_P
A3 A17 LG5111
R1A1P T1A1P RRXA0+ +1.8V_RXVDD +1.8V_PLL
A2 A16 +1.8V_RXVDD
LVDS_TX_0_DATA0_N R1A1M T1A1N RRXA0- C9704 C9707
A4 B16 27pF 27pF
LVDS_TX_0_DATA1_P R1B1P T1B1P RRXA1+ 50V 50V
B3 A15 G3 G4
LVDS_TX_0_DATA1_N R1B1M T1B1N RRXA1- X9700 RXVDD_18_1 RX_GND_1
B1 B17 25MHz H3 H4 C9712 C9718 C9724 C9731 C9738 C9745 C9762 C9768
LVDS_TX_0_DATA2_P R1C1P T1C1P/RLV0N RRXA2+/RLV5P RXVDD_18_2 RX_GND_2 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
B2 B18 J3 J4 16V 16V 16V 16V 16V 16V 16V 16V
LVDS_TX_0_DATA2_N
C2
R1C1M T1C1N/RLV0P RRXA2-/RLV5N IC9701 RXVDD_18_3 RX_GND_3
C18 K3 K4
LVDS_TX_0_CLK_P
C1
R1CLK1P T1CLK1P/RLV1N RRXACK+/RLV4P R9741 LG5111 RXVDD_18_4 RX_GND_4
C17 L3 L4
LVDS_TX_0_CLK_N R1CLK1M T1CLK1N/RLV1P RRXACK-/RLV4N 1M 1% RXVDD_18_5 RX_GND_5
C3 D16 M3 M4
LVDS_TX_0_DATA3_P R1D1P T1D1P RRXA3+ RXVDD_18_6 RX_GND_6
D3 C16 +1.8V_TXVDD
LVDS_TX_0_DATA3_N R1D1M T1D1N RRXA3- A5 P4
D1 D17 CLK25_XOUT TMODE3
LVDS_TX_0_DATA4_P R1E1P T1E1P/RLV2N RRXA4+/RLV3P B5 R4 +1.8V_TXVDD
D2 D18 CLK25_XIN TMODE2 E15 F14
LVDS_TX_0_DATA4_N R1E1M T1E1N/RLV2P RRXA4-/RLV3N T4 TXVDD_18_1 TX_GND_1
TMODE1 F15 G14
U4 TXVDD_18_2 TX_GND_2
TMODE0 G15 H14
R9742 22 A7 TXVDD_18_3 TX_GND_3
E2 E18 M0_SCLK M0_SCLK G16 H15
LVDS_TX_1_DATA0_P RRXB0+/RLCLKP B7 C9713 C9719 C9725 C9732 C9739 C9746 C9751 C9757 C9764 C9769 C9773 C9775
R1A2P T1A2P/RCLKN R9743 22 TXVDD_18_4 TX_GND_4 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
E1 E17 M0_MOSI M0_MOSI H16 J14 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
LVDS_TX_1_DATA0_N R1A2M T1A2N/RCLKP RRXB0-/RLCLKN R9744 22 A6 R7

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