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MAX22202 Evaluation Kit Evaluates: MAX22202
Quick Start OUT1 and OUT2 are actively driven low (brake). To
drive current from OUT1 to OUT2 (OUT1 = VM and
Required Equipment OUT2 = GND) when the part is in low-power sleep
● MAX22202 EV kit mode, install shunts across pins 1-2 of header J5
● +36V DC, 5A power supply (PH = +3.3V) and header J9 (EN = +3.3V), then in-
stall a shunt across pins 1-2 of J7 (MODE = +3.3V).
● Optional up to 100kHz square wave signal generator
To drive current from OUT2 to OUT1 (OUT2 = VM
● Brushed DC motor or load and OUT1 = GND), install shunts across pins 2-3
of header J5 (PH = GND) and across pins 1-2 of
Procedure
header J9 (EN = +3.3V).
It is recommended that the engineer read the MAX22202
IC data sheet prior to using the EV kit. Refer to the Typical 7) Pin 2 of headers J5 (PH) and J9 (EN) or TP1
Application Circuits and Detailed Description in the (PH) and TP2 (EN) can also be used to drive the
MAX22202 IC data sheet for more information. The EV MAX22202 inputs with an on-board PWM signal. To
use the on-board PWM signal to drive these pins,
kit is fully assembled and tested. Use the following steps
install a shunt across pin 2 of either header J5 or J9
to verify board operation:
and pin 1 of J6. See the Example Startup Procedure
1) As with all motor drive applications, stopping or brak- section for an example of a startup sequence and
ing the motor can cause a back EMF (BEMF) current Table 2 for more information.
and voltage spike. At high supply voltages (+36V),
this can cause the supply to rise above the absolute Example Startup Procedure
maximum allowable voltage to the supply pins of a The steps below describe the startup procedure using the
motor drive IC. It is highly recommended that the on-board PWM signal to drive the MAX22202 inputs with
power supply be clamped appropriately to avoid slow decay.
damage to the motor driver IC.
1) Verify that all shunts are installed in their default
2) Verify that all shunts are installed in their default positions. This brings up the part in low-power sleep
position as described in Table 2. mode.
3) Adjust the current limit threshold using potentiometer 2) Move the shunt on header J7 from 2-3 to 1-2 to drive
R4 and reading the resistance using test point TP4 the MODE pin high. This action will wake up the part
and a GND test point. after the power-on time (tON = 400µs max). OUT1
4) If a load or DC motor is being used, connect the load and OUT2 are actively driven low (brake).
or motor to terminal block J4. 3) Select which direction the motor will be driven in
5) Connect a +4V to +36V DC power supply to the and adjust the shunts on the J5 (PH), J9 (EN), J7
terminal block J1 or TP13 and TP14 and turn on the (MODE), and J6 (on-board PWM signal) headers
supply. according to Table 1 and Table 2. For example, to
drive the load in the forward direction with a PWM
6) The default header positions result in the MAX22202
input and slow decay, move the shunt on header J5
in low-power sleep mode (MODE = GND). To wake
to the 1-2 position (PH = +3.3V) and move the shunt
the part up from the low-power sleep state at power-
on header J9 to bridge the single J6 pin and pin 2 of
up, move the shunt on header J7 from 2-3 to 1-2 to
J9 (EN = on-board PWM input).
drive the MODE pin high. This action will wake up
the part after the power-on time (tON = 400µs max).
Figure 2 and Table 2 describe the configuration of head- a corresponding current limit of 2.7A to 0.43A. If the cur-
ers J5, J6, and J9 to drive the MAX22202 inputs using rent limit threshold is reached, the device enters a slow
the either the on-board PWM signal or continuously with decay cycle by enabling both low-side FETs for a speci-
+3.3V or GND. Potentiometer R13 can be used to adjust fied off time (tOFF). The current limit threshold equation is
the duty cycle of the on-board PWM signal from 4% to given below where KILIM = 50KV:
95%. Figure 3 and Figure 4 show the duty cycle range of
the on-board PWM generated signal. K ILIM (KV)
I TRIP (A) =
R ILIM (kΩ )
Current Drive Regulation and Current Limiter
The integrated current limit can be adjusted using potenti-
ometer R4. The resistance connected from the MAX22202
ILIM pin to GND can be adjusted from 18kΩ to 115kΩ for
+3.3V
IN1
IN1
GND
J5
GND GND
J6
PWM PWM
GND GND
J9
IN2
+3.3V
GND
IN2
Figure 3. PWM Signal Measured at Test Point TP3 With a 4% Duty Cycle
Figure 4. PWM Signal Measured at Test Point TP3 with a 95% Duty Cycle
Ordering Information
PART TYPE
MAX22202EVKIT# EV Kit
#Denotes RoHS compliance.
www.analog.com
R7
1.4K
OPEN
A
3P3V D2
SML-P11UTT86R
C
IN PHASE
R14 VM
3P3V 0
VM 3P3V
OPEN
1
2
3
GND U2
MAX15006AATT+
J5
J1 J7 1 5
IN OUT
1727010
PCC03SAAN
1 R15
1
2 IN OUT 6
2
+
C11 1 IN MODE
C12 3
47UF 2 0
J6 0.1UF GND EP NC
C8 C9
1 PEC01SAAN PCC03SAAN
IN 0.1UF 2.2UF
4
7
3
PWM
2
GND
3P3V R16
GND GND GND
J9
GND 0
PCC03SAAN
OPEN
1
2
3
GND
3
MAX22202 Evaluation Kit
IN ENBL 3
R8 2 2
200K
1
R9
15K
GND
3P3V
VM
3P3V
3P3V
1.5K R12
C2
C1
1UF
3P3V 1UF
3
C5
0.1UF 3
2 2 R13
50K
GND U1
7
10
1 R1 MAX22202ATC+
1
U3 1.4K
R11 V18 VM
ICM7556ISD+
187
5 ENBL J3
ENBL IN
1 DISCHARGE V+ 14 OUT1 11 1
A
D1 2
2 THRESHOLD DISCHARGE 13 4 PHASE
SML-P11UTT86R PHASE IN
3P3V
3 CONTROL_VOLTAGE THRESHOLD 12 PCC02SAAN
C
4 11 C7 2 OUT1
RESET CONTROL_VOLTAGE MODE IN MODE
0.001UF
C10 3P3V 2
5 OUTPUT RESET 10 OUT2 9 OUT2
0.01UF OUTA IN
NFAULT 1
6 TRIGGER OUTPUT 9 12 FAULT
IN PWM
7 8 GND 1727010
GND GND TRIGGER IN OUTA J4
ILM ISEN GNDP GNDA EP
C6
1
6
3
8
13
0.01UF
ILM
GND
GND
ISEN GND
3
1
2
3
3
R4 2 2
C4 C3 100K
J8
0.01UF
OPEN R3 R2
PCC03SAAN
R6 1 N/A 2.5K
1
15K
GND GND OPEN
R5
GND GND
15K
GND
Analog Devices │ 7
MAX22202 Evaluation Kit Evaluates: MAX22202
Revision History
REVISION REVISION PAGES
DESCRIPTION
NUMBER DATE CHANGED
0 5/23 Initial release —
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assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that
may result from its use. Specifications subject to change without notice. No license is granted by implication or
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property of their respective owners.
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