5 4 3 2 1

D D

C C

B B

A A

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 1 of 36

5 4 3 2 1
 5 4 3 2 1

D D

U201C

This pre-release schematic is only for placement evaluation

MT6357
Control I/F RTC
close to PMIC
24 PWRKEY R4 R12
PWRKEY VRTC28 VRTC28

24 HOMEKEY N4 R202
FCHR_ENB
8,30 R5 C244
SYSRSTB TP204 RESETB 1.5K
0.1uF
8 T8
short to GND if disable HOMEKEY WATCHDOG WDTRSTB_IN
R203
N3
GND UVLO_VTH
TP203 C247
200K P148
RTC32K_1V8_0 RTC32K_CK 4.7uF
8 SRCLKENA0 N7 TP202
SRCLKEN_IN0 R15
N8 RTC32K_1V8_1
8,31 SRCLKENA1 SRCLKEN_IN1 P11
RTC32K_2V8

M5
EXT_PMIC_EN1
N5
EXT_PMIC_EN2
M6
EXT_PMIC_PG DCXO
SG201
8 PWRAP_SPI0_CSN R8 M2
SPI_CSN AVSS22_XO S G
8 M8 SG202 Single_GND_0625
PWRAP_SPI0_CK SPI_CLK P1
M7 AVSS22_XOBUF1 R1 S G
8 PWRAP_SPI0_MOSI SPI_MOSI AVSS22_XOBUF2 Single_GND_0625
8 P1 and R1 ball connect firstly Please connect DCXO GND to main
M9
PWRAP_SPI0_MISO SPI_MISO
GND by independent L1-2 GND via.
SG203 DON'T connect it through L1 GND
C P5 N2 C
PMU_TESTMODE AVSS22_XO_ISO1 P2 S G
P9 AVSS22_XO_ISO2 Single_GND_0625
FSOURCE P2 and N2 ball connect firstly

GND Charger I/F XO_SOC

R3
XO_SOC PMIC_CLK_BB 11
4,5,6,7,16,20,21,22,25,30,32,33 SG301 0.1mm N9 XO_CEL
VBAT VSYSSNS T1 31
differential M13 XO_CEL PMIC_CLK_RF
4 BATSNS BATSNS
XO_WCN
4 ISENSE N13 P3
ISENSE XO_WCN PMIC_CLK_WCN 35
R13
BATON R2
C302 C301
T11 XO_NFC
16 BATON C303 0.1uF 1uF VCDT
0.1uF GND
VCDT rating: 1.268V R11 T2
GND CHRLDO XO_EXT
P13 C206 C207 C208
VDRV DNP 5pF 5pF
2,4,29 VBUS

R303 M1
XTAL1 XIN_26M 2
R301 2,4,29 VBUS
300K N1
1.5K CHRLDO XTAL2 XOUT_26M 2

C304
differential LB201
1uF 10 CHD_DM M10
CHG_DM AUXADC 2 1
VAUX18_PMU 6
BLM15HG102SN1D
10 CHD_DP M11
CHG_DP AVDD18_AUXADC 2
R7 C204
R302 close to PMIC AVDD18_AUXADC 1uF
39K 22 PCHR_LED N12
PCHR_LED P7
AVSS18_AUXADC AVSS18_AUXADC 2
SG204 differential

GND Gauge T7

G S
AUXADC_VIN
differential
C205 Single_GND_0625
16 T10 0.1uF
CS_P CS_P
16 CS_N R10
CS_N
AUXADC_IN 2
B B

ISINK
22 ISINK1 L12
ISINK1 DCXO
Connect to interface for reserving layout area

2 AVDD18_AUXADC 3mil trace width

R219 7200614M001
100K Y200

2 AUXADC_IN 4 3 XOUT_26M 2
3mil trace width THERM HOT2

1 2
HOT1 GND
26MHz
2 AVSS18_AUXADC 15mil trace width

MT6357

XIN_26M 2

Route AVDD18_AUXADC/AUXADC_VIN as differential trace (4 mil each)with well GND shielding

and route AVSS18_AUXADC with 20mil trace width under
AVDD18_AUXADC/AUXADC_VIN trace to provide return current path.

MT6537 control A

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 2 of 36

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 3 of 36

5 4 3 2 1
 5 4 3 2 1

D D

C C

C402 C404
C3532 0.1uF 0.1uF
C408
68pF 10uF U401
L401
R404
A1 C1 $$$14216

A2 VBUS1 SW1 C2 VBAT 2,4,5,6,7,16,20,21,22,25,30,32,33

2,29 VBUS VBUS2 SW2 SPH252010H1R0MT 0.068

1
C3
SW3 D401
C407 ES05DP
B1 D1 C403
B2 PMID1 PGND1 D2 C401 22uF

2
B3 PMID2 PGND2 D3
$$$21535
33nF
PMID3 PGND3
6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33 VIO18_PMU 4.7uF R401
E1
10 B4 CSIN ISENSE 2
CHG_SDA5 SDA Differential near R404
A4 R402
10 CHG_SCL5 SCL
R406 E4
100K CSOUT BATSNS 2

E2 E3
CD VREF

$$$23968
R403 100K
D4
2,4,5,6,7,16,20,21,22,25,30,32,33 VBAT OTG
9 C4 A3
EINT_CHG STAT BOOT C405
1uF
BQ24157
7101860M001 GND
R410

10K

GND
I2C address=0x6a

B B

A A

Charger

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 4 of 36

5 4 3 2 1
 5 4 3 2 1

D D

U201A
MT6357

MT6357
R200 VBUCK CTRL
2,4,6,7,16,20,21,22,25,30,32,33 B2
VBAT VSYS_SMPS

1 1uF
single via to gnd C501
B1
GND_SMPS L close to chip

GND
VPROC IN VPROC VPROC
L501
A4 A6 0.47uH
B4 VSYS_VPROC1 VPROC1 A7
C4 VSYS_VPROC2 VPROC2 B6 DVDD_DVFS 12
VSYS_VPROC3 VPROC3 B7
VPROC4 C6
VPROC5 C7
VPROC6
C502 differential and shielding
10uF C2
VPROC_FB DVDD_DVFS_FB 12
D2
GND_VPROC_FB DVDD_DVFS_GND 12
single via to gnd A5
C B5 GND_VPROC1 C
C5 GND_VPROC2
GND_VPROC3

GND L close to chip

VCORE IN VCORE VCORE L502

A8 A9 0.47uH
B8 VSYS_VCORE1 VCORE1 A10
C8 VSYS_VCORE2 VCORE2 B10 DVDD_CORE 12
VSYS_VCORE3 VCORE3 C10
C9 VCORE4
B9 GND_VCORE1 differential and shielding
GND_VCORE2 D3
C503 DVDD_CORE_FB 12
VCORE_FB
10uF
E3 12
single via to gnd GND_VCORE_FB DVDD_CORE_GND

GND

L close to chip

L503
VMODEM IN VMODEM VMODEM
1uH
A13 B11 12
B13 VSYS_VMODEM1 VMODEM1 C11 DVDD_MODEM
VSYS_VMODEM2 VMODEM2
differential and shielding

C504 E13
VMODEM_FB DVDD_MODEM_FB 12
single via to gnd 4.7uF A12
B12 GND_VMODEM1 D14
GND_VMODEM2 GND_VMODEM_FB DVDD_MODEM_GND 12
C12
GND_VMODEM3

L close to PMIC PA Middle CAP

L504
VPA IN VPA VPA 1uH
A2 A1
A3 VSYS_VPA1 VPA VPA_PMU 5,32
VSYS_VPA2
E4
VPA_FB VPA_PMU
C505 B3 C507 C508
single via to gnd GND_VPA 5,32
10uF 1uF DNP
B B

GND VS1 IN VS1 close to VPA Inductor

B14 L505
A14 VSYS_VS1_1 A16
VS1 1uH
VSYS_VS1_2 VS1_1 B16
VS1_2 VS1_PMU 5,6

single via to gnd C506 A15 L close to PMIC

B15 GND_VS1_1
4.7uF GND_VS1_2 E14
VS1_FB VS1_PMU 5,6

C509

10nF

C510

10nF

C511 10nF

A A

MT6537 buck
Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 5 of 36

5 4 3 2 1
 5 4 3 2 1

D D

U201B
MT6357

This pre-release schematic is only for placement evaluation

MT6357 Close to PMIC
LDO IN LDO
5 VS1_PMU C17 L14
VS1_LDO1 VFE28 VFE28_PMU 29,31,32,34
T4
VXO22 VXO22_PMU
K13
VCN28 VCN28_PMU 35
C601 C602 C603 H16 21
VCAMA VCAMA_PMU
22uF 22uF 4.7uF
T5
VAUX18 VAUX18_PMU 2
F15
VS2_LDO1 L7
VAUD28 VAUD28_PMU 7
F17
VS2_LDO2
ALDO
C615 C614 C613 C611
C612 C616 1uF 1uF 1uF 1uF
2.2uF 1uF

for EOS G14

VSYS_LDO1 VCN33
P17
VCN33_PMU 35
2,4,5,7,16,20,21,22,25,30,32,33 N17 L16
VBAT VSYS_LDO2 VLDO28 VLDO28_PMU 20,21,29
K7 K15 22,24,28
VSYS_LDO3 VIO28 VIO28_PMU
L15 13
VMC VMC_PMU

1
F13 N16 23
D601 D_GND1 VMCH VMCH_PMU
C604 C605 C606 G8
G7 D_GND2 L17
22uF 22uF 4.7uF

2
G9 D_GND3 VEMC VEMC_PMU 15
G12 D_GND4 J17
D_GND5 VSIM1 VSIM1_PMU 13,23
C H6 C
G10 D_GND6 K16
G11 D_GND7 VSIM2 VSIM2_PMU 13,23
H7 D_GND8 M16
GND H8 D_GND9 VIBR VIBR_PMU 29
H9 D_GND10 J14
All LDO Input Cap close to PMIC H10 D_GND11 VUSB VUSB33_PMU 13
H11 D_GND12 H15
VEFUSE_PMU 13
F12 D_GND13 VEFUSE
F11 D_GND14
D_GND15
F10
F9 D_GND16 DLDO C617 C620 C621 C622 C623 C624 C627 C626 C692 C619 C618
D_GND17 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
H12
J6 D_GND18
D7 D_GND19 D16
D_GND20 VRF18 VRF18_PMU 31
D8 GND GND GND GND GND GND GND GND GND GND GND
D6 D_GND21
D9 D_GND22
F5 D_GND23 E15
D_GND24 VCN18 VCN18_PMU 13,35
J7
D10 D_GND25 E17
D11 D_GND26 VCAMD VCAMD_PMU 21
D12 D_GND27 A17
D13 D_GND28 VCAMIO VCAMIO_PMU 10,21
F6 D_GND29 B17
J8 D_GND30 VIO18 VIO18_PMU 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
K12 D_GND31
E6 D_GND32
E7 D_GND33
D_GND34
E8
F7 D_GND35 SLDO1 C628 C632 C631 C630 C629
D_GND36 4.7uF 4.7uF 1uF 1uF 1uF
J9
E11 D_GND37
E9 D_GND38
E10 D_GND39 E16
D_GND40 VRF12 GND GND VRF12_PMU
E12 31
F8 D_GND41
J11 D_GND42
D_GND43 G15
VSRAM_PROC VSRAM_PROC_PMU 12
GND G16
Close to PMIC VREF
VSRAM_OTHERS VSRAM_OTHERS_PMU 12

C607 H17
VREF T14 VDRAM VDRAM_PMU 12,15
VREF
SG601
0.1uF T13
SLDO2
G S GND_VREF C633 C634 C635 C636 C637
B GND Single_GND_0625 4.7uF 2.2uF 2.2uF 4.7uF DNP B

DIG Power TREF

R9

K10
4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33 VIO18_PMU DVDD18_IO_K10
L10
DVDD18_DIG DVDD18_DIG TREF_PMU 16

Power Switch
J10 Note: 21-1
C609 C610 C608 DVSS18_IO_J10
1uF 0.1uF 1uF

SG602
G S
Single_GND_0625
Schematic design notice of "21_POWER_MT6357-LDO"
GND

Note 21-1:
If these power trace can meet LDO layout constraint, these CAP can be NC or removed.

A A

MT6537 LDO
Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 6 of 36

5 4 3 2 1
 5 4 3 2 1

U201D Audio
MT6357
AUDIO IF UL POWER
D D

8 R16 K1
AUD_CLK_MISO AUD_CLK_MISO AVDD28_AUD VAUD28_PMU 6
C702 1uF
T17
8 AUD_DAT_MISO0 AUD_DAT_MISO0 SH200
R17 H5
8,14 AUD_DAT_MISO1 AUD_DAT_MISO1 AVSS28_AUD S G
C703 1uF GND
T16 7,19 Single_GND_0625
8 AUD_SYNC_MISO AUD_SYNC_MISO AVSS28_AUD
L3
AU_MICBIAS0 AU_MICBIAS0 18,29
C704 1uF
8 P16
AUD_CLK_MOSI AUD_CLK_MOSI M3
P15 AU_MICBIAS1 AU_MICBIAS1 19
8,14 AUD_DAT_MOSI0 AUD_DAT_MOSI0
8 N14
AUD_DAT_MOSI1 AUD_DAT_MOSI1
8 M14
AUD_SYNC_MOSI AUD_SYNC_MOSI
Close to Chip

AUDIO INPUT
differential
K3
29 AU_VIN0_P AU_VIN0_P CHARGE PUMP
K4
29 AU_VIN0_N AU_VIN0_N

differential
G2 C705 2.2uF
AVDD18_AUD VIO18_PMU 4,6,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
K5
19 AU_VIN1_P AU_VIN1_P
AVSS_AUD SH201
19 L5 F2 GND
AU_VIN1_N AU_VIN1_N AVSS18_AUD S G
C706 4.7uF Single_GND_0625
differential
D1 AU_V18N

J4 AU_V18N
18 AU_VIN2_P AU_VIN2_P
18 AU_VIN2_N J5
AU_VIN2_N
F1 FLYP

FLYP
C707 4.7uF
E2 $$$10525

FLYN
ACCDET
C
Close to Chip C

M4
19 ACCDET ACCDET
19 J1
HP_EINT HP_EINT

1. AVSS18_AUD is connected to GND with

very short trace
AUDIO
dont' differential OUTPUT 2. AVSS18_AUD is connected to de-couple
19
must add 3mil ground path to do line shielding
J2
cap of AVDD18_AUD and AU_V18N with 6mil
AU_HPL AU_HPL
trace respectively
H3
19 AU_REFN AU_REFN
19 AU_HPR G3
AU_HPR
differential
7 F4
AU_LOLP AU_LOLP
C701 7 AU_LOLN F3
AU_LOLN
1000pF differential
G6
AU_HSP
G5
AU_HSN
Close to Chip
MT6357

U702
R710 120
C4 C3 R711 120
COM1 NO1 R712 120
A4 A3 R713 120
COM2 NO2 R714 120
B B

C5
R717 1K B3 NC1
[21,30] AUD_SWCH_EN EN A5
R718 1K B4 NC2
[21,30] RCV_EN IN1
B5
IN2
B1 C1
CP VCC AUD_PA_PVDD[7]
C724 A1 C2
0.1uF CN GND
C726 2.2uF C723
A2 B2
PVSS NC

C727 2.2uF 0.1uF

C725 SGM3715

[7] AU_LOLP
C714 68nF R704

3.3K
$$$12244

C713
Audio PA
0.1uF
R715 0
AUD_PA_GND

TP1701
Receiver & Speaker
R716
220pF
DNP
C715 68nF R703 $$$12274 R709 120
[7] AU_LOLN
U701 R708 120
3.3K R707 120
close to PMU close to PA
R706 120
A1 B4 R705 120
INP VOP SPKP_CON [17]
A2 D4
INN VON SPKN_CON [17]

A4 D2 C711 2.2uF
[9] GPIO_SPK_EN SHDN C1P D1700 D1701
1

C1

1
C1N D1703 TP1702
C717 C718
C712 2.2uF
2

A3 D1 470pF 470pF DNP

2
[2,4,5,6,16,20,21,22,25,27,30,32] VBAT VDD1 C2P PESDNC2XD12VB
B3 B1
VDD2 C2N PESDNC2XD12VB
change to 12V

[7] AUD_PA_PVDD
D3 C2 GND
PVDD GND1 C4
GND2
$$$3230

C722
A C716 A
DNP C3556 C710 7101869M001
R411

100K
GND
2200nF
2200nF 0.1uF
C708
4.7uF
AW87318CSR

AUD_PA_GND
MT6537 codec
NCN PA SH701

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 7 of 36

5 4 3 2 1
 5 4 3 2 1

D D

U801A

MT6739-SBS
PMU_IF DRAM_IF
L27 B1 $$$11923 R801 36
2,30 SYSRSTB SYSRSTB EMI0_EXTR

R28 15 F18
2 WATCHDOG WATCHDOG VREF_EMI0 VREF_EMI
GND
2 L23
C801 SRCLKENA0 SRCLKENA0
DNP
2,31 L24
SRCLKENA1 SRCLKENA1

2 N23
C
RTC32K_CK RTC32K_CK C

2 PWRAP_SPI0_CSN L25
N24 PWRAP_SPI0_CSN
2 PWRAP_SPI0_CK PWRAP_SPI0_CK
2 PWRAP_SPI0_MOSI K26
L26 PWRAP_SPI0_MO
2 PWRAP_SPI0_MISO PWRAP_SPI0_MI

P26
7 AUD_CLK_MISO AUD_CLK_MISO
7 AUD_DAT_MISO0 N26
AUD_DAT_MISO0
7,14 AUD_DAT_MISO1 R27
AUD_DAT_MISO1
7 AUD_SYNC_MISO N27
AUD_SYNC_MISO

P28
7 AUD_CLK_MOSI AUD_CLK_MOSI
7,14 AUD_DAT_MOSI0 P29
AUD_DAT_MOSI0
N25
7 AUD_DAT_MOSI1 AUD_DAT_MOSI1
7 N28
AUD_SYNC_MOSI AUD_SYNC_MOSI

Y2
PLLs Test Pin
Thermistor / To sense board level temperature
TESTMODE

VIO18_PMU
GND
JTAG 4,6,7,10,13,14,15,16,20,22,23,24,28,29,31,32,33
R802
390K
AA3
30 JTMS JTMS
Y4
30 JTCK JTCK
Y3 11 AUX_IN0_NTC
30 JTDI JTDI
30 AA2
JTDO JTDO

t
RT801
30 JRSTN Y1
JRSTN

100K
GND
B
NC B

A1
A29 NC_A1
AG1 NC_A29
AG29 NC_3P0
NC_1P5

MT6739

A A

MT6739 control
Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 8 of 36

5 4 3 2 1
 5 4 3 2 1

D D

U801C

MT6739-SBS
CSI DSI

21 RCP U5 T27
RCP TCP TCP 20
V4 U27
21 RCN RCN TCN TCN 20

W4 T26 20
21 RDP0 RDP0 TDP0 TDP0
W3 T25
21 RDN0 RDN0 TDN0 TDN0 20

W2 U29
21 RDP1 RDP1 TDP1 TDP1 20
U801G W1 U28
21 RDN1 RDN1 TDN1 TDN1 20

MT6739-eMCP_LP3 21 RDP2 U4
U3 RDP2 TDP2
V28
W28 TDP2 20
21 RDN2 RDN2 TDN2 TDN2 20
EMI_IF
21 RDP3 U2 U26
B13 B7 V2 RDP3 TDP3 U25
15 EMI0_DQ0 EMI0_DQ0 EMI0_CS0_N EMI0_CS0_N 15 RDN3 RDN3 TDN3
A14 B8
15 EMI0_DQ1 EMI0_DQ1 EMI0_CS1_N EMI0_CS1_N 15
B14
15 EMI0_DQ2 EMI0_DQ2 R901
B15 A3
15 EMI0_DQ3 EMI0_DQ3 EMI0_CKE0 EMI0_CKE0 15
15 EMI0_DQ4 A15 21 RCP_A P3 T28 $$$14854

C15 EMI0_DQ4 D15 R3 RCP_A VRT

15 EMI0_DQ5 EMI0_DQ5 EMI0_DM0 EMI0_DM0 15 21 RCN_A RCN_A
15 EMI0_DQ6 B16 C19
B17 EMI0_DQ6 EMI0_DM1 C11 EMI0_DM1 15 AE28 1.5K
15 EMI0_DQ7 EMI0_DQ7 EMI0_DM2 EMI0_DM2 15 DISP_PWM DISP_PWM 20
15 EMI0_DQ8 A17 C23 21 RDP0_A R5
A18 EMI0_DQ8 EMI0_DM3 EMI0_DM3 15 R6 RDP0_A
15 EMI0_DQ9 EMI0_DQ9 21 RDN0_A RDN0_A
15 EMI0_DQ10 C20 C17 AB23
B19 EMI0_DQ10 EMI0_DQS0_T D19 EMI0_DQS0_T 15 LCM_RST LCM_RST 20,29
15 EMI0_DQ11 EMI0_DQ11 EMI0_DQS1_T EMI0_DQS1_T 15
15 EMI0_DQ12 B18 E13 21 RDP1_A R4
B20 EMI0_DQ12 EMI0_DQS2_T D22 EMI0_DQS2_T 15 P4 RDP1_A AB24
15 EMI0_DQ13 EMI0_DQ13 EMI0_DQS3_T EMI0_DQS3_T 15 21 RDN1_A RDN1_A DSI_TE DSI_TE 29
15 EMI0_DQ14 A20
C A21 EMI0_DQ14 D17 C
15 EMI0_DQ15 EMI0_DQ15 EMI0_DQS0_C EMI0_DQS0_C 15
B10 E19 P2
15 EMI0_DQ16 EMI0_DQ16 EMI0_DQS1_C EMI0_DQS1_C 15 RDP2_A
15 EMI0_DQ17 A11 D13 R2
A9 EMI0_DQ17 EMI0_DQS2_C E22 EMI0_DQS2_C 15 RDN2_A
15 EMI0_DQ18 EMI0_DQ18 EMI0_DQS3_C EMI0_DQS3_C 15
15 EMI0_DQ19 B11
B12 EMI0_DQ19 T2
15 EMI0_DQ20 EMI0_DQ20 RDP3_A
B9 D7 T1
15 EMI0_DQ21
A12 EMI0_DQ21 EMI0_CK_T D8 EMI0_CK_T 15 RDN3_A
15 EMI0_DQ22 C10 EMI0_DQ22 EMI0_CK_C EMI0_CK_C 15
15 EMI0_DQ23 EMI0_DQ23
C24
15 EMI0_DQ24 EMI0_DQ24
B21 B4 M5
15 EMI0_DQ25 EMI0_DQ25 EMI0_CA0 EMI0_CA0 15 30 IO_JTAG_TCK CMDAT0
A23 B5
15 EMI0_DQ26 EMI0_DQ26 EMI0_CA1 EMI0_CA1 15
15 EMI0_DQ27 B22 B3 M7
EMI0_DQ27 EMI0_CA2 EMI0_CA2 15 30 IO_JTAG_TMS CMDAT1
15 EMI0_DQ28 B23 A5
B25 EMI0_DQ28 EMI0_CA3 A6 EMI0_CA3 15 M6
15 EMI0_DQ29 EMI0_DQ29 EMI0_CA4 EMI0_CA4 30 IO_JTAG_TDI CMPCLK
B24 C4 15
15 EMI0_DQ30 EMI0_DQ30 EMI0_CA5 EMI0_CA5 15
A24 C3
15 EMI0_DQ31 EMI0_DQ31 EMI0_CA6 EMI0_CA6 15
C5 L901
EMI0_CA7 C2 EMI0_CA7 15 AC2
EMI0_CA8 EMI0_CA8 15 21 CAM_CLK0 CMMCLK0
B2 27n
EMI0_CA9 EMI0_CA9 15
30 IO_JTAG_TD0 M4
CMMCLK1

MT6739 Note: 14-1 C901

10pF SPI

24 SPI0_B_CSB AE1
SPI0_CS
24 SPI0_B_CLK AF1
SPI0_CK
24 SPI0_B_MO AE2
SPI0_MO
24 AD2
SPI0_B_MI SPI0_MI

16 USB_ID AE5
SPI1_CS
29 LCD_ID3 AE4
SPI1_CK
21 AD5
FCAM_ID SPI1_MO
23 AE3
INT_SIM1 SPI1_MI

I2S
B B
AE25
22 MAG_SENSOR_RST I2S0_BCK
4 AE26
EINT_CHG I2S0_LRCK
AG26
7 GPIO_SPK_EN I2S0_DATA_IN

30 AF4
MD_URXD0 I2S1_BCK
21 AG2
CAM_RST0 I2S1_LRCK
30 MD_UTXD0 AF3
I2S1_DO
AF2
21 CAM_PDN0 I2S1_MCK

MT6739

A A

MT6739 EBIF&MIPI
Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 9 of 36

5 4 3 2 1
 5 4 3 2 1

D D

U801D

MT6739-SBS
USB MSDCs
16 USB_DP L28 D28
K28 USB_DP MSDC0_RSTB MSDC0_RSTB 15
16 USB_DM USB_DM D25
MSDC0_CMD MSDC0_CMD 15
R108 5.1K M29
USB_VRT D27
MSDC0_CLK D26 MSDC0_CLK 15
MSDC0_DSL MSDC0_DSL 15
GND C28
MSDC0_DAT7 MSDC0_DAT7 15
BC MSDC0_DAT6
B29
A27
MSDC0_DAT6 15
MSDC0_DAT5 MSDC0_DAT5 15
C27
MSDC0_DAT4 MSDC0_DAT4 15
2 CHD_DP J25 B28
CHD_DP MSDC0_DAT3 MSDC0_DAT3 15
C26
MSDC0_DAT2 MSDC0_DAT2 15
2 CHD_DM J24 A26
CHD_DM MSDC0_DAT1 MSDC0_DAT1 15
B27
MSDC0_DAT0 MSDC0_DAT0 15

KEYPAD NCEB0
E25
F25
NCEB1 G25
NCLE BOARD_TYPE_ID2 10
20,29 AF6 G26
GPIO_CTP_RSTB KP2ROW NALE BOARD_TYPE_ID3 10
G27 FP_RST
AG5 NWPB 24
35 GPIO_GPS_LNA_EN KP1ROW
21 AF5
RCAM_ID KP0ROW H26 24
EINT0 FP_INT_N
G28
EINT1 EINT_ALPS 28
20 GPIO_LCM_BIAS_ENP AD6 H28
KP2COL EINT2 EINT_ACC 22
H25 GPIO_FLASH_STROBE 25
AE7 EINT3 J28
10 BOARD_TYPE_ID1 FP_ID 24
KP1COL EINT4 G29
EINT5 BOARD_TYPE_ID4 10
24 KPCOL0 AE6
KP0COL

AA24 MSDC1_CLK 23
MSDC1_CLK

C
I2C MSDC1_CMD
AA26 MSDC1_CMD 23
C
4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33 R1004 DNP
VIO18_PMU
R1003 DNP AA25
20,29 MSDC1_DAT3 MSDC_1__DAT3 23
AB5 AB27
SCL0 I2C0_SCL MSDC1_DAT2 MSDC_1__DAT2 23
Y26
MSDC1_DAT1 MSDC_1__DAT1 23
20,29 AC5 AA27 23
SDA0 I2C0_SDA MSDC1_DAT0 MSDC_1__DAT0

4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33 R1001 DNP

VIO18_PMU
R1002 DNP
Y6
CONN_IF
22,25,28,29
SCL1 I2C1_SCL
22,25,28,29 SDA1 Y7 F6 WB_CTRL0 35
I2C1_SDA WB_CTRL0 G7
WB_CTRL1 WB_CTRL1 35
F7 WB_CTRL2 35
WB_CTRL2 F5
DNP WB_CTRL3 WB_CTRL3 35
R1006 E5 WB_CTRL4 35
6,21 VCAMIO_PMU WB_CTRL4
R3618 DNP E6 WB_CTRL5 35
AD4 WB_CTRL5
21
SCL2 I2C2_SCL
AD3
21 SDA2 I2C2_SDA L7 CONN_SCLK 35
WB_SCLK K4
WB_SDATA CONN_SDATA 35
K7 CONN_SEN
WB_SEN 35

Y5 R3613
[21,30] AUD_SWCH_EN I2C3_SCL K3 470
XIN_WBG CONN_XO_IN 35
AA5
[21,30] RCV_EN I2C3_SDA

J7 CONN_RSTB 35
WB_RSTB
UART
L3
AC3 ANT_SEL0
30 UTXD0 UART0TX K5 USB_MOS_CTRL 29
AB3 ANT_SEL1
30 URXD0 UART0RX L5
ANT_SEL2 EMMC_NAND_BOOTING 14
AF28
21 CAM_PDN1 UART1TX VIO18_PMU
AD27 VIO18_PMU
21 CAM_RST1 UART1RX
GPIO
AB4
SRCLKENAI
WCN 6625
B B
35 GPS_RX_IP K2 AE27 20,29
GPS_RXIP EINT6 EINT_CTP R1011 R1013
35 GPS_RX_IN K1 10K 10K
L2 GPS_RXIN AD25 R1015 R1017 R3606
35 GPS_RX_QP USB_ID_DET 16
GPS_RXQP EINT7
35 GPS_RX_QN
L1
GPS_RXQN
EINT8
AF27
10K 10K 10K
HW ID
35 F2W_CLK J5
J6 F2W_CLK AG27
35 F2W_DATA F2W_DATA EINT9 INT_SAR_SENSOR [29] BOARD_TYPE_ID1 10
E1 AB7 BOARD_TYPE_ID3 10
35 WB_RX_IP 25
E2 WB_RXIP EINT10 GPIO_FLASH_EN DNP R1019 BOARD_TYPE_ID2 10
35 WB_RX_IN WB_RXIN VIO18_PMU 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33 BOARD_TYPE_ID4 10
35 WB_RX_QP F1 AB6 BOARD_TYPE_ID5 10 DNP R1020
35 F2 WB_RXQP EINT11
WB_RX_QN WB_RXQN R1012 R1014 BOARD_TYPE_ID5 10
G1 AC7
35 WB_TX_IP WB_TXIP EINT12 CHG_SCL5 4
G2
35WB_TX_IN WB_TXIN
H1 AC6 DNP DNP
35 WB_TX_QP WB_TXQP EINT13 CHG_SDA5 4
35 WB_TX_QN H2 R1016 R1018 R3605
WB_TXQN AD28
EINT14
GND DNP DNP DNP
AC28
EINT_SD
GND
EINT15 23

GND GND GND

MT6739

A A

MT6739 GPIO

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 10 of 36

5 4 3 2 1
 5 4 3 2 1

D D

U801B

MT6739-SBS
SIM ABB_IF
AB28 AA16
23 SIM1_SCLK PMIC_CLK_BB 2
$$$12314

AA28 SIM1_SCLK LTEX26M_IN

23 SIM1_SIO SIM1_SIO
Y28
23 SIM1_SRST SIM1_SRST AD14 31
AB26 TX_BBIP AE14 LTE_TX_BB0_IP
23 SIM2_SCLK LTE_TX_BB0_IN
AC26 SIM2_SCLK TX_BBIN 31
23 SIM2_SIO AD26 SIM2_SIO AG14
23 SIM2_SRST SIM2_SRST TX_BBQP AF14 LTE_TX_BB0_QP 31
TX_BBQN LTE_TX_BB0_QN 31

AF18
PRX_BB_IP LTE_PRX_BB0_IP 31
BPI PRX_BB_IN
AG18
LTE_PRX_BB0_IN 31
AF17
PRX_BB_QP LTE_PRX_BB0_QP 31
32 BPI_BUS17 AC22 AG17
C BPI_BUS17 PRX_BB_QN LTE_PRX_BB0_QN 31 C

34 BPI_BUS16 AD24
BPI_BUS16 AD18
DRX_BB_IP LTE_DRX_BB0_IP 31
20 AC10 AE18
GPIO_LCM_BIAS_ENN BPI_BUS15 DRX_BB_IN LTE_DRX_BB0_IN 31
AC24 AE17
BPI_BUS14 DRX_BB_QP LTE_DRX_BB0_QP 31
AD17
DRX_BB_QN LTE_DRX_BB0_QN 31
AE23
[16] ADC_CTRL BPI_BUS13
22 LED_RED_EN AC21 AF15 31
BPI_BUS12 DET_BBIP LTE_DET_BB0_IP
AG15
29 DET_BBIN LTE_DET_BB0_IN 31
SUB_BOARD_ID1 AD23
BPI_BUS11 AD15
DET_BBQP LTE_DET_BB0_QP 31
29 SUB_BOARD_ID2 AF24 AE15
BPI_BUS10 DET_BBQN LTE_DET_BB0_QN 31
34 BPI_BUS9 AD9
BPI_BUS9 AC13
AE8 APC VRAMP_DCDC 33
34 BPI_BUS8 BPI_BUS8
34 BPI_BUS7 AD8
BPI_BUS7
34 BPI_BUS6 AB10
BPI_BUS6 RF MIPI
34 BPI_BUS5 AF8
BPI_BUS5 AG9
AD10 RFIC_MIPI0_SCLK AG8 MIPI0_SCLK 32
21 GPIO_VCAMA_LDO_EN BPI_BUS4 RFIC_MIPI0_SDATA MIPI0_SDATA 32

34BPI_BUS3 AE11 AF10 33

BPI_BUS3 RFIC_MIPI1_SCLK AF9 MIPI1_SCLK
RFIC_MIPI1_SDATA MIPI1_SDATA 33
29 LCD_ID2 AE10
BPI_BUS2 AF25
RFIC_MIPI2_SCLK BPI_ANT1 29
34 BPI_BUS1 AC9 AG25 BPI_ANT0 29
BPI_BUS1 RFIC_MIPI2_SDATA
AC8 AF23 31
29LCD_ID1 BPI_BUS0 RFIC_MIPI3_SCLK AG23 MIPI3_SCLK
RFIC_MIPI3_SDATA MIPI3_SDATA 31

C1102
RF BSI
AUX IN
31 AE21
RFIC0_BSI_EN RFIC0_BSI_EN AC12 1uF
AUXIN2 BATERY_ID 16
AF20
31 RFIC0_BSI_CK RFIC0_BSI_CK
AG21 AD12 32
31 RFIC0_BSI_D0 RFIC0_BSI_D0 AUXIN1 AUX_IN1_NTC
AG20
31 RFIC0_BSI_D1 RFIC0_BSI_D1 AE12
AUXIN0 AUX_IN0_NTC 8
AF21
B RFIC0_BSI_D2 B

REF POWER C1103 C1104

1uF 1uF
AF12 REFP
REFP

AG12 AVSS_RFEN
AVSS_REFN
C1101
0.1uF

MT6739

SH106

G S
Single_GND_0625

A A

MT6739 RF IF

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 11 of 36

5 4 3 2 1
 5 4 3 2 1

5 DVDD_CORE
D D
5 DVDD_CORE_FB
5 DVDD_CORE_GND U801E

Note: 10-2
SG1201 SG1202 MT6739-SBS
VOCRE VPROC
C1201 DNP
C1202 22uF T18
DVDD_DVFS1 T20 5
DVDD_DVFS2 DVDD_DVFS
J9 T22
J15 DVDD_TOP1 DVDD_DVFS3 V24
C1203 22uF Note: 10-1
J19 DVDD_TOP2 DVDD_DVFS4 W19
K12 DVDD_TOP3 DVDD_DVFS5 W21
DVDD_TOP4 DVDD_DVFS6 DVDD_DVFS_FB 5
C1204 22uF K14 W24
DVDD_TOP5 DVDD_DVFS7 DVDD_DVFS_GND 5
L9 AA19
L15 DVDD_TOP6 DVDD_DVFS8 AA21
L17 DVDD_TOP7 DVDD_DVFS9 AB18 SG1205 SG1206
L19 DVDD_TOP8 DVDD_DVFS10 AB20
M12 DVDD_TOP9 DVDD_DVFS11
M14 DVDD_TOP10
C1226 22uF
M22 DVDD_TOP11 C1227 DNP
N9 DVDD_TOP12
N15 DVDD_TOP13
C1205 1uF C1228 22uF
N17 DVDD_TOP14
N19 DVDD_TOP15
R9 DVDD_TOP16
R19 DVDD_TOP17
C1206 0.1uF
DVDD_TOP18
C1207 0.1uF
C1208 0.1uF
C1229 1uF
C1230 1uF
C1231 1uF
C1232 1uF
C1233 1uF
C1234 1uF

GND

GND
5 DVDD_MODEM

C
5 DVDD_MODEM_FB C
5 DVDD_MODEM_GND
SG1203 SG1204

C1209 22uF
Note: 10-3
VLTE GND
C1210 22uF A2
P12 DVSS1 A8
P14 DVDD_MODEML1_BUC1 DVSS2 B6
R15 DVDD_MODEML1_BUC2 DVSS3 B26
T12 DVDD_MODEML1_BUC3 DVSS4 C6
T14 DVDD_MODEML1_BUC4 DVSS5 C7
U9 DVDD_MODEML1_BUC5 DVSS6 C8
C1211 0.1uF
U15 DVDD_MODEML1_BUC6 DVSS7 C9
V8 DVDD_MODEML1_BUC7 DVSS8 C12
C1212 0.1uF
V12 DVDD_MODEML1_BUC8 DVSS9 C13
V14 DVDD_MODEML1_BUC9 DVSS10 C14
W9 DVDD_MODEML1_BUC10 DVSS11 C16
W15 DVDD_MODEML1_BUC11 DVSS12 C25
Y12 DVDD_MODEML1_BUC12 DVSS13 D3
Y14 DVDD_MODEML1_BUC13 DVSS14 D4
AA9 DVDD_MODEML1_BUC14 DVSS15 D5
GND DVDD_MODEML1_BUC15 DVSS16 D6
DVSS17 D10
DVSS18 D11
DVSS19 D16
DVSS20 D20
DVSS21 D21
DVSS22 D24
DVSS23 D29
DVSS24 E7
DVSS25 E8
DVSS26 E9
DVSS27 E11
DVSS28 E14
DVSS29 E15
DVSS30 E16
DVSS31 E18
DVSS32 E20
DVSS33 E21
DVSS34 E24
DVSS35 E26
VLTE_SRAM DVSS36 E27
DVSS37 E28
K16 DVSS38 F14
6 VSRAM_OTHERS_PMU DVDD_SRAM_TOP1 DVSS39
M16 F20
T16 DVDD_SRAM_TOP2 DVSS40 J11
V16 DVDD_SRAM_TOP3 DVSS41 J13
B DVDD_SRAM_TOP4 DVSS42 J17 B
C1213 C1215 C1216 DVSS43 J21
C1214
DVSS44 J27
DNP 1uF DNP DNP DVSS45 K10
DVSS46 K18
DVSS47 K20
DVSS48 L11
DVSS49 L13
DVSS50 L21
DVSS51 M10
DVSS52 M18
SRAM DVSS53 M20
DVSS54 N11
V18 DVSS55 N13
6 VSRAM_PROC_PMU DVDD_DVFS_SRAM DVSS56 N21
DVSS57 P10
DVSS58 P18
DVSS59 P20
DVSS60
C1217 C1218 VDDQ
DNP 1uF
F9
F10 AVDDQ_EMI0_0_1
G10 AVDDQ_EMI0_0_2
F12 AVDDQ_EMI0_0_3
G12 AVDDQ_EMI0_1_4
G13 AVDDQ_EMI0_1_5
F15 AVDDQ_EMI0_1_6
F16 AVDDQ_EMI0_2_7
G15 AVDDQ_EMI0_2_8
G16 AVDDQ_EMI0_2_9
6,15 VDRAM_PMU AVDDQ_EMI0_2_10
G18
F19 AVDDQ_EMI0_3_11
G19 AVDDQ_EMI0_3_12
AVDDQ_EMI0_3_13
C1219 C1220 C1221 C1222 C1223 C1224 C1225
2.2uF DNP 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF GND
MT6739

GND

A A

MT6739 power1
Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 12 of 36

5 4 3 2 1
 5 4 3 2 1

D D

U801F

MT6739-SBS
GND AVDD & MD_A
AF11 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
R11 AVDD18_MD
R13 DVSS1 AG11 VIO18_PMU
R21 DVSS2 AVDD18_AP
T10 DVSS3
U11 DVSS4
U13 DVSS5
U17 DVSS6 AC14 C1301
U19 DVSS7 AVSS18_MD1 AC15 470nF
U21 DVSS8 AVSS18_MD2 AC16
U23 DVSS9 AVSS18_MD3 AC17 GND
V10 DVSS10 AVSS18_MD4 AD13
V22 DVSS11 AVSS18_MD5 AD16
W11 DVSS12 AVSS18_MD6 AD19
W13 DVSS13 AVSS18_MD7 AE13
W17 DVSS14 AVSS18_MD8 AE16
Y10 DVSS15 AVSS18_MD9 AE19
Y18 DVSS16 AVSS18_MD10 AF16
Y20 DVSS17 AVSS18_MD11 AF19
Y22 DVSS18 AVSS18_MD12
AA11 DVSS19
AA23 DVSS20
AB8 DVSS21
AF22 DVSS22
DVSS23

GND

PLL
R17 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
AVDD18_PLLGP VIO18_PMU
C1 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
AVDD18_MEMPLL VIO18_PMU
C P17 C
AVSS18_PLLGP GND
D1
AVSS18_MEMPLL
C1302 C1303
0.1uF 0.1uF

PERI_D
D2
DVDD18_CONN

U7 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
DVDD18_EFUSE VIO18_PMU

AC1 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
DVDD18_IORB VIO18_PMU

N29
DVDD18_IOLT
C1305 C1304
AG4 0.1uF 0.1uF
DVDD18_IOBR

N1
DVDD18_IORT

AG28
DVDD18_IOBL

AF29
DVDD18_IR

AE29 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
DVDD28_IR_DVDD18 VIO18_PMU

U6 6
FSOURCE_P VEFUSE_PMU

F29 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
DVDD18_MC0 VIO18_PMU

AB29 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
DVDD18_MC1 VIO18_PMU

W29 150mils 6
DVDD28_MC1 VMC_PMU

Y29 6,23
B DVDD28_SIM1 VSIM1_PMU B

AC29 6,23
DVDD28_SIM2 VSIM2_PMU

PERI_A C1306 C1311 C1310 C1309 C1308 C1307

0.1uF 0.1uF 0.1uF 1uF 0.1uF 0.1uF
U1
AVDD18_MIPIRX0
VIO18_PMU
P1
GND GND GND GND GND GND
Note:4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
11-1 VIO18_PMU
AVDD18_MIPIRX1
T29 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
AVDD18_MIPITX VIO18_PMU
T7
AVSS18_MIPIRX0 GND
T24
GND
AVSS18_MIPITX C1312 C1313
0.22uF 0.22uF

K29 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
AVDD18_USB VIO18_PMU
J29 6
AVDD33_USB VUSB33_PMU
J26
AVSS33_USB1
M28
AVSS33_USB2
M3 6,35
AVDD18_WBG VCN18_PMU

E3
AVSS18_WBG1 F8
AVSS18_WBG2 G8 C1316 C1315 C1314
AVSS18_WBG3 G9
AVSS18_WBG4 0.1uF 1uF 0.1uF
H5
AVSS18_WBG5 H6
AVSS18_WBG6 H7
AVSS18_WBG7 H8
AVSS18_WBG8 J1 GND
AVSS18_WBG9 J2
AVSS18_WBG10

MT6739

A A

MT6739 power2
Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 13 of 36

5 4 3 2 1
 5 4 3 2 1

D D

C C

VIO18_PMU 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33

VIO18_PMU 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
VIO18_PMU 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
R1403
R1407 R1405
DNP
DNP DNP

7,8 AUD_DAT_MOSI0 EMMC_NAND_BOOTING 10 7,8 AUD_DAT_MISO1

R1404
R1408 R1406
DNP
DNP DNP

GND

Schematic design notice of "15_BB_HW_Trap" page.

Note 15-1: PWRAP_SPI0_CSN and AUD_DAT_MOSI are JTAG feature in bootstrap.
AUD_DAT_MOSI0 Mode Note
LO Default N/A
B HI Aux Func. trap_MD_JTAG_AP_JTAG MD JTAG = CMDAT0/CMDAT1/CMPCLK/CMMCLK/CMMCLK1 B

Note 15-2: ANT_SEL2 and AUD_DAT_MISO1 is storage booting feature in bootstrap.

ANT_SEL2 AUD_DAT_MISO1 Storage Booting
HI LO TLC Boot
HI HI SLC Boot
LO LO eMMC Boot
LO HI N/A

A A

MT6739 HW trap

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 14 of 36

5 4 3 2 1
 5 4 3 2 1

D D

VIO18_PMU 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
U1501

9 Y2 F3
EMI0_CA0 CA0 VDD1_1
9 Y3 F4
EMI0_CA1 CA1 VDD1_2
9 W2 F9
EMI0_CA2 CA2 VDD1_3
9 W3 G5
EMI0_CA3 CA3 VDD1_4
9 V3 AA3
EMI0_CA4 CA4 VDD1_5
9 L3 AA5 C1507 C1531 C1508
EMI0_CA5 CA5 VDD1_6
9 K3 AB3 4.7uF 0.1uF 0.1uF
EMI0_CA6 CA6 VDD1_7
9 J3 AB4
EMI0_CA7 CA7 VDD1_8
9 J2 AB9
EMI0_CA8 CA8 VDD1_9
9 H2
EMI0_CA9 CA9 F5 6,12,15
VDD2_1 VDRAM_PMU
9 W12 F8
EMI0_DQ0 DQ0 VDD2_2
9 V11 J5
EMI0_DQ1 DQ1 VDD2_3
9 V13 K5
EMI0_DQ2 DQ2 VDD2_4
9 U11 L2
EMI0_DQ3 DQ3 VDD2_5
9 U13 L5
EMI0_DQ4 DQ4 VDD2_6
9 T11 M5
EMI0_DQ5 DQ5 VDD2_7
9 T13 N5
EMI0_DQ6 DQ6 VDD2_8
9 R12 P5
EMI0_DQ7 DQ7 VDD2_9
9 N12 P8
EMI0_DQ8 DQ8 VDD2_10
9 M13 P11
EMI0_DQ9 DQ9 VDD2_11
9 M11 R5
EMI0_DQ10 DQ10 VDD2_12
9 L13 T5
EMI0_DQ11 DQ11 VDD2_13
9 L11 U5
EMI0_DQ12 DQ12 VDD2_14
9 K11 V5
EMI0_DQ13 DQ13 VDD2_15
9 K13 W5
EMI0_DQ14 DQ14 VDD2_16
9 J12 AB5
EMI0_DQ15 DQ15 VDD2_17
9 AB12 AB8
EMI0_DQ16 DQ16 VDD2_18
9 AB11
EMI0_DQ17 DQ17
9 AB10 G9
EMI0_DQ18 DQ18 VDDQ1
9 AA13 H8
EMI0_DQ19 DQ19 VDDQ2
9 AA12 H12
EMI0_DQ20 DQ20 VDDQ3
9 AA10 J11
EMI0_DQ21 DQ21 VDDQ4
9 Y13 K10
EMI0_DQ22 DQ22 VDDQ5
EMI0_DQ23 9 Y11
DQ23
Power VDDQ6
K12 C1510 C1511
C1512 C1513 C1514 C1515
C1526 C1527 C1528 C1529
9 H11 L8 0.1uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF
EMI0_DQ24 DQ24 VDDQ7 0.1uF 0.1uF 0.1uF 0.1uF
9 H13 L9
EMI0_DQ25 DQ25 VDDQ8
9 G10 M10
EMI0_DQ26 DQ26 VDDQ9
9 G12 M12
EMI0_DQ27 DQ27 VDDQ10
9 G13 N11
EMI0_DQ28 DQ28 VDDQ11
9 F10 R11
EMI0_DQ29 DQ29 VDDQ12
9 F11 T10
EMI0_DQ30 DQ30 VDDQ13
C
9 F12 T12 C
EMI0_DQ31 DQ31 VDDQ14 1. VCC : Core Voltage 2.7v ~ 3.6v
U8
G2 VDDQ15 U9 2. VCCQ : IO Voltage 1.7v~1.95v (low voltage range)
R1501 240
G3 ZQ0 VDDQ16 V10
R1502 240
ZQ1 VDDQ17 V12
GND F13 VDDQ18 W11
G11 VSSQ1 VDDQ19 Y8
H10 VSSQ2 VDDQ20 Y12
J8 VSSQ3 VDDQ21 AA9
J13 VSSQ4 VDDQ22
K8 VSSQ5 K2
K9 VSSQ6 VDDCA1 N2
L10 VSSQ7 VDDCA2 U2
L12 VSSQ8 VDDCA3 V2
M8 VSSQ9 VDDCA4
VSSQ10 6 VEMC_PMU
N13 B3
P9 VSSQ11 VCC_1 B12
R13 VSSQ12 VCC_2 B13
T8 VSSQ13 VCC_3 C4 C1501 C1502 C1503
U10 VSSQ14 VCC_4 D8 10uF 0.1uF 0.1uF
U12 VSSQ15 VCC_5 A4
V8 VSSQ16 VCCQ1 B6 GND
V9 VSSQ17 VCCQ2 B9
VSSQ18 VCCQ3 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
VIO18_PMU
W8
W13 VSSQ19 VCCQ4
C7
C11
Close to eMCP
Y10 VSSQ20 VCCQ5 A11 $$$24741

AA11 VSSQ21 VCCI TP2738

VSSQ22 B8 10 MSDC0_CLK C1504 C1505
F2 CLKM C2 TP2739
10 MSDC0_RSTB 2.2uF 0.1uF C1530
G4 VSS1 RST A6
VSS2 CMD 10 MSDC0_CMD 0.1uF
G8
VSS3
eMMC C1521 C1522
H3 B4 10
VSS4 DAT7 MSDC0_DAT7 0.1uF 1uF
H5 A5 10
VSS5 DAT6 MSDC0_DAT6
L4 A10 10
VSS6 DAT5 MSDC0_DAT5
M3 C9 10 MSDC0_DAT4
GND
M4 VSS7 DAT4 B5
VSS8 DAT3 10 MSDC0_DAT3
N4 C6 10
VSS9 DAT2 MSDC0_DAT2
N8 B10 10 TP2740 Close to Memory
VSS10 DAT1 MSDC0_DAT1
P4 A9 10
VSS11 DAT0 MSDC0_DAT0
P12
R3 VSS12
R4 VSS13
R8 VSS14
T4 VSS15
Y4 VSS16 U3
VSS17 CS0# 9 EMI0_CS0_N
Y5 T3 9
VSS18 CS1# EMI0_CS1_N
AA2
AA4 VSS19 LP-DDR3 T2
VSS20 CKE0 9 EMI0_CKE0
AA8 R2
VSS21 CKE1
B H4 P3 9
B
VSSCA1 CLK EMI0_CK_T
J4 N3 9
VSSCA2 CLK# EMI0_CK_C
K4
P2 VSSCA3 T9
VSSCA4 DQS0 9 EMI0_DQS0_T
U4 R9 9
VSSCA5 DQS0# EMI0_DQS0_C
V4 M9 9
VSSCA6 DQS1 EMI0_DQS1_T
W4 N9 9
VSSCA7 DQS1# EMI0_DQS1_C
Y9 9
DQS2 EMI0_DQS2_T
A3 W9 9
VSSM1 DQS2# EMI0_DQS2_C
A8 H9 9
VSSM2 DQS3 EMI0_DQS3_T
A12 J9 9 6,12,15
VSSM3 DQS3# EMI0_DQS3_C VDRAM_PMU
B2
B7 VSSM4 R10
VSSM5 DM0 9 EMI0_DM0 R1504
B11 N10 9
VSSM6 DM1 EMI0_DM1
C3 W10 9
VSSM7 DM2 EMI0_DM2 C1523
C5 J10 9
VSSM8 DM3 EMI0_DM3 8.06K 0.1uF
C8
C10 VSSM9 M2
VSSM10 VREFCA 8 VREF_EMI
C12 P13
C13 VSSM11 VREFDQ
D7 VSSM12
VSSM13 AB14 R1505 C1524
A2 DNU1 AB13 C1525 0.1uF
A13 VSF1 DNU2 AB2 0.1uF
B1 VSF2 DNU3 AB1
VSF3 DNU4 8.06K
GND B14 AA14
D2 VSF4 DNU5 AA1
GND
D3 VSF5 DNU6 A14
D4 VSF6 DNU7 A1
D5 VSF7 DNU8
D6 VSF8
TP2741 VSF9
10 A7 P10
MSDC0_DSL RFU ODT

H9TQ65A8GTMCUR

EMMC & LPddr3 A

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 15 of 36

5 4 3 2 1
 5 4 3 2 1

D D

BATTERY CONNECTOR

VBAT

2,4,5,6,7,20,21,22,25,30,32,33

100mil

J1601

1
BM25-4S/2-V(51) D1603

D1609
ES05DP C1605 C1606 C1604 C1603 C1601

13

14
10uF 10uF 1uF 0.1uF 2200pF 29,30 USB_HS_DM R3412 5.1 USB_DM 10

2
2
13

14
1 12 GND
from MT6353 2
1 12
11
29,30 USB_HS_DP R1604 5.1 USB_DP 10
2 11
R1601 1K 3 10 30
2 BATON 3 10 DEBUG_BATERY_ID
R1607 16.9K 4 9
6 TREF_PMU 4 9
R1609 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
5 8 TP205
5 8 R3612 2K
11 BATERY_ID VIO18_PMU
6 7

D1604

1
6 7

1
TP206
C C

D1605
15

16

200K

TP207
SDV1005E5R5C180NPTF
Kelvin connection

2
15

16

2
R1620 D1601

GND
0.01
GND GND

4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
SG1604 R1606 1K
VIO18_PMU
2 CS_P

2 R3413 10K
CS_N 29,30 USB_ID_CON USB_ID 9

4 mil trace with good shielding (Differential) R1608 2K

USB_ID_DET 10

ID RES ID Voltage C3490

0.1uF
光宇 22K 0.17V

200K
飞毛腿 0.9V

欣旺 达 110K 0.63V

B B

A
Battery & USB IF A

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 16 of 36

5 4 3 2 1
 5 4 3 2 1

D D

C C

SPK1700
SPKP_CON 7 R1702
0
Close to SPK PAD
SPK1701
SPKN_CON 7 R1703
0

C1701 C1702
DNP DNP

GND

B B

A A

Speaker & Receiver

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 17 of 36

5 4 3 2 1
 5 4 3 2 1

D D

C
Handset Microphone 2 C

AU_MICBIAS0 [7,29]

C1804
68pF

Close to BB
MIC1801

1 4 R1801 1uF
POWER OUTPUT AU_VIN2_P [7]

2 3
GND1 GND2

MA-BFA423-A83-1
R1802 1uF
AU_VIN2_N [7]

R1803 0
AVSS28_AUD
C1802 C1803
SG1801 33pF 33pF
DNP

GND

GND

B Tie together then single via to main GND B

A A

Second MIC
Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 18 of 36

5 4 3 2 1
 5 4 3 2 1

D D

Earphone Audio

Based on your system level design , if better

Audio performance is needed on your system,
please add 32ohm to audio path (1) iPhone : L-R-G-M
close to connector
for performance enhance proposal
( 32ohm condition pop noise can improve 6dB )
R1903 47K
HP_EINT 7
J1901
LB1904
1 1
Note: 60-1 close to IC
HP_MIC 19
BLM15BD182SN1D 3 3
LB1905 LB1903POLE_HPL
7R1901 33
$$$16473 4 4
AU_HPL LB1902
BLM15BD182SN1D BLM15BD182SN1D
LB1906
AU_HPR 7 R1902 33 $$$16476
BLM15BD182SN1D
C
BLM15BD182SN1D 7 5 5 C
AU_REFN LB1901
C1901 1800ohm@100MHz 2 2
Note: 60-2 R1911

1
C1902 R1912

D1902

D1903

D1904
GND shielding 6 6
33pF 33pF 470 C1913
470

2
BEAD402 / BEAD405 are DNP D1901
1 2
for FM-desense tuning proposal GND 11-0581273-M

C1911
35 1nF
GND FM_ANT

GND GND GND

L1901
100nH
SG1901
SG1902 0
AVSS28_AUD 7 35 FM_RX_N_6625

Single via to
C1912

AU_MICBIAS1 7
68pF GND plane

Earphone MICPHONE R1908

R1909
Close to CON400

DNP Close to MIC

Close to BB 1K
C1904 C1910

$$$24488
AU_VIN1_N 7

1uF C1907 4.7uF

33pF R1910 Reserved to enhance TDD performance

C1906 GND
C1903 1.5K
100pF 100pF
tie together and single via to
C1905 C1908 GND plane
33pF
AU_VIN1_P 7 19 HP_MIC
B B

1uF
R1907
Reserved for ACC mode
7 C1909
ACCDET
3300pF
1K

A A

Earphone

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 19 of 36

5 4 3 2 1
 5 4 3 2 1

GT1151 I2C address: 0X5D (Write:0xBA, Read:0xBB)

or 0x14 (Write:0x28, Read:0x29)

LCM Connector
D D

C2001

R2009 DNP
33pF
LCM_LEDA 4
T2004
20,29 LCM_D2P 29 91 TDP2
LCM_LEDK MCF08062G120-T
20,29
29 3 92
GND C2081 33pF
LCM_D2N TDN2

20,29 R2010 DNP

LCM_PWM
9,29 DSI_TE R2013 DNP
9,29 LCM_RST

29 4 T2002 1 9
11,29 LCD_ID1 LCM_CLKP TCP
MCF08062G120-T
11,29 LCD_ID2
29 3 2 9
LCM_CLKN TCN
4,6,7,8,10,13,14,15,16,22,23,24,28,29,31,32,33 VIO18_PMU
R2006 DNP
20,29 LCD_VSP_+5.5V
R2007 DNP
20,29 R2042
LCD_VSN_-5.5V DNP T2003
29 4 1 9
LCM_D1P TDP1
VLDO28_PMU 6,21,29 MCF08062G120-T
10,20,29 29 3 2 9
SDA0 LCM_D1N TDN1

SCL0 10,20,29 R2008 DNP

EINT_CTP 10,29 R2003 DNP
GPIO_CTP_RSTB 10,29
4 T2001
LCM_D0P 29 91 TDP0
MCF08062G120-T

1
29 3 92
LCM_D0N TDN0
1

DNP R2004 DNP

D2002

C C2002 C

0.1uF C2003 C2080 C2079 C2082 C2083

2

1000pF DNP DNP DNP DNP

D2009
2
GND GND

B B

LCM Backlight LED Driver 40mA L2001

$$$30410

4.7uH

U2002
VBAT 2,4,5,6,7,16,20,21,22,25,30,32,33C1 VIN SW
D1

10 B1 D3
GPIO_LCM_BIAS_ENP ENP REG1
11 A1 E2
GPIO_LCM_BIAS_ENN ENN REG2

$$$14945
B210,20,29 E3 FB20021 2 1000ohm@100MHz
20,29
SCL0 SCL OUTP LCD_VSP_+5.5V
C210,20,29 A2 FB20031 2 1000ohm@100MHz
20,29
SDA0 SDA OUTN LCD_VSN_-5.5V
B3 C3
E1 PGND1 CFLY1 A3

$$$27267
PGND2 CFLY2
together then single via to main GND

$$$27270
D2
AGND
L2002 ICN7516E C3554 C3555
FB700 10uH C2077 C2074 22pF 22pF
[2,4,5,6,7,16,20,21,22,25,27,30,32] VBAT
0 WSB5543W-2/TR
2 1 1
FB2001 2 1000ohm@100MHz C2078 C2012 2.2uF 4.7uF
LCM_LEDA [20,29]
22uF 0.1uF
C2076
U2003 D2001 C2075 4.7uF
4.7uF
$$$21107 6 1
VIN FB LCM_LEDK [20,29]
R2030 0 $$$18074 5 2
[20,29] LCM_PWM CTRL COMP
$$$21341

$$$21108 4 3 GND GND GND GND

SW GND
R2041
R2031 9 DNP 7
DISP_PWM C2008 THM_PAD
R2015 R2016
100K 4.7uF TPS61161 C2095 510K
C2094
A 7101418M001 0.22uF 1.0uF
A
TPS61161 5.1
GND
GND GND

LCM and OVP

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 20 of 36

5 4 3 2 1
 5 4 3 2 1

Rear Camera Connector

Rear camera Qtech(TBD) I2C address: (Write:0x20, Read:0x21)
AF driver DW9714A I2C address (Write:0x1C, Read:0x1D)
D Rear Camera - 13M D

Rear camera Sunwin(OV13853-GA4A-1B) I2C address: (Write:0x6C, Read:0x6D)

AF driver TBD(DW9718S I2C address (Write:0x18, Read:0x19) 9 RDN0

Rear camera Ofilm(OV13855-GA5A-Z) I2C address: (Write:0x6C, Read:0x6D)

9 RDP0
AF driver DW9714 I2C address (Write:0x18, Read:0x19)

J2101

31
32
31
32
15 16
MDN0
RCAM_ID 10 15 16 9 RDN1
DOVDD 1.8V MDP0
6,10,21 14 17
VCAMIO_PMU 14 17
DGND 9 RDP1
DVDD 1.2V 13 18
VCAMD_PMU 6,21 13 18
DGND MDN1
12 19
R3623 12 19
0 MDP1
CAM_CLK0 9,21 XCLK 11 20
11 20
DGND 10 21 DGND
10 21
PD 9 22
MCN
CAM_PDN0 9 9 22
MCP
CAM_RST0 9 RESET 8 23 9 RCN
8 23 DGND
single via to gnd AFGND 7 24
7 24
MDN2 9 RCP
VLDO28_PMU R2132
6,20,29 0 AF_VCC 2.8V 6 25
6 25
MDP2
SDA2 10,21 SDA 5 26
5 26 DGND
SCL2 10,21 SCL 4 27
4 27
DGND MDN3
VCAMA_LDO 21 3 28
3 28
AVDD 2.8V MDP3
VCAMA_PMU R2133
6,21 0 2 29 9 RDN2
2 29
single via to gnd AGND DGND
1 30
1 30
9 RDP2

33
34
C3518 C2101 C2102 C3520 C2103 4700665M001

33
34
C3519 C2104 C2105 C3523 C3522 C3521 C2106 C2107
C 1uF C2108 C
503304-3040
33pF 4.7uF 33pF 33pF 1uF 0.1uF 4.7uF 33pF 33pF 33pF 33pF DNP DNP

GND GND GND GND

9 RDN3

9 RDP3

J2102

25
26
RDP0_A 9
U2101

25
26
DGND 12 13 DGND
12 13 4 1
RDN0_A 9 VBAT 2,4,5,6,7,16,20,22,25,30,32,33
VIN VOUT 21 VCAMA_LDO
MDP0 11 14 SDA 10,21
11 14 SDA2
2
10 15 5 GND 3
MDN0 SCL 10,21 SCL2 11 GPIO_VCAMA_LDO_EN
10 15 SGND EN
DGND 9 16 DGND C2116
9 16 DNP DNP
MCP 8 17 RESET 10
8 17 CAM_RST1

Front Camera Connector RCP_A 9

9
MCN
DGND

MDP1
7

5
7

6
18

19
18

19

20
PD
ID

AGND
9
10

FCAM_ID
CAM_PDN1
C2115
DNP

RCN_A 5 20
4 21
R2101 0 GND GND
MDN1 AVDD 2.8V 6,21 VCAMA_PMU
B 4 21 B
DGND 3 22 DGND
3 22
XCLK 2 23 DVDD 1.2V 6,21
2 23 VCAMD_PMU

Front Camera - 8M DGND 1

1 24
24 DOVDD 1.8V 6,10,21 VCAMIO_PMU

27
28
Front camera (OV8858) I2C address: 0X10 (Write:0x20, Read:0x21)

27
28
RDP1_A 9
ASE5S2410 C2110 C2109
Front camera ofilm (GC8024) I2C address: 0X10 (Write:0x6E, Read:0x6F C2114 C3524 C3525 C3526 C3527
RDN1_A 9
1uF 1uF 1uF 33pF 33pF 33pF 33pF

R2105 0
CAM_CLK0 9,21

C3528

33pF

A A

Camera IF

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 21 of 36

5 4 3 2 1
 5 4 3 2 1

D D

VBAT 2,4,5,6,7,16,20,21,25,30,32,33

BMA421 address KXTJ3-1058-01 address

SDO pin1 to gnd
address pin1 to gnd
CSB pin10 to IOVDD for I2C address 7bit:0x0E
I2C_address 0x18 I2C_address:write 0x1C read:0x1D
I2C_address:write 0x4E read:0x4D
VDD :1.62V to 3.6 VDD :1.71V to 3.6
IOVDD :1.2V to 3.6 IOVDD :1.7V to VDD

KXT126-1063 address MC3433 address C3529 C2203

4
address pin1 to gnd 1uF
vpp pin6 floating 33pF LED2201

R+

G+
CSB pin10 to IOVDD for I2C 7bit device id:0x2D A-SP1942R5G2C-C01-2T
address 7bit:0x1E I2C_address:write 0x5A read:0x5B
I2C_address:write 0x3C read:0x3D
VDD :1.71V to 3.6 VDD :1.8V to 3.6
IOVDD :1.7V to VDD

G-
R-
2

1
VIO18_PMU 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
R2201 150
PCHR_LED 2

SCL1 10,22,25,28,29 ISINK1 2

U2202 R2200

12

11
47

SCL

NC11
1 10 C2205 C2204
2 NC1 NC10 9
SDA1 10,22,25,28,29 SDA GND DNP DNP
C 3 8 C
4 VDD NC8 7
NC4 NC7

INTN

VPP

3
R1
MC3433 U2201 111 LED_RED_EN

R2
LDTC114EN3T5G
EINT_ACC 10

2
C2202
C2201 0.1uF
0.1uF
GND

I2C_address：
0110000 W 0110001

U2203

TP2201 A2 A1
6,24,28
AD0 VDD VIO28_PMU
A3 C1 VIO18_PMU
NC VLOGIC
C2208 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
9 C2 B1
MAG_SENSOR_RST RSV VSS C2209
10,22,25,28,29 C3 4700nF
SDA1 SDA
10,22,25,28,29 B3
SCL1 SCK 0.1uF
B B

QMC7983

A
Sensor and indicator A

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 22 of 36

5 4 3 2 1
 5 4 3 2 1

D D

SD CARD close to card R2314

10 MSDC1_CMD
22

J2903 J2904 close to CPU R2315

10 MSDC1_CLK
S1A P1A
SIM1_VCCA SD_DAT2A 22

SIM1
S1B P1B
S1C SIM1_VCCB SD_DAT2B
SIM1_VCCC P2A
R2301 S2A SD_CD/DAT3A P2B
SIM1_SCLK 11 $$$17484

SIM1_RSTA SD_CD/DAT3B
47 S2B
R2302 S2C SIM1_RSTB P3A
22 R2316
SIM1_SIO 11 $$$17488 $$$21046 close to CPU 10 MSDC_1__DAT2
SIM1_RSTC SD_CMDA P3B
R2303 100 S3A SD_CMDB 22 R2317
SIM1_SRST
$$$17570
11 $$$21160 close to CPU 10 MSDC_1__DAT3
S3B SIM1_CLKA P4A
100 SIM1_CLKB SD_VDDA 22 R2318
S3C P4B $$$21236 close to CPU 10
SIM1_CLKC SD_VDDB MSDC_1__DAT0
R2304 2.2 S4A P5A close to CPU 22 R2319
VSIM1_PMU 6,13 $$$21680

SIM1_I/OA SD_CLKA 23 VMCH_SD 10 MSDC_1__DAT1

S4B P5B
S4C SIM1_I/OB SD_CLKB

1
D2307 D2308 D2309 SIM1_I/OC P6A GND

D2301
C2303 DNP DNP DNP SD_VSSA
S5A P6B
S5B SIM1_VPPA SD_VSSB

2
GND GND GND SIM1_VPPB
1uF S5C P7A
SIM1_VPPC SD_DAT0A P7B
GND S6A SD_DAT0B
C S6B SIM1_GNDA P8A C
GND S6C SIM1_GNDB SD_DAT1A P8B
SIM1_GNDC SD_DAT1B Shielding connect to ground
SG2301
$$$16267 R2366
10 1K
3.2.03.0582 3.2.04.0220 EINT_SD
R2367 1K

SIM2_SCLK 11
R2305 $$$17493
SIM2 S1A
S1B SIM1_VCCA Detect
C14
9,23 INT_SIM1

S1C SIM1_VCCB

D2318
R2395 47 SIM1_VCCC D2303
SIM2_SIO 11 $$$17495

100 S2A H1
R2385 S2B SIM1_RSTA NPTH1 DNP

2
$$$17498
SIM2_SRST 11 SIM1_RSTB
100 S2C
SIM1_RSTC D2310 D2311 D2312 D2313 D2314 D2315
GND GND DNP DNP DNP DNP DNP DNP
S3A C1
R2308 2.2 S3B SIM1_CLKA GND1 C2
VSIM2_PMU 6,13 $$$21758

SIM1_CLKB GND2
S3C C3
SIM1_CLKC GND3 C4
GND4

1
D2304 D2306 S4A C5

D2302
D2305 GND
C2301 DNP DNP DNP S4B SIM1_I/OA GND5 C6
S4C SIM1_I/OB GND6 C7

2
1uF SIM1_I/OC GND7 C8
GND GND GND S5A GND8 C9
S5B SIM1_VPPA GND9 C10
GND
S5C SIM1_VPPB GND10 C11
SIM1_VPPC GND11 C12
S6A GND12 C13
S6B SIM1_GNDA GND13
S6C SIM1_GNDB
GND SIM1_GNDC
J2901 3.2.16.0069

J2902 3.2.03.0582

B B

R2321

DNP
Q2302

S 2
6 VMCH_PMU

D
VMCH_SD 23 3

1 $$$19180

C2302 G R2313
4.7uF
WPM1488-3/TR

A
GND
10K

SIM and TF A

Q2

3
WNM2046-3/TR

D
VIO18_PMU 4,6,7,8,10,13,14,15,16,20,22,24,28,29,31,32,33

R2309

1 G

S
10K

2
INT_SIM1 9,23
Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 23 of 36

5 4 3 2 1
 5 4 3 2 1

D D

C
KEY C

Volume Up : HOME Key / GND

Volume Down : KPCOL0/GND
DO NOT put pull-up resistor on PWRKEY

DEBUG_KYPD_PWR_N 30

PWRKEY R2401 2 2.2K

J2401
ASE5S1010
1

C600 VIO18_PMU 4,6,7,8,10,13,14,15,16,20,22,23,28,29,31,32,33

D2401
0.1uF 4700595M001

8
DNP VIO18_PMU 5 6 9 SPI0_B_CLK
2

6 5 6
5 6,22,28 4 7 9 SPI0_B_CSB
VIO28_PMU 4 7
4
GND 3 10 R2407 10K 3 8 9
FP_ID 3 8 SPI0_B_MI
HOMEKEY R2404 2 2.2K 2
DEBUG_HOMEKEY 30 1 10 2 9 9 SPI0_B_MO
FP_INT_N 2 9
KPCOL0 R2402
10 2.2K 10 1 10
J2402 FP_RST

7
1 10
DEBUG_KPCOL0 30
13 11

5
G3 G1
1

D2404 D2405 14 12 D2407

5
DNP D2402 G4 G2
2

DNP
2

GND GND C2401 C2402

1
0.1uF 1uF D2406
GND

2
2
B B

A A

Key and Fingerprint

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 24 of 36

5 4 3 2 1
 5 4 3 2 1

D D

C C

Flash LED 5V Boost

Flash LED I2C address: 0X63 (Write:0xC6, Read:0xC7) C2501 C2503
U2501 10uF 33pF

L2501 A2 C1
1uH IN OUT
40mil
N48243675 B1
VBAT 2,4,5,6,7,16,20,21,22,30,32,33 SW D3
C3 LED1

$$$11945
C2502 C2504
B2 TORCH
10
GPIO_FLASH_STROBE
C2 STROBE
10 D1
GPIO_FLASH_EN
D2 HWEN LED2
10uF DNP
A3 TX
10,22,28,29
SDA1
B3 SDA
10,22,28,29 A1
SCL1 SCL GND LED2501

2
AW3643
LED2502

2
R2501 R2502
DNP DNP 7101917M001 C3530

C3531 33pF

1
GND A-SL680CW1D-HA3-2T
33pF

1
GND

GND

B B

A A

Flash LED

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 25 of 36

5 4 3 2 1
 5 4 3 2 1

S5
S4

D S3 20 21 D
S2 dura_shielding_3 20 21 17 18
S1 19 22 17 18
dura_shielding_2 19 22 16 19
dura_shielding_1 18 23 16 19
18 23 15 20
17 24 15 20
1 17 24 14 21
1 16 25 14 21
1 2 16 25 13 22
1 1 2 15 26 13 22
1 2 3 15 26 12 23
2 2 3 14 27 12 23
2 3 4 14 27 11 24
3 3 4 13 28 11 24
3 4 5 13 28 10 25
4 4 5 12 29 10 25
4 5 6 12 29 9 26
5 5 6 11 30 9 26
5 6 7 11 30 8 27
6 6 7 10 31 8 27
6 7 8 10 31 7 28
7 7 8 9 32 7 28
7 8 9 9 32 6 29
8 8 9 8 33 6 29
8 9 10 8 33 5 30
9 9 10 7 34 5 30
9 10 11 7 34 4 31
10 10 11 6 35 4 31
10 11 12 6 35 3 32
11 11 12 5 36 3 32
11 12 5 36 2 33
12 12 4 37 2 33
12 4 37 1 34
C
13 3 38 1 34 C
13 14 2 3 38 39
14 1 2 39 40
1 40

dura_shielding_rf
dura_shielding_cpu

S6

12 13
11 12 13 14
B
10 11 14 15
B

9 10 15 16
8 9 16 17
7 8 17 18
6 7 18 19
5 6 19 20
4 5 20 21
3 4 21 22
2 3 22 23
1 2 23 24
1 24 25
25

dura_shielding_power
A A

Title
<Title>

Size Document Number Rev

A <Doc> <RevCode>

Date: Wednesday, April 04, 2018 Sheet 26 of 36

5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

NFC Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 27 of 36

5 4 3 2 1
 5 4 3 2 1

D D

C C

I2C slave address: 0X48

4,6,7,8,10,13,14,15,16,20,22,23,24,29,31,32,33
VIO18_PMU

6,22,24,28 6,22,24,28
VIO28_PMU VIO28_PMU

R2801
LTR-578ALS-034WA
DNP
9 EXP_PAD SDA 1 10,22,25,29 SDA1
R3009 SCL 7 10,22,25,29 SCL1
5
LEDA 2
22 INT 10 EINT_ALPS
6
GND 3
8 LDR 4
VDD LEDK

$$$11950
U3445 C2803 C2804
C2805
C2801 DNP DNP
C2802
1uF DNP 1uF
GND GND
GND GND

B B

ALP-SENSOR
A A

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 28 of 36

5 4 3 2 1
 5 4 3 2 1

D D

LCM Connector
GT1151 I2C address: 0X5D (Write:0xBA, Read:0xBB)
or 0x14 (Write:0x28, Read:0x29)

52 54 29,30
P2 G2 VBUS_IN
51 53
P1 G1
10,20 1 50 10,20
EINT_CTP 1 50 SDA0
2 49 U2900
GPIO_CTP_RSTB 10,20 2 49 10,20 SCL0

6,20,21 3 48 A2 A1 29,30
VLDO28_PMU 3 48 VOUT1 VIN1 VBUS_IN
2,4,29
4 47 20
4 47 LCM_D2P
2,4,29 B2 B1
VBUS VOUT2 VIN2

3
C
20 5 46 20
C
LCM_LEDA 5 46 LCM_D2N
D2900
6 45 C2 C1 R2900 ES15P4N3A
6 45 GND OVLO C3491 C3493
LCM_LEDK 20 7 44 20
0.1uF 1.0uF
7 44 LCM_D1P ET9523L 75K

2
DSI_TE 9 8 43 20
8 43 LCM_D1N

LCM_PWM 20 9 42
9 42

1
LCM_RST 9,20 10 41 20
10 41 LCM_CLKP
D2901
11 11 40 20 ES07DP
LCD_ID1 11 40 LCM_CLKN
R2903
12
4,6,7,8,10,13,14,15,16,20,22,23,24,28,31,32,33 39
VIO18_PMU

2
12 39
18K U2901
20 13 38 20
LCD_VSP_+5.5V 13 38 LCM_D0P
6 1
20 14 37 20 D3 D1
LCD_VSN_-5.5V 14 37 LCM_D0N
5 2
11 15 36 GND GND D4 D2
LCD_ID2 15 36
8
9 16 35 R2901
7 1uF D5
LCD_ID3 16 35 AU_VIN0_N
R2904
6 17 34 C2904 100pF 7
VIBR_PMU 17 34 S1 3 10 USB_MOS_CTRL
18 33 R2902 1uF 4 G
SUB_BOARD_ID2 11 18 33 7,18 AU_MICBIAS0 7 AU_VIN0_P S2
19 32 1K
SUB_BOARD_ID1 11 19 32 WNM3017-6/TR
R2905
20 31 10K
SDA1 10,22,25,28 20 31 31 OUTC

10,22,25,28 21 30 31 C2905 C2906

SCL1 21 30 OUTB
33pF 33pF
22 29 6,31,32,34
[10] INT_SAR_SENSOR 22 29 LTE_VFE28
23 28 11 BPI_ANT1
23 28
16,30 24 27 11 BPI_ANT0
USB_HS_DP 24 27
16,30 25 26 16,30
USB_HS_DM 25 26 USB_ID_CON

505066-5020
J2900

B B

A FPC connector and OVP A

Title
<Title>

Size Document Number Rev

D <Doc> <RevCode>

Date: Wednesday, April 04, 2018 Sheet 29 of 36

5 4 3 2 1
 5 4 3 2 1

D D

TP2705 TP2706 TP2707

TP2700 TP2716 TP2715

Test Point
DEBUG_KPCOL024
USB_HS_DM 16,29

DEBUG_HOMEKEY
24
USB_HS_DP 16,29

VBUS_IN 29 DEBUG_KYPD_PWR_N
24

C C

TP2711 TP2712 TP2714 TP2725

MARK1 MARK2 MARK3 MARK4 MARK5 MARK6

VBAT 2,4,5,6,7,16,20,21,22,25,32,33

HL1 HL2 HL3

DEBUG_BATERY_ID
16
HL5 HL6 HL7 HL8 HL9 HL10 HL11
HL4

USB_ID_CON 16,29
1 1 1 1 1 1 1
1

PCBA AUTOMATIC TEST point

B B

JTAG
TP2742
9 IO_JTAG_TCK
TP2743
TP2736 9 IO_JTAG_TMS
MD_UTXD0 R3001 1K TP2744
9
TP2737 9 IO_JTAG_TDI
MD_URXD0 R3002 1K TP2745
9
TP2732 9 IO_JTAG_TD0
SYSRSTB
2,8
TP2734
UTXD0 R3003 1K
10
TP2733 TP2720
URXD0 R3004 1K JTDO
10 8

TP2723 TP2724
JTDI JRSTN
8 8

TP2727
JTCK
8
TP2729 TP2730
JTMS
8

Test point
A A

Title
Dura_Mainboard

Size Document Number Rev

D <Doc> A

Date: Wednesday, April 04, 2018 Sheet 30 of 36

5 4 3 2 1
 5 4 3 2 1

D D
GND

G10

G11

G12
H10

H11
E10

K10

E11

K11
E12
F11
L10

J11
G3

G5

G6

G7

G8

G9
U3101

C3
D3

H3
C4
D4

H4
C5
D5

H5
C6
D6

H6
C7
D7

H7

C8
D8

H8

C9
D9

H9
K2

E4

E5

E6

E7

E8

B9

E9
F3

F4

F5

F6

F7

F8

F9
J7

J8

J9
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
RF_B5_PRX_RFIC 33 B8
PRX1
RF_B1_PRX_RFIC 33 A8
PRX2 F12
VDD_TXHF 6,31 VRF18_RFIC
RF_B3_PRX_RFIC 33 B7
PRX3
RF_B28B_PRX_RFIC 33 A7
PRX4 L11
VDD_STXLV 6,31 VRF12_RFIC
RF_B40B41_PRX_RFIC 32 B6
PRX5 C3101
RF_B2_PRX_RFIC 33 A5 100nF
PRX6 J10
VDD_STXHF 6,31 VRF18_RFIC
RF_B8_PRX_RFIC 33 B5
PRX7 C3102
RF_B7_PRX_RFIC 33 A4 100nF
PRX8 PRX E3
VDD_RXLV 6,31 VRF12_RFIC
RF_B34B39_PRX_RFIC 33 B4
SWHB C3103 GND
RF_B28A_PRX_RFIC 33 B3 100nF
SWLB G2
VDD_RXHF 6,31 VRF18_RFIC
RF_B1_DRX_RFIC 34 A2
DRX1 C3104 GND
A1 GND 100nF
RF_B41_DRX_RFIC 34 DRX2
B2
DRX3 MT6177M BSI_D2
J2 C3105 GND
RF_B3_DRX_RFIC 34 B1 100nF
DRX4 J1
BSI_D1 11 RFIC0_BSI_D1
RF_B7_DRX_RFIC 34 C2
DRX5 BSI H2 GND
BSI_D0 11 RFIC0_BSI_D0
RF_B40_DRX_RFIC 34 D1
DRX6 DRX K1
BSI_CLK 11 RFIC0_BSI_CK
RF_B34B39_DRX_RFIC 34 D2
DRX7 H1 GND
BSI_EN 11 RFIC0_BSI_EN
RF_B5_DRX_RFIC 34 E1
DRX8
RF_B8_DRX_RFIC 34 E2 R3102 18
DRX9 L7
TXDET1 33 RF_TXDET
F2
DRX10
R3101
2K R3103 R3104
G1 300 300
RCAL GND
RF_LTE_HB_TX_RFIC 32 D12
C TXO1 C

RF_LTE_MB_TX_RFIC 32 C12 G4 2,8 SRCLKENA1

TXO2 TXO XO EN_BB
RF_2G_HB_TX_RFIC 33 A12
TXO3(2G) DRX(I/Q) PRX(I/Q) TX(I/Q) DET(I/Q) L1 GND GND
VIO 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
VIO18_RFIC
RF_2G_LB_TX_RFIC 33 A10
TXO4(2G)

RX2_BBQN

RX1_BBQN
RX2_BBQP

RX1_BBQP
C11 L2 2

RX2_BBIN

RX1_BBIN

STX_MON
RX2_BBIP

RX1_BBIP

TX_BBQN
TX_BBQP
TX_GND1

TX_GND2

TX_GND3

TX_GND4

TX_GND5
RF_LTE_LB_TX_RFIC 32 PMIC_CLK_RF

TX_BBIN
TXO5 XO_IN

TX_BBIP

DET_QN
DET_QP
DET_IN
DET_IP
C3106
100nF

B10

B12

C10

D10

D11

J3

J4

L4

K4

L5

K5

J6

J5

H12

J12

L12

K12

L9

K9

K7

K8

F10
MT6177M

GND

GND Put LC filter (default L=0R, C=NC) close to PMIC output

due to harmonic rejection.

11

11

11

11

11

11

11

11

11

11

11

11

11

11

11

11
LTE_TX_BB0_QP
LTE_TX_BB0_IP

LTE_TX_BB0_QN
LTE_PRX_BB0_QP

LTE_TX_BB0_IN
LTE_PRX_BB0_IP

LTE_DET_BB0_QP
LTE_DRX_BB0_QP

LTE_PRX_BB0_QN
LTE_DRX_BB0_IP

LTE_PRX_BB0_IN

LTE_DET_BB0_IP
LTE_DRX_BB0_QN

LTE_DET_BB0_QN
LTE_DET_BB0_IN
LTE_DRX_BB0_IN
Power domain of MT6177M
B B

VIO18_RFIC
VIO18_RFIC 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
VIO18_PMU
10mil

VRF18_RFIC 6,31 6 VRF18_PMU

20mil

C3107
4700nF

GND
VRF12_RFIC 6,31
6 VRF12_PMU 12mil

C3108
4700nF

GND

4.7uF close to RFIC for better Ripple Performance

A RF MT6177 A

Title
<Title>

Size Document Number Rev

D <Doc>

Date: Wednesday, April 04, 2018 Sheet 31 of 36

5 4 3 2 1
 5 4 3 2 1

B28B/20 TX L3230
RF_B28B_PA_DPX 33
6.8n

C3237 C3238
0.5pF DNP

D
B8 TX GND

L3231
GND

D
RF_B8_PA_DPX 33
2.7n

C3239
DNP
C3240
DNP
L3229
B28A TX
33 RF_B28A_PA_DPX
6.8n

GND GND C3235 C3236

1.5pF DNP

B1 TX
RF_B1_PA_DPX 33
L3232

1.0n
GND

L3228
GND
B5 TX
33 RF_B5_PA_DPX
10n
C3241 C3242
DNP DNP
C3233 C3234

GND GND
1.8pF DNP

L3225
C3217
3G/4G_PAIN_LB
B3 TX C3243 GND GND 9.1n

33pF
31 RF_LTE_LB_TX_RFIC

RF_B3_PA_DPX 33
L3233 L3234 C3209 C3210
6.8n 1.5pF 3.9n 3.3pF 3.3pF

From PMIC
B2 TX GND

L3235
GND
GND GND

RF_B2_PA_DPX 33
1.5n

C3245 C3244 L3226

C3218
3G/4G_PAIN_MB LTE_VMIPI
10mil
4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
VIO18_PMU

DNP 0.5pF 31 RF_LTE_MB_TX_RFIC 10mil

3.6n
U3202 C3226

21
20
19
18
17
16
33pF 1uF
GND GND C3212 C3211

MB1
LB5
LB1
LB2
LB3
LB4
2.2pF 1.5pF
VPA_VCC2 5,32 22 15
C 23 GND22 GND15 14 GND C
24 MB2 GND14 13
GND24 RFIN_L 12 10mil
LTE_VFE28
10mil
C3246 C3247
25
26 MB3
MB4
RFIN_M 11
NC1 10
GND GND V28 to FEM LTE_VFE28 6,29,31,32,34 6,29,31,34 VFE28_PMU

0.47uF 100pF 27 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33

LTE_VMIPI
GND27 NC2 9

L/M/H PA
28
29 VCC2_2 NC3 8 C3227
VCC1 VBAT 7 2,4,5,6,7,16,20,21,22,25,30,32,33
VBAT_RF
30 1uF
GND GND 31 VCC2 VIO 6
32 GND31 SCLK 115 MIPI0_SCLK
VPA_VCC1 5,32 B34/39 SDATA 114 MIPI0_SDATA
33 C3213 C3214
34 HB1 GND4 3 GND
GND34 RFIN_H 2 100pF 100nF
35
C3248 C3249 36 HB2 GND2 1
GND36 GND1 80mil
0.47uF 100pF 80mil

GND38

GND40

GND43
VBAT to TXM VBAT_RF 2,4,5,6,7,16,20,21,22,25,30,32,33 2,4,5,6,7,16,20,21,22,25,30,33
VBAT

HB3

HB4

RX1
RX2
GND GND

GND GND C3220

3G/4G_PAIN_HB
37
38
39
40
41
42

43
VPA_VCC2 5,32 GND 1nF C3219 C3228
L3227 10mil DNP
31 RF_LTE_HB_TX_RFIC VPA_VCC1 5,32
4.3n
GND GND GND
C3550 8.2pF GND
0.47uF C3542

B34/39 TX 100pF R3215

DNP
C3215
1pF
C3216
1.2pF

U3203 GND
BF1608-L1R9NDB GND
共焊盘
RF_B34B39_TX_TXM 33
L3340
1
IN/OUT1 IN/OUT2
3
L3339
GND
C3516
GND GND
C3517 靠 近Transceive
r 60mil
1.8n 1.8n 50mil
50mil
2 4 VPA_VCC2 5,32 5 VPA_PMU
GND1 GND2
C3443 C3444 C3441 C3442 DNP U3442 DNP C3510 C3265
C3549
DNP DNP DNP DNP L3241
5 3 31 RF_B40B41_PRX_RFIC

B40 TRX
RF-IN RF-OUT C3229 C3230 C3231
1.8n
DNP 470nF 2200nF 2200nF
GND GND GND GND 6 2 8.2pF 8.2pF
C3263 ENABLE VCC
F6HH2G350EH71 GND
U3204 C3462
DNP
4
GNDRF GND
1 共焊盘 C3546
DNP C3264 GND
L3237 L3240 DNP GND GND
RF_B40_TRX_TXM 33 4 1
OUT IN GND MXD8015H
1.8n 1.8n
C3509
B 33pF 33pF GND GND B
GND BPI_BUS17 11
5
3
2

C3255 C3261 C3262 C3450 C3254 GND GND 6,29,31,32,34 LTE_VFE28

DNP DNP DNP DNP DNP
5
3
2

C3508
GND 100nF
Note:
GND GND GND GND
Reserve one tuning cap. For PMIC VPA total cap requirement,
GND C3257
GND the total cap at RF side should be in 6.2uF +/-10%.
RF_B7_PA_DPX 33
L3238

B7 TX C3258
DNP
2.2pF 3.6n

B41 TRX GND GND

共焊盘 VIO18_PMU
4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32,33
U3424
L3342 L3341
RF_B41_TRX_TXM 33 4 1 R3214
OUT IN 390K
1.8n 1.8n

GND
C3447 C3448 C3445 C3446
5 5
3
2 2

DNP DNP
F6FC2G595H4PD DNP DNP AUX_IN1_NTC 11
3

GND GND GND GND C3232 NTC3201

1uF 100K

t
C3543
DNP GND
GND GND

NTC3201 close to PA , and located in the same layer

33 RF_DCS_RX

A A

RF TX

Title
<Title>

Size Document Number Rev

D <Doc> <RevCode>

Date: Wednesday, June 26, 2019 Sheet 32 of 36

5 4 3 2 1
 5 4 3 2 1

2,4,5,6,7,16,20,21,22,25,30,32
VBAT_RF

1
C3370 C3371 C3372 D3300
10pF 1nF 22uF D3301
RF_TXDET 31

2
2
GND GND GND
GND
GND
R3216
U3206

19

18

17

16

15

14

13

12
SKY77916-11 11 VRAMP_DCDC

GND18

GND16

GND15

GND14

GND13

GND12
NC

CPL_O
6.8K
CN1 C3373 R3622
CN2 1180110044 20 11 220pF DNP
GND20 GND11
4 21 10
GND3 OUT IN GND21 VBAT
L3244
3 1 2 1 22 9 GND GND
D GND2 S ANT VCC D
2.2n 4,6,7,8,10,13,14,15,16,20,22,23,24,28,29,31,32
LTE_VMIPI

GND1
GND2
2 23 8
GND1 GND23 VRAMP
C3379 C3378 24 7
TRX14 VIO C3374
RFR40-060A010 DNP 1pF

3
4
GND GND 25 6 1nF
TRX13 SDATA
26 5
GND GND TRX12 SCLK
RF_B40_TRX_TXM 32 27 4 GND 11
TRX11 GND4 MIPI1_SDATA
GND
共焊盘 RF_B41_TRX_TXM 32 28
TRX10 RFIN_H
3 11 MIPI1_SCLK

33 29 2 R3217
RF_B28A_TRX_TXM TRX9 RFIN_L 100
DNP C3460
共焊盘 30
TRX8 GND1
1 C3375
33pF

GND38
RF_B34B39_PRX_TXM 33
22pF C3459 39

TRX7

TRX6

TRX5

TRX4

TRX3

TRX2

TRX1
GND39

RF_B7_TRX_TXM 33
GND

31

32

33

34

35

36

37

38
C3376
R3218
C3553 31 RF_2G_HB_TX_RFIC
DNP RF_B2_TRX_TXM 33
R3219 R3220

B1 TRX U3207
RF_DCS_RX
32
RF_B8_TRX_TXM 33
GND DNP 0 DNP 33pF
2G_PAIN_HB
GND GND
C3380 3 32
TX RF_B1_PA_DPX
33 C3377
RF_B3_TRX_TXM R3221
33 6 C3387
RF_B1_TRX_TXM ANT
L3248 31 RF_2G_LB_TX_RFIC
L3246 L3245 1 31 RF_B1_PRX_RFIC

2G_PAIN_LB
22pF GND RX R3222 R3223
DNP 2.2n 2n RF_B28B_TRX_TXM 33
DNP 0

8
7
5
4
2
L3247 L3249 DNP C3458 DNP 33pF
SAYEY1G95GA0F0A 4.7n 5.1n 22pF

8
7
5
4
2
RF_B34B39_TX_TXM 32
GND GND 22pF C3457
GND GND
GND GND 共焊盘

RF_B1_TRX_TXM 33
GND
RF_B5_TRX_TXM 33
C C

B2 TRX U3208

TX
3 32 RF_B2_PA_DPX
L3251
33 6 C3381 C3388
RF_B2_TRX_TXM ANT
2.2n
1 31 RF_B2_PRX_RFIC
L3250 GND RX
8
7
5
4
2

4.7n L3252
C3552 SAYEY1G88BA0B0A 2.7n 15pF 22pF
8
7
5
4
2

DNP C3382
DNP

GND
GND
GND
GND
GND

B8 TRX U3213

3 32
TX RF_B8_PA_DPX
L3267
33 6 C3399 L3270
RF_B8_TRX_TXM ANT
3.3n
L3268 L3269 1 31 RF_B8_PRX_RFIC
GND RX
DNP 7.5n

8
7
5
4
2
SAYEY897MBA0B0A 33pF 33pF

8
7
5
4
2
C3400 C3401
GND GND DNP 3.9pF

GND GND

GND
B B

B3 TRX U3210
B28A PRX U3214

C3385 3 32 3 32
TX RF_B3_PA_DPX TX RF_B28A_PA_DPX
L3271
33 6 C3386 C3390 33 6 C3404
RF_B3_TRX_TXM ANT RF_B28A_TRX_TXM ANT
5.1n L3273
L3257 L3258 1 31 RF_B3_PRX_RFIC L3272 1 31 RF_B28A_PRX_RFIC
22pF GND RX GND RX
4.7n DNP 10n 4.7n
8
7
5
4
2

8
7
5
4
2
L3259 L3260 C3402 L3274 L3275
SAYEY1G74BC0B0A 2.7n 3.9pF DNP 22pF 1.2pF DNP DNP 33pF
8
7
5
4
2

8
7
5
4
2
GND GND SAYEY806MBA0F0A
GND

GND GND GND GND GND

GND GND

B28B/20 PRX U3423

B5 TRX U3211

3
RF_B28B_TRX_TXM 33
C3405

6
ANT
TX
3 32 RF_B28B_PA_DPX
C3403 C3407
L3261 TX 32 RF_B5_PA_DPX
L3277 L3278 1 31 RF_B28B_PRX_RFIC
6 C3391 C3393 GND RX
RF_B5_TRX_TXM 33 DNP 33pF 7.5n
ANT

8
7
5
4
2
L3279 L3280
L3263 L3262 1 31 RF_B5_PRX_RFIC SAYEY733MBC0F0A 33pF DNP 3.3pF C3406 10n 33pF

8
7
5
4
2
1.5n GND RX L3276
DNP 7.5n
8
7
5
4
2

L3264 GND GND DNP

SAYEY836MBA0F0A 2.7pF 10n 22pF
8
7
5
4
2

C3392 GND GND

GND GND DNP
GND
GND

GND GND

GND

B7 TRX U3212
B34/39 PRX
RF Prx A

C3453 U3425 C3512

3 32
TX RF_B7_PA_DPX
L3265 33 1 3 31 RF_B34B39_PRX_RFIC
RF_B34B39_PRX_TXM I/O1 I/O2
33 6 C3396 C3398
RF_B7_TRX_TXM ANT
3n L3343 L3344 L3345 L3346
L3266 1 31 RF_B7_PRX_RFIC DNP 33pF 7.5n 2 4 DNP 3.3pF C3454 10n 33pF
GND RX GND1 GND2
DNP
8
7
5
4
2

C3394
1.5pF SAYEY2G53BA0F0A 8.2pF 8.2pF FI168B1888GL-T
8
7
5
4
2

C3395 C3397 GND GND GND GND

GND 1pF DNP Title
<Title>
GND
GND Size Document Number Rev
GND GND D <Doc> <RevCode>

GND Date: Wednesday, April 04, 2018 Sheet 33 of 36

5 4 3 2 1
 5 4 3 2 1

ANT1 ANT3 CN3

ANT3412 1180110044

C3419 C3418 C3417 U3412

OUT IN
2 1 13
ANT 3
RF1 34 RF_B34B39_DRX_ASM

GND1
GND2
L3285
33pF 33pF 33pF 47n 9 34 RF_B7_DRX_ASM
C3422 C3421 C3420 RF2
DNP DNP DNP 11 7 2 34 RF_B40_DRX_ASM
BPI_BUS7

3
4
6 VC1 RF3
BPI_BUS8 11 VC2
GND 11 5 10 34 RF_B3_DRX_ASM
BPI_BUS9 VC3 RF4
D GND GND GND 1 34 RF_B5_DRX_ASM
D
GND RF5
GND C3426 C3424 C3425 11 34 RF_B41_DRX_ASM
C3423 RF6
4 14 34 RF_B8_DRX_ASM
TP3400 TP3401TP3402 56pF 56pF 56pF VDD RF7
12 34 RF_B1_DRX_ASM
DNP 15 RF8
U3421 DNP GND 8
L3336 NC
GND GND GND
10 1 GND
RFC RF1 RTC8618
2 LTE_VFE28 6,29,31,32,34
4 RF2 L3414 DNP
LTE_VFE28 6,29,31,32,34 VDD 9
5 RF3 L3337 DNP GND
BPI_BUS5 11 VCTL1
11 6 8 C3428 C3427
BPI_BUS6 VCTL2 RF4
10nF 33pF
L3338 DNP

3 GND1
7 GND2
C3438 RF1694 GND GND
C3408 C3440 C3439

DNP 56pF 56pF

10nF

GND
GND GND GND GND

ANT TUNER

共焊盘
共焊盘 L3408

L3407
DNP
DNP
C
B1/B4 DRX U3413 U3435 C3513 C3429
C

L3286 L3289
RF_B1_DRX_ASM 34 1 4 5 3 31
IN OUT RF-IN RF-OUT RF_B1_DRX_RFIC
2n 2n
L3287 L3288
DNP GND DNP 6 2 22pF 22pF
ENABLE VCC L3415
2 2
3
5 5

SAFFB2G14AA0F0A DNP L3290

3

4 1 DNP
GND GND GNDRF GND

MXD8015H
C3497 GND GND
33pF GND 6,29,31,32,34 LTE_VFE28
GND
GND 11 C3494
BPI_BUS1 100nF
GND
共焊盘
共焊盘 L3410

B3/B2 DRX L3409 DNP

DNP

U3414 U3436 C3514 C3430

L3291 L3294
RF_B3_DRX_ASM 34 1 4 5 3 31
IN OUT RF-IN RF-OUT RF_B3_DRX_RFIC
2n 2n
L3321 L3292 L3293
DNP DNP GND DNP 6 2 L3416 22pF 22pF
ENABLE VCC L3295
2 2
3
5 5

DNP
SAFFB1G84AB0F0A DNP
3

4 1
GND GND GND GNDRF GND

C3498
33pF
MXD8015H
C3495
GND
GND
B41  DRX U3419 C3435
GND 11 GND 6,29,31,32,34 LTE_VFE28 L3322 L3326
BPI_BUS3
GND RF_B40_DRX_ASM 34 1 4 31
IN OUT RF_B40_DRX_RFIC
2n 1.5n
GND 100nF L3324 L3323 L3325 L3327
B

B5 DRX DNP DNP GND 3.9n DNP 22pF B

2 2
3
5 5
U3415 C3431 SAFFB2G35AA0F0A

3
L3296 L3299
RF_B5_DRX_ASM 34 1 4 31 GND GND GND GND
IN OUT RF_B5_DRX_RFIC
2n 2n
L3320 L3297 L3298 L3300
DNP DNP GND DNP DNP 33pF
2 2
3
5 5

SAFFB881MAN0F0A
3

GND
GND GND GND GND

共焊盘

GND 共焊盘 L3412

C3557
B20 DRX C3436
L3332
1
U3426

4
L3333
C3437

RF_B41_DRX_ASM 34 IN OUT 31 RF_B41_DRX_RFIC

1.2n 1.0n

B7 DRX L3411 DNP 22pF L332822pF

L3331
DNP
L3330
DNP GND
L3334
DNP
L3335
DNP 22pF

2 2
3
5 5
DNP DNP
SAFFB2G60AA0F0A

3
U3437 C3515 C3432
L3304 L3306 GND GND GND GND
RF_B7_DRX_ASM 34 1 4 5 3 31
IN OUT RF-IN RF-OUT RF_B7_DRX_RFIC
1.2n 2n GND
L3301 L3303 L3305
DNP DNP GND DNP 6 2 L3417 22pF 22pF
ENABLE VCC L3307
2 2
3
5 5

DNP
U3416 DNP
3

GND GND
SAFFB2G65AB0F0A
GND

C3499
4
GNDRF

MXD8015H
GND
1

GND
B40  DRX L3349
GND

U3427
L3350
C3461

33pF GND RF_B34B39_DRX_ASM 34 1 4 31

C3496 IN OUT RF_B34B39_DRX_RFIC
BPI_BUS16 11 1.2n 1.0n
GND 6,29,31,32,34 LTE_VFE28 L3348 L3347 L3351 L3352
GND DNP DNP GND DNP DNP 22pF
GND GND

2 2
3
5 5
B8 DRX
100nF SAFFB2G35AA0F0A

3
GND GND GND GND
U3417 C3433
L3310 L3312
RF_B8_DRX_ASM 34 1 4 31
IN OUT RF_B8_DRX_RFIC
4.7n 2n
A L3308
DNP
L3309
DNP GND DNP
L3311
L3313

DNP
33pF
GND
RF Drx A
2 2

5 3
5

SAFFB942MAN0F0A
3

GND GND GND GND

GND

Title
<Title>

Size Document Number Rev

D <Doc> <RevCode>

Date: Wednesday, June 26, 2019 Sheet 34 of 36

5 4 3 2 1
 5 4 3 2 1

D D

10 WB_CTRL5

10 WB_CTRL4

10 WB_CTRL3
VCN18_PMU 6,13,35
10 WB_CTRL2
VCN18_PMU 6,13,35 C3474
10 WB_CTRL1

10 WB_CTRL0
C3475 100nF
C3473
1uF
10 WB_RX_IP

10 WB_RX_IN
100pF

GND
GND

30

29

28

27

26

25

24

23

22

21
ANT3411 ANT1309 ANT1308

NC30

WB_AVDD18

WB_CTRL5

WB_CTRL4

WB_CTRL3

WB_CTRL2

WB_CTRL1

WB_CTRL0

WB_RX_IP

WB_RX_IN
C3538 C2902 U3430
U3431
L2901
5 3 L3354
COM 1.57GHz 4 1
2.2n
C L2902 L3353 ANT TRX C
2.2n
22pF 33pF DNP DNP L3355 L3356 31 20 10 WB_RX_QP
C2901 C2903 2 WB_RF_2G WB_RX_QP
GND DNP DNP
4 GND1 1

5 5
3 3
2 2
DNP DNP
C3537 6 GND2 2.4/5GHz
GND3 SAFEA2G45MB0F0A
DNP 32 19 10 WB_RX_QN
NC32 WB_RX_QN
GND GND GND GND RFDIP1608060TM7T62 GND GND VCN33_PMU 6
GND GND
C3463
GND 33 18 10 WB_TX_IP
WB_AVDD33 WB_TX_IP
GND GND
1uF 34 17 10
C3464 100pF GND WIFI5G_RF WB_TX_IN WB_TX_IN
GND
BEAD3501
VCN28_PMU 1 2 6,35 35 16 10 WB_TX_QP
NC35 WB_TX_QP
600ohm@100MHz
C3465

GND 36 15 10 WB_TX_QN
AVDD28_FM WB_TX_QN

10nF

FM_RX_N_6625 19 37 14 10 GPS_RX_IP
FM_LANT_N GPS_RX_IP

L3359
19 38 13 10 GPS_RX_IN
FM_ANT FM_LANT_P GPS_RX_IN
82n
L3358
DNP
L3357 39 12 10 GPS_RX_QP
GPS_RFIN GPS_RX_QP
DNP

VCN18_PMU 40
6,13,35 11 10 GPS_RX_QN
AVDD18_GPS GPS_RX_QN

AVDD28_FSOURCE
GND GND
41
DVSS

F2W_DATA
C3470

F2W_CLK
FM_DBG
GND

HRST_B
4700pF

SDATA

XO_IN
CEXT
SCLK

SEN
U3433 C3467 U3429
L3362

10
22pF MT6625L
B 1 6 GND
B
GND1 RFOUT GND MT6625 IPD

2 5 DNP GND
U3432 GND2 EN 10 GPIO_GPS_LNA_EN
C3466
L3361 CONN_RSTB 10
1 4 3 4 6,35 VCN28_PMU
IN OUT RFIN VCC
10n 10,35 CONN_XO_IN
L3360 F2W_DATA 10
DNP GND 18pF MXDLN16G
C3471 C3472
2 2
3
5 5

SAFFB1G58KA0F0A F2W_CLK 10 1uF 100pF

3

C3468
1uF C3551
22pF CONN_SCLK 10
GND U3434
CONN_SDATA 10 R3224
GND
1 4 6,35 VCN28_PMU
GND GND GND GND1 VCC
CONN_SEN 10
2 3 0
GND2 OUT C3476
1uF
DSB211SDA
R3225
GND 10,35 CONN_XO_IN

DNP GND

L3363

PMIC_CLK_WCN 2 0

共焊盘

A A

RF WCN Title

Size
Dura_Mainboard

Document Number Rev

Custom<Doc> A

Date: Wednesday, April 04, 2018 Sheet 35 of 36

5 4 3 2 1