5 4 3 2 1

LPDDR3 EMI BPI, APC

RXD ANT
eMMC MSDC0 / eMMC RXD
RxD FEM
RF IQ
D
micro SD
+ hot-plug
MSDC 4-bit
MSDC1
BSI ctrl MT6177 RX
D

Main 1 ANT
ABB
Connectivity ANT
TX FEM
26M_BB
CONN IQ
I/Q 26M_RF

26M_WBG
TCXO
MT6631 CONN ctrl
CONN IF

LCD LCD IF LCD

module (MIPI DSI)

Camera IF Camera
Camera (MIPI CSI)
Modules I2C
C
I2C_2 / I2C_4 C

I2C 26M_RF
MT6357
CTP I2C_0
controller 26M_BB

MEMs & ALS/PS

I2C
I2C_1
MT6762 26M_WBG

32K_BB
DCXO / TMS
26M

FPS
SPI
I2C_3

SPI_1
(SBS) LDOs LDOs RTC Headset

Vibrator VIB
SPI SPI_4 Bucks
G-Sensor
Bucks HPL,HPR,AU_VIN1
GPIOs SPI
AUD I/F
Audio I/F Receiver
Audio AU_VIN0
SPI Speech
SIM1 PWRAP I/F
B SIM1 SIM1 B

SIM2 BC1.1
BC 1.1 AU_LO
SIM2 SIM2 SPK Driver
VSYS
GPIOs / EINTs
EINT
PERI. Device
PERIPHERAL_EN

Keypad Keypad
I2C Flash driver Flash&Torch
I2C_6
JTAG
Debug UART MSDC1/SPI Pin-MUX
port JTAG
Backlight LCM & CTP
driver

I2C
I2C_5 LCM Bias

A A
USB2.0
Charger VBAT Battery

VBUS
USB 2.0 Micro-USB
USB 2.0

5 4 3 2 1
 5 4 3 2 1

D D

[2,5] VA12_PMU

C209

U300F 100nF
[4] DVDD_MODEM U300E DVDD_CORE [2,4]
MT6762-SBS
MT6762-SBS GND AVDD & MD_A GND
[2,4] AVDD18_SOC
DVDD_MODEM_6357_FB [4]
MODEM GPU C201 10uF AG21
[2,4]
AVDD12_MD AVDD18_SOC
DVDD_MODEM_6357_GND [4] [2,4] AVDD18_SOC
R9 K20 C200 10uF A11 AG19
T10 DVDD_VDD_MODEM1 DVDD_MFGSYS1 L19 A13 DVSS1 AVDD18_MD
U9 DVDD_VDD_MODEM2 DVDD_MFGSYS2 L20 A15 DVSS2
SG201 SG200 U13 DVDD_VDD_MODEM3 DVDD_MFGSYS3 M20 B3 DVSS3 AG18
V10 DVDD_VDD_MODEM4 DVDD_MFGSYS4 N19 B21 DVSS4 AVDD18_AP AC18 C213 C214 C206
V13 DVDD_VDD_MODEM5 DVDD_MFGSYS5 N20 C2 DVSS5 AVDD18_CPU
DVDD_VDD_MODEM6 DVDD_MFGSYS6 DVSS6 1uF 1uF 1uF
W9 P20 C6
C202 22uF W10 DVDD_VDD_MODEM7 DVDD_MFGSYS7 T20 C12 DVSS7 PLL GND GND GND
W8 DVDD_VDD_MODEM8 DVDD_MFGSYS8 T21 C210 1uF C16 DVSS8
Y8 DVDD_VDD_MODEM9 DVDD_MFGSYS9 C20 DVSS9 H21
DVDD_VDD_MODEM10 DVSS10 AVDD18_DDR [4,7] EMI_VDD1
C207 22uF C211 1uF C23
D3 DVSS11
C212 1uF D9 DVSS12 C217 C218
D13 DVSS13
C215 1uF D23 DVSS14 100nF 1uF
D27 DVSS15
C208 1uF E4 DVSS16 T14 GND GND
DVSS17 AVDD12_PLLGP VA12_PMU [2,5]
E24
C203 1uF E25 DVSS18 T16
DVSS19 AVDD18_PLLGP [2,4] AVDD18_SOC
GND F2
C204 1uF F4 DVSS20
F5 DVSS21 C222 C223
DVDD_DVFS [4] DVSS22
C219 1uF F6
F7 DVSS23 100nF 100nF
CPU F8 DVSS24
F10 DVSS25 PERI_D GND GND
F11 DVSS26
GND F12 DVSS27
[4] DVDD_DVFS_6357_FB DVSS28
U16 F14 G28
DVDD_DVFS1 [4] DVDD_DVFS_6357_GND DVSS29 DVDD18_IOLT [3..5,7,8,10,11,14,16..18] VIO18_PMU
U18 F17 W28
DVDD_DVFS2 U20 F19 DVSS30 DVDD18_IOLM
DVDD_DVFS3 U22 SG202 SG203 F20 DVSS31 AG27
DVDD_DVFS4 Y16 F21 DVSS32 DVDD18_IOBL
DVDD_DVFS5 Y18 F22 DVSS33
DVDD_DVFS6 Y20 F23 DVSS34
DVDD_DVFS7 Y21 C221 10uF G4 DVSS35 U1 C228 C231 C232 C229 C233
DVDD_DVFS8 Y22 G6 DVSS36 DVDD18_IORB1 AG6
DVDD_DVFS9 AA16 C224 10uF G11 DVSS37 DVDD18_IORB2 DNP DNP DNP 100nF 100nF
DVDD_DVFS10 AA18 G12 DVSS38
DVDD_DVFS11 AA20 C225 10uF G13 DVSS39 J1
[2,4] VSRAM_OTHERS_PMU DVDD_DVFS12 DVSS40 DVDD18_IORT
AA21 G14
SRAM DVDD_DVFS13 AA22 C226 10uF G15 DVSS41 GND GND GND GND GND
DVDD_DVFS14 AB16 G21 DVSS42 AD18
DVDD_DVFS15 DVSS43 DVDD_VQPS [4] VEFUSE_PMU
AB18 G22
C227 470nF DVDD_DVFS16 G26 DVSS44
C230 1uF H14 DVSS45 A27 C247 closed DVDD18_MSDC0 150mil
R19 H15 DVSS46 DVDD18_MSDC0
DVDD_MFG_SRAM C235 1uF H22 DVSS47
H25 DVSS48 AD28 C248 closed DVDD28_MSDC1 150mil
DVSS49 DVDD28_MSDC1 [4] VMC_PMU
C236 1uF J22
[2,4] VSRAM_OTHERS_PMU DVSS50
GND
J23
C237 1uF J24 DVSS51 AE28
DVSS52 DVDD28_SIM1 [4,12] VSIM1_PMU
C K9 C
L13 K11 DVSS53
V12 DVDD_TOP_SRAM1 K12 DVSS54 AC28
DVDD_TOP_SRAM2 DVSS55 DVDD28_SIM2 [4,12] VSIM2_PMU
C239 470nF K15
K16 DVSS56 C247 C248 C249 C250
C241 470nF K18 DVSS57 AA28
C242 2200nF L8 DVSS58 DVDD18_MSDC1 100nF 1uF 100nF 100nF
GND DVSS59
L11 AB28 GND GND
C243 2200nF L15 DVSS60 DVDD18_SIM GND GND
[4] DVDD_SRAM_DVFS DVSS61
L16
L21 DVSS62
L22 DVSS63 C252 closed DVDD18_MSDC1 150mil
L26 DVSS64
M6 DVSS65
C246 1uF V15 GND M7 DVSS66
DVDD_MCUSYS_SRAM M12 DVSS67 C252 C253
M16 DVSS68 100nF 100nF
M22 DVSS69
GND M24 DVSS70 PERI_A GND GND
M28 DVSS71
N6 DVSS72
N7 DVSS73 U2
CORE DVDD_CORE [2,4]
N11 DVSS74 AVDD12_CSI [2,5] VA12_PMU
N15 DVSS75
N21 DVSS76 R28
DVSS77 AVDD12_DSI [2,5] VA12_PMU
N22
DVDD_CORE_6357_FB [4] DVSS78
P7
DVDD_CORE_6357_GND [4] DVSS79
P12
P16 DVSS80 C259 C258
J21 P21 DVSS81
DVDD_TOP1 DVSS82 1uF 1uF
K10 SG204 SG205 P22
DVDD_TOP2 K13 R11 DVSS83 GND GND
DVDD_TOP3 K14 R15 DVSS84
DVDD_TOP4 K17 R21 DVSS85 T28
DVDD_TOP5 DVSS86 AVDD04_DSI [2,4] DVDD_CORE
L17 R22
DVDD_TOP6 M10 C285 10uF T8 DVSS87
DVDD_TOP7 M14 T12 DVSS88
DVDD_TOP8 M18 C254 10uF T22 DVSS89 C260
DVDD_TOP9 N13 U11 DVSS90
DVDD_TOP10 DVSS91 1uF
N17 C255 10uF V8
DVDD_TOP11 P10 V16 DVSS92
DVDD_TOP12 P13 C286 10uF V17 DVSS93 GND
DVDD_TOP13 P14 V19 DVSS94
DVDD_TOP14 P18 V21 DVSS95
[4,7]
VDDQ DVDD_TOP15 P23 C256 1uF W17 DVSS96
VDRAM_PMU DVDD_TOP16 R13 W19 DVSS97
DVDD_TOP17 R17 C257 1uF W21 DVSS98
DVDD_TOP18 T18 AA9 DVSS99
DVDD_TOP19 C261 1uF AA11 DVSS100
AA13 DVSS101
C262 100nF H11 C263 1uF AB10 DVSS102
H12 AVDDQ_EMI0_1 AB12 DVSS103
C264 100nF AVDDQ_EMI0_2 C265 1uF AD7 DVSS104 D28
DVSS105 AVDD18_USB [2,4] AVDD18_SOC
H18 AD11
C266 100nF H19 AVDDQ_EMI1_1 C267 1uF AD14 DVSS106
AVDDQ_EMI1_2 AE8 DVSS107 E28
DVSS108 AVDD12_USB [2,5] VA12_PMU
C268 100nF C269 1uF AE11
AE14 DVSS109
C270 1uF AF8 DVSS110 B28
DVSS111 AVDD33_USB [4] VUSB_PMU
H10 AF11
C271 2200nF H13 AVDD2_EMI_1 C272 1uF AF14 DVSS112
H17 AVDD2_EMI_2 AF17 DVSS113
H20 AVDD2_EMI_3 C273 1uF AF28 DVSS114 C279 C280 C281
C274 4.7uF AVDD2_EMI_4 AG26 DVSS115
DVSS116 1uF 100nF 1uF
GND
C276 10uF GND GND GND

GND

H2
AVDD18_WBG [2,4] AVDD18_SOC
GND

C3
AVDD12_WBG [2,5] VA12_PMU

MT6762 C283 C284

100nF 100nF
B B
GND GND
MT6762

A A

Titl e
MT6761:POWER

Si ze Document Number Rev

E M6102-FIJI V10

Dat e: Wednesday, November 20, 2019 Sheet 2 of 21

5 4 3 2 1
 5 4 3 2 1

GND
U300D
U300B U300C MT6762-SBS
U300A USB CONN_Dig.
MT6762-SBS MT6762-SBS MT6762-SBS
C313 C27 J6
SIM ABB_IF CSI-0 DSI-0 USB_DP [8]
B27 USB_DP CONN_TOP_CLK K7
[21] CONN_TOP_CLK
DNP PMU_IF USB_DM [8] USB_DM CONN_TOP_DATA [21] CONN_TOP_DATA
AA25 AB13 N3 P25 J5
SIM1_SCLK [12] SIM1_SCLK MAIN_X26M_IN PMIC_CLK_BB [4] CSI0_RDP2 [9] CSI0A_L0P DSI0_CKP [10] DSI0_CKP CONN_BT_CLK [21] BT_CLK
Y25 N4 P26 K8
SIM1_SIO [12] SIM1_SIO CSI0_RDN2 [9] CSI0A_L0N DSI0_CKN [10] DSI0_CKN CONN_BT_DATA [21] BT_DATA
E27 AA26 AB27
SYSRSTB [3,4] SYSRSTB SIM1_SRST [12] SIM1_SRST AE9 0: mini-A USB_ID_DET [8]
AB26 IDDIG H5
TX_BB_IP0 LTE_TX_BB0_IP [17] DRVBUS CONN_WF_CTRL0 [21] WF_CTRL0
WATCHDOG [4]
K24
WATCHDOG SIM2_SCLK [12]
AC25
AB25 SIM2_SCLK TX_BB_IN0
AD9
AE10
LTE_TX_BB0_IN [17] CSI0_RDP0 [9]
N1
N2 CSI0A_L1P DSI0_D0P
N25
N26
[10] DSI0_D0P 1: mini-B CONN_WF_CTRL1
H4
H3
[21] WF_CTRL1
SIM2_SIO [12] SIM2_SIO TX_BB_QP0 LTE_TX_BB0_QP [17] CSI0_RDN0 [9] CSI0A_L1N DSI0_D0N [10] DSI0_D0N CONN_WF_CTRL2 [21] WF_CTRL2
AC26 AD10
SIM2_SRST [12] SIM2_SRST TX_BB_QN0 LTE_TX_BB0_QN [17]
L25 G2
SRCLKENA0 [4] SRCLKENA0
[9]
P1 N28
[10] DSI0_D1P
BC CONN_WB_PTA G3
[21]
[21]
CONN_WB_PTA
CONN_HRST_B
M25 CSI0_RCP P2 CSI0A_L2P DSI0_D1P N27 CONN_HRST_B
SRCLKENA1 [4,17] SRCLKENA1 CSI0_RCN [9] CSI0A_L2N DSI0_D1N [10] DSI0_D1N
D26 G7
RFIC_Ctrl CHD_DP
CHD_DM
[4]
[4]
E26 CHD_DP XIN_WBG [21] CONN_XO_IN_BB
H26 AF13 6177_i0 6177m_iP P3 R25 CHD_DM K5
RTC32K_CK [4] RTC32K_CK PRX_BB_I0P LTE_PRX_BB0_IP [17] CSI0_RDP1 [9] CSI0B_L0P DSI0_D2P [10] DSI0_D2P ANT_SEL0
AE21 AG13 6177m_iN P4 R26 K6
RFIC0_BSI_EN [17] RFIC0_BSI_EN PRX_BB_I0N LTE_PRX_BB0_IN [17] CSI0_RDN1 [9] CSI0B_L0N DSI0_D2N [10] DSI0_D2N ANT_SEL1
D AF22 AF15 6177_i1 K4 D
RFIC0_BSI_CK [17] RFIC0_BSI_CK PRX_BB_I1 ANT_SEL2
K27 AE20 AF12 6177_q0 6177m_qP
PWRAP_SPI0_CSN [4]
[4]
L27 PWRAP_SPI0_CSN RFIC0_BSI_D0
RFIC0_BSI_D1
[17]
[17]
AF21 RFIC0_BSI_D0 PRX_BB_Q0P AG12 6177m_qN
LTE_PRX_BB0_QP
LTE_PRX_BB0_QN
[17]
[17] [9]
R3 P27
[10] DSI0_D3P
KEYPAD
PWRAP_SPI0_CK M27 PWRAP_SPI0_CK AG22 RFIC0_BSI_D1 PRX_BB_Q0N AG15 CSI0_RDP3 R4 CSI0B_L1P DSI0_D3P R27
6177_q1
PWRAP_SPI0_MO [4]
[4]
K28 PWRAP_SPI0_MO RFIC0_BSI_D2 PRX_BB_Q1 CSI0_RDN3 [9] CSI0B_L1N DSI0_D3N [10] DSI0_D3N
AA1 CONN_IQ
PWRAP_SPI0_MI PWRAP_SPI0_MI AB1 KPROW0
GPIO_GPS_LNA_EN [21] KPROW1
N5 AD26 F1
CSI0B_L2P LCM_RST [10,14] LCM_RST GPS_I [21] GPS_I
J25 AD13 6177_i0 6177m_iP P5 AB3 G1
AUD_CLK_MOSI
AUD_CLK_MISO
[4]
[4]
G27 AUD_CLK_MOSI RF MIPI DRX_BB_I0P AE13 6177m_iN
LTE_DRX_BB0_IP
LTE_DRX_BB0_IN
[17]
[17]
CSI0B_L2N AE27
[14] LCD_TE
KPCOL0
KPCOL1
[15]
[13]
AB2 KPCOL0 GPS_Q [21] GPS_Q
AUD_CLK_MISO DRX_BB_I0N AG16 6177_i1 DSI_TE KPCOL1 A3
DRX_BB_I1 WF_IP [21] WF_IP
AG7 AD12 6177_q0 6177m_qP GND AD27 A2
AUD_DAT_MISO0 [4]
J27 MIPI0_SCLK
MIPI0_SDATA
[18]
[18]
AF7 MISC_BSI_CK_0 DRX_BB_Q0P AE12 6177m_qN
LTE_DRX_BB0_QP
LTE_DRX_BB0_QN
[17]
[17]
CSI-1 DISP_PWM [5] DISP_PWM WF_IN B1 [21]
[21]
WF_IN
WF_QP
J28 AUD_DAT_MISO0 MISC_BSI_DO_0 DRX_BB_Q0N AF16 6177_q1 WF_QP B2
AUD_DAT_MISO1 [4] AUD_DAT_MISO1 AF5 DRX_BB_Q1 Note: 3-5 L3 I2C WF_QN [21] WF_QN
MIPI1_SCLK
MIPI1_SDATA
[19]
[19]
AF6 MISC_BSI_CK_1 L4 CSI1A_L0P GPIO D2
[21] BT_IP
K26 MISC_BSI_DO_1 CSI1A_L0N BT_IP D1
AUD_DAT_MOSI0 [4] AUD_DAT_MOSI0 BT_IN [21] BT_IN
K25 AE6 AG9 AD1 AB5 E3
AUD_DAT_MOSI1 [4] AUD_DAT_MOSI1 AD6 MISC_BSI_CK_2 DET_IP0 AF9 LTE_DET_BB0_IP
LTE_DET_BB0_IN
[17]
[17] [9]
L1 SPI0_MI [3] BLSP_SPI_MISO_3 SCL0
SDA0
[3,10,14]
[3,10,14]
AC4 SCL0 Touch BT_QP F3 [21]
[21]
BT_QP
BT_QN
MISC_BSI_DO_2 DET_IN0 AF10 RDP0_1 L2 CSI1A_L1P AC1 SDA0 BT_QN
DET_QP0 LTE_DET_BB0_QP [17] RDN0_1 [9] CSI1A_L1N SPI0_CSB [3] BLSP_SPI_CS_N_3
H27 AE5 AG10
AUD_SYNC_MISO [4] AUD_SYNC_MISO MIPI3_SCLK [14] MISC_BSI_CK_3 DET_QN0 LTE_DET_BB0_QN [17]
J26 AD5 AC2
AUD_SYNC_MOSI [4] AUD_SYNC_MOSI MIPI3_SDATA [14] MISC_BSI_DO_3
[9]
M1 SPI0_MO [3] BLSP_SPI_MOSI_3 GPIO
RCP_1 M2 CSI1A_L2P AD2 G23
RCN_1 [9] CSI1A_L2N SPI0_CLK [3] BLSP_SPI_CLK_3 GPIO_EXT0 [3] BOARD_ID0
AE1
AD8 SCL1 [3,11,14]
AF1 SCL1 Sensor Hub F25
BPI RFIC_ET0_P AC9 L5 SDA1 [3,11,14] SDA1 GPIO_EXT1 [3] BOARD_ID1
Test Pin RFIC_ET0_N RDP1_1
RDN1_1
[9]
[9]
M5 CSI1B_L0P W24
[16] SPI1_MISO
F24
[3] BOARD_ID2
AC10 CSI1B_L0N SPI1_MI GPIO_EXT2
APC APC1 [19]
AE2 U23 G24
BPI_PA_VM1 SPI1_CSB [16] SPI1_CSB GPIO_EXT3 [3] BOARD_ID3
F27 AD3 M3
TESTMODE BPI_PA_VM0 AUX IN M4 CSI1B_L1P Y24 V4 F26
AF24 CSI1B_L1N SPI1_MO [16] SPI1_MOSI SCL2
SDA2
[9]
[9]
V3 SCL2 Rear Cam GPIO_EXT4
W13 AE3 BPI_BUS15_ANT2 V24 SDA2 G25
TP_PLLGP BPI_BUS14_ANT1 SPI1_CLK [16] SPI1_CLK GPIO_EXT5
AE25 AE17 GND
W12 BPI_BUS13_ANT0 AUXIN4 [3] AUX_IN4_NTC CSI-2 H23
[14]
TN_PLLGP AE24 AE18 GPIO_EXT6 LCD_ID0
GND [8] BATERY_ID
AD4 BPI_BUS12_OLAT1 AUXIN3 R1 U24 TP302 H24
BPI_BUS11_OLAT0 CSI2A_L0P SPI2_MI [19] ANT_Detect GPIO_EXT7
AE19 R2 AC21
BPI_BUS10 [18]
AF25 AUXIN2 [8] USB_ID CSI2A_L0N T26 AC22 SCL3 NFC AA24
AF26 BPI_BUS10 AF19 SPI2_CSB TP303 SDA3 GPIO_EXT8
BPI_BUS9 [20] BPI_BUS9 AUXIN1 [18] AUX_IN1_NTC
AD25 T1 T25 Y23
BPI_BUS8 [20] BPI_BUS8 CSI2_RDP0 [9] CSI2A_L1P SPI2_MO GPIO_EXT9 [5] GPIO_LCM_BIAS_ENP
AC5 AC6 AF20 T2
CDM3P5A BPI_BUS7 [20] BPI_BUS7 AUXIN0 [3] AUX_IN0_NTC CSI2_RDN0 [9] CSI2A_L1N
AG4 T24 AA23
BPI_BUS6 [20] BPI_BUS6 SPI2_CLK GPIO_EXT10 [5] GPIO_LCM_BIAS_ENN
AB6 AG3
CDM5P5A BPI_BUS5 [20] BPI_BUS5
AG2 T3 U6 AD21
AF4 BPI_BUS4 CSI2_RCP [9]
T4 CSI2A_L2P SCL4 [9]
V6 SCL4 Front Cam GPIO_EXT11 [10,14] GPIO_CTP_RSTB
AF3 BPI_BUS3 REF POWER C310 C311 C312 C301 C300
CSI2_RCN [9] CSI2A_L2N U25
[9]
SDA4 [9] SDA4 AD20
AF2 BPI_BUS2 U3 SPI3_MI GPIO_VCAMA_EN GPIO_EXT12
BPI_BUS1 [20] BPI_BUS1 1uF 1uF 1uF 1uF 1uF CSI2_RDP1 [9] CSI2B_L0P
AE4 U4 U26 AD19
BPI_BUS0 CSI2_RDN1 [9] CSI2B_L0N SPI3_CSB [16] FP_RESET GPIO_EXT13
AF18 REFP TP307
REFP GND GND GND GND GND V26 AC20
SPI3_MO [16] FP_ID GPIO_EXT14
R5 AB23
C302 T5 CSI2B_L1P V25
SCL5 [5]
AC23 SCL5 Sub PMIC AC19
CSI2B_L1N SPI3_CLK SDA5 [5] SDA5 GPIO_EXT15 [14] LCD_ID1
100nF
Note: 3-2 TP308
GND Y1
CSI Ctrl U27 TP304 SRCLKENAI

A1
MT6762 GND
SPI4_MI
V28
[11] SPI4_MI
J3 PWM0
AC3
NC1 SPI4_CSB [11] SPI4_CSB SCL6 [5] SCL6
A28 Note: 3-1 V2 J4 AE26
NC2 CAM_RST0 [9] CAM_RST0 SDA6 [5] SDA6 INT_SIM1 [3,12] EINT_SIM_SD
AG1 T27
NC3 SPI4_MO [11] SPI4_MO
AG28 W6 TP305 AF27
NC4 CAM_PDN0 V27 INT_SIM2
SPI4_CLK [11] SPI4_CLK
V1 AB4
CAM_RST1 [9] CAM_RST1 UART EINT0 [10,14] EINT_CTP
Y2 AA7
CAM_PDN1 EINT1 [3,12] EINT_SIM_SD
AA3
URXD0 [3] URXD0
K3 AA5
CAM_RST2 [9] CAM_RST2 GPO UTXD0 [3]
AA2 EINT2 [3] EINT_RAMDUMP
K2 UTXD0 AA4
CAM_PDN2 [9] CAM_PDN2 EINT3 [15] FIXTURE_META_MODE
AD22
PERIPHERAL_EN0 [5] GPIO_FLASH_STROBE
AF23 Y6
CAM_RST3 AD24 EINT4
PERIPHERAL_EN1 [5] GPIO_FLASH_EN
L24 Y7
CAM_PDN3 AD23 SD (MSDC1) EINT5 [16] FP_INT_N1
PERIPHERAL_EN2 Y4
EINT6 [11] EINT_ALPS
AC24
PERIPHERAL_EN3 [6] GPIO_SPK_EN
W5 W26 Y3
CAM_CLK0 [9] CAM_CLK0 MSDC1_CLK [12] MSDC1_CLK EINT7
AE23
PERIPHERAL_EN4 [11] LED_RED_EN
W2 W27 AA6
CAM_CLK1 [9] CAM_CLK1 MSDC1_CMD [12] MSDC1_CMD EINT8 [3] EINT8
C AE22 C
PERIPHERAL_EN5 [11] VALPS_3V_EN
J2 W4
CAM_CLK2 [9] CAM_CLK2 EINT9 [14] INT_SAR_SENSOR
W25
VIO18_PMU MSDC1_DAT3 [12] MSDC1_DAT3
AG24 AA27 W3
CAM_CLK3 MSDC1_DAT2 [12] MSDC1_DAT2 EINT10
Y26
MT6762 [2..5,7,8,10,11,14,16..18] Note: 13-1
MSDC1_DAT1
MSDC1_DAT0
[12]
[12]
Y27 MSDC1_DAT1
MSDC1_DAT0 EINT11
W7
[5] EINT_CHG_0

R300
MT6762 EINT12
M26
[11] EINT_ACC
DNP
Schematic design notice of "12_BB_1" page. MT6762
AUD_DAT_MOSI0 PWRAP_SPI0_CSN PWRAP_SPI0_MI
Note 3-1: The de-coupling cap. for REFP (AF18 ball) have to be placed as close to BB as possible.
R304
DNP R305
Note 3-2: To shunt a 1uF capacitor in the AUXIN ADC input to prevent noise coupling. It should 12K
be placed as close to BB as possible. Connect the unused AUX ADC input to GND.
GND Schematic design notice of "13_BB_2" page.
Note 3-3: "PWRAP_SPI0_CSN" and "AUD_DAT_MOSI0" are bootstrap pin to select which interface will be the JTAG pin out. GND
PWRAP_SPI0_CSN AUD_DAT_MOSI0 JTAG Function Note 13-1: The enable pin of acoustic or optoelectronic devices (e.g. SPK AMP/Backlight/Charger
default=PU default=PD AP_JTAG MD_JTAG OCP/OVP) suggest to use Peripheral_EN[0:5]
Note: 3-3 Note: 3-4
HI LO N/A N/A If use other GPIOs as enable pin, suggest to reserve 0201 NC to GND
HI HI (by ext. PU) SPI0+EINT8 SPI1+SPI3
USE CASE LO (by ext. PD) LO SPI0+EINT8 N/A
LO (by ext. PD) HI (by ext. PU) MSDC1 N/A
VIO18_PMU VIO18_PMU
VIO18_PMU
VIO18_PMU
Note 3-4: PWRAP_SPI0_MI is DDR type feature in bootstrap [2..5,7,8,10,11,14,16..18] [2..5,7,8,10,11,14,16..18]
Note 3-5: Please set unused IQ pins in NC [2..5,7,8,10,11,14,16..18]
PWRAP_SPI0_MI Booting interface [2..5,7,8,10,11,14,16..18]

default=PU DDR MSDC0 pin mux After DVT1：1

R308
DNP R309
USE CASE LO (by ext. PD) LPDDR3 follow LP3 Ref SCH. R306
DNP
R307
DNP
DNP

HI LPDDR4X follow LP4X Ref SCH.

BOARD_ID2 [3] BOARD_ID3 [3]
BOARD_ID0 [3] BOARD_ID1 [3]

R313
DNP R314
R311 R312 DNP
12K DNP

GND GND
GND

拉美 ： 01 GND

亚欧 ： 00

VIO18_PMU
VIO18_PMU

[2..5,7,8,10,11,14,16..18]
[2..5,7,8,10,11,14,16..18]
U300G
MT6762-SBS
R322 R323
R321 R320
EMI_DDR
B C13 A9 B
EMI0_DQ0 [7] EMI0_DQ0 EMI0_CS0_n [7] EMI0_CS0_N
C15 E8 DNP DNP
EMI0_DQ1 [7] [7] DNP DNP
EMI0_DQ1 EMI0_CS1_n EMI0_CS1_N SCL1 [3,11,14]
SCL0 [3,10,14]
C14 SDA1 [3,11,14]
EMI0_DQ2 [7] EMI0_DQ2 SDA0 [3,10,14]
E15 D8
EMI0_DQ3 [7] EMI0_DQ3 EMI0_CKE0 [7] EMI0_CKE0
B15 E7
EMI0_DQ4 [7] EMI0_DQ4 EMI0_CKE1 [7] EMI0_CKE1
D15
EMI0_DQ5 [7] EMI0_DQ5
E16 B16
EMI0_DQ6 [7] EMI0_DQ6 EMI0_DM0 [7] EMI0_DM0
VIO18_PMU VIO18_PMU [2..5,7,8,10,11,14,16..18]
B17 C17
EMI0_DQ7 [7] EMI0_DQ7 EMI0_DM1 [7] EMI0_DM1
A17 E10 [2..5,7,8,10,11,14,16..18]
EMI0_DQ8 [7] EMI0_DQ8 EMI0_DM2 [7] EMI0_DM2
E18 B19
EMI0_DQ9 [7] EMI0_DQ9 EMI0_DM3 [7] EMI0_DM3
F18 R317 R324
EMI0_DQ10 [7] EMI0_DQ10 390K 390K
C18 F9
EMI0_DQ11 [7] EMI0_DQ11 EMI0_CK_T [7] EMI0_CK_T
D19 E9 AUX_IN0_NTC AUX_IN4_NTC
EMI0_DQ12 [7] EMI0_DQ12 EMI0_CK_C [7] EMI0_CK_C
AUX_IN0_NTC [3] AUX_IN4_NTC [3]
E19
EMI0_DQ13 [7] EMI0_DQ13
C19
EMI0_DQ14 [7] EMI0_DQ14

t
E14 RT301 RT302
EMI0_DQS0_C [7] EMI0_DQS0_C
A19
EMI0_DQ15 [7] EMI0_DQ15 D14
EMI0_DQS0_T [7] EMI0_DQS0_T
D10
EMI0_DQ16 [7] EMI0_DQ16 100K 100K
C11 D17
EMI0_DQ17 [7] EMI0_DQ17 EMI0_DQS1_C [7] EMI0_DQS1_C
C10 E17 GND GND
EMI0_DQ18 [7] EMI0_DQ18 EMI0_DQS1_T [7] EMI0_DQS1_T
D12
EMI0_DQ19 [7] EMI0_DQ19 E13
EMI0_DQ20 [7]
B13
EMI0_DQ20
EMI0_DQS2_C
F13
[7] EMI0_DQS2_C
Thermistor to sense AP Thermistor to sense Board
EMI0_DQ21 [7]
B11
EMI0_DQ21
EMI0_DQS2_T [7] EMI0_DQS2_T
temperature temperature
B12 E22 1. RT302 must keep a distance about 6~8 mm away from AP and far from
EMI0_DQ22 [7] EMI0_DQ22 EMI0_DQS3_C [7] EMI0_DQS3_C
1. RT301 must keep a distance about 6~8 mm away from AP and far from other heat sources 10 mm at least.
E11 D22 other heat sources 10 mm at least.
EMI0_DQ23 [7] EMI0_DQ23 EMI0_DQS3_T [7] EMI0_DQS3_T 2. The distance is the shortest distance from package edge to edge.
D20 2. The distance is the shortest distance from package edge to edge.
EMI0_DQ24 [7] EMI0_DQ24
E20
EMI0_DQ25 [7] EMI0_DQ25
E21 B8
EMI0_DQ26 [7] EMI0_DQ26 EMI0_CA0 [7] EMI0_CA0
D21 B7
EMI0_DQ27 [7] EMI0_DQ27 EMI0_CA1 [7] EMI0_CA1
B20 C7
EMI0_DQ28 [7] EMI0_DQ28 EMI0_CA2 [7] EMI0_CA2
C22 D6
EMI0_DQ29 [7] EMI0_DQ29 EMI0_CA3 [7] EMI0_CA3
C21 B5
EMI0_DQ30 [7] EMI0_DQ30 EMI0_CA4 [7] EMI0_CA4
A21 D5
EMI0_DQ31 [7] EMI0_DQ31 EMI0_CA5 [7] EMI0_CA5
C5
EMI0_CA6 [7] EMI0_CA6

F16
EMI0_CA7
E6

E5
[7] EMI0_CA7 JTAG UART
EVREF [7] VREF_EMI EMI0_CA8 [7] EMI0_CA8
G16 A5 TP309
NC5 EMI0_CA9 [7] EMI0_CA9
SYSRSTB [3,4]

TP310
JTDO
BLSP_SPI_MISO_3 [3] UTXD0 [3] TP316
E23 A7
NC6 NC7 B9
NC8 C4 TP311 TP317
NC9 URXD0 [3]
EMI_EXTR C9 JTMS
NC10 BLSP_SPI_CS_N_3 [3]
A B4 D4 A
EMI_EXTR NC11 D7
NC12 D11 TP312 TP318
NC13 EINT_RAMDUMP [3]
R318 D18 JTDI
NC14 BLSP_SPI_MOSI_3 [3]
34.8
R318 please select 34.8 ohm (1%) resistor R319
TP313
GND JTCK
[3]
BLSP_SPI_CLK_3 DNP
eMMC (MSDC0)
TP314
A26 C25 JTRST
MSDC0_DAT7 [7] MSDC0_DAT7 MSDC0_RSTB [7] MSDC0_RSTB EINT8 [3]
B24
MSDC0_DAT6 [7] MSDC0_DAT6 VIO18_PMU [2..5,7,8,10,11,14,16..18]
B23 B25
MSDC0_DAT5 [7] MSDC0_DAT5 MSDC0_CMD [7] MSDC0_CMD
A23
Note: 14-2 MSDC0_DAT4 [7]
C24 MSDC0_DAT4 D25 TP315
MSDC0_DAT3 [7] MSDC0_DAT3 MSDC0_CLK [7] MSDC0_CLK
A25
MSDC0_DAT2 [7] MSDC0_DAT2
D24 B26
MSDC0_DAT1 [7] MSDC0_DAT1 MSDC0_DSL [7] MSDC0_DSL
C26
MSDC0_DAT0 [7] MSDC0_DAT0

MT6762

Titl e
MT6761

Note 14-2: Please check eMCP LP3 and eMCP LP4X pin mux Si ze Document Number Rev
E M6102-FIJI V10

Dat e: Wednesday, November 20, 2019 Sheet 3 of 21

5 4 3 2 1
 5 4 3 2 1

Note: 20-2
Note: 21-3

U400A VS1_PMU 2.1V [4,5] R401 DNP 1. "Typical Cap" defined in design notice is the minimum cap. to LDO Cout.
MT6357 Suggest trace width > 40 mil 2. NC cap can move to application, if (PCB L<20nH, PCB R<0.2 ohm)
=> value and placement of Cap, please refer design notice
VSYS_SMPS VBUCK CTRL VS2_PMU 1.46V [5] R420 0 [4,5,9] VS2_PMU_IN
R402 1 B2
VBAT [4..6,8,9,11,15,18] VSYS_SMPS
C400 SG400 U400B
SG402 1uF GND_SMPS [2]
EXT_VS2_FB [5]
MT6357 Set cap. close to PMIC
B1 DVDD_DVFS Note: 21-3
G S GND_SMPS
Single_GND_l4_2l8
Set power inductor LDO IN LDO
close to PMIC

1
D400 C401 L400 C17 L14 VSYS_LDO2 2.8V,50mA
GND VPROC IN VPROC 0.47uH
VS1_PMU [4,5] VS1_LDO1 VFE28
VXO22_PMU
VFE28_PMU [18]
DNP 10uF A4 A6 VPROC 5000mA T4 VSYS_LDO3

2
B4 VSYS_VPROC1 VPROC1 A7 VXO22
C4 VSYS_VPROC2 VPROC2 B6 C403 C404 C477 C405 K13 VSYS_LDO2 2.8V,50mA
VSYS_VPROC3 VPROC3 VCN28 VCN28_PMU [21]
GND GND B7 Note: 21-5
VPROC4 C6 C471 10uF 10uF 10uF 4.7uF H16 VSYS_LDO1 2.8V,200mA
VPROC5 VCAMA VCAMA_PMU [9]
C7
C402 VPROC6 DNP GND GND GND GND T5 VSYS_LDO3 1.8V,50mA
VAUX18 VAUX18_PMU [4]
F15
For EOS Optional 10uF C2
Differential and shielded with GND VS2_LDO1 L7 VSYS_LDO3 2.8V,50mA
VPROC_FB [2] DVDD_DVFS_6357_FB GND VAUD28 VAUD28_PMU [4]
D
4mi l F17 D
VS2_LDO2
A5 GND_VPROC_FB
D2
[2] DVDD_DVFS_6357_GND ALDO
4mi l C406
SG401 B5 GND_VPROC1 C407 C408 C409 C410 C411
GND_VPROC GND_VPROC2 VS2_PMU_IN [4,5,9]
C5 2200nF 1uF 1uF
G S GND_VPROC3 DNP 1uF DNP
Single_GND_l4_2l8 GND GND GND
C412 GND GND GND
GND DNP
G14 P17 VSYS_LDO2
Set power inductor DVDD_CORE VSYS_LDO1 VCN33
3.5V,400mA
VCN33_PMU [21]
GND
VCORE IN VCORE L401 close to PMIC [2]
N17
VSYS_LDO2 VLDO28
L16 VSYS_LDO1 2.8V,400mA
VLDO28_PMU [9,10,14]
A8 A9 VCORE 0.47uH
B8 VSYS_VCORE1 VCORE1 A10 5000mA K7 K15 VSYS_LDO1 2.8V,200mA
VSYS_VCORE2 VCORE2 VSYS_LDO3 VIO28 VIO28_PMU [11,16]
C413 C8 B10
VSYS_VCORE3 VCORE3 C10 For EOS L15 VSYS_LDO2 3V,200mA
VCORE4 VMC VMC_PMU [2]
SG403 10uF GND_VCORE C9 C472
B9 GND_VCORE1 F13 N16 VSYS_LDO2
G S GND_VCORE2 D3
Differential and shielded with GND VBAT [4..6,8,9,11,15,18]
G8 D_GND1 VMCH
3V,800mA
VMCH_PMU [12]
[2] DVDD_CORE_6357_FB DNP
Single_GND_l4_2l8 VCORE_FB G7 D_GND2 L17 VSYS_LDO1
E3
4mi l G9 D_GND3 VEMC
3V,400mA
VEMC_PMU [7]
[2] DVDD_CORE_6357_GND GND C481 C478
GND GND_VCORE_FB G12 D_GND4 J17 VSYS_LDO1
4mi l H6 D_GND5 VSIM1
1.86V,200mA
VSIM1_PMU [2,12]
10uF 10uF
G10 D_GND6 K16 VSYS_LDO1 1.86V,200mA
GND GND D_GND7 VSIM2 VSIM2_PMU [2,12]
G11
H7 D_GND8 M16 VSYS_LDO2 2.8V,200mA
D_GND9 VIBR VIBR_PMU [14]
H8
H9 D_GND10 J14 VSYS_LDO1 3.07V,200mA
D_GND11 VUSB VUSB_PMU [2]
H10
Set cap. close to PMIC H11 D_GND12 H15 VSYS_LDO1 1.8V,200mA
D_GND13 VEFUSE VEFUSE_PMU [2]
F12
Set power inductor DVDD_MODEM [2]
F11 D_GND14 C425 C426 C427
L402 close to PMIC F10 D_GND15
DLDO C417 C418 C419 C420 C421 C422 C423 C424
VMODEM IN VMODEM 1uH F9 D_GND16
D_GND17
DNP DNP DNP
A13 B11 VMODEM 1800mA H12 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
B13 VSYS_VMODEM1 VMODEM1 C11 J6 D_GND18 GND GND GND
C428 VSYS_VMODEM2 VMODEM2 D7 D_GND19 D16 VS1_LDO1 GND GND GND GND GND GND GND GND
C473 D8 D_GND20 VRF18
E13
Differential and shielded with GND D6 D_GND21
4700nF [2] DVDD_MODEM_6357_FB
1.81V,450mA
[17]
A12 VMODEM_FB D9 D_GND22 VRF18_PMU
SG404 4mi l DNP
B12 GND_VMODEM1 D14 F5 D_GND23 E15 VS1_LDO1 1.8V,300mA
G S GND_VMODEM2 GND_VMODEM_FB [2] DVDD_MODEM_6357_GND D_GND24 VCN18 VCN18_PMU [21]
C12 4mi l J7
Single_GND_l4_2l8 GND_VMODEM3 D10 D_GND25 E17 VS2_LDO1 1.2V,300mA
D_GND26 VCAMD VCAMD_PMU [9]
D11
GND D12 D_GND27 A17 VS1_LDO1
Set power inductor Note: 20-1 D13 D_GND28 VCAMIO
1.8V,300mA
VCAMIO_PMU [9]
GND L403
VPA IN VPA 1uH close to PMIC F6 D_GND29
D_GND30 VIO18
B17 VS1_LDO1 1.8V,600mA
VIO18_PMU [2..5,7,8,10,11,14,16..18]
A2 A1 VPA 2500mA VPA_PMU
J8
VSYS_VPA1 VPA [4,18] D_GND31
C429 A3 K12 SG405
VSYS_VPA2 E6 D_GND32 C432 C433 C434 C435 C436
D_GND33 AVDD18_SOC [2]
SG406 10uF GND_VPA E4 C474 Set cap. C430 close to E7
VPA_FB [4,18] VPA_PMU D_GND34
G S
B3
GND_VPA
C430
VPA power inductor
E8
F7 D_GND35 SLDO1 4.7uF 4.7uF 1uF 1uF DNP SG407
DNP [2,7]
J9 D_GND36 EMI_VDD1
Single_GND_l4_2l8 2200nF GND GND GND
E11 D_GND37 GND GND
GND GND E9 D_GND38
E10 D_GND39 E16 VS2_LDO2
VS1 IN VS1 E12 D_GND40 VRF12 Note: 21-4
GND
F8 D_GND41
B14
Set power inductor J11 D_GND42
1.2V,400mA
VRF12_PMU [17]
L404
A14 VSYS_VS1_1 A16 1uH close to PMIC Set cap. and shortpad close to PMIC D_GND43 G15 VS2_LDO2 0.9V,460mA
VSYS_VS1_2 VS1_1 VSRAM_PROC DVDD_SRAM_DVFS [2]
B16 VS1 1000mA
VS1_PMU
VS1_2 [4,5]
C437 VREF GND G16 VS2_LDO2 0.9V,460mA
VSRAM_OTHERS VSRAM_OTHERS_PMU [2]
SG408 4700nF GND_VS1 A15
B15 GND_VS1_1
VREF 1.24V,1200mA
VDRAM_PMU [2,7]
C475 C438
G S GND_VS1_2 E14 H17 VS2_LDO2
VS1_FB [4,5] VS1_PMU VDRAM
Single_GND_l4_2l8 DNP 100nF T14 C439 C440 C441 C442
VREF
SG409 GND_VREF
T13
SLDO2 4.7uF 2200nF 2200nF 4.7uF
GND
GND G S GND_VREF Note: 21-1
GND Single_GND_l4_2l8 GND GND GND GND

DIG Power TREF

R9
[8] TREF_PMU
SG410
MT6357 VIO18_PMU [2..5,7,8,10,11,14,16..18]
DVDD18_IO_K10
K10
DVDD18_IO_K10
DVDD18_DIG
L10
DVDD18_DIG
C C
Power Switch
C443 C444 C445 J10
DVSS18_IO_J10
Schematic design notice of "20_POWER_MT6357_Buck" 1uF 1uF 100nF

GND SG411 Note: 21-2

Note 20-1: C2040, please choose 0402 size G S
DVSS18_IO_J10
MT6357
Single_GND_l4_2l8

Note 20-2: PMIC Part number notice for MT6765/62/61 platform GND

MTK Platform PMIC Schematic design notice of "21_POWER_MT6357_LDO"

MT6765 / 62 MT6357 CRV
Note 21-1: If these power trace can meet LDO layout constraint, these CAP can be NC or removed.
MT6761 MT6357 MRV Please refer to MT6357 design notice.

Note 21-2: Output cap range please follow MT6357CRV LDO design notice Note 21-4: Please set SG405 and SG407 close to C433, making star connection among VIO18_PMU, AVDD18_SOC, and
EMI_VDD1 near to LDO cap. C433
Note 21-3: Ext Buck BOM option Ext. buck option
Please also refer to MT6357 design notice for further detail design information
w/ EXT VS2 Buck w/o EXT VS2 Buck
C403 10uF(0402) 22uF(0603)
R420 0-ohm , 0603 NC Note 21-5: Please connect VS2_LDO1(F15) to VS1_PMU if voltage applied to VCAMD(E17) >= 1.3 V
R401 NC 0-ohm , 0603

U400C
Schottky diode (VF <0.3V @ 1mA) MUST be
for PWRKEY ESD protection and to avoid MT6357
inverse current from MT6371.
Control I/F RTC Set cap. close to chip
Note: 22-3 D411
[13] PWRKEY
1 2 R4
PWRKEY VRTC28
R12 VRTC28 U400D
[13] HOMEKEY
N4
FCHR_ENB C449 R414 MT6357
R5
[3] SYSRSTB RESETB
TP400 100nF
T8 1.5K AUDIO IF UL POWER
[3] WATCHDOG WDTRSTB_IN
UVLO_VTH GND
R404 200K N3
GND UVLO_VTH C479
4.7uF R16 K1
AUD_CLK_MISO [3] AUD_CLK_MISO AVDD28_AUD [4] VAUD28_PMU
P14
RTC32K_1V8_0 RTC32K_CK [3]
N7 T17 C447
[3] SRCLKENA0 SRCLKEN_IN0 AUD_DAT_MISO0 [3] AUD_DAT_MISO0
R15 1uF SH400
N8 RTC32K_1V8_1 TP401 R17 H5
[3,17] SRCLKENA1 SRCLKEN_IN1 AUD_DAT_MISO1 [3] AUD_DAT_MISO1 AVSS28_AUD S G GND
P11
RTC32K_2V8 T16 C450 C448 Single_GND_l4_2l8
AUD_SYNC_MISO [3] AUD_SYNC_MISO AVSS28_AUD [6]
TP402 1uF 1uF
M5 L3
EXT_PMIC_EN1 AU_MICBIAS0 [14] AU_MICBIAS0
N5 P16
EXT_PMIC_EN2 [5] EXT_PMIC_EN2 AUD_CLK_MOSI [3] AUD_CLK_MOSI M3
AU_MICBIAS1 [6] AU_MICBIAS1
M6 P15
EXT_PMIC_PG DCXO Note: 22-2 AUD_DAT_MOSI0 [3] AUD_DAT_MOSI0
N14
AUD_DAT_MOSI1 [3] AUD_DAT_MOSI1
AVSS22_XO Single_GND_l4_2l8
R8 M2 SG412 M14
PWRAP_SPI0_CSN [3] SPI_CSN AVSS22_XO S G GND AUD_SYNC_MOSI [3] AUD_SYNC_MOSI
M8
AVSS22_XO
AVSS22_XOBUF
Set cap. and shortpad close to PMIC
PWRAP_SPI0_CK [3] SPI_CLK
B P1 SG413 B
AVSS22_XOBUF1 S G GND
M7 R1 AVSS22_XOBUF
PWRAP_SPI0_MO [3] SPI_MOSI AVSS22_XOBUF2 Single_GND_l4_2l8
M9 AUDIO INPUT
PWRAP_SPI0_MI [3] SPI_MISO

P5 N2
AVSS22_XO_ISO
SG414
P-N pair should be differential pair & shielded with GND K3
PMU_TESTMODE AVSS22_XO_ISO1 P2 AVSS22_XO_ISO S G GND AU_VIN0_P [14] AU_VIN0_P CHARGE PUMP
P9 AVSS22_XO_ISO2 Single_GND_l4_2l8 K4
FSOURCE AU_VIN0_N [14] AU_VIN0_N Set cap. close to PMIC
Set cap. close to PMIC G2
GND
Charger I/F P-N pair should be differential pair & shielded with GND K5 AVDD18_AUD [2..5,7,8,10,11,14,16..18] VIO18_PMU
XO_SOC AU_VIN1_P [6] AU_VIN1_P
R3 R405 0 AVSS_AUD C451 2200nF SH401
XO_SOC [3] PMIC_CLK_BB
L5 F2
AU_VIN1_N [6] AU_VIN1_N AVSS18_AUD S G
N9 XO_CEl
VBAT [4..6,8,9,11,15,18] VSYSSNS
Note: 22-5 T1 R406 0 AU_V18N Single_GND_l4_2l8
XO_CEL [17] PMIC_CLK_RF
M13 D1 C452 4.7uF
BATSNS [5] BATSNS P-N pair should be differential pair & shielded with GND J4 AU_V18N
XO_WCN AU_VIN2_P
N13 P3 R407 0
ISENSE [5] ISENSE XO_WCN [21] PMIC_CLK_WCN
J5
C454 BATON R13 AU_VIN2_N GND
C455 BATON R2 F1 FLYP C453 4.7uF
VBUS [4,5,14] XO_NFC FLYP
1uF VCDT T11 C457 C458 C459
100nF C456 VCDT
CHRLDO R11 T2 DNP DNP DNP E2 FLYN 1. AVSS18_AUD is connected to GND in very short trace
GND 100nF CHRLDO XO_EXT FLYN
GND P13 GND GND GND
ACCDET
R409 GND VDRV 2. AVSS18_AUD is connected to de-couple cap of
330K M4
AVDD18_AUD and AU_V18N with 6mil trace respectively
ACCDET [6] ACCDET
M1 XTAL1
BATON [8] XTAL1 XTAL1 [4]
3mil trace width J1
HP_EINT [6] HP_EINT
N1 XTAL2
XTAL2 XTAL2 [4]
Note: 22-4 - AU_HPL and AU_HPR should be routed as single end signal,
3mil trace width
VBUS [4,5,14] R410 1.5K Differential and be guarded by GND, up and down, left and right respectively
R412
M10 AUXADC - The suggested layout pattern of AU_HPL/ AU_HPR/ AU_REFN
39K
[3] CHD_DM CHG_DM [4] VAUX18_PMU
is " GND AU_HPL AU_REFN AU_HPR GND" AUDIO
C461 [3] CHD_DP
M11
CHG_DP
OUTPUT
1uF
R7 J2
AVDD18_AUXADC AU_HPL [6] AU_HPL
GND GND C462 1uF
N12 SG415 H3
[11] PCHR_LED PCHR_LED AU_REFN [6] AU_REFN
P7
AVSS18_AUXADC S G G3
Set resistor and cap. close to AU_HPR [6] AU_HPR
VCDT rating: 1.268V C463 100nF Single_GND_l4_2l8
PMIC Gauge T7
AUXADC_VIN GND
P-N pair should be differential pair & shielded with GND
F4
AU_LOLP [6] AU_LOLP
T10 F3
[8] CS_P CS_P AU_LOLN [6] AU_LOLN
Set cap. close to PMIC C464
R10 1nF
[8] CS_N CS_N G6
AU_HSP [6] AU_HSP
G5
Differential GND
AU_HSN [6] AU_HSN
AVSS18_AUXADC
ISINK 3mil trace width P-N pair should be differential pair & shielded with GND
AUXADC_VIN Set cap. close to PMIC
L12
3mil trace width
[11] ISINK1 ISINK1 AVDD18_AUXADC
3mil trace width MT6357

R413 100K
3mil trace width
X400
4 3 XTAL2
SENSOR HOT2 XTAL2 [4]

XTAL1 1 2
[4] XTAL1 HOT1 GND
3mil trace width
A CT2520DB26000C0FLZA1 A
AVSS18_AUXADC

3mil trace width

MT6357
Note: 22-1
Route AVDD18_AUXADC, AUXADC_VIN, and AVSS18_AUXADC with 3mils width traces and well GND shielding

Schematic design notice of "22_POWER_MT6357-IF"

Note 22-1: Please implement 2520 & 2016 Size TMS PCB co-layout.
Please refer to MT6762_MT6357 Co-Clock Design Notice for co-layout guide

1. Please Connect P1 and R1 ball first and then to GND

Note 22-2: 2. Please Connect P2 and N2 ball first and then to GND
3. Please connect DCXO GND to main GND by independent L1-2 GND via.;
DO NOT connect it through L1 GND

Note 22-3: Let floating if disable HOMEKEY function

Titl e

Note 22-4: Please follow MT6762_MT6357 Co-Clock Design Notice for Layout guide of VAUX18, Note 22-5: Please connect to battery connector MT6357

then R411 can use 0 ohm to replace BEAD. Si ze

E
Document Number
M6102-FIJI
Rev
V10

Dat e: Wednesday, November 20, 2019 Sheet 4 of 21

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D D

LCM Backlight LED driver Charger

C502 C504
C539 100nF 100nF
C538
D502 68pF 10uF
U506 L505
L501 10uH 2 1 LB500 1 2 LCM_LEDA
VBAT [4..6,8,9,11,15,18] [10,14]
A1 C1
R510
1000ohm@100MHz VBAT [4..6,8,9,11,15,18]
A2 VBUS1 SW1 C2
WSB5543W-2/TR VBUS [4,14] SPH252010H1R0MT
VBUS2 SW2

1
C3 0.068
SW3
U503
C552 C541 D501
6 1 B1 D1 C540 ES05DP
VIN FB [10,14] LCM_LEDK PMID1 PGND1
C550 4700nF B2 D2 10uF 10uF
PMID2 PGND2

2
R525 DNP 5 2 B3 D3 GND 33nF
DISP_PWM [3] CTRL COMP PMID3 PGND3
VIO18_PMU [2..4,7,8,10,11,14,16..18]
R524 0 4 3
LCD_CABC [14] SW GND E1 R513
R504 7 C524 R506 C536 R507 B4 CSIN ISENSE [4]
THM_PAD SDA5 [3] SDA
C508 A4 Differential
SCL5 [3] SCL
4700nF TPS61161 0.22uF 5.1 1uF 510K R508 E4 R514
100K CSOUT BATSNS [4]
7101418M001 100K
TPS61161 GND E2 E3 near R504
CD VREF
R509 100K D4
VBAT [4..6,8,9,11,15,18] OTG
Iled=Vfb/Rset=0.2/5.1=0.039A
[3] C4 A3
EINT_CHG_0 STAT BOOT C505
AW9962E
BQ24157 1uF
VIN: 2.7V to 5.5V R511 7101860M001
Fpwm = 10-100KHz, Dpwm= 0.3-100%, tMIN_ON=50ns 10K
HL 7 0 0 5 D H ：
I2C address=0x6a
S Y6 9 2 3 ：
GND I2C address=0x6a
C C

LCD Bias
L502

4.7uH

[4..6,8,9,11,15,18] U504
C1 D1
VBAT VIN SW
TP502
B1 D3
GPIO_LCM_BIAS_ENP [3] ENP REG1
A1 E2 1000ohm@100MHz
GPIO_LCM_BIAS_ENN [3] ENN REG2
TP503
B2 E3 LB501 1 2
SCL6 [3,5] SCL OUTP [14] LCM_AVDD
C2 A2 LB502 1 2
SDA6 [3,5] SDA OUTN [14] LCM_AVEE
B3 C3 1000ohm@100MHz
E1 PGND1 CFLY1 A3
PGND2 CFLY2

C551 C542 C549

D2
AGND
ICN7516E
C543

2200nF C544 C545 C546 C547 C548

LDO for VA12
10uF 10uF 100nF
GND 4.7uF 4.7uF 4.7uF 22pF 22pF Note: 28-1
Suggest trace width > 12 mil
GND [4..6,8,9,11,15,18] R515 1K
VBAT R 5 1 7 从 C 5 1 5电容上连 线
1.217V
SM5109 VA12_PMU [2]
C512
GND VIN: 2.7V to 5.5V U501
Vpos = 5.5V, Veng = -5.5V 1uF R517 C515
I2C standard mode 100kps, fast mode 400kps C2 A1
GND BIAS VOUT 43K 10uF
I2C 7bits-address: 0x3E
NT50358ACG/J B2 B1
EXT_PMIC_EN2 [4] EN ADJ
VIN: 2.5V to 5.5V GND
Vpos = 5.5V, Veng = -5.5V A2

GND
VS2_PMU_IN [4,9] VIN
I2C standard mode 100kps, fast mode 400kps
R516
I2C 7bits-address: 0x3E C516
MT6680P

C1
Suggest trace width > 12 mil 30K
Vout=0.5V x (1+R517/R516) = 1.2170
4.7uF

Flash LED 5V Boost GND

GND GND

C532 C533

10uF 33pF
U505
A2 C1
IN OUT
40mil
L504 1uH B1
VBAT [4..6,8,9,11,15,18] SW D3

C530 C531
GPIO_FLASH_STROBE [3] R523 DNP C3
B2
C2
TORCH
STROBE
LED1

D1
Ext. Bulk for VS2 Note: 28-2
GPIO_FLASH_EN [3] HWEN LED2
D2
4700nF 1uF A3 TX
SDA6 [3,5]
B3 SDA A1 Suggest trace width > 40 mil
B SCL6 [3,5] SCL GND LED501
Suggest trace width > 25 mil U502
L503
1uH B
1.46V
2

7 6 VS2_PMU
GND VBAT [4..6,8,9,11,15,18] VIN LX [4]
AW3643
TP501
1

7101917M001 D503
8 2 R518
Base Dura pro change C523 C519 C520 309K C521 C522
ESD9N5B-2/TR TP500 PGOOD FB
33pF
2

Delete PD RES, add TP, Add R523 100nF 10uF 1 10uF 10uF
EN
4 GND GND
1

GND GND 5 VOUT 3

PGND AGND
AW3643 MT6690N
R519
215K
VIN:2.7V to 5.5V
400kHz I2C address: 0X63 (Write:0xC6, Read:0xC7)
VS1_PMU [4] Vout = 0.6V x (1+R518/R519) = 1.462
SY7806 GND
GND
VIN:2.7V to 5.5V [4] EXT_VS2_FB
400kHz I2C address: 0X63 (Write:0xC6, Read:0xC7)

A A

Schematic design notice of "28_POWER_ThirdParty-Power"

Note 28-1: VA12 Layout placement please close to AP

Note 28-2: VS2 Buck Layout placement please close to PMIC MT6357

Note 28-3: VCN33 LDO Layout placement please close to MT6631

Schematic design notice of "27_POWER_SubPMIC-HV powers" page:

Note 27-1: To minimize RF de-sense, it is recommended to reserve 0-ohm and 0402 cap for BOM fine tuning.

Note 27-2: To minimize RF de-sense, it is recommended to reserve 0-ohm and 0201 cap. for BOM fine tuning.
Titl e
Note 27-3: C2705 could be replaced with C / 1 / uF / 50V + C / 1 / uF / 50V Power

Si ze Document Number Rev

E M6102-FIJI
V10
Dat e: Wednesday, November 20, 2019 Sheet 5 of 21
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D D

SPEAKER
Handset 2nd Microphone

AU_LOLP [4] C608 68nF R602 3.3K

C635 DNP
U601 LB610
BLM18KG101TN1D
C618 A1 B4
INP VOP [14,15] SPK_P
220pF
A2 D4
INN VON [14,15] SPK_N
AU_LOLN [4] C610 68nF R603 3.3K BLM18KG101TN1D
LB611
A4 D2 C609 2200nF C612 C613
GPIO_SPK_EN [3] SHDN C1P C1 470pF 470pF
C1N

A3 D1 C611 2200nF GND

B3 VDD1 C2P B1
VBAT [4,5,8,9,11,15,18] VDD2 C2N

R604
C604 D3 C2
PVDD GND1 C4
GND2
100K DNP
C628
C605 C638 C637 AW87318CSR
GND
4.7uF 7101869M001
2200nF 2200nF 100nF

C C

EAR PIECE

Close to BB Close to connector

Earphone Audio AU_HSP [4]

6mil 6mil
PAD601

C629

DNP
PAD602
6mil 6mil
AU_HSN [4]
Based on your system level design , if better
Audio performance is needed on your system, (1) iPhone : L-R-G-M

D606

D607
please add 32ohm to audio path

ESD9N5B-2/TR

ESD9N5B-2/TR
close to IC close to connector

1
for performance enhance proposal C633 C634

( 32ohm condition pop noise can improve 6dB ) 33pF 33pF

2
[4] R608 47K
HP_EINT J601

LB600 1800ohm@100MHz 1 1
Note: 60-1 HP_MIC [6]
3 3

R609 33 LB601 1800ohm@100MHz LB602 1800ohm@100MHz 4 4

AU_HPL [4]

[4] R610 33 LB604 1800ohm@100MHz LB603 1800ohm@100MHz

AU_HPR
D602

D603

D604

LB605 1800ohm@100MHz 6
[4] AU_REFN 6
1

5
B 5 B
C614 C615 R611 R612 GND shielding 2
ESD5431N-2/TR

ESD5431N-2/TR

ESD5431N-2/TR

C616
Note: 60-2
2

470 2
33pF 33pF 470
DNP ESD9L5.0ST5G
BEAD601 / BEAD604 are D605 1 2
KJF-A22000603R-01HQ
for FM-desense tuning proposal GND
GND C617 1nF [21] FM_ANT

L600
100nH
SG603
[4] SH5001 0.3mm [21]
AVSS28_AUD FM_RX_N_6625

Single via to
GND plane
AU_MICBIAS1 [4]
Close to CON601

Earphone MICPHONE R623 R614

DNP 1K
Close to BB
Close to MIC
[4] C619 1uF C620 4.7uF
AU_VIN1_N
Reserved to enhance TDD performance
C621

33pF R615
C636 C623
GND 1.5K
100pF 100pF

C624

33pF
[4] C625 1uF [6]
AU_VIN1_P HP_MIC

Reserved for ACC mode

[4] R616 1K C626
ACCDET
3300pF

tie together and single via to

GND plane

A A

Titl e
AUDIO

Si ze Document Number Rev

E M6102-FIJI V10

Dat e: Wednesday, November 20, 2019 Sheet 6 of 21

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D D

Y2
U700 F3
EMI0_CA0 [3] CA0 VDD1_1 [2,4] EMI_VDD1
Y3 F4
EMI0_CA1 [3] CA1 VDD1_2
W2 F9
EMI0_CA2 [3] CA2 VDD1_3
W3 G5
EMI0_CA3 [3] CA3 VDD1_4
V3 AA3 C701 C700
EMI0_CA4 [3] CA4 VDD1_5
L3 AA5
EMI0_CA5 [3] CA5 VDD1_6
K3 AB3 100nF 2200nF
EMI0_CA6 [3] CA6 VDD1_7
J3 AB4
EMI0_CA7 [3] CA7 VDD1_8
J2 AB9
EMI0_CA8 [3] CA8 VDD1_9
H2
EMI0_CA9 [3] CA9 F5
W12 VDD2_1 F8
EMI0_DQ0 [3] DQ0 VDD2_2
V11 J5
EMI0_DQ1 [3] DQ1 VDD2_3
V13 K5
EMI0_DQ2 [3] DQ2 VDD2_4
U11 L2
EMI0_DQ3 [3] DQ3 VDD2_5
U13 L5
EMI0_DQ4 [3] DQ4 VDD2_6
T11 M5
EMI0_DQ5
EMI0_DQ6
[3]
[3]
T13 DQ5
DQ6
VDD2_7
VDD2_8
N5 Please refer to power
R12 P5
EMI0_DQ7
EMI0_DQ8
[3]
[3]
N12 DQ7
DQ8
VDD2_9
VDD2_10
P8 supply related page select
M13 P11
EMI0_DQ9
EMI0_DQ10
[3]
[3]
M11 DQ9
DQ10
VDD2_11
VDD2_12
R5 VDRAM1 output voltage
L13 T5
EMI0_DQ11
EMI0_DQ12
[3]
[3]
L11 DQ11
DQ12
VDD2_13
VDD2_14
U5 properly for LPDDR3
K11 V5
EMI0_DQ13 [3] DQ13 VDD2_15
K13 W5
EMI0_DQ14 [3] DQ14 VDD2_16
J12 AB5
EMI0_DQ15 [3] DQ15 VDD2_17
AB12 AB8
EMI0_DQ16 [3] DQ16 VDD2_18 VDRAM_PMU [2,4,7]
AB11
EMI0_DQ17 [3] DQ17
C AB10 G9 C
EMI0_DQ18 [3] DQ18 VDDQ1
AA13 H8
EMI0_DQ19 [3] DQ19 VDDQ2
AA12 H12
EMI0_DQ20 [3] DQ20 VDDQ3
AA10 J11
EMI0_DQ21 [3] DQ21 VDDQ4
Y13 K10 C705 C706 C707 C708 C710 C703 C704
EMI0_DQ22 [3]
EMI0_DQ23 [3]
Y11 DQ22
DQ23
Power VDDQ5
VDDQ6
K12
H11 L8 100nF 100nF 100nF 100nF 4.7uF 10uF 10uF
EMI0_DQ24 [3] DQ24 VDDQ7
H13 L9
EMI0_DQ25 [3] DQ25 VDDQ8
G10 M10
EMI0_DQ26 [3] DQ26 VDDQ9
G12 M12
EMI0_DQ27 [3] DQ27 VDDQ10
G13 N11
EMI0_DQ28 [3] DQ28 VDDQ11
F10 R11
EMI0_DQ29 [3] DQ29 VDDQ12
F11 T10
EMI0_DQ30
EMI0_DQ31
[3]
[3]
F12 DQ30
DQ31
VDDQ13
VDDQ14
T12 VDD2 VDDQ VDDCA decoupling cap: closed to DRAM ball.
U8
R700 240 ZQ0 G2
ZQ0
VDDQ15
VDDQ16
U9 For other cap for PMIC [>10uF, at PMIC page]:
R701 240 ZQ1 G3 V10
ZQ1 VDDQ17
VDDQ18
V12 please also refer to MMD and layout guide for placement.
GND F13 W11
G11 VSSQ1 VDDQ19 Y8
H10 VSSQ2 VDDQ20 Y12
DRAM ZQx resistor = 240ohm (1%) that must be connected to GND J8 VSSQ3
VSSQ4
VDDQ21
VDDQ22
AA9
J13
K8 VSSQ5 K2
K9 VSSQ6 VDDCA1 N2
L10 VSSQ7 VDDCA2 U2
VSSQ8 VDDCA3 VEMC_PMU [4]
L12 V2
M8 VSSQ9 VDDCA4 1. VCC : Core Voltage 2.7v ~ 3.6v
N13 VSSQ10 B3 2. VCCQ : IO Voltage 1.7v~1.95v (low voltage range)
P9 VSSQ11 VCC_1 B12 C714 C715 C713
R13 VSSQ12 VCC_2 B13
T8 VSSQ13 VCC_3 C4 100nF 100pF 10uF
U10 VSSQ14 VCC_4 D8
U12 VSSQ15 VCC_5 A4
V8 VSSQ16 VCCQ1 B6
V9 VSSQ17 VCCQ2 B9
VSSQ18 VCCQ3 VIO18_PMU [2..5,8,10,11,14,16..18]
W8 C7
W13 VSSQ19 VCCQ4 C11
VSSQ20 VCCQ5 eMMC_VDDI
Y10 A11
AA11 VSSQ21 VCCI TP702 C717 C718 C716
VSSQ22 B8
CLKM [3] MSDC0_CLK
F2 C2 100nF 100pF 2200nF
VSS1 RST [3] MSDC0_RSTB
G4 A6
[3]
G8 VSS2
VSS3
eMMC CMD TP701
MSDC0_CMD
C719 C720
H3 B4
VSS4 DAT7 [3] MSDC0_DAT7
H5 A5 100nF 1uF
L4 VSS5
VSS6
DAT6
DAT5
A10
[3]
[3]
MSDC0_DAT6
MSDC0_DAT5
Please refer to eMCP vendor's datasheet or MTK common
M3 C9 GND
M4 VSS7
VSS8
DAT4
DAT3
B5 [3]
[3]
MSDC0_DAT4
MSDC0_DAT3
design notice to get the recommendation bypass cap. value
N4 C6
N8 VSS9
VSS10
DAT2
DAT1
B10
[3]
[3]
MSDC0_DAT2
MSDC0_DAT1 Close to eMCP
for VCC/VCCQ/VDDI power domains of eMMC.
P4 A9
VSS11 DAT0 [3] MSDC0_DAT0
P12
R3 VSS12 TP700
R4 VSS13
R8 VSS14
T4 VSS15
Y4 VSS16 U3
VSS17 CS0# [3] EMI0_CS0_N
Y5 T3
[3]
AA2 VSS18
VSS19
LP-DDR3 CS1# EMI0_CS1_N
AA4 T2
VSS20 CKE0 [3] EMI0_CKE0
AA8 R2
VSS21 CKE1 [3] EMI0_CKE1
H4 P3
VSSCA1 CLK [3] EMI0_CK_T
J4 N3
VSSCA2 CLK# [3] EMI0_CK_C
K4
P2 VSSCA3 T9
VSSCA4 DQS0 [3] EMI0_DQS0_T
U4 R9
VSSCA5 DQS0# [3] EMI0_DQS0_C
V4 M9
VSSCA6 DQS1 [3] EMI0_DQS1_T
W4 N9
VSSCA7 DQS1# [3] EMI0_DQS1_C
Y9
DQS2 [3] EMI0_DQS2_T VDRAM_PMU [2,4,7]
A3 W9
VSSM1 DQS2# [3] EMI0_DQS2_C
A8 H9
VSSM2 DQS3 [3] EMI0_DQS3_T
A12 J9
VSSM3 DQS3# [3] EMI0_DQS3_C
B2
B7 VSSM4 R10
VSSM5 DM0 [3] EMI0_DM0
B11 N10 C721
VSSM6 DM1 [3] EMI0_DM1
C3 W10
C5 VSSM7
VSSM8
DM2
DM3
J10 [3]
[3]
EMI0_DM2
EMI0_DM3
2200nF C721 change Value and package,C722
C8
B C10 VSSM9
VSSM10 VREFCA
M2
[3,7] EVREF
change Value for V20 B
C12 P13
C13 VSSM11
VSSM12
VREFDQ [3,7] EVREF -20191023
D7
VSSM13 AB14 C722
A2 DNU1 AB13
A13 VSF1 DNU2 AB2 1uF
B1 VSF2 DNU3 AB1
GND B14 VSF3 DNU4 AA14 GND
D2 VSF4 DNU5 AA1
D3 VSF5 DNU6 A14
D4 VSF6 DNU7 A1
D5 VSF7
VSF8
DNU8 Please check MT6765, MT6762
D6
VSF9 and MT6761's capacitor value.
A7 P10
MSDC0_DSL [3] RFU ODT Project C721 C722
TP703
MT6765 2.2uF 1uF
H9TQ65A8GTMCUR MT6762 2.2uF 1uF
MT6761 0.1uF 0.1uF

A A

Titl e
eMCP:LPDDR3&eMMC

Si ze Document Number Rev

E M6102-FIJI
V10
Dat e: Wednesday, November 20, 2019 Sheet 7 of 21

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D D

BATTERY CONNECTOR
[4..6,9,11,15,18] VBAT

100mil Close to battery connector

1
D800 D801 C800 C801 C806 C807 C808
ES05DP
J800 10uF 10uF 1uF 100nF 2200pF

13

14

2
PESDHC2FD4V5BH
from MT6357

2
13

14
1 12
1 12
TREF_PMU [4] R801 16.9K 2 11 R804 200K [2..5,7,8,10,11,14,16..18] VIO18_PMU
2 11
R800 1K 3 10 R803 1K
BATON [4] 3 10 [3] BATERY_ID
4 9 JIG
4 9 [15] DEBUG_BATERY_ID
5 8
DEBUG_BATT_TS [15] 5 8
6 7

1
6 7 TP801 TP802 D802

15

16
1
D805 BM25-4S/2-V(51) Kelvin connection DNP ID RES ID Voltage

15

16

2
C DNP C
2

R806 0.01 MOTO

SB18C51767 200K 0.90V

MOTO
SB18C51766 22K 0.16V
GND GND

SG801
[4] CS_P

[4] CS_N

4 mil trace with good shielding (Differential)

B B

USB_DM [3] R802 5.1 [14,15] USB_HS_DM

USB_DP [3] R805 5.1 [14,15] USB_HS_DP

1

D803 D804
ESD5311X-2/TR ESD5311X-2/TR
2

VIO18_PMU [2..5,7,8,10,11,14,16..18] R807 10K

[3] R808 1K [14,15]

USB_ID USB_ID_CON

[3] R809 1K
USB_ID_DET

C805
A A
100nF

Title
Battery & USB-IF

Size Document Number Rev

C M6102-FIJI V10

Date: Wednesday, November 20, 2019 Sheet 8 of 21

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Page09:Rear-CAM-13M,2M
Front-CAM-5M

D D

Rear-Main Camera(AF-13M) Rear-Slave Camera(FF-2M)

[3] RDN1_1

[3] CSI0_RCN
CN901

31

32
[3] RDP1_1
CN902

25

26
CSI0_RCP

31

32
[3]
DG N D 1 30 MCN R908 C937close to BB
1 30
CAM2M_MCLK2

25

26
DOV DD_1V 8 2 29 MCP R908 0 R930 0 MCLK 1 24 DG N D
VCAMIO_PMU [4,9] 2 29
CSI0_RDN0 [3] CAM_CLK2 1 24
[3]

C937
DVDD_1V 2 3 28 DG N D DG N D 2 23 MDN1(NC)
VCAMD_PMU [4,9] 3 28 2 23
[3] RDN0_1
VCAMA_LDO R900 DNP A GND 4 27 MDN0 CSI0_RDP0 DOV DD_1V 8 3 10mA 22 MDP1(NC)
[9] 4 27 [3] VCAMIO_PMU [4,9] 3 22
CAM13M_AVDD_2V8 R932 0

33pF
CAM2M_DVDD1V8
R901 0 AVDD_2V 8 5 26 MDP0 R931 DNP DVDD_1V 8 4 60mA 21 DG N D
VCAMA_PMU [4,9] 5 26 VCAMD_LDO [9] 4 21 [3] RDP0_1
AFVDD_2V 8 6 25 DG N D DG N D 5 20 MDN0
VLDO28_PMU [4,10,14] 6 25 5 20
A FGND 7 24 MDN1 I2C_S CL 6 19 MDP0
Change AFGND to GND from AGND for V20 -20191023 7 24 [3] CSI0_RDN1 SCL4 [3,9] 6 19
SYNC V S Y NC 8 23 MDP1 I2C_S DA 7 18 DG N D
[9] 8 23 SDA4 [3,9] 7 18
[3] CSI0_RDP1
NC 9 22 GN D DG N D 8 17 MCN
9 22 8 17 [3] RCN_1
DG N D 10 21 MDN2 CAM_RST2 /RES E T 9 16 MCP
10 21 [3] 9 16
[3] CSI0_RDN2 [3] RCP_1
S CL 11 20 MDP2 DG N D 10 15 VOTP (NC)
SCL2 [3] 11 20 10 15
SDA 12 19 DG N D P W DN 11 40mA 14 AVDD_2V 8
SDA2 [3] 12 19 [3] CSI0_RDP2 CAM_PDN2 [3] 11 14
CAM2M_VSYNC
/RES E T 13 18 MDN3 R933 0 V S Y NC 12 13 A GND AGND
CAM_RST0 [3] 13 18 SYNC [9] 12 13

27

28
R909 C938close to BB DG N D 14 17 MDP3
14 17 OK-23GF24-04(008A)
CAM13M_MCLK0

27

28
R909 0 R905 0 MCLK 15 16 DG N D
[3] CAM_CLK0 15 16 [3] CSI0_RDN3

33

34
CAM2M_AVDD_2V8
[3] CSI0_RDP3 C940 R940 0 [4,9] VCAMA_PMU

33

34
C935 C936 C902 C903 C908 C910 C909 C3558 C900 OK-23GF30-04(008A)
C938 C939 DNP

C929
C928

C930

C931
DNP DNP 33pF 2200nF 2200nF 100nF 2200nF 100nF 4.7uF
33pF DNP C932

2200nF
2200nF

33pF
4.7uF

100nF
SG901
G S

Single_GND_l4_2l8
SH1105

G S
Single_GND_l4_2l8

Rear Camera - 13M

SEASONS(OV13855) I2C address: (Write:0x6C, Read:0x6D) Rear Slave Camera - 2M
群 晖(S5K3L6 ) I2 C address : (Write:0x20 , Read:0x21)
DVDD SEASONS(GC2375-C23Y0) I2C address: (Write:0x2E, Read:0x2F)
OV13855 1.2V 1.14-1.26V 106mA
S5K3L6XX 1.05V 0.95-1.15V 160mA
AVDD
OV13855 2.8V 2.7-3.0V 36mA
S5K3L6XX 2.8V 2.7-2.9V 45mA
DOVDD
OV13855 1.8V 1.62-1.98V 3mA
S5K3L6XX 1.8V 1.7-1.9V 0.1mA

C C

Front-FF-5M Camera Connector

R903 C925close to BB
R907 0 R903 0 [3] CAM_CLK1
U902

4 1
VS2_PMU_IN [4,5] VIN VOUT [9] VCAMD_LDO
C925 2
C927 C933 5 GND 3 C934
25

26

CN903 33pF SGND EN

15pF
[3] CAM_RST1 DNP DNP
25

26

DG N D 1 24 DG N D DNP
1 24
CSI2_RDN0 MDN0 2 23 MCLK
CAM5M_MCLK1 1.2V-300mA
[3] 2 23 C923
CSI2_RDP0 MDP0 3 22 DG N D
[3] 3 22 DNP [3,9] GPIO_VCAMA_EN
DG N D 4 21 RESET
4 21
CSI2_RCN MCN 5 20 SCL SCL4
[3] 5 20 [3,9]

CSI2_RCP MCP 6 19 SDA U900

[3] 6 19 [3,9] SDA4
DG N D 7 18 DG N D 4 1
7 18 VBAT [4..6,8,11,15,18] VIN VOUT [9] VCAMA_LDO
CSI2_RDN1 MDN1 8 3mA 17 DOVDD_1V8 2
[3] 8 17 [4,9] VCAMIO_PMU GND
C915 5 3 C914
9 16 DGND SGND EN
CSI2_RDP1 [3] MDP1 R942 DNP [9] VCAMD_LDO
9 16 1uF 1uF
CAM5M_DVDD_1V2
DGND 10 80mA 15 DVDD_1V2V R941 0 VCAMD_PMU RT9078-28GQZ
10 15 [4,9]
0 R902 CAM5M_AVDD_2V8
AVDD_2V811 35mA 14 DGND 2.8V-300mA
VCAMA_PMU [4,9] 11 14
AGND 12 13 DGND C921 C922
12 13 [3,9] GPIO_VCAMA_EN
27

28

DNP DNP C919 C916 C918 C913 R943

OK-23GF24-04(008A) 10K
27

28

C917 C920 DNP 1uF 1uF DNP

1uF 33pF

B B

Front Camera - 5M
SEASONS(GC5035-WC1X0) I2C address: (Write:0x6E, Read:0x6F)

A A

Titl e
Camera-CON

Si ze Document Number Rev

E M6102-FIJI
V10
Dat e: Wednesday, November 20, 2019 Sheet 9 of 21

5 4 3 2 1
 5 4 3 2 1

D D

LCM Connector
R1010 DNP
C C1000 33pF C
T1004
4 1
LCM_D3P [14] [3] DSI0_D3P
LCM_LEDA [5,14]

LCM_LEDK
3 2
[5,14] LCM_D3N [14] [3] DSI0_D3N
C1001 33pF MCF08062G120-T
R1011 DNP

LCD_CABC [5,14]
R1000 DNP
LCD_TE [3,14]
T1000
4 1
LCM_RST [3,14] LCM_D2P [14] [3] DSI0_D2P

LCD_ID1 [3,14]
3 2
LCM_D2N [14] [3] DSI0_D2N
[3,14] C1010
LCD_ID0 MCF08062G120-T
DNP R1001 DNP
VIO18_PMU [2..5,7,8,11,14,16..18]

LCM_AVEE [5,14] R1002 DNP

R1005
LCM_AVDD [5,14] DNP T1001
4 1
LCM_CLKP [14] [3] DSI0_CKP
VLDO28_PMU [4,9,14]
3 2
SDA0 [3,14] LCM_CLKN [14] [3] DSI0_CKN

[3,14] MCF08062G120-T
SCL0
R1003 DNP
EINT_CTP [3,14]

GPIO_CTP_RSTB [3,14]
R1004 DNP
T1002
4 1
LCM_D1P [14] [3] DSI0_D1P
D1000

D1001

D1002

D1004
C1008 C1009 C1006 C1007 3 2
LCM_D1N [14] [3] DSI0_D1N
1

1
D1003 DNP DNP DNP DNP MCF08062G120-T
C1002 R1006 DNP
100nF DNP DNP DNP DNP
2

2
ESD9N5B-2/TR

R1007 DNP

T1003
4 1
LCM_D0P [14] [3] DSI0_D0P

3 2
LCM_D0N [14] [3] DSI0_D0N
MCF08062G120-T
R1008 DNP

GT1151 I2C address: 0X5D (Write:0xBA, Read:0xBB)

or 0x14 (Write:0x28, Read:0x29)

B B

A A

Titl e
DISPLAY

Si ze Document Number Rev

E M6102-FIJI V10

Dat e: Wednesday, November 20, 2019 Sheet 10 of 21

5 4 3 2 1
 5 4 3 2 1

[2..5,7,8,10,11,14,16..18] VIO18_PMU

ALP Sensor
D U1102
R1104 E-Compass D

ALP_VDD DNP U1104

R1105 22 1 5
VIO18_PMU [2..5,7,8,10,11,14,16..18] VDD LDR 6 A1 A2
NC VSA SCL [3,11,14] SCL1
C1110 3 7 VIO18_PMU B1 B2
GND INT [3] EINT_ALPS [2..5,7,8,10,11,14,16..18] VDD SDA [3,11,14] SDA1
1uF 2
SCL [3,11,14] SCL1
4 8 MMC5603NJL
LEDA SDA [3,11,14] SDA1
C1114

STK33562 DNP
MMC5603NJ
I2C 7bits-address 0x30
I2C_address:write 0x60 read:0x61
C1102 C1101 VDD :1.62V to 3.6V
VALPS_3V_LDO [11] STK33562 DNP DNP
I2C 7bits-address 0x46
AF6133E
C1104 C1103 VDD :1.7V to 2.0V I2C 7bits-address 0xxx
VIO28_PMU [4,16] R1106 DNP VLEDA :2.8V to 3.6V I2C_address:write 0xxx read:0xxx
1uF DNP VDD :1.62V to 1.98V

U1103
WL2863D30-4/TR

4 1
VBAT [4..6,8,9,11,15,18] VIN VOUT [11] VALPS_3V_LDO
2 3
GND EN [3] VALPS_3V_EN
C1111 5
EP C1112
1uF
1uF

C VBAT [4..6,8,9,11,15,18] C

Accelerometer Sensor M6102 Project

BMA421 address MC3419-P address MC3416-P address
SDO pin1 to gnd address pin1 to gnd address pin1 to gnd
CSB pin10 to IOVDD for I2C 7bit device id:0x4C (bit6=0) 7bit device id:0x4C (bit6=0)
I2C_address 0x18 I2C_address:write 0x98 read:0x99 I2C_address:write 0x98 read:0x99
I2C_address:write 0x4E read:0x4D VDD :1.7V to 3.6V VDD/VDDIO :1.7V to 3.6V
VDD :1.62V to 3.6

4
IOVDD :1.2V to 3.6 C1105 C1106
LED1100

R+

G+
33pF 1uF A-SP1942R5G2C-C01-2T
KXT126-1063 address STK8321 address KXTJ3-1058-01 address
MC3433 address address pin1 to gnd address pin1 to gnd
vpp pin6 floating CSB pin10 to IOVDD for I2C address 7bit:0x0E
7bit device id:0x2D address 7bit:0x1E I2C_addres s: I2C_address:write 0x1C read:0x1D

G-
R-
I2C_address:write 0x5A read:0x5B I2C_address:write 0x3C read:0x3D VS :1.7V to 3.6V VDD :1.71V to 3.6
VDD :1.8V to 3.6 VDD :1.71V to 3.6 VDDIO: 1.62V to 3.6V IOVDD :1.7V to VDD

1
IOVDD :1.7V to VDD

VIO18_PMU [2..5,7,8,10,11,14,16..18]
R1116 DNP R1115 DNP

[4] R1102 150

PCHR_LED
Add R1115 and R1116 for BMA253
SPI4_CSB [3] ISINK1 [4]

SPI4_CLK [3]
C1107 C1108 R1103
47
12

11

U1101 DNP DNP

SCL/SCLK

NC

1 10
SPI4_MI [3] SDO/ADDR NCS
2 9
SPI4_MO [3]

3
SDI/SDA GND2
3 8
IO_VDD GND1 Q1100
R1
1
[3] LED_RED_EN
4 7
TRIG VDD

R2
LDTC114EN3T5G
INT1

INT2

C1120
C1121

2
100nF KX122-1037
5

100nF

EINT_ACC [3]

B B

A A

Titl e
Sensor

Si ze Document Number Rev

E M6102-FIJI V10

Dat e: Wednesday, November 20, 2019 Sheet 11 of 21

5 4 3 2 1
 5 4 3 2 1

D D

SIM and TF
SIM1 TF-CARD
J1200 J1201
SIM1_VCC SD_DAT2
R1208 2.2 S1A P1A R1204 22 close to CPU
VSIM1_PMU [2,4] SIM1_VCCA SD_DAT2A [3] MSDC1_DAT2
S1B P1B
S1C SIM1_VCCB SD_DAT2B
SIM1_VCCC SD_DAT3
P2A R1206 22 close to CPU
SD_CD/DAT3A [3] MSDC1_DAT3
SIM1_RST S2A P2B
S2B SIM1_RSTA SD_CD/DAT3B
SIM1_SRST [3] R1205 100 SD_CMD
S2C SIM1_RSTB P3A R1200 22 [3] MSDC1_CMD
SIM1_RSTC SD_CMDA P3B
SIM1_CLK SD_CMDB
R1201 47 S3A close to card
SIM1_SCLK [3] SIM1_CLKA
S3B P4A
SIM1_CLKB SD_VDDA [4] VMCH_PMU
S3C P4B
SIM1_CLKC SD_VDDB
SIM1_IO SD_CLK
R1203 100 S4A P5A R1202 22 close to CPU
SIM1_SIO [3] SIM1_I/OA SD_CLKA [3] MSDC1_CLK
S4B P5B
S4C SIM1_I/OB SD_CLKB
SIM1_I/OC P6A

D1202

D1203

D1204
D1201 S5A SD_VSSA P6B

1
C1200 S5B SIM1_VPPA SD_VSSB

1
SIM1_VPPB SD_DAT0
S5C P7A R1207 22 close to CPU
SIM1_VPPC SD_DAT0A [3] MSDC1_DAT0
P7B

ESD5431N-2/TR
1uF
DNP DNP DNP

2
S6A SD_DAT0B

2
SIM1_GNDA SD_DAT1
S6B P8A Shielding connect to ground R1209 22 close to CPU
SIM1_GNDB SD_DAT1A [3] MSDC1_DAT1
S6C P8B
SIM1_GNDC SD_DAT1B
C C

SIM2
SIM2_VCC
KCF-A03990615R-0100
J1202
KCF-A03110815R-0100
J1203
CARD_DET
R1216 2.2 S1A C14 R1215 1K
VSIM2_PMU [2,4] SIM1_VCCA Detect [3] EINT_SIM_SD
S1B
S1C SIM1_VCCB
close to card
SIM1_VCCC
SIM2_RST
R1214 100 S2A
SIM2_SRST [3] SIM1_RSTA

D1216

D1209

D1210

D1211

D1213

D1214

D1215
S2B
S2C SIM1_RSTB D1212

1
SIM1_RSTC C1203
SIM2_CLK
R1212 47 S3A C1
SIM2_SCLK [3] SIM1_CLKA GND1
S3B C2

ESD5431N-2/TR
DNP 4.7uF DNP DNP DNP DNP DNP DNP

2
S3C SIM1_CLKB GND2 C3
SIM1_CLKC GND3 C4
SIM2_IO GND4
R1213 100 S4A C5
SIM2_SIO [3] SIM1_I/OA GND5
S4B C6
S4C SIM1_I/OB GND6 C7
SIM1_I/OC GND7

D1206

D1207

D1208
C8
D1205 S5A GND8 C9

1
C1201 S5B SIM1_VPPA GND9 C10
S5C SIM1_VPPB GND10 C11
SIM1_VPPC GND11 C12

ESD5431N-2/TR
1uF DNP DNP DNP

2
S6A GND12 C13
S6B SIM1_GNDA GND13
S6C SIM1_GNDB
SIM1_GNDC KCF-A13000015R-0200

KCF-A03990615R-0100

NORMAL
DECT GND

TRAY INSETY
DECT GND

B B

A A

Titl e
SIM&TF-Card

Si ze Document Number Rev

E M6102-FIJI
V10
Dat e: Wednesday, November 20, 2019 Sheet 12 of 21
5 4 3 2 1
 5 4 3 2 1

D D

KEY
Volume Up : HOME Key / GND
Volume Down : KPCOL1/GND
DO NOT put pull-up resistor on PWRKEY

C C

DEBUG_KYPD_PWR_N [15]

PWRKEY [4] R1300 1K Power key

1
D2401
DNP

8
C1300 J1300
100nF

8
6
6
5
5
4
4
KPCOL1 [3] R1302 1K Volume Down 3
3
DEBUG_VOL_DOWN
2
[15] 2
HOMEKEY [4] R1301 1K Volume Up 1
1

7
DEBUG_VOL_UP [15] D2404
DNP OK-F501-06325(008A)

7
2

1
D2402
DNP
GND
GND

2
GND

B B

A A

Titl e
Key-CON

Si ze Document Number Rev

E M6102-FIJI
V10
Dat e: Wednesday, November 20, 2019 Sheet 13 of 21
5 4 3 2 1
 5 4 3 2 1

OVP
D D

U1400

A2 A1
VBUS [4,5] VOUT1 VIN1 [14,15] VBUS_IN

B2 B1
VOUT2 VIN2

C2 C1 C1400 C1401

1
GND OVLO
D1401 R1400 100nF 1uF
C1411 ET9523L
100nF ES07DP
75K

2
R1401

18K

GND

VIN_OVLO=VOVLO_TH x (1+R1/R2) = 1.2 * (1 + 75/18 ) = 6.2

Sub Connector
0xXX (Write:0xXX, Read:0xXX)

CN1400
505066-5020
[4] C1405 1uF [14] AU_VIN0_N_B2B
AU_VIN0_N SPK_P 25 26 SPK _N
SPK_P [6,15] 25 26 [6,15] SPK_N
SPK_P 24 27 SPK _N
C1407 1uF 24 27
AU_VIN0_P [4] [14] AU_VIN0_P_B2B
GN D 23 28 INT_SA R_S E NS OR
C 23 28 [3] INT_SAR_SENSOR C
USB_DP 22 29 IOV C C
USB_HS_DP [8,15] 22 29 VIO18_PMU [2..5,7,8,10,11,16..18]
USB_DM 21 30 SENSOR_I2C_S CL C1402
USB_HS_DM [8,15] 21 30 [3,11] SCL1
GN D 20 31 SENSOR_I2C_S DA 1uF
20 31 [3,11] SDA1
MIC_IN1_P 19 32 MIPI_CLK
AU_VIN0_P_B2B [14] 19 32 [3] MIPI3_SCLK
MIC_IN1_M 18 33 MIP I_DATA
AU_VIN0_N_B2B [14] 18 33 [3] MIPI3_SDATA
MIC_B IA S 0 17 34 LTE_V FE 28
AU_MICBIAS0 [4] 17 34 [18,20] LTE_VFE28
US B _ID 16 35 VIBR_P MU
USB_ID_CON [8,15] 16 35 [4] VIBR_PMU
TE 15 36 GN D
LCD_TE [3] 15 36
R1402 1K ID 1 14 37 D3 N
LCD_ID1 [3] 14 37 [10] LCM_D3N
R1403 1K ID 0 13 38 D3P
LCD_ID0 [3] 13 38 [10] LCM_D3P
AVE E 12 39 GN D
LCM_AVEE [5] 12 39
AV D D 11 40 D0 N
LCM_AVDD [5] 11 40 [10] LCM_D0N
TP_2V 8(NC) 10 41 D0P
VLDO28_PMU [4,9,10] 10 41 [10] LCM_D0P
TP_RS TN 9 42 GN D
GPIO_CTP_RSTB [3,10] 9 42
TP_S DA 8 43 CLK N
SDA0 [3,10] 8 43 [10] LCM_CLKN
TP_S CL 7 44 CLK P
SCL0 [3,10] 7 44 [10] LCM_CLKP
TP _INTN 6 45 GN D
EINT_CTP [3,10] 6 45
LCM_RST [3,10] LCD_RS TN 5 46 D1 N [10]
5 46 LCM_D1N
CA B C 4 47 D1P
LCD_CABC [5] 4 47 [10] LCM_D1P
LED_K 3 48 GN D
LCM_LEDK [5,10] 3 48
NC 2 49 D2 N
2 49 [10] LCM_D2N
LED_A 1 50 D2P
LCM_LEDA [5,10] 1 50 [10] LCM_D2P
51 53
P1 G1
52 54
P2 G2 [14,15] VBUS_IN

B B

A A

Titl e
OVP&CON

Si ze Document Number Rev

E M6102-FIJI
V10
Dat e: Wednesday, November 20, 2019 Sheet 14 of 21
5 4 3 2 1
 5 4 3 2 1

USB Test point

Download mode TP
Now TP size is 1.2, need?
HL1504 HL1505 HL1506

D BOOT_MODE FIXTURE_META_MODE GND USB Test Point 1 1 1 D

TP1500 TP1526 TP1514

USB_ID USB_DM USB_DP VBUS
TP1509 TP1503 TP1504 TP1505

HL1508 HL1509 HL1510 HL1511 HL1512

KPCOL0 [3] R1505 4.7K [8,14]

USB_ID_CON
1 1 1 1 1
USB_HS_DM [8,14]

[3] R1504 4.7K

FIXTURE_META_MODE
USB_HS_DP [8,14]

VBUS_IN [14]

MARK1501 MARK1502 MARK1503 MARK1505

KEY Test point

BATTERY Test point

KEY_UP PWR_ON_N KEY_DOWN VBATT GND VBATT_ID VBATT_TS VBATT_JIG
TP1501 TP1502 TP1510 TP1506 TP1507 TP1508 TP1511

S1505 S1506 S1507 S1508 S1509 S1510

20 21 20 21 20 21
19 20 21 22 19 20 21 22 19 20 21 22
18 19 22 23 18 19 22 23 18 19 22
17 18 23 24 17 18 23 24 17 18 17
VBAT [4..6,8,9,11,18] 17 24 17 24 17 17
16 25 16 25 16 16
15 16 25 26 15 16 25 26 15 16 15 16
DEBUG_VOL_UP [13] 14 15 26 27 14 15 26 27 14 15 14 15
13 13 14 27 13 14 27 28 13 14 13 14
12 13 12 13 12 13 28 29 12 13 12 12 13
11 12 11 12 11 12 29 30 11 12 11 12 11 12
DEBUG_KYPD_PWR_N [13] DEBUG_BATERY_ID [8] 10 11 10 11 10 11 30 31 10 11 10 11 10 11
9 10 9 10 9 10 31 9 10 9 10 9 10
C 8 9 8 9 8 9 8 9 8 9 8 9 C
DEBUG_BATT_TS 7 8 7 8 7 8 7 8 7 8 7 8
[8] 7 7 7 7 7 7
6 6 6 6 6 6
DEBUG_VOL_DOWN [13] 6 6 6 6 6 6
5 5 5 5 5 5
4 5 4 5 4 5 4 5 4 5 4 5
3 4 3 4 3 4 3 4 3 4 3 4
2 3 2 3 2 3 2 3 2 3 2 3
1 2 1 2 1 2 1 2 1 2 1 2
1 1 1 1 1 1

M1602_shielding_charger M1602_shielding_cpu M1602_shielding_pmu M1602_shielding_rf M1602_shielding_rf2 M1602_shielding_wifi

SPK Test point

TP1515

SPK_N [6,14]

TP1516

SPK_P [6,14]

B B

A A

Titl e
TP

Si ze Document Number Rev

E M6102-FIJI
V10
Dat e: Wednesday, November 20, 2019 Sheet 15 of 21
5 4 3 2 1
 5 4 3 2 1

D D

C C

Fingerprint
VIO18_PMU
[2..5,7,8,10,11,14,16..18]

R1601
J1600

14

13
DNP

G4

G3
5 6 SPI1_CLK
B VIO18_PMU [2..5,7,8,10,11,14,16..18] 5 6 [3] B
4 7
VIO28_PMU [4,11] 4 7 [3] SPI1_CSB
CON_FPID
R1607 10K 3 8
FP_ID [3] 3 8 [3] SPI1_MISO
2 9
FP_INT_N1 [3] 2 9 [3] SPI1_MOSI
1 10
FP_RESET [3] 1 10

DNP

DNP

DNP

DNP
ESD5431N-2/TR

ESD5431N-2/TR

G1

G2

1
11

12
C1603 C1602 YXT-BB10-10S-02

D1606

D1602

D1601

D1600
2

2
100nF 1uF
DNP

DNP

DNP
1

1
D1603
D1605

D1604

D3302
2

2
D1607

A A

Titl e
FingerPrint

Si ze Document Number Rev

E M6102-FIJI V10

Dat e: Wednesday, November 20, 2019 Sheet 16 of 21

5 4 3 2 1
 5 4 3 2 1

D D
GND

G10

G11

G12
H10

H11
E10

K10

E11

K11
E12
F11
L10

J11
G3

G5

G6

G7

G8

G9
C3
D3

H3
C4
D4

H4
C5
D5

H5
C6
D6

H6
C7
D7

H7

C8
D8

H8

C9
D9

H9
K2

E4

E5

E6

E7

E8

B9

E9
F3

F4

F5

F6

F7

F8

F9
J7

J8

J9
U3101

GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
B8
[19] RF_B5_PRX_RFIC PRX1
A8
[19] RF_B1_PRX_RFIC PRX2 F12
VDD_TXHF VRF18_RFIC [17]
B7
[18] RF_B40B41_PRX_RFIC PRX3
A7 C3101
[19] RF_B28B_PRX_RFIC PRX4 L11
VDD_STXLV VRF12_RFIC[17]
B6 100nF
[19] RF_B3_PRX_RFIC PRX5
A5
[19] RF_B2_PRX_RFIC PRX6 J10
VDD_STXHF VRF18_RFIC [17]
B5
[19] RF_B8_PRX_RFIC PRX7
A4 C3102
[19] RF_B7_PRX_RFIC PRX8 PRX E3
VRF12_RFIC [17] C3103
B4 VDD_RXLV 100nF
[19] RF_B4_PRX_RFIC SWHB 100nF GND
B3
[19] RF_B28A_PRX_RFIC SWLB G2
VDD_RXHF VRF18_RFIC [17]
A2
[20] RF_B8_DRX_RFIC DRX1 C3105 C3104 GND
A1 GND GND
[20] RF_B20_DRX_RFIC DRX2 100nF 100nF
B2
DRX3 MT6177M BSI_D2
J2 GND
B1
[20] RF_B5_DRX_RFIC DRX4 J1
BSI_D1 RFIC0_BSI_D1 [3]
C2 GND
[20] RF_B7_DRX_RFIC DRX5 BSI H2
BSI_D0 RFIC0_BSI_D0 [3]
D1
[20] RF_B2_DRX_RFIC DRX6 DRX K1
BSI_CLK RFIC0_BSI_CK [3]
D2
[20] RF_B40_DRX_RFIC DRX7 H1
BSI_EN RFIC0_BSI_EN [3]
E1
[20] RF_B41_DRX_RFIC DRX8
E2
[20] RF_B3_DRX_RFIC DRX9 L7 R3102 18
TXDET1 [19] RF_TXDET
F2
[20] RF_B1_DRX_RFIC DRX10
R3103 R3104
G1 R3101 2K 300 300
RCAL GND
D12
C
[18] RF_LTE_HB_TX_RFIC TXO1 C
C12 G4
[18] RF_LTE_MB_TX_RFIC TXO2 TX O XO EN_BB SRCLKENA1 [3,4]
A12
[19] RF_2G_HB_TX_RFIC TXO3(2G) DRX(I/Q) PRX(I/Q) TX(I/Q) DET(I/Q) L1 GND GND
VIO VIO18_RFIC [17]
A10
[19] RF_2G_LB_TX_RFIC TXO4(2G)

RX2_BBQN

RX1_BBQN
RX2_BBQP

RX1_BBQP
RX2_BBIN

RX1_BBIN

STX_MON
RX2_BBIP

RX1_BBIP

TX_BBQN
TX_BBQP
TX_GND1

TX_GND2

TX_GND3

TX_GND4

TX_GND5
C11 L2

TX_BBIN
TX_BBIP
[18] RF_LTE_LB_TX_RFIC PMIC_CLK_RF [4]

DET_QN
DET_QP
TXO5 XO_IN

DET_IN
DET_IP
C3106

100nF

MT6177M

L4

L5

L9
J3

J4

J6

J5
C10

D10

D11

H12
B10

B12

J12

L12

K12

F10
K4

K5

K9

K7

K8
GND

GND Put LC filter (default L=0R, C=NC) close to PMIC output

due to harmonic rejection.

LTE_TX_BB0_QP
LTE_TX_BB0_IP

LTE_TX_BB0_IN

LTE_TX_BB0_QN
LTE_PRX_BB0_IP

[3] LTE_PRX_BB0_QP
LTE_DRX_BB0_IP

LTE_PRX_BB0_IN

LTE_DET_BB0_IP
[3] LTE_DRX_BB0_QP

[3] LTE_PRX_BB0_QN

[3] LTE_DET_BB0_QP
[3] LTE_DRX_BB0_IN

LTE_DET_BB0_IN
[3] LTE_DRX_BB0_QN

[3] LTE_DET_BB0_QN
[3]

[3]

[3]

[3]

[3]

[3]

[3]

[3]

[3]
Power domain of MT6177M
B B

VIO18_RFIC
[17] VIO18_RFIC SH1701 0.3mm 10mil VIO18_PMU [2..5,7,8,10,11,14,16,18]

[17] VRF18_RFIC SH1702 0.3mm 20mil VRF18_PMU [4]

C3107

4.7uF

GND
[17] VRF12_RFIC SH1703 0.3mm 12mil VRF12_PMU [4]

C3108

4.7uF

GND

4.7uF close to RFIC for better Ripple Performance

A RF MT6177 A

Title
MT6177M

Size Document Number Rev

D M6102-FIJI

Date: Wednesday, November 20, 2019 Sheet 17 of 21

5 4 3 2 1
 5 4 3 2 1

B28B/20 TX L3230
RF_B28B_PA_DPX [19]
6.2n

C3237 C3238
DNP 3.9pF

D
B8 TX GND

L3231
GND

D
RF_B8_PA_DPX [19]
8.2n

C3239
DNP
C3240
3.3pF
L3229
B28A TX
[19] RF_B28A_PA_DPX
DNP

GND GND C3235 C3236

DNP DNP

B1 TX
RF_B1_PA_DPX [19]
L3232

1.8n
GND GND
B5 TX
L3228 7.5n [19] RF_B5_PA_DPX
C3241 C3242
DNP 0.5pF
C3233 C3234

GND GND
3.9pF DNP

L3225 9.1n
3G/4G_PAIN_LB
C3217 33pF [17] RF_LTE_LB_TX_RFIC

B3 TX
RF_B3_PA_DPX [19] C3243 2.2n
GND GND

C3209 C3210
L3233 3.3pF 3.3pF
DNP L3234
1.2pF

From PMIC
B2 TX GND
L3235 3.3n
GND
GND GND

RF_B2_PA_DPX [19]

C3245 C3244
3G/4G_PAIN_MB LTE_VMIPI
10mil
[18,19] SH3201 0.2mm [2..5,7,8,10,11,14,16..18] VIO18_PMU 10mil
DNP 1.2pF L3226 3.6n C3218 33pF [17] RF_LTE_MB_TX_RFIC
C3226

21
20
19
18
17
16
U3202
1uF
GND GND C3212 C3211

LB5
LB1
LB2
LB3
LB4
MB1
2.2pF 1.5pF
22 15
C
VPA_VCC2 [18] GND22 GND15 C
23 14 GND
24 MB2 GND14 13
GND24 RFIN_L 10mil LTE_VFE28
C3247 25 12 SH3202 0.2mm 10mil
C3246
100pF
26
27
MB3
MB4
RFIN_M
NC1
11
10
GND GND V28 to FEM LTE_VFE28 [14,18,20] [4] VFE28_PMU

470nF GND27 NC2 LTE_VMIPI [18,19]

28 9

L/M/H PA
29 VCC2_2 NC3 8 C3227
VCC1 VBAT [18,19] VBAT_RF
30 7 1uF
GND GND 31 VCC2 VIO 6
GND31 SCLK [3] MIPI0_SCLK
32 5 C3214
VPA_VCC1 [18] B34/39 SDATA [3] MIPI0_SDATA
33 4 C3213
34 HB1 GND4 3 100nF GND
GND34 RFIN_H 100pF
C3249 35 2
C3248 36 HB2 GND2 1 L1801
100pF GND36 GND1 BLM18KG101TN1D
80mil

GND38

GND40

GND43
470nF
VBAT to TXM VBAT_RF [18,19] [4..6,8,9,11,15] VBAT 80mil

HB3

HB4

RX1
RX2
GND GND

GND GND C3220

3G/4G_PAIN_HB C3228

37
38
39
40
41
42

43
VPA_VCC2 [18] GND 1nF
10mil DNP
L3227 4.3n C3219 8.2pF [17] RF_LTE_HB_TX_RFIC VPA_VCC1 [18] SH3205 0.2mm

C3542 GND GND GND

C3550 GND
470nF 100pF
R3215 C3215 C3216
1pF 1.2pF
DNP

GND GND

B4 TRX L3339 GND

共焊 盘 C3516
GND GND
C3517
靠 近Transceive
r 50mil
60mil
RF_B4_PA_DPX [19] 50mil
DNP VPA_VCC2 [18] SH3204 0.3mm [4] VPA_PMU
22pF U3442 22pF
C3441 C3442 L3241 C3510 C3265
DNP DNP 5 3 C3549 DNP C3230 C3231
RF-IN RF-OUT RF_B40B41_PRX_RFIC [17]
DNP 2.4n C3229
33pF 470nF 2200nF 2200nF
6 2

B40 TRX GND GND C3263 ENABLE VCC C3546 C3264

U3204
F6HH2G350EH71
DNP
4
GNDRF GND
1 共焊 盘 2.4n 2.4n
GND GND GND
L3240 C3462
4 1
RF_B40_TRX_TXM [19] OUT IN
2.2n 3.6n GND C3509 MXD8015H
DNP GND
B C3508 B
C3262 [3] GND
GND BPI_BUS10
5
3
2

C3261 15n C3450 C3254 GND [14,18,20] LTE_VFE28

DNP DNP 0.75pF
5
3
2

GND
GND DNP
Note:
GND GND GND
Reserve one tuning cap. For PMIC VPA total cap requirement,
GND
GND
C3257
the total cap at RF side should be in 6.2uF +/-10%.
RF_B7_PA_DPX [19]
2n

B7 TX C3258
DNP
L3238
0.75pF

GND GND

B41 TRX L3342

U3424
F6FC2G595H4PD
VIO18_PMU
[2..5,7,8,10,11,14,16..18]

L3341
4 1 R3214
RF_B41_TRX_TXM [19] OUT IN
2.7n 390K
22pF
C3447 C3448 GND C3445
C3446
5
2 3
2

1.8n 12n 4.3n

1.2pF [3]
5
3

AUX_IN1_NTC

GND GND GND GND NTC3201

100K

t
GND
GND

NTC3201 close to PA , and located in the same layer

A A

Title
<Title>

Size Document Number Rev

D M6102-FIJI V10

Date: Wednesday, November 20, 2019 Sheet 18 of 21

5 4 3 2 1
 5 4 3 2 1

[18,19] LTE_VMIPI VBAT_RF [18]

C1901 C3371 C3372 C3369

R1902 1nF C3370
120K 10pF 1nF 10uF 10uF
RF_TXDET [17]

GND GND GND GND

[3] ANT_Detect U3206 R3216 6.8K

19

18

17

16

15

14

13

12
SKY77916-11 [3] APC1

GND18

GND16

GND15

GND14

GND13

GND12
CPL_O
NC
R1901
10K CN1 C3373 R3622
CN2 1180110044 20 11 220pF DNP
GND20 GND11
4 21 10
GND3 OUT IN GND21 VBAT
L3244
3 1 C1902 33pF 2 1 C1903 33pF 22 9 GND GND
D GND2 S ANT VCC D
1.5n [18,19] LTE_VMIPI

GND1
GND2
2 23 8
GND1 L1901 L1902 GND23 VRAMP
82n 82n C3379 C3378 24 7 C3374
TRX14 VIO
RFR40-060A010 DNP DNP COPAD

3
4
GND GND 25 6 1nF
TRX13 SDATA
26 5
GND GND GND GND TRX12 SCLK GND
27 4
Add test for ANT -20191024 GND
Add test for ANT -20191024 [19] RF_B28A_TRX_TXM TRX11 GND4 [3] MIPI1_SDATA
28 3 R3217 100
[18] RF_B41_TRX_TXM TRX10 RFIN_H [3] MIPI1_SCLK
29 2
R3200 DNP TRX9 RFIN_L
[19] RF_B4_TRX_TXM
30 1 C3375
R3201 0 TRX8 GND1

GND38
[18] RF_B40_TRX_TXM 33pF

TRX7

TRX6

TRX5

TRX4

TRX3

TRX2

TRX1
39
GND39

[19] RF_B7_TRX_TXM
GND

31

32

33

34

35

36

37

38
R3218 0 C3376 33pF [17] RF_2G_HB_TX_RFIC
RF_B2_TRX_TXM [19]
R3219 R3220

U3207
SAYEY1G95GA0F0A
RF_B8_TRX_TXM [19]
GND DNP DNP
2G_PAIN_HB
B1 TRX C3380
6
TX
3
[18] RF_B1_PA_DPX
RF_B3_TRX_TXM [19]
GND GND

RF_B1_TRX_TXM [19] ANT

3n R3221 0 C3377 33pF [17] RF_2G_LB_TX_RFIC
L3246 1 L3248 2n C3387 22pF [17] RF_B1_PRX_RFIC

2G_PAIN_LB
L3245 GND RX R3222 R3223
DNP RF_B28B_TRX_TXM [19]

8
7
5
4
2
4.7n DNP DNP
L3247 L3249

8
7
5
4
2
5.6n 5.6n
GND RF_B1_TRX_TXM [19]
GND GND
GND

GND GND RF_B5_TRX_TXM [19]

GND

C C

U3208
SAYEY1G88BA0B0A

B2 TRX L3251
6
TX
3
[18] RF_B2_PA_DPX

RF_B2_TRX_TXM [19] ANT

27pF 1 C3381 15pF C3388 22pF
RX [17] RF_B2_PRX_RFIC
GND
8
7
5
4
2

L3250 L3252
C3552 2.2n 2.7n
8
7
5
4
2

DNP C3382
DNP

GND
GND
GND
GND
GND

U3425
B8 TRX U3213
SAYEY897MBA0B0A

B4 TRX C3453
SAYEY1G73BA0F0A

TX
3
[18] RF_B4_PA_DPX RF_B8_TRX_TXM [19] L3267 3.3n 6
ANT
TX
3
[18] RF_B8_PA_DPX

6 L3268 L3269 1 C3399 7.5n C3270 33pF

RF_B4_TRX_TXM [19] ANT C3454 C3512 RX [17] RF_B8_PRX_RFIC
DNP 7.5n GND

8
7
5
4
2
L3343 1
DNP GND RX [17] RF_B4_PRX_RFIC
DNP L3344

8
7
5
4
2
8
7
5
4
2

DNP L3345
DNP L3346 DNP GND GND C3400 C3401
DNP
8
7
5
4
2

DNP 0.5pF DNP

GND

GND GND GND GND

GND GND GND

B B

B3 TRX U3210
SAYEY1G74BC0B0A

3
B28A PRX U3214
SAYEY718MBC0F0A

TX [18] RF_B3_PA_DPX
C3385 3
L3271 TX [18] RF_B28A_PA_DPX
6
RF_B3_TRX_TXM [19] ANT
1.0n 6
RF_B28A_TRX_TXM [19] ANT L3273 C3404
1 C3386 1.0n C3390 22pF
RX [17] RF_B3_PRX_RFIC
L3257 L3258 GND 1
DNP RX [17] RF_B28A_PRX_RFIC
8
7
5
4
2

DNP 3.3n L3260 GND

8
7
5
4
2
L3259 DNP L3272 L3274 L3275
8
7
5
4
2

C3402 DNP DNP

3n DNP DNP DNP

8
7
5
4
2
DNP
GND GND GND
GND GND
GND
GND GND GND GND

B28B/20 PRX U3423

SAYEY733MBC0F0A

B5 TRX L3261
U3211
SAYEY836MBA0F0A

3 RF_B28B_TRX_TXM [19]
C3405
6
ANT
TX
3
[18] RF_B28B_PA_DPX

TX [18] RF_B5_PA_DPX C3403

L3277 15pF L3278 1 C3406 3.3pF C3407 33pF
RX [17] RF_B28B_PRX_RFIC
6 DNP 7.5n GND 10n
RF_B5_TRX_TXM [19] ANT C3391

8
7
5
4
2
L3280
1.5n L3262 1 C3393 22pF L3279 10n
[17] RF_B5_PRX_RFIC

8
7
5
4
2
L3263 GND RX
7.5n 3.9pF
8
7
5
4
2

DNP GND GND L3276

3.3pF L3264 2.7pF
8
7
5
4
2

C3392 9.1n GND GND

GND DNP
GND GND
GND

GND GND

GND

A A

B7 TRX U3212
SAYEY2G53BA0F0A

3
L3265 TX [18] RF_B7_PA_DPX
6
RF_B7_TRX_TXM [19] ANT
1 C3396 1.0n C3398 22pF
0 GND RX [17] RF_B7_PRX_RFIC
L3266
8
7
5
4
2

2n
C3394
8
7
5
4
2

DNP C3395 C3397

1.5pF DNP Title
<Title>
GND
Size Document Number Rev
GND GND GND D M6102-FIJI V10

GND Date: Wednesday, November 20, 2019 Sheet 19 of 21

5 4 3 2 1
 5 4 3 2 1

ANT3412 ANT3 CN3

1180110044

U3412
OUT IN
C3419 0 C3418 0 2 1 C3417 33pF 13
ANT 3
RF1 [20] RF_B40_DRX_ASM

GND1
GND2
L3285
C3422 47n 9
RF2 [20] RF_B7_DRX_ASM
DNP C3421
DNP 7 2
[3] [20] RF_B2_DRX_ASM

3
4
BPI_BUS7 VC1 RF3
6
BPI_BUS8 [3] VC2
GND 5 10
BPI_BUS9 [3] VC3 RF4 [20] RF_B5_DRX_ASM
D GND 1 D
RF5 [20] RF_B41_DRX_ASM
GND GND
GND 11
RF6 [20] RF_B20_DRX_ASM
C3426 C3424 C3425
4 14
VDD RF7 [20] RF_B1_DRX_ASM
56pF 56pF 56pF
12
RF8 [20] RF_B8_DRX_ASM
15
GND 8
ANT1 GND GND GND NC

RTC8618
C3423 12n LTE_VFE28 [14,18,20]

C3428 GND
U3421 C3427
10nF 33pF
10 1 L3336 0
[14,18,20] LTE_VFE28 RFC RF1 GND
2 L3414 4.7n
4 RF2 GND GND
VDD 9 L3337 7.5n
5 RF3
[3] BPI_BUS5 VCTL1
6 8 L3338 DNP
VCTL2 RF4

3 GND1
7 GND2
[3] BPI_BUS6
MXD8545A
C3440 C3439 C3438

10nF 56pF 56pF

GND
GND GND GND

ANT TUNER
GND GND

C C

L3407
L3288
DNP
DNP

B1/B3/B4 DRX U3413 C3497 33pF C3494 22pF [17] RF_B3_DRX_RFIC

9
L3286 2n 1 LCH
RF_B1_DRX_ASM [20] L/H 6
HCH
L3287
DNP
GND C3513 22pF C3429 22pF [17] RF_B1_DRX_RFIC
10
2
3
4
5
7
8
10
2
3
4
5
7
8

SAWFD1G84AA0F0A
GND
L3415
DNP L3290
DNP

GND GND
GND

B2 DRX U3414
SAFFB1G84AB0F0A

L3291 2n 1 4 C3514 22pF C3430 22pF

RF_B2_DRX_ASM [20] IN OUT [17] RF_B2_DRX_RFIC
L3321 L3292
DNP DNP GND L3416
L3295
2
5 3
5

DNP
2.7n
2
3

GND GND

GND GND
B41 DRX U3419
SAFFB2G35AA0F0A
GND L3322
1 4 L3326 1.5n C3435 22pF
RF_B41_DRX_ASM [20] IN OUT [17] RF_B41_DRX_RFIC
1.5n
L3324 L3323 L3327
B

B5 DRX U3415
DNP DNP GND L3325 DNP B

2
3
5
DNP
SAFFB881MAN0F0A

2
3
5
L3299
L3296 2n 1 4 C3431 33pF GND GND GND
RF_B5_DRX_ASM [20] IN OUT [17] RF_B5_DRX_RFIC
2.4n
L3320 L3297 L3300 GND
DNP DNP GND DNP
L3298
2
5 3
5

15n
2
3

GND
GND GND GND

GND 共焊 盘

GND 共焊 盘
L3412 1.0n
C3557 22pF
B20/28 DRX C3436 L3332
1
U3426
SAFFB2G60AA0F0A

4 L3333 1.0n C3437 22pF

RF_B20_DRX_ASM [20] IN OUT [17] RF_B20_DRX_RFIC
15n 10n

B7 DRX L3411
L3328 L3331 L3330 GND
L3334
DNP
L3335
DNP

2
5 3
5
DNP 3.3pF 22n
U3416 22pF

2
3
SAFFB2G65AB0F0A U3437
L3306 C3515
GND GND GND
L3304 1.2n 1 4 5 3 C3432 22pF
RF_B7_DRX_ASM [20] IN OUT RF-IN RF-OUT [17] RF_B7_DRX_RFIC
GND GND
L3301 L3303 L3305
DNP 6 2 L3417 DNP L3307
DNP DNP GND DNP ENABLE VCC
2
3
5

DNP 2.7n
2
3
5

GND GND GND

C3499
4
GNDRF

MXD8015H
GND
1
B40 DRX L3349
GND
U3427
SAFFB2G35AA0F0A
L3350
33pF GND GND 1 4 C3461 22pF
BPI_BUS1 [3] RF_B40_DRX_ASM [20] IN OUT [17] RF_B40_DRX_RFIC
C3496 0
GND LTE_VFE28 [14,18,20] L3348 22pF L3347 L3351
GND DNP DNP GND DNP L3352
GND GND 100nF

2
3
5
3n

B8 DRX

2
3
5
U3417 GND GND GND
SAFFB942MAN0F0A
L3312 GND
L3310 4.7n 1 4 C3433 33pF
RF_B8_DRX_ASM [20] IN OUT [17] RF_B8_DRX_RFIC
12n
A L3308
DNP
L3309
DNP GND DNP
L3311
L3313

DNP
GND
RF Drx A
2
3
5
2
3
5

GND GND GND GND

GND

Title
<Title>

Size Document Number Rev

D M6102-FIJI V10

Date: Wednesday, November 20, 2019 Sheet 20 of 21

5 4 3 2 1
 5 4 3 2 1

D D

VCN18_PMU [4,21]

C2101 1uF

[3] BT_DATA

C2100 100nF [3] BT_CLK

[3] WF_CTRL0
C2105 100pF [3] WF_CTRL1

[3] WF_CTRL2

GND

GND

ANT2101 ANT2102

30

29

28

27

26

25

24

23

22

21
U3430
U2101

BT_DATA

BT_CLK
WIFI_AUX_2G

WB_VDET_2G

WIFI_VDET_5G

WF_CTRL0

WF_CTRL1

WF_CTRL2
AVDD18_WBT_2

AVDD18_WBT_1
C2102 0 R2106 0 5 3
COM 1.57GHz
U2102
C F6HG2G441EG66KX C
C2103 2
4 GND1 1 L2100 2.2n 4 1 L2101 2.2n 31 20
DNP GND2 2.4/5GHz OUT IN WB_RF_2G WF_IP [3] WF_IP
C2107 6
GND3 L2103 L2105 L2102 L2115
DNP
DNP DNP GND DNP DNP
GND RFDIP1608060TM7T62 32 19

5
3
2
NC2 WF_IN [3] WF_IN
GND

5
3
2
GND GND VCN33_PMU [4,21]

33 18
AVDD33_WBT WF_QP [3] WF_QP
GND GND GND GND

C2108 C2109
GND 4700nF 100pF 34 17
WF_RF_5G WF_QN [3] WF_QN

GND 35 16
GND WF_AUX_5G BT_IP [3] BT_IP

[4,21] BEAD2100 1 2 600ohm@100MHz 36

MT6631 15
VCN28_PMU AVDD28_FM BT_IN [3] BT_IN

GND C2110 10nF

37 14
FM_RX_N_6625 [6] FM_LANT_N BT_QP [3] BT_QP

L2106 82n 38 13
FM_ANT [6] FM_LANT_P BT_QN [3] BT_QN

L2107 L2108
DNP DNP 39 12
GPS_RFIN GPS_IP [3] GPS_I
VCN18_PMU [4,21]

40 11
AVDD18_GPS GPS_IN [3] GPS_Q

AVDD28_FSOURCE
GND GND

CONN_TOP_DATA

CONN_TOP_CLK
C2111

CONN_HRST_B
41
4700pF DVSS

GPS_QN

GPS_QP
WB_PTA

XO_IN
CEXT

NC1
1

10
U2104 MT6631
SAFFB1G56KB0F0A U2103 GND

1 4 C2113 18pF L2110 10n 3 6 C2112 22pF L2109 DNP

IN OUT RF-IN RF-OUT GND
GND

5 4 L2117 100n [4,21]

GND GPIO_GPS_LNA_EN [3] ENABLE VCC VCN28_PMU CONN_HRST_B [3]
2
3
5

CONN_TOP_DATA [3] [21] CONN_XO_IN

2
3
5

1 2
GND1 GND2 CONN_TOP_CLK [3]
CONN_WB_PTA [3]
C2117 MXDLN16G C2114
22pF C2115 C2116
1uF 100pF
GND 1uF

GND
GND GND

GND

B B

U2105
1 4
GND1 VCC [4,21] VCN28_PMU
2 3 C2118
GND2 OUT
DNP DNP

GND GND

R2100 DNP [21] CONN_XO_IN

R2105

PMIC_CLK_WCN [4] R2104 0 0 [3] CONN_XO_IN_BB

共焊 盘

A A

Titl e
MT6631

Si ze Document Number Rev

E M6102-FIJI V10

Dat e: Wednesday, November 20, 2019 Sheet 21 of 21

5 4 3 2 1