Author Biographies

Yogesh S. Chauhan is an Assistant Professor in the electrical engineering department

at the Indian Institute of Technology, Kanpur. He received his Ph.D. in compact
modeling of high voltage MOSFETs in 2007 from EPFL, Switzerland. From 2007-
2010, he was a manager at IBM, Bangalore, where he led a compact modeling
team, focusing on RF bulk and SOI transistors and ESD modeling. From 2010-
2012, he was a postdoctoral fellow at the University of California, Berkeley, where
he worked on the development of bulk and multigate transistor models, including
BSIM6, BSIM-IMG and BSIM-CMG. He received the IBM Faculty Award in 2013
for his contribution to compact modeling. He has co-authored over 50 conference and
journal publications in the field of device compact modeling.
Darsen D. Lu was one of the key contributors of the industry standard FinFET
compact model, BSIM-CMG, and thin-body SOI compact model, BSIM-IMG. He
received his B.Sc. in electrical engineering in 2005, from National Tsing Hua
University, Hsinchu, Taiwan, and his M.Sc. and Ph.D. in electrical engineering from
the University of California, Berkeley, in 2007 and 2011 respectively. Since 2011,
he has been a research scientist at the IBM Thomas J. Watson Research Center,
Yorktown Heights, New York. His current research focuses on the modeling of novel
semiconductor devices such as SiGe FinFETs, phase change memory and carbon-
based transistors.
Sriramkumar Venugopalan received his M.Sc. and Ph.D. in electrical engineering
at the University of California, Berkeley and his B.Sc. from the Indian Institute of
Technology (IIT), Kanpur. While at Berkeley he worked in the BSIM Group and
pursued research and development of multi-gate transistor compact SPICE models
that contributed to the industry standard BSIM-CMG model. He has authored and co-
authored more than 30 research papers in the area of semiconductor device SPICE
models and integrated circuit design. Currently Dr. Venugopalan is with Samsung
Electronics pursuing RF integrated circuit design in advanced semiconductor tech-
nology nodes.
Sourabh Khandelwal is currently a Postdoctoral Researcher in the BSIM Group,
University of California, Berkeley. He received his Ph.D. from the Norwegian
University of Science and Technology in 2013 and his M.Sc. from the Indian Institute
of Technology (IIT), Bombay in 2007. From 2007–2010 he worked as a research
engineer at the IBM Semiconductor Research and Development Centre, developing
compact models for RF SOI devices. He holds a patent and has authored several
research papers in the area of device modeling and characterization. His Ph.D. work
on the GaN compact model is under consideration for industry standardization by the
Compact Model Coalition.

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x Author Biographies

Juan Pablo Duarte Sepúlveda is currently working towards his Ph.D. at the
University of California, Berkeley. He received his B.Sc. in 2010 and his M.Sc. in
2012, both in electrical engineering from the Korea Advanced Institute of Science
and Technology (KAIST). He held a position as a lecturer at the Universidad Tecnica
Federico Santa Maria, Valparaiso, Chile, in 2012. He has authored many papers
on nanoscale semiconductor device modeling and characterization. He received the
Best Student Paper Award at the 2013 International Conference on Simulation of
Semiconductor Processes and Devices (SISPAD) for the paper: Unified FinFET
Compact Model: Modelling Trapezoidal Triple-Gate FinFETs.
Navid Paydavosi received his Ph.D. in Micro-Electro-Mechanical Systems (MEMS)
and Nanosystems from the University of Alberta, Canada in 2011. He worked for the
BSIM Group at the University of California, Berkeley, as a post-doctoral scholar from
2012 to 2014. He has published several research papers on the theory and modeling of
modern Si-MOSFETs and there future alternatives, including carbon-based and III-
V high electron mobility devices. Currently Dr. Paydavosi is with Intel Corporation,
Oregon as a device engineer working on process technology development.
Ali M. Niknejad received his B.Sc in electrical engineering from the University of
California, Los Angeles, in 1994, and his M.Sc. and Ph.D., also in electrical engineer-
ing, from the University of California, Berkeley, in 1997 and 2000 respectively. He
is currently a professor in the EECS department at UC Berkeley and Faculty Director
of the Berkeley Wireless Research Center (BWRC) Group. Professor Niknejad was
the recipient of the 2012 ASEE Frederick Emmons Terman Award for his work and
textbook on electromagnetics and RF integrated circuits. He has co-authored over
200 conference and journal publications in the field of integrated circuits and device
compact modeling. His focus areas of research include analog, RF, mixed-signal,
mm-wave circuits, device physics and compact modeling, and numerical techniques
in electromagnetics.
Chenming Hu is Distinguished Chair, Professor Emeritus at the University of
California, Berkeley. He was the Chief Technology Officer of TSMC and founder
of Celestry Design Technologies. He is best known for developing the revolutionary
3D transistor FinFET that powers semiconductor chips beyond 20nm. He also led
the development of BSIM - the industry standard transistor model that is used in
designing most of the integrated circuits in the world. He is a member of the US
Academy of Engineering, the Chinese Academy of Science, and Academia Sinica.
His honors include the Asian American Engineer of the Year Award, the IEEE
Andrew Grove Award and Solid Circuits Award as well as the Nishizawa Medal, and
UC Berkeley’s highest honor for teaching - the Berkeley Distinguished Teaching
Award.