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Home / My courses / UGRD-CPE6300-2233T / Midterm Examination / Midterm Exam

Started on Monday, 17 July 2023, 11:19 AM


State Finished
Completed on Monday, 17 July 2023, 11:37 AM
Time taken 17 mins 58 secs
Marks 49.00/50.00
Grade 98.00 out of 100.00

Question 1
Correct

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What is BIU?

Answer: bus interface unit 

Question 2
Correct

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Control Flags: It controls the operations of the execution unit. Control flags are:
o    Trap Flag

o    Interrupt Flag


o    MultiDirection Flag

Select one:
True

False 

Question 3
Correct

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When only one 8086 CPU is to be used in a microprocessor system, the 8086 is used in the Minimum mode of operation.

Select one:
True 

False
Question 4

Correct

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Register Indirect Addressing: The operand's offset is placed in any one of the registers BX, BP, SI or DI as specified in the instruction.

Select one:
True 

False

Question 5
Incorrect

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Conditional flags are:


o    Carry Flag

o    Auxiliary Flag


o    Parity Flag

o    Zero Flag

o    Unsign Flag
o    Overflow Flag

Select one:
True 

False

Question 6

Correct

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It is used by the processor to handle emergency conditions.

Answer: nmi 
Question 7

Correct

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The data, variables and constants given in the program are held in the data segment of the memory.

Select one:
True 

False

Question 8
Correct

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Based Addressing: The operand's offset is the sum of an 8-bit or 16-bit displacement and the contents of the base register BX or BP.

Select one:
True 

False

Question 9
Correct

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The 8085 can handle up to 256, hardware and software interrupts.

Select one:
True

False 

Question 10
Correct

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Interrupt  is a process of creating a temporary halt during program execution and allows peripheral devices to
access the microprocessor.
Question 11

Correct

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When EU executes instructions, the BIU gets 6-bytes of the next instruction and stores them in the instruction queue and this process
is known as instruction pre fetch. This process decreases the speed of the processor.

Select one:
True

False 

Question 12
Correct

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When Intel 8287/8286 octal bus transceiver is used this signal. It is active HIGH.

Select one:
True

False 

Question 13
Correct

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Index Register: The following four registers are in the group of pointer and index registers:

o    Stack Pointer (SP)

o    Base Pointer (BP)


o    Source Index (SI)

o    Final Destination Index (DI)

Select one:
True

False 
Question 14

Correct

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Stack segment holds addresses and data of subroutines. It also holds the contents of registers and memory locations given in PULL
instruction.

Select one:
True

False 

Question 15
Correct

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What is ISR?

Answer: interrupt service routine 

Question 16
Correct

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Fetches instruction codes, stores fetched instruction codes in first-in-first-out register set called a queue

Select one:
True 

False

Question 17
Correct

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The INTR is a Non-maskable interrupt.

Select one:
True

False 
Question 18

Correct

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What is NMI?

Answer: non-maskable interrupt 

Question 19
Correct

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In immediate address  , the operand is specified in the instruction itself.

Question 20

Correct

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8086 contains two independent functional units: a Bus Interface Unit (BIU) and an Execution Unit (EU).

Select one:
True 

False

Question 21
Correct

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The addressed memory or I/O sends acknowledgment through this pin. When HIGH, it denotes that the peripheral is ready to transfer
data.

Select one:
True 

False
Question 22

Correct

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It handles all arithmetic and logical operations. Such as addition, subtraction, multiplication, division, AND, OR, NOT operations.

Answer: ALU 

Question 23
Correct

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On receiving interrupt signal, the processor issues an interrupt acknowledgment signal. It is active LOW.

Select one:
True 

False

Question 24

Correct

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System reset. The signal is active LOW.

Select one:
True

False 

Question 25
Correct

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There are two operating modes of operation for Intel 8086, namely the minimum mode and the maximum mode.

Select one:
True 

False
Question 26

Correct

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The Intel 8086 has two hardware interrupt pins

Select one:
True 

False

Question 27
Correct

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A19 is multiplexed with status signal S6.

Select one:
True 

False

Question 28
Correct

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The segment registers, instruction pointer and 6-byte instruction queue are associated with the bus interface unit

Select one:
True 

False

Question 29
Correct

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The BIU and EU operate in series independently

Select one:
True

False 
Question 30

Correct

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When another device in microcomputer system wants to use the address and data bus, it sends HOLD request to CPU through this pin.
It is an active LOW signal.

Select one:
True

False 

Question 31
Correct

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A microprocessor can also be interrupted by internal abnormal conditions such as overflow; division by zero; etc.

Select one:
True 

False

Question 32
Correct

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Code segment of the memory holds instruction codes of a program.

Select one:
True 

False

Question 33

Correct

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Extra segment holds the destination addresses of some data of certain string instructions.

Select one:
True 

False
Question 34

Correct

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NMI is a single Non-Maskable Interrupt having lower priority than the maskable interrupt.

Select one:
True

False 

Question 35
Correct

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A18 is multiplexed with interrupt status S6

Select one:
True

False 

Question 36
Correct

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Conditional flags are:

o    Carry Flag


o    Auxiliary Flag

o    Parity Flag

o    Zero Flag


o    Sign Flag

o    Overflow Flag

Select one:
True 

False
Question 37

Correct

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NMI is a single Non-Maskable Interrupt having higher priority than the maskable interrupt.

Select one:
True 

False

Question 38
Correct

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The 8086 can handle up to 256, hardware and software interrupts.

Select one:
True 

False

Question 39
Correct

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The BIU and EU operate in parallel independently. This makes processing slower.

Select one:
True

False 

Question 40
Correct

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In register addressin  , the operand is placed in one of the 16-bit or 8-bit general purpose registers.
Question 41

Correct

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Hardware Interrupts  are that type of interrupt which are caused by any peripheral device by sending a signal through a
specified pin to the microprocessor.

Question 42
Correct

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A programmer can also interrupt microprocessor by inserting INT instruction at the desired point in the program while debugging a
program.

Select one:
True 

False

Question 43
Correct

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The 8086 microprocessors have 2 addressing modes.

Select one:
True

False 

Question 44
Correct

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In a multiprocessor system 8086 operates in the Minimum mode.

Select one:
True

False 
Question 45

Correct

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The microprocessor 8086 sends this signal to latch the address into the Intel 8282/8283 latch.

Select one:
True 

False

Question 46
Correct

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There are two operating modes of operation for Intel 8086, namely the minima mode and the maxima mode.

Select one:
True

False 

Question 47
Correct

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A19 is multiplexed with status signal S5.

Select one:
True

False 

Question 48
Correct

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A18 is multiplexed with interrupt status S5

Select one:
True 

False
Question 49

Correct

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In a multiprocessor system all other processors are informed through this signal that they should not ask the CPU for relinquishing the
bus control.

Select one:
True 

False

Question 50
Correct

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There are two operating modes of operation for Intel 8085, namely the minimum mode and the maximum mode.

Select one:
True

False 

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