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† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above
those indicated in the operational listings of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
†† See Section 4.1.2 “Input Voltage Limits”.
1.2 Specifications
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/4,
VOUT = VDD/2, VL = VDD/2, RL = 10 k to VL and CL = 30 pF.
Parameters Sym. Min. Typ. Max. Units Conditions
Input Offset
Input Offset Voltage VOS -1.6 — 1.6 mV
Input Offset Drift with VOS/TA — ±0.6 — µV/°C TA= -40°C to +125°C
Temperature
Power Supply Rejection Ratio PSRR 80 95 — dB
Input Bias Current and Impedance
Input Bias Current IB — ±1 — pA
— 19 — pA TA = +85°C
— 200 — pA TA = +125°C
Input Offset Current IOS — ±1 — pA
Common-Mode Input Impedance ZCM — 1013||6 — ||pF
Differential Input Impedance ZDIFF — 1013||1 — |pF
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS = GND,
VCM = VDD/4, VOUT = VDD/2, VL = VDD/2, RL = 10 k to VL and CL = 30 pF.
Parameters Sym. Min. Typ. Max. Units Conditions
AC Response
Gain Bandwidth Product GBWP — 1 — MHz
Phase Margin PM — 70 — ° G = +1 V/V
Slew Rate SR — 1.9 — V/µs VDD = 5.5V
Settling Time ts — 3 — µs To 0.1%, VDD = 5V,
2V step, G = +1
— 3.5 — To 0.01%, VDD = 5V,
2V step, G = +1
Total Harmonic Distortion + Noise THD + N — 0.0025 — % VDD = 5V, Vo = 1VRMS,
G = +1, f = 1kHz, 80 kHz
measurement BW
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +5.5V and VSS = GND.
Parameters Sym. Min. Typ. Max. Units Conditions
Temperature Ranges
Operating Temperature Range TA -40 — +125 °C Note 1
Storage Temperature Range TA -65 — +150 °C
Thermal Package Resistances
Thermal Resistance, 5-Lead SC70 JA — 331 — °C/W
Thermal Resistance, 5-Lead SOT-23 JA — 221 — °C/W
Thermal Resistance, 8-Lead MSOP JA — 206 — °C/W
Thermal Resistance, 8-Lead SOIC JA — 150 — °C/W
Thermal Resistance, 14-Lead TSSOP JA — 100 — °C/W
Thermal Resistance, 14-Lead SOIC JA — 120 — °C/W
Note 1: The internal Junction Temperature (TJ) must not exceed the absolute maximum specification of +150°C.
2.1 DC Inputs
40 600
Percentage of Occurances (%)
600
800
-1600
-1400
-1200
-1000
-400
-200
0
200
400
1000
1200
1400
1600
-600
-0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Input Offset Voltage (μV) Input Common Mode Voltage (V)
FIGURE 2-1: Input Offset Voltage FIGURE 2-4: Input Offset Voltage vs.
Histogram. Common-Mode Input Voltage.
40 200
Percentage of Occurances (%)
114 Samples
Input Offset Voltage (μV)
-3
-2
-1
0.5
-3.5
-2.5
-1.5
-0.5
0
1
1.5
2
2.5
3
3.5
4
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Offset Voltage Drift (μV/°C) Output Voltage (V)
FIGURE 2-2: Input Offset Voltage Drift FIGURE 2-5: Input Offset Voltage vs.
Histogram. Output Voltage.
1000 500
800 TA = -40°C 400
Input Offset Voltage (μV)
TA = +25°C
600 TA = +85°C 300
400 TA = +125°C 200
200 100
0 0
-200 -100
TA = -40°C
-400 -200 TA = +25°C
-600 -300 TA = +85°C
TA = +125°C
-800 VDD = 1.8V
-400 VCM = VSS
-1000 -500
-0.4 -0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Common Mode Voltage (V) Supply Voltage (V)
FIGURE 2-3: Input Offset Voltage vs. FIGURE 2-6: Input Offset Voltage vs.
Common-Mode Input Voltage. Power Supply Voltage.
5 140
Input Bias, Offset Currents
4 VDD = 5.5V
0 110
-1
IB- IB+ 100
-2
-3 90
-4
-5 80
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -50 -25 0 25 50 75 100 125
Input Common Mode Voltage (V) Ambient Temperature (°C)
FIGURE 2-7: Input Bias, Offset Current FIGURE 2-10: DC Open-Loop Gain vs.
vs. Common-Mode Voltage. Ambient Temperature.
400 0.001
VDD = 5.5V
1m
Input Bias Current (pA)
300 100μ
0.0001
TA = +125°C 10μ
0.00001
200
1μ
0.000001
-IIN (A)
100 100n
0.0000001
TA = +125°C
TA = +85°C 10n
1E-08
TA = +85°C
0
TA = +25°C
1n
1E-09
TA = -40°C
-100
100p
1E-10
-200 10p
1E-11
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -1 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0
Input Common Mode Voltage (V) VIN (V)
FIGURE 2-8: Input Bias Current vs. FIGURE 2-11: Measured Input Current vs.
Common-Mode Input Voltage. Input Voltage (below VSS).
110
VDD = +5.5V
105
CMRR, PSRR (dB)
100 PSRR
95
90
CMRR (VCM = -0.1V to +5.6V)
85
80
75
70
-50 -25 0 25 50 75 100 125
Ambient Temperature (°C)
80 50
70
30
20
60
10 +125ᵒC
(mA)
VDD = +5.5V +85ᵒC
50 0 +25ᵒC
VDD = +1.8V -10 -40ᵒC
40 -20
-30
30 -40
Per Amplifier
-50
20 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
-50 -25 0 25 50 75 100 125
Ambient Temperature (°C) Power Supply Voltage (V)
FIGURE 2-12: Quiescent Current vs. FIGURE 2-15: Output Short-Circuit Current
Ambient Temperature. vs. Power Supply Voltage.
80 400
VDD = 1.8V
60 300
50 250
(mV)
40 200
TA = -40°C VOL - VSS
30 TA = +25°C 150
TA = +85°C VDD - VOH
20 TA = +125°C 100
10 50
Per Amplifier
0 0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0.0 1.0 2.0 3.0 4.0
Supply Voltage (V) Output Current Magnitude (mA)
FIGURE 2-13: Quiescent Current vs. FIGURE 2-16: Output Voltage Headroom
Power Supply Voltage. vs. Output Current.
100 300
Output Voltage Headroom
90
Quiescent Current (μA)
80 250
70 200
60 VDD = 1.8V VDD - VOH
(mV)
50 150
40 VDD = 5.5V VOL - VSS
30 100
20 50
10 Per Amplifier VDD = 5.5V
0 0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0.0 2.0 4.0 6.0 8.0 10.0
Common Mode Input Voltage (V) Output Current Magnitude (mA)
FIGURE 2-14: Quiescent Current vs. FIGURE 2-17: Output Voltage Headroom
Common-Mode Input Voltage. vs. Output Current.
1.2 120
(MHz)
80
0.8 80
60
PSRR- 0.6 60
PSRR+ Phase Margin
40 0.4 40
20 0.2 20
VDD = 1.8V
0 0.0 0
100 1k 10k 100k 1M -50 -25 0 25 50 75 100 125
Frequency (Hz) Ambient Temperature (°C)
FIGURE 2-18: CMRR, PSRR vs. FIGURE 2-21: Gain Bandwidth Product,
Frequency. Phase Margin vs. Ambient Temperature.
140 225
10000
120 180
Open-Loop Gain (dB)
Phase
80 90
60 45 100
GN:
40 0 101 V/V
1
11 V/V
Gain 10 1 V/V
20 -45
0 -90
VDD = 5.5V 1
-20 -135 100
100 1k
1000 10k
10000 100k
100000 1M
1000000
1.4 140
Gain Bandwidth Product 100
1.2 120
Phase Margin (°)
80
EMIRR (dB)
1.0 100
(MHz)
0.8 80 60
0.6 60
40
0.4 40
Phase Margin
0.2 20 20
VDD = 5.5V VIN = 100 mVPK
0.0 0 VDD = 5.5V
-50 -25 0 25 50 75 100 125 0 10 100 1000 10000
10M 100M 1G 10G
Ambient Temperature (°C) Frequency
Frequency(Hz)
(Hz)
FIGURE 2-20: Gain Bandwidth Product, FIGURE 2-23: EMIRR vs. Frequency.
Phase Margin vs. Ambient Temperature.
120 10
VDD = 5.5V
80
60 1
EMIRR @ 2400 MHz
40 EMIRR @ 1800 MHz
EMIRR @ 900 MHz
20 EMIRR @ 400 MHz
0
0.01 0.1 1 0.1 1E+3 1E+4 1E+5 1E+6 1E+7
1k 10k 100k 1M 10M
RF Input Peak Voltage (VPK)
Frequency (Hz)
FIGURE 2-24: EMIRR vs. RF Input FIGURE 2-26: Maximum Output Voltage
Peak-to-Peak Voltage. Swing vs. Frequency.
0
Channel Separation (dB)
-20
-40
-60
-80
-100
-120
40
Input Noise Voltage Density
THD + N (dB)
VDD = 1.8V f = 1 kHz
25
(nV/√Hz)
-50
20 G = -1, RL = 2 kΩ
G = +1, RL = 2 kΩ
15 VDD = 5.5V -70
10
-90 G = -1, RL = 10 kΩ
5 G = +1, RL = 10 kΩ
f = 10 kHz
0 -110
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 0.001 0.01 0.1 1
Common Mode Input Voltage (V) Amplitude (VRMS)
FIGURE 2-27: Input Noise Voltage Density FIGURE 2-30: THD + N vs. Amplitude.
vs. Common-Mode Voltage.
10000
10μ
Input Noise Voltage Density
1000
1μ
(V/√Hz)
100
100n
10
10n
1
1n
0.1
1.E-1 1
1.E+0 10
1.E+1 100
1.E+2 1k
1.E+3 10k
1.E+4 100k
1.E+5
Frequency (Hz)
FIGURE 2-28: Input Noise Voltage Density FIGURE 2-31: 0.1 Hz to 10 Hz Voltage
vs. Frequency. Noise.
-50
VDD = 5.5V
-60 VCM = 2.5V
G=1
BW = 80 kHz
THD + N (dB)
-90
RL = 10 kΩ
-100
-110
100 1000
1k 10000
10k
Frequency (Hz)
3.0 6
Falling Edge, VDD =5.5V
2.5 5
VIN
2.0
4
1.5 Rising Edge, VDD =5.5V VOUT
3
Falling Edge, VDD =1.8V
1.0 Rising Edge, VDD =1.8V
2
0.5 VDD = 5.5V
G = +1 V/V
1
0.0
-50 -25 0 25 50 75 100 125
0
Ambient Temperature (°C) Time (10 μs/div)
FIGURE 2-32: Slew Rate vs. Ambient FIGURE 2-35: Large Signal Noninverting
Temperature. Pulse Response.
VOUT
Input, Output Voltages
VIN
(20 mV/Step)
VDD = 5.5V
G = +1 V/V
FIGURE 2-33: Small Signal Noninverting FIGURE 2-36: Large Signal Inverting Pulse
Pulse Response. Response.
7
VIN VIN
6
Input, Output Voltages (V)
Input, Output Voltages
5
(20 mV/Step)
4 VOUT
VDD = 5.5V
G = -1 V/V 3
1 VDD = 5.5V
VOUT G = +1 V/V
0
-1
Time (10 μs/div) Time (0.1 ms/div)
FIGURE 2-34: Small Signal Inverting Pulse FIGURE 2-37: The MCP6006/6R/6U/7/9
Response. Device Shows No Phase Reversal.
6 60
50
Input, Output Voltages (V)
Overshoot (%)
VDD = 5.5V
4 No Bypass Capacitors 40
VIN = 100mVPP
30
3
Overshoot (+)
20
2 Overshoot (-)
10 VIN = 100 mV
1 G = +1 V/V
VOUT 0
0 0 200 400 600 800 1000
tstart Capacitive Load (pF)
Time (10 μs/div)
-IN ‐
VDD
OUT
VSS
+IN +
VSS
+
VDD
VOUT
VSS
- RL
VL = 1V
Device Marking
XXNN MCP6006
MCP6006U
GANN
GFNN
GA25
Device Marking
MCP6006 AAA5
XXXXY MCP6006U AAA6 AAA50
MCP6006R AAA7
WWNNN Note: Applies to 5-Lead SOT-23.
31256
XXXXXXXX MCP6007
XXXXYYWW SN e3 2031
NNN 256
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
XXXXXX 6007E
YWWNNN 031256
XXXXXXXXXXX MCP6009
XXXXXXXXXXX E/SL e3
YYWWNNN 3124256
XXXXXXXX MCP6009E
YYWW 2031
NNN 256
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D A
e
e B
3 1
E1 E
2X
0.15 C
4 N
NOTE 1 5X TIPS
2X 0.30 C
0.15 C
5X b
0.10 C A B
TOP VIEW
A A2 c
C
SEATING
PLANE
A1 L
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Pins N 5
Pitch e 0.65 BSC
Overall Height A 0.80 - 1.10
Standoff A1 0.00 - 0.10
Molded Package Thickness A2 0.80 - 1.00
Overall Length D 2.00 BSC
Overall Width E 2.10 BSC
Molded Package Width E1 1.25 BSC
Terminal Width b 0.15 - 0.40
Terminal Length L 0.10 0.20 0.46
Lead Thickness c 0.08 - 0.26
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.15mm per side.
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
E
Gx
SILK SCREEN
3 2 1
C G
4 5
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Contact Pitch E 0.65 BSC
Contact Pad Spacing C 2.20
Contact Pad Width X 0.45
Contact Pad Length Y 0.95
Distance Between Pads G 1.25
Distance Between Pads Gx 0.20
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
0.20 C 2X
D
e1
A D
E/2
E1/2
E1 E
(DATUM D)
(DATUM A-B)
0.15 C D
2X
NOTE 1 1 2
B NX b
0.20 C A-B D
TOP VIEW
A A2
0.20 C
SEATING PLANE
A
SEE SHEET 2 A1 C
SIDE VIEW
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
T
L
L1
VIEW A-A
SHEET 1
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Pins N 5
Pitch e 0.95 BSC
Outside lead pitch e1 1.90 BSC
Overall Height A 0.90 - 1.45
Molded Package Thickness A2 0.89 - 1.30
Standoff A1 - - 0.15
Overall Width E 2.80 BSC
Molded Package Width E1 1.60 BSC
Overall Length D 2.90 BSC
Foot Length L 0.30 - 0.60
Footprint L1 0.60 REF
Foot Angle I 0° - 10°
Lead Thickness c 0.08 - 0.26
Lead Width b 0.20 - 0.51
Notes:
1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.25mm per side.
2. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
5 SILK SCREEN
Z C G
1 2
E
GX
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Contact Pitch E 0.95 BSC
Contact Pad Spacing C 2.80
Contact Pad Width (X5) X 0.60
Contact Pad Length (X5) Y 1.10
Distance Between Pads G 1.70
Distance Between Pads GX 0.35
Overall Width Z 3.90
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing No. C04-2091-OT Rev F
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2X
0.10 C A–B
D
A D
NOTE 5
N
E
2
E1
2
E1 E
2X
0.10 C A–B
2X
0.10 C A–B
NOTE 1 1 2
e NX b
B 0.25 C A–B D
NOTE 5
TOP VIEW
0.10 C
C A A2
SEATING
PLANE 8X
0.10 C
A1 SIDE VIEW
h
R0.13
h
R0.13
H 0.23
L
SEE VIEW C
(L1)
VIEW A–A
VIEW C
Microchip Technology Drawing No. C04-057-SN Rev F Sheet 1 of 2
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Pins N 8
Pitch e 1.27 BSC
Overall Height A - - 1.75
Molded Package Thickness A2 1.25 - -
Standoff § A1 0.10 - 0.25
Overall Width E 6.00 BSC
Molded Package Width E1 3.90 BSC
Overall Length D 4.90 BSC
Chamfer (Optional) h 0.25 - 0.50
Foot Length L 0.40 - 1.27
Footprint L1 1.04 REF
Foot Angle 0° - 8°
Lead Thickness c 0.17 - 0.25
Lead Width b 0.31 - 0.51
Mold Draft Angle Top 5° - 15°
Mold Draft Angle Bottom 5° - 15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.15mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
5. Datums A & B to be determined at Datum H.
8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
SILK SCREEN
Y1
X1
E
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Contact Pitch E 1.27 BSC
Contact Pad Spacing C 5.40
Contact Pad Width (X8) X1 0.60
Contact Pad Length (X8) Y1 1.55
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2X
0.10 C A–B
D
A NOTE 5 D
N
E
2
E2
2
E1 E
2X
0.10 C D
2X N/2 TIPS
NOTE 1 1 2 3 0.20 C
e NX b
B NOTE 5 0.25 C A–B D
TOP VIEW
0.10 C
C A A2
SEATING
PLANE 14X
A1 SIDE VIEW 0.10 C
h h
H R0.13
R0.13
SEE VIEW C
L
VIEW A–A (L1)
VIEW C
Microchip Technology Drawing No. C04-065-SL Rev D Sheet 1 of 2
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Pins N 14
Pitch e 1.27 BSC
Overall Height A - - 1.75
Molded Package Thickness A2 1.25 - -
Standoff § A1 0.10 - 0.25
Overall Width E 6.00 BSC
Molded Package Width E1 3.90 BSC
Overall Length D 8.65 BSC
Chamfer (Optional) h 0.25 - 0.50
Foot Length L 0.40 - 1.27
Footprint L1 1.04 REF
Lead Angle 0° - -
Foot Angle 0° - 8°
Lead Thickness c 0.10 - 0.25
Lead Width b 0.31 - 0.51
Mold Draft Angle Top 5° - 15°
Mold Draft Angle Bottom 5° - 15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimension D does not include mold flash, protrusions or gate burrs, which shall
not exceed 0.15 mm per end. Dimension E1 does not include interlead flash
or protrusion, which shall not exceed 0.25 mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
5. Datums A & B to be determined at Datum H.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
14
SILK SCREEN
1 2
X
E
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Contact Pitch E 1.27 BSC
Contact Pad Spacing C 5.40
Contact Pad Width (X14) X 0.60
Contact Pad Length (X14) Y 1.55
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
14Lead Thin Shrink Small Outline Package [ST] 4.4 mm Body [TSSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D A B
N
E
2
E1
2
E1 E
2X 7 TIPS
1 2 0.20 C B A
e
TOP VIEW
A
C A2 A
SEATING
PLANE
14X 14X b A1
A
0.10 C 0.10 C B A
SIDE VIEW
SEE DETAIL B
VIEW A–A
14Lead Thin Shrink Small Outline Package [ST] 4.4 mm Body [TSSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
(ș2)
R1
H
R2
L ș1
(L1)
(ș3)
DETAIL B
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Terminals N 14
Pitch e 0.65 BSC
Overall Height A – – 1.20
Standoff A1 0.05 – 0.15
Molded Package Thickness A2 0.80 1.00 1.05
Overall Length D 4.90 5.00 5.10
Overall Width E 6.40 BSC
Molded Package Width E1 4.30 4.40 4.50
Terminal Width b 0.19 – 0.30
Terminal Thickness c 0.09 – 0.20
Terminal Length L 0.45 0.60 0.75
Footprint L1 1.00 REF
Lead Bend Radius R1 0.09 – –
Lead Bend Radius R2 0.09 – –
Foot Angle ș1 0° – 8°
Mold Draft Angle ș2 – 12° REF –
Mold Draft Angle ș3 – 12° REF –
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
14Lead Thin Shrink Small Outline Package [ST] 4.4 mm Body [TSSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
SILK SCREEN
X
E
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
• Microchip believes that its family of products is secure when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal methods being used in attempts to breach the code protection features of the Microchip
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