StrongIRFET™

IRFS7530-7PPbF
Application HEXFET® Power MOSFET
 Brushed Motor drive applications
 BLDC Motor drive applications   D
VDSS 60V
 Battery powered circuits RDS(on) typ. 1.15m
 Half-bridge and full-bridge topologies G
max 1.4m
 Synchronous rectifier applications ID (Silicon Limited) 338A
 Resonant mode power supplies S
ID (Package Limited) 240A
 OR-ing and redundant power switches

Benefits
 Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
 Fully Characterized Capacitance and Avalanche SOA
 Enhanced body diode dV/dt and dI/dt Capability
 Lead-Free, RoHS Compliant
G D S
Gate Drain Source

Base Part Number Package Type Standard Pack Complete Part Number
Form Quantity
Tube 50 IRFS7530-7PPbF
IRFS7530-7PPbF D2Pak-7PIN
Tape and Reel Left 800 IRFS7530TRL7PP
( )

6 350
RDS(on), Drain-to -Source On Resistance m

ID = 100A
Limited By Package
5 300

250
ID, Drain Current (A)

200
3
TJ = 125°C
150
2

100
1
TJ = 25°C
50
0
4 8 12 16 20 0
VGS, Gate-to-Source Voltage (V) 25 50 75 100 125 150 175
TC , Case Temperature (°C)

Fig 1. Typical On-Resistance vs. Gate Voltage Fig 2. Maximum Drain Current vs. Case Temperature

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IRFS7530-7PPbF
Absolute Maximium Rating
Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 338
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 239
A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 240
IDM Pulsed Drain Current  1450
PD @TC = 25°C Maximum Power Dissipation 375 W
Linear Derating Factor 2.5 W/°C
VGS Gate-to-Source Voltage ± 20 V
TJ Operating Junction and
-55 to + 175  
TSTG Storage Temperature Range °C  
Soldering Temperature, for 10 seconds (1.6mm from case) 300
Avalanche Characteristics 
EAS (Thermally limited) Single Pulse Avalanche Energy  526
mJ
EAS (Thermally limited) Single Pulse Avalanche Energy  1029
IAR Avalanche Current  A
See Fig 14, 15, 23a, 23b
EAR Repetitive Avalanche Energy  mJ
Thermal Resistance  
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case  ––– 0.40 °C/W 
RJA Junction-to-Ambient  ––– 40  

Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 60 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 33 ––– mV/°C Reference to 25°C, ID = 1mA 
RDS(on) Static Drain-to-Source On-Resistance ––– 1.15 1.4 m VGS = 10V, ID = 100A 
––– 1.4 ––– m VGS = 6.0V, ID = 50A 
VGS(th) Gate Threshold Voltage 2.1 ––– 3.7 V VDS = VGS, ID = 250µA
IDSS Drain-to-Source Leakage Current ––– ––– 1.0 µA VDS = 60 V, VGS = 0V
––– ––– 150 VDS = 60V,VGS = 0V,TJ =125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG Gate Resistance ––– 2.2 ––– 

Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 240A.
Note that current limitations arising from heating of the device leads may occur with some lead mounting
arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
 Limited by TJmax, starting TJ = 25°C, L = 105µH, RG = 50, IAS = 100A, VGS =10V.
ISD  100A, di/dt  1575A/µs, VDD  V(BR)DSS, TJ 175°C.
Pulse width  400µs; duty cycle  2%.
 Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
 R is measured at TJ approximately 90°C.
 Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 45A, VGS =10V.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques
refer to application note #AN-994: http://www.irf.com/technical-info/appnotes/an-994.pdf

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IRFS7530-7PPbF

Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 249 ––– ––– S VDS = 10V, ID =100A
Qg Total Gate Charge ––– 236 354 ID = 100A
Qgs Gate-to-Source Charge ––– 62 ––– VDS = 30V
nC  
Qgd Gate-to-Drain Charge ––– 73 ––– VGS = 10V
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 163 –––
td(on) Turn-On Delay Time ––– 24 ––– VDD = 30V
tr Rise Time ––– 102 ––– ID = 100A
ns
td(off) Turn-Off Delay Time ––– 168 ––– RG= 2.7
tf Fall Time ––– 79 ––– VGS = 10V
Ciss Input Capacitance ––– 12960 ––– VGS = 0V
Coss Output Capacitance ––– 1270 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 760 ––– pF   ƒ = 1.0MHz
Coss eff.(ER) Effective Output Capacitance (Energy Related) ––– 1248 ––– VGS = 0V, VDS = 0V to 48V
Coss eff.(TR) Output Capacitance (Time Related) ––– 1590 ––– VGS = 0V, VDS = 0V to 48V
Diode Characteristics  
Symbol Parameter Min. Typ. Max. Units Conditions
Continuous Source Current MOSFET symbol D
IS ––– ––– 338
(Body Diode) showing the
A
Pulsed Source Current integral reverse G

ISM ––– ––– 1450

(Body Diode) p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.2 V TJ = 25°C,IS = 100A,VGS = 0V 

dv/dt Peak Diode Recovery dv/dt ––– 8.5 ––– V/ns TJ = 175°C,IS =100A,VDS = 60V
––– 48 ––– TJ = 25°C VDD = 51V
trr Reverse Recovery Time ns
––– 50 ––– TJ = 125°C IF = 100A,
––– 72 ––– TJ = 25°C di/dt = 100A/µs 
Qrr Reverse Recovery Charge nC
––– 83 ––– TJ = 125°C  
IRRM Reverse Recovery Current ––– 2.5 ––– A TJ = 25°C 

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IRFS7530-7PPbF
10000 10000
VGS VGS
TOP 15V TOP 15V
ID, Drain-to-Source Current (A) 10V 10V

ID, Drain-to-Source Current (A)

8.0V 8.0V
1000 7.0V 7.0V
6.0V 6.0V
5.5V
1000 5.5V
5.0V 5.0V
BOTTOM 4.5V BOTTOM 4.5V
100

100
10 4.5V
4.5V
 60µs PULSE WIDTH  60µs PULSE WIDTH
Tj = 25°C Tj = 175°C
1 10
0.1 1 10 100 0.1 1 10 100

VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 3. Typical Output Characteristics Fig 4. Typical Output Characteristics

10000 2.5

RDS(on) , Drain-to-Source On Resistance

ID = 100A
VGS = 10V
ID, Drain-to-Source Current (A)

1000
2.0
TJ = 175°C

100
(Normalized)

1.5
TJ = 25°C
10

1.0
1
VDS = 25V
 60µs PULSE WIDTH
0.1
0.5
2.0 4.0 6.0 8.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)

Fig 5. Typical Transfer Characteristics Fig 6. Normalized On-Resistance vs. Temperature

1000000 14
VGS = 0V, f = 1 MHZ
C iss = Cgs + C gd , Cds SHORTED ID= 100A VDS= 48V
12
VGS, Gate-to-Source Voltage (V)

C rss = C gd VDS= 30V

100000 C oss = C ds + C gd VDS= 12V
10
C, Capacitance (pF)

8
Ciss
10000
6

Coss 4
1000
Crss
2

0
100
0 50 100 150 200 250 300
1 10 100
QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)

Fig 8. Typical Gate Charge vs.

Fig 7. Typical Capacitance vs. Gate-to-Source Voltage

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IRFS7530-7PPbF
10000
10000

ISD, Reverse Drain Current (A)

ID, Drain-to-Source Current (A)

1000
1000
TJ = 175°C 100µsec

100 100
1msec
Limited by
Package
10 TJ = 25°C
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
10msec
1 1 Tc = 25°C
Tj = 175°C
VGS = 0V Single Pulse DC
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.1 1 10 100
VSD, Source-to-Drain Voltage (V) VDS, Drain-toSource Voltage (V)

Fig 9. Typical Source-Drain Diode Forward Voltage Fig 10. Maximum Safe Operating Area
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)

80 2.0
Id = 1.0mA

1.5

Energy (µJ)

70 1.0

0.5

60 0.0
0 10 20 30 40 50 60
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Temperature ( °C ) VDS, Drain-to-Source Voltage (V)

Fig 11. Drain-to-Source Breakdown Voltage Fig 12. Typical Coss Stored Energy

2.2
( )
RDS(on), Drain-to -Source On Resistance m

VGS = 5.5V
VGS = 6.0V
2.0
VGS = 7.0V
VGS = 8.0V
1.8
VGS = 10V

1.6

1.4

1.2

1.0
0 50 100 150 200
ID, Drain Current (A)

Fig 13. Typical On-Resistance vs. Drain Current

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IRFS7530-7PPbF
1

Thermal Response ( ZthJC ) °C/W

D = 0.50
0.1
0.20
0.10
0.05
0.01 0.02
0.01

0.001 SINGLE PULSE

( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming  Tj = 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)

100

10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C. (Single Pulse)

1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)

Fig 15. Avalanche Current vs. Pulse Width

2400
Notes on Repetitive Avalanche Curves , Figures 14, 15:
EAS, Single Pulse Avalanche Energy (mJ)

ID
(For further info, see AN-1005 at www.irf.com)
2000 TOP 21A 1.Avalanche failures assumption:
44A Purely a thermal phenomenon and failure occurs at a
BOTTOM 100A temperature far in excess of Tjmax. This is validated for every
1600 part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
1200
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
800 4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
400 6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
0 tav = Average time in avalanche.
25 50 75 100 125 150 175 D = Duty cycle in avalanche = tav ·f
Starting TJ, Junction Temperature (°C) ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy vs. Temperature EAS (AR) = PD (ave)·tav  

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IRFS7530-7PPbF
4.0 16
IF = 60A

VGS(th) Gate threshold Voltage (V)

3.5 VR = 51V

12 TJ = 25°C
TJ = 125°C
3.0

IRRM (A)
2.5 ID = 250µA 8
ID = 1.0mA

2.0 ID = 1.0A

4
1.5

1.0 0
-75 -50 -25 0 25 50 75 100 125 150 175 0 200 400 600 800 1000
TJ , Temperature ( °C ) diF /dt (A/µs)

Fig 17. Threshold Voltage vs. Temperature Fig 18. Typical Recovery Current vs. dif/dt

16 500
IF = 100A IF = 60A
VR = 51V VR = 51V
400 TJ = 25°C
12 TJ = 25°C
TJ = 125°C TJ = 125°C

300
QRR (nC)
IRRM (A)

200

4
100

0 0
0 200 400 600 800 1000 0 200 400 600 800 1000
diF /dt (A/µs) diF /dt (A/µs)

Fig 19. Typical Recovery Current vs. dif/dt Fig 20. Typical Stored Charge vs. dif/dt
500
IF = 100A
VR = 51V
400 TJ = 25°C
TJ = 125°C

300
QRR (nC)

200

100

0
0 200 400 600 800 1000
diF /dt (A/µs)

Fig 21. Typical Stored Charge vs. dif/dt

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IRFS7530-7PPbF

Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs

V(BR)DSS

15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
20V
tp 0.01 I AS

Fig 23a. Unclamped Inductive Test Circuit Fig 23b. Unclamped Inductive Waveforms

Fig 24a. Switching Time Test Circuit Fig 24b. Switching Time Waveforms

Id
Vds

Vgs

Vgs(th)

Qgs1 Qgs2 Qgd Qgodr

Fig 25a. Gate Charge Test Circuit Fig 25b. Gate Charge Waveform

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IRFS7530-7PPbF

D2Pak-7Pin Package Outline (Dimensions are shown in millimeters (inches))

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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IRFS7530-7PPbF
D2Pak-7Pin Part Marking Information

D2Pak-7Pin Tape and Reel

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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IRFS7530-7PPbF

Qualification Information†  
Industrial
Qualification Level  
(per JEDEC JESD47F) ††
MSL1
Moisture Sensitivity Level D2Pak-7Pin
(per JEDEC J-STD-020D††)
RoHS Compliant Yes

† Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/

†† Applicable version of JEDEC standard at the time of product release.

Revision History
Date Comment
Updated EAS (L =1mH) = 1029mJ on page 2
03/05/2015 Updated note 9 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 45A, VGS =10V” on page 2
 Updated package outline on page 9 .

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit http://www.irf.com/whoto-call/

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