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RFP8P05
-8A, -50V, 0.300 Ohm,
July 1998 P-Channel Power MOSFETs
Features Description
• -8A, -50V These products are P-Channel power MOSFETs
manufactured using the MegaFET process. This process,
• rDS(ON) = 0.300Ω
which uses feature sizes approaching those of LSI circuits,
• UIS SOA Rating Curve gives optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
• SOA is Power Dissipation Limited such as switching regulators, switching converters, motor
• Nanosecond Switching Speeds drivers, and relay drivers. These transistors can be operated
directly from integrated circuits.
• Linear Transfer Characteristics
Formerly developmental type TA09832.
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
Ordering Information
G
PART NUMBER PACKAGE BRAND
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-252AA variant in tape and reel, i.e., RFD8P05SM9A.
Packaging
JEDEC TO-220AB JEDEC TO-251AA
SOURCE
DRAIN
SOURCE
GATE
DRAIN
GATE
DRAIN (FLANGE) DRAIN (FLANGE)
JEDEC TO-252AA
DRAIN (FLANGE)
GATE
SOURCE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. File Number 2384.1
Copyright © Harris Corporation 1998
5-1
RFD8P05, RFD8P05SM, RFP8P05
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
NOTE:
2. Pulse test: pulse width ≤ 300µs, Duty Cycle ≤ 2%.
3. Repetitive rating: pulse width is limited by maximum junction temperature.
5-2
RFD8P05, RFD8P05SM, RFP8P05
1.2 -10
POWER DISSIPATION MULTIPLIER
1.0
-8
-4
0.4
-2
0.2
0 0
0 25 50 75 100 125 150 175 25 50 75 100 125 150 175
TC , CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)
10 100
If R = 0
tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD)
IAS , AVALANCHE CURRENT (A)
DC OPERATION If R ≠ 0
ID , DRAIN CURRENT (A)
TC = 25oC
TJ = 175oC
0.1 1
-1 -10 -100 0.1 1 10 100
VDS , DRAIN TO SOURCE VOLTAGE (V) tAV , TIME IN AVALANCHE (ms)
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
-20 20
IDS(ON), DRAIN TO SOURCE CURRENT (A)
VGS = -8V
-12 12
-55oC
VGS = -7V
-8 8
VGS = -6V
-4 4
VGS = -5V
VGS = -4V
0 0
0 -2 -4 -6 -8 -10 0 -3 -6 -9 -12 -15
VDS, DRAIN TO SOURCE VOLTAGE (V) VGS , GATE TO SOURCE VOLTAGE (V)
5-3
RFD8P05, RFD8P05SM, RFP8P05
3.0 1.50
PULSE DURATION = 250µs VGS = VDS, ID = -250µA
VGS = -10V, ID = -8A
NORMALIZED ON RESISTANCE
2.5 1.25
THRESHOLD VOLTAGE
NORMALIZED GATE
2.0 1.00
1.5 0.75
1.0 0.50
0.5 0.25
0 0
-50 0 50 100 150 200 -50 0 50 100 150 200
TJ , JUNCTION TEMPERATURE (oC) TJ , JUNCTION TEMPERATURE (oC)
2.0 1000
ID = -250µA VGS = 0V, f = 1MHz
CISS = CGS + CGD
NORMALIZED DRAIN TO SOURCE
CRSS = CGD
800
COSS ≈ CDS + CGS
BREAKDOWN VOLTAGE
1.5
C, CAPACITANCE (pF)
600
CISS
1.0
400
0.5 COSS
200
CRSS
0 0
-50 0 50 100 150 200 0 -5 -10 -15 -20 -25
TJ , JUNCTION TEMPERATURE (oC) VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE
-50 -10
VDS, DRAIN TO SOURCE VOLTAGE (V)
GATE
VGS, GATE TO SOURCE VOLTAGE (V)
0 0
I I
20 G(REF) TIME (µs) 80 G(REF)
IG(ACT) IG(ACT)
5-4
RFD8P05, RFD8P05SM, RFP8P05
VDS
tAV
L 0
VARY tP TO OBTAIN
REQUIRED PEAK IAS RG
-
VDD
+
0V DUT VDD
tP IAS
VGS
VDS
IAS tP
0.01Ω
BVDSS
FIGURE 12. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 13. UNCLAMPED ENERGY WAVEFORMS
tON tOFF
td(ON) td(OFF)
tr tf
0
RL 10% 10%
DUT - VDS
VDD 90% 90%
RG
VGS + VGS
0
10%
50% 50%
PULSE WIDTH
90%
FIGURE 14. SWITCHING TIME TEST CIRCUIT FIGURE 15. RESISTIVE SWITCHING WAVEFORMS
VDS
VDS
RL Qg(TH)
0
VGS= -1V
VGS
- -VGS VGS= -5V
VDD
+ Qg(-5)
0
Ig(REF)
FIGURE 16. GATE CHARGE TEST CIRCUIT FIGURE 17. GATE CHARGE WAVEFORMS
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