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StrongIRFET™

IRL40B215
Application HEXFET® Power MOSFET
 Brushed Motor drive applications
  VDSS 40V
 BLDC Motor drive applications D

Battery powered circuits RDS(on) typ. 2.2m


 Half-bridge and full-bridge topologies max 2.7m
 Synchronous rectifier applications G
ID (Silicon Limited) 164A
 Resonant mode power supplies
 OR-ing and redundant power switches
S ID (Package Limited) 120A
 DC/DC and AC/DC converters
 DC/AC Inverters

Benefits S
Optimized for Logic Level Drive G
D
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
TO-220AB
Fully Characterized Capacitance and Avalanche SOA
IRL40B215
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free*
RoHS Compliant, Halogen-Free G D S
Gate Drain Source

Standard Pack
Base part number Package Type Orderable Part Number
Form Quantity
IRL40B215 TO-220 Tube 50 IRL40B215

12 175
RDS(on), Drain-to -Source On Resistance (m)

ID = 98A Limited By Package


150

9
125
ID, Drain Current (A)

100
6
75
TJ = 125°C
50
3

TJ = 25°C 25

0 0
2 4 6 8 10 12 14 16 18 20 25 50 75 100 125 150 175

VGS, Gate -to -Source Voltage (V) TC , Case Temperature (°C)

Fig 1. Typical On-Resistance vs. Gate Voltage Fig 2. Maximum Drain Current vs. Case Temperature

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IRL40B215
Absolute Maximum Rating
Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 164
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 116

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 120
IDM Pulsed Drain Current  656
PD @TC = 25°C Maximum Power Dissipation 143 W
Linear Derating Factor 0.95 W/°C
VGS Gate-to-Source Voltage ± 20 V
TJ Operating Junction and
-55 to + 175  
TSTG Storage Temperature Range °C  
Soldering Temperature, for 10 seconds (1.6mm from case) 300
Mounting Torque, 6-32 or M3 Screw 10 lbf·in (1.1 N·m)  
Avalanche Characteristics 
EAS (Thermally limited) Single Pulse Avalanche Energy  161
mJ
EAS (Thermally limited) Single Pulse Avalanche Energy  386
IAR Avalanche Current  A
See Fig 15, 16, 23a, 23b
EAR Repetitive Avalanche Energy  mJ
Thermal Resistance  
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case  ––– 1.05
RCS Case-to-Sink, Flat Greased Surface 0.50 ––– °C/W  
RJA Junction-to-Ambient  ––– 62

Static @ TJ = 25°C (unless otherwise specified)


Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.033 ––– V/°C Reference to 25°C, ID = 5mA 
––– 2.2 2.7 VGS = 10V, ID = 98A 
RDS(on) Static Drain-to-Source On-Resistance m
––– 2.8 3.5 VGS = 4.5V, ID = 49A 
VGS(th) Gate Threshold Voltage 1.0 ––– 2.4 V VDS = VGS, ID = 100µA
––– ––– 1.0 VDS =40 V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 150 VDS =40V,VGS = 0V,TJ =125°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG Gate Resistance ––– 2.0 ––– 

Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 120A. Note that
Current imitations arising from heating of the device leads may occur with some lead mounting arrangements.
(Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.033mH, RG = 50, IAS = 98A, VGS =10V.
ISD  98A, di/dt  1005A/µs, VDD  V(BR)DSS, TJ  175°C.
Pulse width  400µs; duty cycle  2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
 R is measured at TJ approximately 90°C.
 Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 28A, VGS =10V.
 Pulse drain current is limited at 480A by source bonding technology.

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IRL40B215

Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)


Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 176 ––– ––– S VDS = 10V, ID = 98A
Qg Total Gate Charge ––– 56 84 ID = 98A
Qgs Gate-to-Source Charge ––– 15 ––– VDS = 20V
nC  
Qgd Gate-to-Drain Charge ––– 30 ––– VGS = 4.5V
Qsync Total Gate Charge Sync. (Qg– Qgd) ––– 26 –––
td(on) Turn-On Delay Time ––– 21 ––– VDD = 20V
tr Rise Time ––– 110 ––– ID = 30A
ns
td(off) Turn-Off Delay Time ––– 63 ––– RG= 2.7
tf Fall Time ––– 62 ––– VGS = 4.5V
Ciss Input Capacitance ––– 5225 ––– VGS = 0V
Coss Output Capacitance ––– 651 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 460 ––– pF   ƒ = 1.0MHz, See Fig.7
Coss eff.(ER) Effective Output Capacitance (Energy Related) ––– 777 ––– VGS = 0V, VDS = 0V to 32V
Coss eff.(TR) Output Capacitance (Time Related) ––– 963 ––– VGS = 0V, VDS = 0V to 32V
Diode Characteristics  
Symbol Parameter Min. Typ. Max. Units Conditions
Continuous Source Current MOSFET symbol D
IS ––– ––– 164
(Body Diode) showing the
A
Pulsed Source Current integral reverse G

ISM ––– ––– 656


(Body Diode) p-n junction diode. S

VSD Diode Forward Voltage ––– 0.9 1.2 V TJ = 25°C,IS = 98A,VGS = 0V 


dv/dt Peak Diode Recovery dv/dt  ––– 4.3 ––– V/ns TJ = 175°C,IS = 98A,VDS = 40V
––– 27 ––– TJ = 25°C VDD = 34V
trr Reverse Recovery Time ns
––– 29 ––– TJ = 125°C IF = 98A,
––– 23 ––– TJ = 25°C di/dt = 100A/µs 
Qrr Reverse Recovery Charge nC
––– 25 ––– TJ = 125°C  
IRRM Reverse Recovery Current ––– 1.5 ––– A TJ = 25°C 

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IRL40B215
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
ID, Drain-to-Source Current (A)
8.0V

ID, Drain-to-Source Current (A)


8.0V
6.0V 6.0V
5.0V 5.0V
4.5V 4.5V
4.0V 4.0V
3.5V BOTTOM 3.5V BOTTOM 3.5V
3.5V
100 100

60µs PULSE WIDTH 60µs PULSE WIDTH


Tj = 25°C Tj = 175°C
10 10
0.1 1 10 100 0.1 1 10 100
VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 3. Typical Output Characteristics Fig 4. Typical Output Characteristics

1000 2.2

RDS(on) , Drain-to-Source On Resistance


ID = 98A
VGS = 10V
ID, Drain-to-Source Current(A)

TJ = 175°C
100 1.8
(Normalized)

TJ = 25°C
10 1.4

1 1.0
VDS = 10V
60µs PULSE WIDTH
0.1 0.6
0 2 4 6 8 10 -60 -20 20 60 100 140 180

VGS, Gate-to-Source Voltage (V) TJ , Junction Temperature (°C)

Fig 5. Typical Transfer Characteristics Fig 6. Normalized On-Resistance vs. Temperature


100000 14
VGS = 0V, f = 1 MHZ
ID= 98A
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd 12
VGS, Gate-to-Source Voltage (V)

VDS = 32V
Coss = Cds + Cgd
10 VDS = 20V
C, Capacitance (pF)

10000 VDS= 8V
Ciss
8

6
Coss
1000 Crss
4

100 0
0.1 1 10 100 0 20 40 60 80 100 120 140
VDS , Drain-to-Source Voltage (V) QG, Total Gate Charge (nC)

Fig 8. Typical Gate Charge vs.


Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
Gate-to-Source Voltage
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IRL40B215
1000
OPERATION IN THIS AREA
1000 LIMITED BY R DS (on)

ID, Drain-to-Source Current (A)


TJ = 175°C
ISD, Reverse Drain Current (A)

100 100µsec
100
Limited By Package
TJ = 25°C
10 1msec
10

10msec
1 1
Tc = 25°C DC
Tj = 175°C
VGS = 0V Single Pulse
0.1
0.1
0.1 1 10
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VDS , Drain-toSource Voltage (V)
VSD , Source-to-Drain Voltage (V)

Fig 9. Typical Source-Drain Diode Forward Voltage Fig 10. Maximum Safe Operating Area
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)

52 0.60
Id = 5.0mA

50 0.50

48 0.40
Energy (µJ)

46 0.30

44 0.20

42 0.10

40 0.00
-60 -20 20 60 100 140 180 -5 0 5 10 15 20 25 30 35 40 45
TJ , Temperature ( °C )
VDS, Drain-to-Source Voltage (V)

Fig 11. Drain-to-Source Breakdown Voltage Fig 12. Typical Coss Stored Energy

9
RDS (on), Drain-to -Source On Resistance (m)

VGS = 3.5V
VGS = 4.0V
VGS = 4.5V
7 VGS = 8.0V
VGS = 10V

1
0 50 100 150 200
ID, Drain Current (A)

Fig 13. Typical On-Resistance vs. Drain Current

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IRL40B215
10

Thermal Response ( Z thJC ) °C/W 1


D = 0.50
0.20
0.1 0.10
0.05
0.02
0.01
0.01

SINGLE PULSE
0.001 ( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case


1000

Allowed avalanche Current vs avalanche


pulsewidth, tav, assuming Tj = 150°C and
100 Tstart = 25°C (Single Pulse)
Avalanche Current (A)

10

1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming  j = 25°C and
Tstart = 150°C.
0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)

Fig 15. Avalanche Current vs. Pulse Width


180
TOP Single Pulse Notes on Repetitive Avalanche Curves , Figures 15, 16:
160 BOTTOM 1.0% Duty Cycle (For further info, see AN-1005 at www.irf.com)
ID = 98A 1.Avalanche failures assumption:
EAR , Avalanche Energy (mJ)

140 Purely a thermal phenomenon and failure occurs at a


temperature far in excess of Tjmax. This is validated for every
120
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
100
exceeded.
80 3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
60 4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
40 increase during avalanche).
6. Iav = Allowable avalanche current.
20 7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
0 tav = Average time in avalanche.
25 50 75 100 125 150 175 D = Duty cycle in avalanche = tav ·f
Starting TJ , Junction Temperature (°C) ZthJC(D, tav) = Transient thermal resistance, see Figures 14)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy vs. Temperature EAS (AR) = PD (ave)·tav  

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IRL40B215
2.5 7
IF = 66A
VGS(th), Gate threshold Voltage (V)

6 VR = 34V
2.0 TJ = 25°C
5 TJ = 125°C

IRRM (A)
4
1.5
3
ID = 100µA
ID = 250µA
ID = 1.0mA 2
1.0
ID = 1.0A
1

0.5 0
-75 -25 25 75 125 175 0 200 400 600 800
TJ , Temperature ( °C ) diF /dt (A/µs)

Fig 17. Threshold Voltage vs. Temperature Fig 18. Typical Recovery Current vs. dif/dt
7 120
IF = 98A IF = 66A
6 VR = 34V 100 VR = 34V
TJ = 25°C TJ = 25°C
5 TJ = 125°C TJ = 125°C
QRR (nC) 80
IRRM (A)

4
60
3
40
2

1 20

0 0
0 200 400 600 800 0 200 400 600 800
diF /dt (A/µs) diF /dt (A/µs)

Fig 19. Typical Recovery Current vs. dif/dt Fig 20. Typical Stored Charge vs. dif/dt

100
IF = 98A
VR = 34V
80
TJ = 25°C
TJ = 125°C

60
QRR (nC)

40

20

0
0 200 400 600 800
diF /dt (A/µs)

Fig 21. Typical Stored Charge vs. dif/dt

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IRL40B215

Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs

V(BR)DSS

15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
20V
tp 0.01 I AS

Fig 23a. Unclamped Inductive Test Circuit Fig 23b. Unclamped Inductive Waveforms

Fig 24a. Switching Time Test Circuit Fig 24b. Switching Time Waveforms
Id
Vds

Vgs

VDD 
Vgs(th)

Qgs1 Qgs2 Qgd Qgodr

Fig 25a. Gate Charge Test Circuit Fig 25b. Gate Charge Waveform

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IRL40B215

TO-220AB Package Outline (Dimensions are shown in millimeters (inches))

TO-220AB Part Marking Information

EXAM PLE: T H IS IS A N IR F 1 0 1 0
LO T C O D E 1789 IN T E R N A T IO N A L PART NUM BER
ASSEM BLED O N W W 19, 2000 R E C T IF IE R
IN T H E A S S E M B L Y L IN E "C " LO G O
D ATE C O D E
YEA R 0 = 2000
N o t e : "P " in a s s e m b ly lin e p o s it io n ASSEM BLY
in d ic a t e s "L e a d - F r e e " LO T C O D E W EEK 19
L IN E C

TO-220AB packages are not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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IRL40B215

Qualification Information†  
Industrial
Qualification Level   (per JEDEC JESD47F) ††

Moisture Sensitivity Level TO-220 N/A


RoHS Compliant Yes

† Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/


†† Applicable version of JEDEC standard at the time of product release.

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA


To contact International Rectifier, please visit http://www.irf.com/whoto-call/

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