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IRL40B215
Application HEXFET® Power MOSFET
Brushed Motor drive applications
VDSS 40V
BLDC Motor drive applications D
Benefits S
Optimized for Logic Level Drive G
D
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
TO-220AB
Fully Characterized Capacitance and Avalanche SOA
IRL40B215
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free*
RoHS Compliant, Halogen-Free G D S
Gate Drain Source
Standard Pack
Base part number Package Type Orderable Part Number
Form Quantity
IRL40B215 TO-220 Tube 50 IRL40B215
12 175
RDS(on), Drain-to -Source On Resistance (m)
9
125
ID, Drain Current (A)
100
6
75
TJ = 125°C
50
3
TJ = 25°C 25
0 0
2 4 6 8 10 12 14 16 18 20 25 50 75 100 125 150 175
Fig 1. Typical On-Resistance vs. Gate Voltage Fig 2. Maximum Drain Current vs. Case Temperature
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IRL40B215
Absolute Maximum Rating
Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 164
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 116
A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 120
IDM Pulsed Drain Current 656
PD @TC = 25°C Maximum Power Dissipation 143 W
Linear Derating Factor 0.95 W/°C
VGS Gate-to-Source Voltage ± 20 V
TJ Operating Junction and
-55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds (1.6mm from case) 300
Mounting Torque, 6-32 or M3 Screw 10 lbf·in (1.1 N·m)
Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy 161
mJ
EAS (Thermally limited) Single Pulse Avalanche Energy 386
IAR Avalanche Current A
See Fig 15, 16, 23a, 23b
EAR Repetitive Avalanche Energy mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case ––– 1.05
RCS Case-to-Sink, Flat Greased Surface 0.50 ––– °C/W
RJA Junction-to-Ambient ––– 62
Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 120A. Note that
Current imitations arising from heating of the device leads may occur with some lead mounting arrangements.
(Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.033mH, RG = 50, IAS = 98A, VGS =10V.
ISD 98A, di/dt 1005A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
R is measured at TJ approximately 90°C.
Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 28A, VGS =10V.
Pulse drain current is limited at 480A by source bonding technology.
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IRL40B215
3 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback April 27, 2015
IRL40B215
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
ID, Drain-to-Source Current (A)
8.0V
1000 2.2
TJ = 175°C
100 1.8
(Normalized)
TJ = 25°C
10 1.4
1 1.0
VDS = 10V
60µs PULSE WIDTH
0.1 0.6
0 2 4 6 8 10 -60 -20 20 60 100 140 180
VDS = 32V
Coss = Cds + Cgd
10 VDS = 20V
C, Capacitance (pF)
10000 VDS= 8V
Ciss
8
6
Coss
1000 Crss
4
100 0
0.1 1 10 100 0 20 40 60 80 100 120 140
VDS , Drain-to-Source Voltage (V) QG, Total Gate Charge (nC)
100 100µsec
100
Limited By Package
TJ = 25°C
10 1msec
10
10msec
1 1
Tc = 25°C DC
Tj = 175°C
VGS = 0V Single Pulse
0.1
0.1
0.1 1 10
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VDS , Drain-toSource Voltage (V)
VSD , Source-to-Drain Voltage (V)
Fig 9. Typical Source-Drain Diode Forward Voltage Fig 10. Maximum Safe Operating Area
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
52 0.60
Id = 5.0mA
50 0.50
48 0.40
Energy (µJ)
46 0.30
44 0.20
42 0.10
40 0.00
-60 -20 20 60 100 140 180 -5 0 5 10 15 20 25 30 35 40 45
TJ , Temperature ( °C )
VDS, Drain-to-Source Voltage (V)
Fig 11. Drain-to-Source Breakdown Voltage Fig 12. Typical Coss Stored Energy
9
RDS (on), Drain-to -Source On Resistance (m)
VGS = 3.5V
VGS = 4.0V
VGS = 4.5V
7 VGS = 8.0V
VGS = 10V
1
0 50 100 150 200
ID, Drain Current (A)
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IRL40B215
10
SINGLE PULSE
0.001 ( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
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IRL40B215
2.5 7
IF = 66A
VGS(th), Gate threshold Voltage (V)
6 VR = 34V
2.0 TJ = 25°C
5 TJ = 125°C
IRRM (A)
4
1.5
3
ID = 100µA
ID = 250µA
ID = 1.0mA 2
1.0
ID = 1.0A
1
0.5 0
-75 -25 25 75 125 175 0 200 400 600 800
TJ , Temperature ( °C ) diF /dt (A/µs)
Fig 17. Threshold Voltage vs. Temperature Fig 18. Typical Recovery Current vs. dif/dt
7 120
IF = 98A IF = 66A
6 VR = 34V 100 VR = 34V
TJ = 25°C TJ = 25°C
5 TJ = 125°C TJ = 125°C
QRR (nC) 80
IRRM (A)
4
60
3
40
2
1 20
0 0
0 200 400 600 800 0 200 400 600 800
diF /dt (A/µs) diF /dt (A/µs)
Fig 19. Typical Recovery Current vs. dif/dt Fig 20. Typical Stored Charge vs. dif/dt
100
IF = 98A
VR = 34V
80
TJ = 25°C
TJ = 125°C
60
QRR (nC)
40
20
0
0 200 400 600 800
diF /dt (A/µs)
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IRL40B215
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
15V
tp
L DRIVER
VDS
RG D.U.T +
V
- DD
IAS A
20V
tp 0.01 I AS
Fig 23a. Unclamped Inductive Test Circuit Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Fig 25a. Gate Charge Test Circuit Fig 25b. Gate Charge Waveform
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IRL40B215
EXAM PLE: T H IS IS A N IR F 1 0 1 0
LO T C O D E 1789 IN T E R N A T IO N A L PART NUM BER
ASSEM BLED O N W W 19, 2000 R E C T IF IE R
IN T H E A S S E M B L Y L IN E "C " LO G O
D ATE C O D E
YEA R 0 = 2000
N o t e : "P " in a s s e m b ly lin e p o s it io n ASSEM BLY
in d ic a t e s "L e a d - F r e e " LO T C O D E W EEK 19
L IN E C
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRL40B215
Qualification Information†
Industrial
Qualification Level (per JEDEC JESD47F) ††
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