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PD -97134

IRFP4468PbF
HEXFET® Power MOSFET
Applications D VDSS 100V
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
RDS(on) typ. 2.0m:
l High Speed Power Switching max. 2.6m:
l Hard Switched and High Frequency Circuits G ID (Silicon Limited) 290A c
Benefits S ID (Package Limited) 195A
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness D
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability S
D
l Lead-Free G

TO-247AC

G D S
Gate Drain Source

Absolute Maximum Ratings


Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 290c
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 200
A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 195
IDM Pulsed Drain Current d 1120
PD @TC = 25°C Maximum Power Dissipation 520 W
Linear Derating Factor 3.4 W/°C
VGS Gate-to-Source Voltage ± 20 V
dv/dt Peak Diode Recovery f 10 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range
°C
Soldering Temperature, for 10 seconds 300
(1.6mm from case)
Mounting torque, 6-32 or M3 screw 10lbxin (1.1Nxm)

Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy e 740 mJ
IAR Avalanche Currentd See Fig. 14, 15, 22a, 22b, A
EAR Repetitive Avalanche Energy g mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case k ––– 0.29
RθCS Case-to-Sink, Flat Greased Surface 0.24 ––– °C/W
RθJA Junction-to-Ambient jk ––– 40
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IRFP4468PbF

Static @ TJ = 25°C (unless otherwise specified)


Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250μA
ΔV(BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient ––– 0.09 ––– V/°C Reference to 25°C, ID = 5mAd
RDS(on) Static Drain-to-Source On-Resistance ––– 2.0 2.6 mΩ VGS = 10V, ID = 180A g
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250μA
IDSS Drain-to-Source Leakage Current ––– ––– 20 μA VDS = 100V, VGS = 0V
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG Internal Gate Resistance ––– 0.8 ––– Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 310 ––– ––– S VDS = 50V, ID = 180A
Qg Total Gate Charge ––– 360 540 nC ID = 180A
Qgs Gate-to-Source Charge ––– 81 ––– VDS =50V
Qgd Gate-to-Drain ("Miller") Charge ––– 89 VGS = 10V g
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 270 ––– ID = 180A, VDS =0V, VGS = 10V
td(on) Turn-On Delay Time ––– 52 ––– ns VDD = 65V
tr Rise Time ––– 230 ––– ID = 180A
td(off) Turn-Off Delay Time ––– 160 ––– RG = 2.7Ω
tf Fall Time ––– 260 ––– VGS = 10V g
Ciss Input Capacitance ––– 19860 ––– pF VGS = 0V
Coss Output Capacitance ––– 1360 ––– VDS = 50V
Crss Reverse Transfer Capacitance ––– 540 ––– ƒ = 100 kHz, See Fig. 5
Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 1550 ––– VGS = 0V, VDS = 0V to 80V i, See Fig. 11
Coss eff. (TR) Effective Output Capacitance (Time Related)h ––– 900 ––– VGS = 0V, VDS = 0V to 80V h

Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 290c A MOSFET symbol
D
(Body Diode) showing the
ISM Pulsed Source Current ––– ––– 1120 A integral reverse G

(Body Diode)d p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 180A, VGS = 0V g
trr Reverse Recovery Time ––– 100 ns TJ = 25°C VR = 85V,
––– 110 TJ = 125°C IF = 180A
Qrr Reverse Recovery Charge ––– 370 nC TJ = 25°C di/dt = 100A/μs g
––– 420 TJ = 125°C
IRRM Reverse Recovery Current ––– 6.9 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Calculated continuous current based on maximum allowable junction „ ISD ≤ 180A, di/dt ≤ 600A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
temperature. Bond wire current limit is 195A. Note that current Pulse width ≤ 400μs; duty cycle ≤ 2%.
limitations arising from heating of the device leads may occur with † Coss eff. (TR) is a fixed capacitance that gives the same charging time
some lead mounting arrangements. (Refer to AN-1140) as Coss while VDS is rising from 0 to 80% VDSS.
‚ Repetitive rating; pulse width limited by max. junction ‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
temperature. Coss while VDS is rising from 0 to 80% VDSS.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.045mH ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
RG = 25Ω, IAS = 180A, VGS =10V. Part not recommended for use mended footprint and soldering techniques refer to application note #AN-994.
above this value . ‰ Rθ is measured at TJ approximately 90°C

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IRFP4468PbF
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)


8.0V 8.0V
6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
100 4.5V 4.5V
BOTTOM 4.0V BOTTOM 4.0V

100

10 4.0V

4.0V ≤ 60μs PULSE WIDTH ≤ 60μs PULSE WIDTH


Tj = 25°C Tj = 175°C
1 10
0.01 0.1 1 10 100 0.1 1 10 100

VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics


1000 2.5

RDS(on) , Drain-to-Source On Resistance


ID = 180A
VGS = 10V
ID, Drain-to-Source Current(Α)

2.0
100 TJ = 175°C (Normalized)

1.5
TJ = 25°C
10

1.0
VDS = 25V
≤ 60μs PULSE WIDTH
1
2.0 3.0 4.0 5.0 6.0 7.0 0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature

35000 16
VGS = 0V, f = 100 kHz
ID= 180A
Ciss = Cgs + Cgd, Cds SHORTED
VGS, Gate-to-Source Voltage (V)

30000 VDS = 80V


Crss = Cgd
VDS = 50V
Coss = Cds + Cgd 12
25000 VDS = 20V
C, Capacitance (pF)

Ciss
20000
8
15000

10000 4
Coss
5000
Crss 0
0
0 50 100 150 200 250 300 350 400 450
1 10 100
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFP4468PbF
1000 10000
OPERATION IN THIS AREA
LIMITED BY R DS (on)

ID, Drain-to-Source Current (A)


TJ = 175°C
ISD , Reverse Drain Current (A)

1000
100 100μsec

100

10 1msec
TJ = 25°C
LIMITED BY PACKAGE
10
10msec
1
1 Tc = 25°C
Tj = 175°C DC
VGS = 0V Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0.1 1 10 100

VSD , Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area


Forward Voltage

V(BR)DSS , Drain-to-Source Breakdown Voltage


300 120
LIMITED BY PACKAGE ID = 5mA
250
ID , Drain Current (A)

200 110

150

100
100

50

0
90
25 50 75 100 125 150 175
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
TC , Case Temperature (°C)
TJ , Junction Temperature (°C)
Fig 9. Maximum Drain Current vs. Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
7.0 3000
EAS, Single Pulse Avalanche Energy (mJ)

ID
6.0 2500
TOP 30A
41A
BOTTOM 180A
5.0
2000
Energy (μJ)

4.0
1500
3.0

1000
2.0

500
1.0

0.0 0
0 20 40 60 80 100 25 50 75 100 125 150 175

VDS, Drain-to-Source Voltage (V) Starting TJ, Junction Temperature (°C)

Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
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IRFP4468PbF
1

D = 0.50
Thermal Response ( Z thJC )

0.1
0.20
0.10

0.01
0.05 R1
R1
R2
R2
R3
R3 Ri (°C/W) τι (sec)
τJ τC
0.02 τJ τ 0.063359 0.000278
τ1 τ2 τ3
τ1 τ2 τ3
0.01 0.110878 0.005836
Ci= τi/Ri
Ci= τi/Ri 0.114838 0.053606
0.001

SINGLE PULSE Notes:


( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1 1

t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case


1000
Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)

100
0.01

0.05

10
0.10

Allowed avalanche Current vs avalanche


pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 14. Typical Avalanche Current vs.Pulsewidth


800
Notes on Repetitive Avalanche Curves , Figures 14, 15:
TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
BOTTOM 1% Duty Cycle 1. Avalanche failures assumption:
ID = 180A
EAR , Avalanche Energy (mJ)

Purely a thermal phenomenon and failure occurs at a temperature far in


600 excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
400 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
200 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
25 50 75 100 125 150 175 PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
Starting TJ , Junction Temperature (°C)
EAS (AR) = PD (ave)·tav

Fig 15. Maximum Avalanche Energy vs. Temperature


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IRFP4468PbF
4.5 32

ID = 1.0A
VGS(th) Gate threshold Voltage (V)

4.0 ID = 1.0mA
ID = 250μA 24
3.5

IRRM - (A)
3.0
16
2.5

2.0 IF = 72A
8
VR = 85V
1.5 TJ = 125°C
TJ = 25°C
1.0 0
-75 -50 -25 0 25 50 75 100 125 150 175 100 200 300 400 500 600 700 800 900 1000

TJ , Temperature ( °C ) dif / dt - (A / μs)

Fig 16. Threshold Voltage Vs. Temperature Fig. 17 - Typical Recovery Current vs. dif/dt

40 1500

32

QRR - (nC) 1000


IRRM - (A)

24

16
500
IF = 108A IF = 72A

8 VR = 85V VR = 85V
TJ = 125°C TJ = 125°C
TJ = 25°C TJ = 25°C
0 0
100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / μs) dif / dt - (A / μs)

Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt

2000
IF = 108A
VR = 85V
TJ = 125°C
1500 TJ = 25°C
QRR - (nC)

1000

500

0
100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / μs)

Fig. 20 - Typical Stored Charge vs. dif/dt


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IRFP4468PbF
Driver Gate Drive
P.W.
D.U.T P.W.
Period D=
Period
+

ƒ VGS=10V *
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied


• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• ISD controlled by Duty Factor "D" - Inductor Current
Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
VGS
20V
tp 0.01Ω
I AS

Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms
RD
VDS VDS

VGS
90%
D.U.T.
RG
+
- VDD

V10V
GS 10%
Pulse Width ≤ 1 µs VGS
Duty Factor ≤ 0.1 %
td(on) tr t d(off) tf

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Current Regulator Id
Same Type as D.U.T. Vds

Vgs
50KΩ

12V .2μF
.3μF

+
V
D.U.T. - DS
Vgs(th)
VGS

3mA

IG ID
Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr

Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
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IRFP4468PbF
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)

TO-247AC Part Marking Information


EXAMPLE: THIS IS AN IRFPE30
WIT H AS S EMBLY PART NUMBER
LOT CODE 5657 INTERNATIONAL
AS S EMBLED ON WW 35, 2001 RECT IFIER IRFPE30

IN T HE AS S EMBLY LINE "H" LOGO 135H


56 57
DAT E CODE
AS S EMBLY YEAR 1 = 2001
Note: "P" in ass embly line pos ition
indicates "Lead-Free" LOT CODE WEEK 35
LINE H

TO-247AC packages are not recommended for Surface Mount Application.


Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

Data and specifications subject to change without notice.


This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 05/08
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