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IRL3705NPbF

HEXFET® Power MOSFET


 Logic - Level Gate Drive
 VDSS 55V
D
Advanced Process Technology
 Dynamic dv/dt Rating
 175°C Operating Temperature G RDS(on) max. 0.01
 Fast Switching S
ID 89A
 Fully Avalanche Rated
 Lead-Free

Description
Fifth Generation HEXFETs utilize advanced
processing techniques to achieve extremely low on- S
D
resistance per silicon area. This benefit, combined G
with the fast switching speed and ruggedized device TO-220AB
design that HEXFET Power MOSFETs are well IRL3705NPbF
known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety
of applications. G D S
The TO-220 package is universally preferred for all Gate Drain Source
commercial industrial applications at power
dissipation levels to approximately 50 watts. The low
thermal resistance and low package cost of the TO-
220 contribute to its wide acceptance throughout the
industry.

Standard Pack
Base part number Package Type Form Quantity Orderable Part Number

IRL3705NPbF TO-220 Tube 50 IRL3705NPbF

Absolute Maximum Ratings


Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 89
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 63 A
IDM Pulsed Drain Current  310
PD @TC = 25°C Maximum Power Dissipation 170 W
Linear Derating Factor 1.1 W/°C
VGS Gate-to-Source Voltage ± 16 V
EAS Single Pulse Avalanche Energy  340 mJ
IAR Avalanche Current  46 A
EAR Repetitive Avalanche Energy  17 mJ
dv/dt Peak Diode Recovery dv/dt  5.0 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds (1.6mm from case) 300
Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)

Thermal Resistance
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case ––– 0.90
RCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RJA Junction-to-Ambient ––– 62

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Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.056 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.010 VGS = 10V, ID = 46A
Static Drain-to-Source On-
RDS(on) ––– ––– 0.012  VGS = 5.0V, ID = 46A 
Resistance
––– ––– 0.018 VGS = 4.0V, ID = 39A 
VGS(th) Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
gfs Forward Trans conductance 50 ––– ––– S VDS = 25V, ID = 46A
––– ––– 25 VDS = 55V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 44V,VGS = 0V,TJ =150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 16V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
Qg Total Gate Charge ––– ––– 98 ID = 46A
Qgs Gate-to-Source Charge ––– ––– 19 nC VDS = 44V
Qgd Gate-to-Drain Charge ––– ––– 49 VGS = 5.0V , See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 12 ––– VDD = 28V
tr Rise Time ––– 140 ––– ID = 46A
ns
td(off) Turn-Off Delay Time ––– 37 ––– RG= 1.8VGS = 5.0V 
tf Fall Time ––– 78 ––– RD= 0.59See Fig. 10
Between lead,
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact
Ciss Input Capacitance ––– 3600 ––– VGS = 0V
Coss Output Capacitance ––– 870 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 320 ––– ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
Continuous Source Current MOSFET symbol
IS ––– ––– 89
(Body Diode) showing the
A
Pulsed Source Current integral reverse
ISM ––– ––– 310
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C,IS = 46A,VGS = 0V 
trr Reverse Recovery Time ––– 94 140 ns TJ = 25°C ,IF = 46A
Qrr Reverse Recovery Charge ––– 290 440 nC di/dt = 100A/µs 
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS +LD)
Notes:
 Repetitive rating; pulse width limited by max. junction temperature. (See fig.11)
 VDD = 25V, starting TJ = 25°C, L = 320H, RG = 25, IAS = 46A.(See fig.12)
 ISD 46A, di/dt 250A/µs, VDD V(BR)DSS, TJ  175°C.
 Pulse width 300µs; duty cycle  2%.
 Calculated continuous current based on maximum allowable junction temperature; for recommended current- handling of the
package refer to Design TIP # 93-4
.

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1000 1000
VGS VGS
TOP 15V TOP 15V
12V 12V
10V 10V
8.0V 8.0V

ID , Drain-to-Source Current (A)


6.0V
ID , Drain-to-Source Current (A)

6.0V
4.0V 4.0V
3.0V 3.0V
BOTTOM 2.5V BOTTOM 2.5V

100 100

10 2.5V
10

2.5V
20µs PULSE WIDTH 20µs PULSE WIDTH
T J = 25°C T J = 175°C
1 1 A
A
0.1 1 10 100 0.1 1 10 100
VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig. 1 Typical Output Characteristics Fig. 2 Typical Output Characteristics

1000 3.0
I D = 77A
R DS(on) , Drain-to-Source On Resistance
I D , Drain-to-Source Current (A)

2.5
TJ = 25°C

TJ = 175°C
100 2.0
(Normalized)

1.5

10 1.0

0.5

V DS= 25V
20µs PULSE WIDTH VGS = 10V
1 A 0.0
2.0 3.0 4.0 5.0 6.0 7.0 8.0
A
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature (°C)
Fig. 3 Typical Transfer Characteristics
Fig. 4 Normalized On-Resistance
vs. Temperature

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6000 15
V GS = 0V, f = 1MHz I D = 46A
C iss = Cgs + C gd , Cds SHORTED V DS = 44V

V GS , Gate-to-Source Voltage (V)


C rss = C gd V DS = 28V
5000 Ciss C oss = Cds + C gd 12
C, Capacitance (pF)

4000
9

3000 Coss
6
2000

Crss 3
1000

FOR TEST CIRCUIT


SEE FIGURE 13
0 A 0 A
1 10 100 0 20 40 60 80 100 120 140
VDS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC)

Fig 5. Typical Capacitance vs. Fig 6. Typical Gate Charge vs.


Drain-to-Source Voltage Gate-to-Source Voltage

1000
1000
OPERATION IN THIS AREA LIMITED
BY R DS(on)
ISD , Reverse Drain Current (A)

10µs
I D , Drain Current (A)

100

100µs
100

TJ = 175°C
TJ = 25°C 1ms
10

10ms

TC = 25°C
TJ = 175°C
VGS = 0V Single Pulse
10 A 1
0.4 0.8 1.2 1.6 2.0 2.4 2.8
A
1 10 100
VSD , Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig. 7 Typical Source-to-Drain Diode


Fig 8. Maximum Safe Operating Area
Forward Voltage

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100
LIMITED BY PACKAGE

80
ID , Drain Current (A)

60

40 Fig 10a. Switching Time Test Circuit

20

0
25 50 75 100 125 150 175
TC , Case Temperature ( °C)

Fig 9. Maximum Drain Current vs. Case Temperature


Fig 10b. Switching Time Waveforms

D = 0.50
Thermal Response (Z thJC)

0.20

0.10
0.1

0.05 PDM

0.02 SINGLE PULSE t1


0.01 (THERMAL RESPONSE) t2

Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x ZthJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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800
ID

EAS , Single Pulse Avalanche Energy (mJ)


15V
TOP 19A
33A
BOTTOM 46A
600
L DRIVER
VDS

RG D.U.T + 400
V
- DD
IAS A
10V
tp 0.01

200
Fig 12a. Unclamped Inductive Test Circuit

VDD = 25V
0 A
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)

V(BR)DSS Fig 12c. Maximum Avalanche Energy


tp vs. Drain Current

I AS

Fig 12b. Unclamped Inductive Waveforms

Fig 13a. Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

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Fig 14. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs

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TO-220 Package Outline (Dimensions are shown in millimeters (inches)

TO-220 Part Marking Information

TO-220AB packages are not recommended for Surface Mount Application.

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IRL3705NPbF
Qualification Information
Industrial
Qualification Level (per JEDEC JESD47F)†

Moisture Sensitivity Level TO-220 N/A


RoHS Compliant Yes

† Applicable version of JEDEC standard at the time of product release.

Revision History

Date Comments
 Changed datasheet with Infineon logo - all pages.
05/25/2018  Corrected TO-220 Package outline on page 8.
 Added disclaimer on last page.

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Trademarks updated November 2015

Other Trademarks
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