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Avalanche Characteristics
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy d ––– 109 mJ
IAR Avalanche Current g See Fig. 14, 15, 17a, 17b A
EAR Repetitive Avalanche Energy g mJ
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS @ TC = 25°C Continuous Source Current MOSFET symbol
––– ––– 35
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse
(Body Diode) c ––– ––– 140
p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 21A, VGS = 0V e
trr Reverse Recovery Time ––– 80 120 ns TJ = 25°C, IF = 21A, VR =120V
Qrr Reverse Recovery Charge ––– 312 468 nC di/dt = 100A/µs e
Notes:
Repetitive rating; pulse width limited by max. junction temperature. Rθ is measured at TJ of approximately 90°C.
Starting TJ = 25°C, L = 0.51mH, RG = 25Ω, IAS = 21A.
Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive
Pulse width ≤ 400µs; duty cycle ≤ 2%. avalanche information
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IRFB5615PbF
1000 1000
VGS VGS
TOP 15V TOP 15V
12V 12V
10V 10V
100
8.0V 8.0V
7.0V 100 7.0V
6.0V 6.0V
5.5V 5.5V
10 BOTTOM 5.0V BOTTOM 5.0V
10
1 5.0V
5.0V 1
0.1
≤60µs PULSE WIDTH ≤60µs PULSE WIDTH
Tj = 25°C Tj = 175°C
0.01 0.1
0.1 1 10 100 0.1 1 10 100
V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V)
2.5
100
TJ = 175°C
2.0
(Normalized)
TJ = 25°C
10
1.5
1
1.0
VDS = 50V
≤60µs PULSE WIDTH
0.1 0.5
2 4 6 8 10 12 14 16 -60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature
100000 14.0
VGS = 0V, f = 1 MHZ
Ciss = C gs + C gd, C ds SHORTED
ID= 21A
Crss = C gd
12.0
VGS, Gate-to-Source Voltage (V)
VDS= 120V
Coss = C ds + C gd
10000 VDS= 75V
10.0
C, Capacitance (pF)
VDS= 30V
Ciss 8.0
1000
Coss 6.0
Crss 4.0
100
2.0
10 0.0
1 10 100 1000 0 5 10 15 20 25 30 35
VDS, Drain-to-Source Voltage (V) QG, Total Gate Charge (nC)
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
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IRFB5615PbF
1000 1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ISD, Reverse Drain Current (A)
1msec
T J = 175°C 10
10msec
T J = 25°C
10
DC
1
Tc = 25°C
Tj = 175°C
VGS = 0V
Single Pulse
1.0 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1 10 100 1000
VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area
40 6.0
35 5.5
4.5
25
4.0
20 3.5
ID = 100µA
15 3.0 ID = 250uA
2.5 ID = 1.0mA
10 ID = 1.0A
2.0
5
1.5
0 1.0
25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
T C , Case Temperature (°C) T J , Temperature ( °C )
Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Threshold Voltage vs. Temperature
10
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.20
0.1 0.10 R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
0.05 τJ τC 0.02324 0.000008
τJ τ
0.02 τ1 0.26212 0.000106
τ2 τ3 τ4
0.01 τ1 τ2 τ3 τ4 0.50102 0.001115
0.01 Ci= τi/Ri 0.25880 0.005407
Ci i/Ri
Notes:
SINGLE PULSE
1. Duty Factor D = t1/t2
( THERMAL RESPONSE )
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFB5615PbF
0.4 500
RDS(on), Drain-to -Source On Resistance ( Ω)
0.15 200
150
0.1 TJ = 125°C
100
0.05
50
T J = 25°C
0 0
4 6 8 10 12 14 16 18 20 25 50 75 100 125 150 175
Starting T J , Junction Temperature (°C)
VGS, Gate -to -Source Voltage (V)
Fig 12. On-Resistance Vs. Gate Voltage Fig 13. Maximum Avalanche Energy Vs. Drain Current
100
Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)
0.01
10
0.05
0.10
VGS=10V *
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance
D.U.T. ISD Waveform
Current Transformer
+
Reverse
Recovery Body Diode Forward
-
+ Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD
Ripple ≤ 5% ISD
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
tp
L DRIVER
VDS
RG D.U.T +
V
- DD
IAS A
20V
tp 0.01Ω
I AS
Fig 17a. Unclamped Inductive Test Circuit Fig 17b. Unclamped Inductive Waveforms
RD
V DS VDS
V GS
90%
D.U.T.
RG
+
- V DD
V10V
GS 10%
Pulse Width ≤ 1 µs VGS
Duty Factor ≤ 0.1 %
td(on) tr t d(off) tf
Fig 18a. Switching Time Test Circuit Fig 18b. Switching Time Waveforms
Current Regulator Id
Same Type as D.U.T. Vds
Vgs
50KΩ
12V .2µF
.3µF
+
V
D.U.T. - DS
Vgs(th)
VGS
3mA
IG ID
Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr
Fig 19a. Gate Charge Test Circuit Fig 19b. Gate Charge Waveform
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IRFB5615PbF
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IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
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