PD - 96211

IRFB3306GPbF
HEXFET® Power MOSFET
Applications D VDSS 60V
3.3m:
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
RDS(on) typ.
l High Speed Power Switching max. 4.2m:
l Hard Switched and High Frequency Circuits G ID (Silicon Limited) 160A c
Benefits S ID (Package Limited) 120A
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness D
l Fully Characterized Capacitance and Avalanche
SOA
S
l Enhanced body diode dV/dt and dI/dt Capability D
G
l Lead-Free
l Halogen-Free TO-220AB
IRFB3306GPbF

G D S
Gate Drain Source

Absolute Maximum Ratings

Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 160 c
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 110 c A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 120
IDM Pulsed Drain Currentd 620
PD @TC = 25°C Maximum Power Dissipation 230 W
Linear Derating Factor 1.5 W/°C
VGS Gate-to-Source Voltage ± 20 V
dv/dt Peak Diode Recovery f 14 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range
°C
Soldering Temperature, for 10 seconds 300
(1.6mm from case)
Mounting torque, 6-32 or M3 screw x
10lbf in (1.1N m) x
Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy e 184 mJ
IAR Avalanche Currentd See Fig. 14, 15, 22a, 22b, A
EAR Repetitive Avalanche Energy d mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Casej ––– 0.65
RθCS Case-to-Sink, Flat Greased Surface , TO-220 0.50 ––– °C/W
RθJA Junction-to-Ambient, TO-220 ––– 62

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IRFB3306GPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 60 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.07 ––– V/°C Reference to 25°C, ID = 5mA d
RDS(on) Static Drain-to-Source On-Resistance ––– 3.3 4.2 mΩ VGS = 10V, ID = 75A g
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 150µA
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 60V, VGS = 0V
––– ––– 250 VDS = 48V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG Internal Gate Resistance ––– 0.7 ––– Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 230 ––– ––– S VDS = 50V, ID = 75A
Qg Total Gate Charge ––– 85 120 nC ID = 75A
Qgs Gate-to-Source Charge ––– 20 ––– VDS =30V
Qgd Gate-to-Drain ("Miller") Charge ––– 26 VGS = 10V g
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 59 ––– ID = 75A, VDS =0V, VGS = 10V
td(on) Turn-On Delay Time ––– 15 ––– ns VDD = 30V
tr Rise Time ––– 76 ––– ID = 75A
td(off) Turn-Off Delay Time ––– 40 ––– RG = 2.7Ω
tf Fall Time ––– 77 ––– VGS = 10V g
Ciss Input Capacitance ––– 4520 ––– pF VGS = 0V
Coss Output Capacitance ––– 500 ––– VDS = 50V
Crss Reverse Transfer Capacitance ––– 250 ––– ƒ = 1.0MHz, See Fig. 5
Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 720 ––– VGS = 0V, VDS = 0V to 48V i, See Fig. 11
Coss eff. (TR) Effective Output Capacitance (Time Related) ––– h 880 ––– VGS = 0V, VDS = 0V to 48V h

Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 160 c A MOSFET symbol D

(Body Diode) showing the

ISM Pulsed Source Current ––– ––– 620 A integral reverse G

(Body Diode) d p-n junction diode.

S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V g
trr Reverse Recovery Time ––– 31 ns TJ = 25°C VR = 51V,
––– 35 TJ = 125°C IF = 75A
Qrr Reverse Recovery Charge ––– 34 nC TJ = 25°C di/dt = 100A/µs g
––– 45 TJ = 125°C
IRRM Reverse Recovery Current ––– 1.9 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 120A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
‚ Repetitive rating; pulse width limited by max. junction
temperature.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.04mH
RG = 25Ω, IAS = 96A, VGS =10V. Part not recommended for use
above this value.
„ ISD ≤ 75A, di/dt ≤ 1400A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
… Pulse width ≤ 400µs; duty cycle ≤ 2%.
† Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
ˆ Rθ is measured at TJ approximately 90°C

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 IRFB3306GPbF
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V

ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

8.0V 8.0V
6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
4.8V 4.8V
BOTTOM 4.5V BOTTOM 4.5V

100 100

4.5V
4.5V

≤ 60µs PULSE WIDTH ≤ 60µs PULSE WIDTH

Tj = 25°C Tj = 175°C
10 10
0.1 1 10 100 0.1 1 10 100

VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 2.5
ID = 75A

RDS(on) , Drain-to-Source On Resistance

VGS = 10V
ID, Drain-to-Source Current(Α)

100 2.0
TJ = 175°C
(Normalized)

10 1.5

TJ = 25°C

1
1.0
VDS = 25V
≤ 60µs PULSE WIDTH
0.1
0.5
2.0 3.0 4.0 5.0 6.0 7.0 8.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature

8000 20
VGS = 0V, f = 1 MHZ ID= 75A
Ciss = Cgs + Cgd, Cds SHORTED
VDS = 48V
VGS, Gate-to-Source Voltage (V)

Crss = Cgd
16 VDS= 30V
6000 Coss = Cds + Cgd
VDS= 12V
C, Capacitance (pF)

Ciss 12

4000
8

2000 4
Coss
Crss
0
0
0 20 40 60 80 100 120 140
1 10 100
QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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 IRFB3306GPbF
1000 10000
OPERATION IN THIS AREA
LIMITED BY R DS (on)

ID, Drain-to-Source Current (A)

ISD, Reverse Drain Current (A)

1000
100
TJ = 175°C
1msec 100µsec
100
10
TJ = 25°C

10msec
10

1
1 Tc = 25°C
Tj = 175°C DC
VGS = 0V Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0.1 1 10 100
VSD, Source-to-Drain Voltage (V) VDS, Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area
Forward Voltage

V(BR)DSS , Drain-to-Source Breakdown Voltage

180 80
ID = 5mA
160
Limited By Package
140
ID, Drain Current (A)

120 70

100

80

60 60

40

20

0 50
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

T C , Case Temperature (°C) TJ , Junction Temperature (°C)

Fig 9. Maximum Drain Current vs. Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
1.5 800
EAS, Single Pulse Avalanche Energy (mJ)

I D
TOP 13A
18A
600 BOTTOM 96A
1.0
Energy (µJ)

400

0.5

200

0.0 0
0 10 20 30 40 50 60 25 50 75 100 125 150 175
VDS, Drain-to-Source Voltage (V) Starting TJ, Junction Temperature (°C)

Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
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 IRFB3306GPbF
1

D = 0.50

0.20
Thermal Response ( ZthJC )

0.1
0.10
0.05
0.02
0.01 R1 R2
0.01
τJ
R1 R2
Ri (°C/W) τι (sec)
τC
τJ
τ1
τ1
τ2 0.249761 0.00028
τ2

Ci= τi/Ri 0.400239 0.005548

0.001 SINGLE PULSE C
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

100
Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
0.01 Tstart =25°C (Single Pulse)
Avalanche Current (A)

0.05
10 0.10

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.

1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 14. Typical Avalanche Current vs.Pulsewidth

200 Notes on Repetitive Avalanche Curves , Figures 14, 15:
TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
BOTTOM 1% Duty Cycle 1. Avalanche failures assumption:
ID = 96A
EAR , Avalanche Energy (mJ)

160 Purely a thermal phenomenon and failure occurs at a temperature far in

excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
120
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
80 6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
40 tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
25 50 75 100 125 150 175 PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
Starting TJ , Junction Temperature (°C)
EAS (AR) = PD (ave)·tav

Fig 15. Maximum Avalanche Energy vs. Temperature

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IRFB3306GPbF
4.5 16

ID = 1.0A
VGS(th) Gate threshold Voltage (V)

4.0 ID = 1.0mA
ID = 250µA 12
3.5
ID = 150µA

IRRM - (A)
3.0
8
2.5

2.0 IF = 30A
4
VR = 51V
1.5 TJ = 125°C
TJ = 25°C
1.0 0
-75 -50 -25 0 25 50 75 100 125 150 175 100 200 300 400 500 600 700 800 900 1000

TJ , Temperature ( °C ) dif / dt - (A / µs)

Fig 16. Threshold Voltage Vs. Temperature Fig. 17 - Typical Recovery Current vs. dif/dt

16 350

300

12
250
QRR - (nC)
IRRM - (A)

200
8
150

IF = 45A 100 IF = 30A

4
VR = 51V VR = 51V
TJ = 125°C 50 TJ = 125°C
TJ = 25°C TJ = 25°C
0 0
100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / µs) dif / dt - (A / µs)

Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt

350

300

250
QRR - (nC)

200

150

100 IF = 45A
VR = 51V
50 TJ = 125°C
TJ = 25°C
0
100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / µs)

Fig. 20 - Typical Stored Charge vs. dif/dt

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 IRFB3306GPbF
Driver Gate Drive
P.W.
D.U.T P.W.
Period D=
Period
+

ƒ VGS=10V*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - Inductor Current
Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
VGS
20V
tp 0.01Ω
I AS

Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms

LD
VDS VDS
90%
+
VDD -

D.U.T 10%
VGS VGS
Pulse Width < 1µs
Duty Factor < 0.1% td(on) tr td(off) tf

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Current Regulator Id
Same Type as D.U.T. Vds

Vgs
50KΩ

12V .2µF
.3µF

+
V
D.U.T. - DS
Vgs(th)
VGS

3mA

IG ID
Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr

Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
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IRFB3306GPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information

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TO-220AB packages are not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.01/2009
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