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Name : Munad E Ali

Department : Electrical Engineering
Batch : BS 2024
Submitted to : Dr Muhammad Aqil
ECD Assignment 2

Contents
Class A Output Stage ............................................................................................................................... 2
Derivation............................................................................................................................................ 2
Simulation ........................................................................................................................................... 3
Circuit Schematic ............................................................................................................................ 3
Load Power ..................................................................................................................................... 3
Supplied Power ............................................................................................................................... 3
Efficiency ......................................................................................................................................... 4
Discussion............................................................................................................................................ 4
Class B Output Stage ............................................................................................................................... 5
Derivation............................................................................................................................................ 5
Simulation ........................................................................................................................................... 6
Circuit Schematic ............................................................................................................................ 6
Load Power ..................................................................................................................................... 6
Supplied Power ............................................................................................................................... 6
Efficiency ......................................................................................................................................... 6
Discussion............................................................................................................................................ 7
Class AB Output Stage............................................................................................................................. 7
Derivation............................................................................................................................................ 7
Simulation ........................................................................................................................................... 8
Circuit Schematic ............................................................................................................................ 8
Load Power ..................................................................................................................................... 8
Supplied Power ............................................................................................................................... 9
Efficiency ......................................................................................................................................... 9
Discussion............................................................................................................................................ 9
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Class A Output Stage

Derivation

Figure 1: Maximum Power Efficiency for Class A Output Stage

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Simulation
Circuit Schematic

Figure 2: Circuit Schematic of Class A Output Stage

Load Power

Figure 3: Output Power across RL

Supplied Power

Figure 4: Power supplied by one source

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Total Supplied Power= 2 x Power supplied by one source= 2 x 1.0265 = 2.05W

Efficiency
Efficiency= Pload/Psupplied

Efficiency = 0.48/2.05= 23%

Discussion
The simulated power efficiency is less than the theoretical power efficiency because of the ideal
assumptions made in theoretical calculations for example in simulated results the Vo is less than Vcc
and is also distorted. Also in the output waveform a slight offset is seen due to the VBE drop of
transistor Q1, this distorts the output waveform at the negative amplitudes.
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Class B Output Stage

Derivation

Figure 5: Maximum Power Efficiency for Class B Output Stage

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Simulation
Circuit Schematic

Figure 6: Circuit Schematic of Class B output stage

Load Power

Figure 7: Output Power across RL

Supplied Power

Figure 8: Supplied power of one source

Total Supplied Power= 2 x Power supplied by one source= 2 x 2.7 = 5.4W

Efficiency
Efficiency= Pload/Psupplied

Efficiency = 3.88/5.4= 71.9%

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Discussion
The simulated power efficiency is less than the theoretical power efficiency because of the ideal
assumptions made in theoretical calculations for example in simulated results the Vo is less than Vcc
and is also distorted. Another important reason is the cross over distortion which is produced due to
the switching between the transistors and is ignored in theoretical calculations.

Class AB Output Stage

Derivation

Figure 9: Maximum Power Efficiency for Class AB Output Stage

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Simulation
Circuit Schematic

Figure 10: Circuit Schematic of Class AB output stage

Load Power

Figure 11: Output Power across RL

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Supplied Power

Figure 12: Supplied power of one source

Figure 13: Power supplied by Vbb/2 source

Total Supplied Power= (2 x Power supplied by one source) + (2 x Power by Vbb/2 source)

= (2 x 3.04) + (2 x 0.002) = 6.084W

Efficiency
Efficiency= Pload/Psupplied

Efficiency = 4.69/6.084= 77.1%

Discussion
In Class AB Output stage it can be seen that the simulated power efficiency is much closer to the
theoretical power efficiency and the reason is that the crossover distortion is almost eliminated. The
power efficiency is still slightly less due to the other ideal assumptions taken in the theoretical
calculations.