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1. The output of an AND gate with 11. TTL operates from a ________.
three inputs, A, B, and C, is HIGH
when ________.
12. The output of a NOR gate is HIGH
if ________.
2. If a 3-input NOR gate has eight
input possibilities, how many of
those possibilities will result in a 13. The switching speed of CMOS is
HIGH output? now ________.
3. If a signal passing through a gate 14. The format used to present the
is inhibited by sending a LOW into logic output for the various
one of the inputs, and the output is combinations of logic inputs to a
HIGH, the gate is a(n): gate is called a(n):
47. How many inputs are on the logic 59. What is the Boolean expression
gates of a 74HC21 IC? for a four-input OR gate?
48. The basic logic gate whose 60. How many truth table entries are
output is the complement of the input necessary for a four-input circuit?
is the:
53. What is the name of a digital 65. The output of a NAND gate is
circuit that produces several LOW if ________.
repetitive digital waveforms?
66. The gates in this figure are
implemented using TTL logic. If the 73. When does the output of a NAND
input of the inverter is open, and you gate = 1?
apply logic pulses to point B, the
output of the AND gate will be
________. 74. The number of input
combinations for a 4-input gate is
________.
2. A NOR gate output is LOW if any 15. In a Boolean equation the use of
of its inputs is LOW. the + symbol represents the OR
function.
3. As a rule, CMOS has the lowest
power consumption of all IC families. 16. A logic gate has one or more
output terminals and one input
terminal.
4. A popular waveform generator is
the Johnson shift counter.
17. A logic pulser is used to
determine the level of floating in a
5. Good troubleshooting is done by circuit.
looking at the input signal and how it
interacts with the circuits.
18. An inverter output is the
complement of its input.
6. A NOR gate and an OR gate
operate in exactly the same way.
19. It is important to memorize logic
symbols, Boolean equations, and
7. An OR array is programmed by truth tables for logic gates.
blowing fuses to eliminate selected
variables from the output functions.