EEE415-Week03-Assembly Language Programming

DRAFT 6/17/2023
EEE 415 - Microprocessors and Embedded Systems
EEE Assembly Language:

Data Processing, Branch,
415 Conditional Execution

Lecture 3.1
Week 3
Dr. Sajid Muhaimin Choudhury, Assistant Professor

Department of Electrical and Electronics Engineering
Bangladesh University of Engineering and Technology
Programming Building Blocks

• Data-processing Instructions
• Conditional Execution
• Branches
• High-level Constructs:
 if/else statements
 for loops
 while loops
 arrays
 function calls
Dr. Sajid Muhaimin Choudhury 2

EEE 415 - Department of EEE, BUET Digital Design and Computer Architecture: ARM® Edition © 2015
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Branching
• Branches enable out of sequence instruction execution
• Types of branches:
• Branch (B)
– branches to another instruction
• Branch and link (BL)
– discussed later
• Both can be conditional or unconditional

The Stored Program

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Unconditional Branching (B)

ARM assembly
MOV R2, #17 ; R2 = 17
B TARGET ; branch to target
ORR R1, R1, #0x4 ; not executed
TARGET
SUB R1, R1, #78 ; R1 = R1 + 78

Unconditional Branching (B)

ARM assembly
MOV R2, #17 ; R2 = 17
B TARGET ; branch to target
ORR R1, R1, #0x4 ; not executed
TARGET
SUB R1, R1, #78 ; R1 = R1 + 78
Labels (like TARGET) indicate instruction location.

Labels can’t be reserved words (like ADD, ORR, etc.)

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The Branch Not Taken

ARM Assembly
MOV R0, #4 ; R0 = 4
ADD R1, R0, R0 ; R1 = R0+R0 = 8
CMP R0, R1 ; sets flags with R0-R1
BEQ THERE ; branch not taken (Z=0)
ORR R1, R1, #1 ; R1 = R1 OR R1 = 9
THERE
ADD R1, R1, 78 ; R1 = R1 + 78 = 87


• Branches
 for loops
 while loops
 arrays
 function calls

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if Statement
C Code
if (i == j)
f = g + h;
f = f – i;

if Statement
C Code ARM Assembly Code
;R0=f, R1=g, R2=h, R3=i, R4=j
if (i == j) CMP R3, R4 ; set flags with R3-R4

f = g + h; BNE L1 ; if i!=j, skip if block
ADD R0, R1, R2 ; f = g + h
L1
f = f – i; SUB R0, R0, R2 ; f = f - i

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if Statement
;R0=f, R1=g, R2=h, R3=i, R4=j

ADD R0, R1, R2 ; f = g + h
L1
f = f – i; SUB R0, R0, R2 ; f = f - i
Assembly tests opposite case (i != j) of high-level code (i == j)

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if Statement: Alternate Code

;R0=f, R1=g, R2=h, R3=i, R4=j

f = g + h; ADDEQ R0, R1, R2 ; if (i==j) f = g + h
f = f – i; SUB R0, R0, R2 ; f = f - i

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if Statement: Alternate Code

Original Alternate Assembly Code
;R0=f, R1=g, R2=h, R3=i, R4=j
CMP R3, R4 CMP R3, R4 ; set flags with R3-R4

BNE L1 ADDEQ R0, R1, R2 ; if (i==j) f = g + h
ADD R0, R1, R2 SUB R0, R0, R2 ; f = f - i
L1
SUB R0, R0, R2
Useful for short conditional blocks of code

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if/else Statement

;R0=f, R1=g, R2=h, R3=i, R4=j

ADD R0, R1, R2 ; f = g + h
B L2 ; branch past else block
else L1
f = f – i; SUB R0, R0, R2 ; f = f – i
L2

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if/else Statement: Alternate Code

;R0=f, R1=g, R2=h, R3=i, R4=j

f = g + h; ADDEQ R0, R1, R2 ; if (i==j) f = g + h
else
f = f – i; SUBNE R0, R0, R2 ; else f = f - i

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if/else Statement: Alternate Code
Original Alternate Assembly Code

;R0=f, R1=g, R2=h, R3=i, R4=j
CMP R3, R4 CMP R3, R4 ; set flags with R3-R4

BNE L1 ADDEQ R0, R1, R2 ; if (i==j) f = g + h
ADD R0, R1, R2
B L2 SUBNE R0, R0, R2 ; else f = f - i
L1
SUB R0, R0, R2
L2

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CMP R0, R1
BLT ELSE
ADD R0, R0, R1
B DONE
ELSE SUB R0, R0, R1
DONE

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CMP R0, R1
BLT ELSE
ADD R0, R0, R1
B DONE
ELSE SUB R0, R0, R1
DONE
CMP R0, R1
ADDGE R0, R0, R1
SUBLT R0, R0, R1
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while Loops
// determines the power ; R0 = pow, R1 = x
// of x such that 2x = 128 MOV R0, #1 ; pow = 1
int pow = 1; MOV R1, #0 ; x = 0
int x = 0;
WHILE
CMP R0, #128 ; R0-128
while (pow != 128) { BEQ DONE ; if (pow==128)
; exit loop
pow = pow * 2; LSL R0, R0, #1 ; pow=pow*2
x = x + 1; ADD R1, R1, #1 ; x=x+1
} B WHILE ; repeat loop
DONE
Assembly tests for the opposite case (pow == 128) of the C

code (pow != 128).

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for Loops
for (initialization; condition; loop operation)
statement
• initialization: executes before the loop begins

• condition: is tested at the beginning of each iteration
• loop operation: executes at the end of each iteration
• statement: executes each time the condition is met

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for Loops
// adds numbers from 1-9 ; R0 = i, R1 = sum
int sum = 0 MOV R0, #1 ; i = 1
MOV R1, #0 ; sum = 0
for (i=1; i!=10; i=i+1) FOR

sum = sum + i; CMP R0, #10 ; R0-10
BEQ DONE ; if (i==10)
; exit loop
ADD R1, R1, R0 ; sum=sum + i
ADD R0, R0, #1 ; i = i + 1
B FOR ; repeat loop
DONE

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for Loops: Decremented Loops

In ARM, decremented loop variables are more efficient
// adds numbers from 1-9 ; R0 = i, R1 = sum
int sum = 0 MOV R0, #9 ; i = 9
MOV R1, #0 ; sum = 0
for (i=9; i!=0; i=i-1) FOR

sum = sum + i; ADD R1, R1, R0 ; sum=sum + i
SUBS R0, R0, #1 ; i = i – 1
; and set flags
BNE FOR ; if (i!=0)
; repeat loop
Saves 2 instructions per iteration:
• Decrement loop variable & compare: SUBS R0, R0, #1
• Only 1 branch – instead of 2

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• Branches
 for loops
 while loops
 arrays
 function calls

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Arrays
• Access large amounts of similar data
 Index: access to each element
 Size: number of elements

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Arrays
• 5-element array
 Base address = 0x14000000 (address of first
element, scores[0])
 Array elements accessed relative to base address

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Accessing Arrays
C Code
int array[5];
array[0] = array[0] * 8;
array[1] = array[1] * 8;
ARM Assembly Code

; R0 = array base address
MOV R0, #0x60000000 ; R0 = 0x60000000
load korle abar
LDR R1, [R0] ; R1 = array[0]
store w
LSL R1, R1, 3 ; R1 = R1 << 3 = R1*8
korte hoy
STR R1, [R0] ; array[0] = R1
LDR R1, [R0, #4] ; R1 = array[1]

LSL R1, R1, 3 ; R1 = R1 << 3 = R1*8
STR R1, [R0, #4] ; array[1] = R1

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Arrays using for Loops

C Code
int array[200];
int i;
for (i=199; i >= 0; i = i - 1)

array[i] = array[i] * 8;
ARM Assembly Code

; R0 = array base address, R1 = i

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Arrays using for Loops

C Code
int array[200]; i!=0, then put BNE
int i; i>=0, then put BPL
for (i=199; i >= 0; i = i - 1)
array[i] = array[i] * 8;
ARM Assembly Code

; R0 = array base address, R1 = i
MOV R0, 0x60000000
MOV R1, #199
FOR
LDR R2, [R0, R1, LSL #2] ; R2 = array(i)
LSL R2, R2, #3 ; R2 = R2<<3 = R3*8
STR R2, [R0, R1, LSL #2] ; array(i) = R2
SUBS R1, R1, #1 ; i = i – 1
; and set flags
decreament er BPL
khetrei
FOR
normally ; if (i>=0) repeat loop
EEEkomano
evabe instruction lines 415 - Department
easy hoy of EEE, BUET Digital Design and Computer Architecture: ARM® Edition © 2015
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Memory
array thakle
memory base
address declare
kore dite hobe
Instead of the LSL and LDR instruction sequence in Code Example 6.18, we can use a single instruction:
LDR R3, [R0, R1, LSL #2]
R1 is scaled (shifted left by two) then added to the base address (R0). Thus, the memory address is R0 + (R1 × 4)

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Memory
• In addition to scaling the index register, ARM provides offset, pre- indexed, and post-
indexed addressing to enable dense and efficient code for array accesses and function
calls.
In each case, the base register is R1 and the offset is R2. The offset can be subtracted by writing –R2.
The offset may also be an immediate in the range of 0–4095 that can be added (e.g., #20) or
subtracted (e.g., #-20)

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Memory
• Code Example 6.19 shows the for loop from Code Example 6.18
rewritten to use post-indexing, eliminating the ADD to increment i.
store korar shomoy post indexing korte hobe,

otherwise store korar time e index change hoye
jabe

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Memory
• ARM provides load byte (LDRB), load signed byte (LDRSB), and store byte
(STRB) to access individual bytes in memory.
• LDRB zero-extends the byte, whereas LDRSB sign-extends the byte to fill the
entire 32-bit register. STRB stores the least significant byte of the 32-bit
register into the specified byte address in memory.

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Array
415 Lecture 3.2
Week 3

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ASCII Encoding

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Related to ASCII
encoding

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scaled register means

shifted index

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5 instructions
3 instructions

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• Branches
 for loops
 while loops
 arrays
 function calls

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Function Calls
• Caller: calling function (in this case, main)
• Callee: called function (in this case, sum)
C Code
void main()
{
int y;
y = sum(42, 7);
...
}
int sum(int a, int b)

{
return (a + b);
}

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Function Conventions
• Caller:
• passes arguments to callee
• jumps to callee

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Function Conventions
• Caller:
• passes arguments to callee
• jumps to callee
• Callee:
• performs the function
• returns result to caller
• returns to point of call
• must not overwrite registers or memory needed by caller

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ARM Function Conventions

• Call Function: branch and link (it stores the return address of the
next instruction in the link register (LR), and it branches to the target
instruction
BL Address
• Return from function: move the link register to PC:
MOV PC, LR
• Arguments: R0-R3
• Return value: R0
LR: Stores return address

PC: Program Counter, stores next instruction that will be executed
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Function Calls
int main() { 0x00000200 MAIN BL SIMPLE
simple(); 0x00000204 ADD R4, R5, R6
a = b + c; ...
}
0x00401020 SIMPLE MOV PC, LR
void simple() {
return;
}
void means that simple doesn’t return a value

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Function Calls
int main() { 0x00000200 MAIN BL SIMPLE
simple(); 0x00000204 ADD R4, R5, R6
a = b + c; ...
}
0x00401020 SIMPLE MOV PC, LR
void simple() {
return;
}
BL branches to SIMPLE
LR = PC + 4 = 0x00000204
MOV PC, LR makes PC = LR
(the next instruction executed is at 0x00000200)

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Input Arguments and Return Value

ARM conventions:
• Argument values: R0 - R3
• Return value: R0

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C Code
int main()
{
int y;
...
y = diffofsums(2, 3, 4, 5); // 4 arguments
...
}
int diffofsums(int f, int g, int h, int i)

{
int result;
result = (f + g) - (h + i);
return result; // return value
}

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ARM Assembly Code
; R4 = y
MAIN
...
MOV R0, #2 ; argument 0 = 2
BL DIFFOFSUMS ; call function
MOV R4, R0 ; y = returned value
...
; R4 = result
DIFFOFSUMS
ADD R8, R0, R1 ; R8 = f + g
ADD R9, R2, R3 ; R9 = h + i
SUB R4, R8, R9 ; result = (f + g) - (h + i)
MOV R0, R4 ; put return value in R0
MOV PC, LR ; return to caller

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ARM Assembly Code
; R4 = result
DIFFOFSUMS
ADD R8, R0, R1 ; R8 = f + g
ADD R9, R2, R3 ; R9 = h + i
• diffofsums overwrote 3 registers: R4, R8, R9

•diffofsums can use stack to temporarily store registers

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The Stack
• Memory used to temporarily
save variables
• Like stack of dishes, last-in-
first-out (LIFO) queue
• Expands: uses more memory
when more space needed
• Contracts: uses less memory
when the space no longer
needed
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The Stack
• Grows down (from higher to lower memory
addresses)
• Stack pointer: SP points to top of the stack
Stack expands by 2 words

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How Functions use the Stack
• Called functions must have no unintended side effects

• But diffofsums overwrites 3 registers: R4, R8, R9
ARM Assembly Code

; R4 = result
DIFFOFSUMS
ADD R8, R0, R1 ; R8 = f + g
ADD R9, R2, R3 ; R9 = h + i

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Preserving Variables in Stack

1. Makes space on the stack to store the values of one or more registers
2. Stores the values of the registers on the stack
3. Executes the function using the registers
4. Restores the original values of the registers from the stack
5. Deallocates space on the stack

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Storing Register Values on the Stack

ARM Assembly Code
; R2 = result
DIFFOFSUMS
SUB SP, SP, #12 ; make space on stack for 3 registers
STR R4, [SP] ; save R4 on stack
STR R8, [SP, #4] ; save R8 on stack
STR R9, [SP, #8] ; save R9 on stack
ADD R8, R0, R1 ; R8 = f + g
ADD R9, R2, R3 ; R9 = h + i
SUB R4, R8, R9 ; result = (f + g) - (h + i) R9
LDR R9, [SP] ; restore R9 from stack
R8
LDR R8, [SP, #-4] ; restore R8 from stack R4
LDR R4, [SP, #-8] ; restore R4 from stack
ADD SP, SP, #12 ; deallocate stack space

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The Stack during diffofsums Call
Before call During call After call

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Preserved vs Non-Preserved Registers

• Not all registers are used by all functions.
• If the calling function does not use those registers, the effort to
save and restore them is wasted.
• To avoid this waste, ARM divides registers into preserved and
nonpreserved categories.
• A called function must save and restore any of the preserved
registers that it wishes to use, but it can change the nonpreserved
registers freely.
• Caller function must preserve any nonpreserved registers if it is
necessary for remainder of the function.
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Preserved vs Non Preserved Registers

Preserved Nonpreserved
Callee-Saved Caller-Saved
R4-R11 R12
R14 (LR) R0-R3
R13 (SP) CPSR
stack above SP stack below SP

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Storing Saved Registers only on Stack

ARM Assembly Code
; R2 = result
DIFFOFSUMS
STR R4, [SP, #-4] ! ; save R4 on stack
ADD R8, R0, R1 ; R8 = f + g
ADD R9, R2, R3 ; R9 = h + i
LDR R4, [SP], #4 ; restore R4 from stack
Notice code optimization for expanding/contracting stack

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PUSH and POP Command

• Arm supports PUSH and POP command for directly operating on stack.
• PUSH and POP are synonyms for STMDB and LDM (or LDMIA) with the memory
addresses for the access based on SP, and with the final address for the access
written back to the SP. PUSH and POP are the preferred mnemonics in these
cases.
• PUSH {R0,R4-R7} ; Push R0,R4,R5,R6,R7 onto the stack
• POP {R0,R6,PC} ; Pop r0,r6 and PC from the stack,
then branch to the new PC.
https://developer.arm.com/documentation/dui0552/a/the-cortex-m3-instruction-set/memory-access-instructions/push-and-pop
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PUSH and POP Command

• PUSH stores registers on the stack, with the lowest numbered register using the lowest memory
address and the highest numbered register using the highest memory address.
• POP loads registers from the stack, with the lowest numbered register using the lowest memory
address and the highest numbered register using the highest memory address.
• PUSH uses the value in the SP register minus four as the highest memory address, POP uses
the value in the SP register as the lowest memory address, implementing a full-descending
stack. On completion, PUSH updates the SP register to point to the location of the lowest stored
value, POP updates the SP register to point to the location immediately above the highest
location loaded.
• If a POP instruction includes PC in its reglist, a branch to this location is performed when the
POP instruction has completed. Bit[0] of the value read for the PC is used to update the APSR T-
bit. This bit must be 1 to ensure correct operation.

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Storing Saved Registers only on Stack

ARM Assembly Code
; R2 = result
DIFFOFSUMS
PUSH {R4, R8, R9} ; save R4, R8, R9 on stack
ADD R8, R0, R1 ; R8 = f + g
ADD R9, R2, R3 ; R9 = h + i
POP {R4, R8, R9} ; restore R4, R8, R9 from stack
Notice code optimization for expanding/contracting stack

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important
Stack Code Check

AREA MYCODE, CODE, READONLY
LDR R0, =0xAAAAAAAA ; n = 9
LDR R1, =0xBBBBBBBB ;
LDR R10,=0xDDDDDDDD
LDR R2, =0xCCCCCCCC
PUSH {R10, R0, R2}

PUSH {R1}
POP {R4}
POP {R9, R6, R7}
;BL FIB ; call Fibonacci function
STOP B STOP ;End of the program

END

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• When multiple values

are pushed to stack,
with PUSH, lower
register is stored to
lower memory, and
higher register is
stored in higher
memory. (Regardless
of the order)
• For POP, lower

memory is popped into
lower register
65
E92D0405 = 1110 1001 0010 1101 000 0010000000101
Bit 0, Bit 2, Bit 10 is 1 Indicating R0, R2 and R10 are pushed

No information of sequence!
ARM Architecture Reference Manual

®
ARMv7-A and ARMv7-R edition

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67

Stack, Function
415 Lecture 3.3
Week 3

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Leaf vs Non-Leaf Functions

• A function that does not call others is called a leaf function
Eg: diffofsums
• A function that does call others is called a non-leaf function.
Non-preserved registers must also be saved by a non-leaf function

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Preserving Registers
• Caller save rule: Before a function call, the caller must save any non-preserved registers
(R0–R3 and R12) that it needs after the call. After the call, it must restore these
registers before using them.
• Callee save rule: Before a callee disturbs any of the preserved registers (R4–R11 and LR),
it must save the registers. Before it returns, it must restore these registers.

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Nonleaf Function Example

; R0=a, R1=b, R4=i, R5=x ; R0=p, R4=r
int f1(int a, int b) { F1 F2
int i, x; PUSH {R4, R5, LR} PUSH {R4}
ADD R5, R0, R1 ADD R4, R0, 5
x = (a + b)*(a − b); SUB R12, R0, R1 ADD R0, R4, R0
MUL R5, R5, R12 POP {R4}
for (i=0; i<a; i++) MOV R4, #0 MOV PC, LR
x = x + f2(b+i); FOR
return x; CMP R4, R0
BGE RETURN
} PUSH {R0, R1}
ADD R0, R1, R4
int f2(int p) { BL F2
int r; ADD R5, R5, R0
POP {R0, R1}
r = p + 5; ADD R4, R4, #1
return r + p; B FOR
RETURN
} MOV R0, R5
POP {R4, R5, LR}
MOV PC, LR

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Nonleaf Function Example

ARM Assembly Code
; R0=a, R1=b, R4=i, R5=x ; R0=p, R4=r
F1 F2
PUSH {R4, R5, LR} ; save regs PUSH {R4} ; save regs
ADD R5, R0, R1 ; x = (a+b) ADD R4, R0, 5 ; r = p+5
SUB R12, R0, R1 ; temp = (a-b) ADD R0, R4, R0 ; return r+p
MUL R5, R5, R12 ; x = x*temp POP {R4} ; restore regs
MOV R4, #0 ; i = 0 MOV PC, LR ; return
FOR
CMP R4, R0 ; i < a?
BGE RETURN ; no: exit loop
PUSH {R0, R1} ; save regs
ADD R0, R1, R4 ; arg is b+i
BL F2 ; call f2(b+i)
ADD R5, R5, R0 ; x = x+f2(b+i) LR
POP {R0, R1} ; restore regs
ADD R4, R4, #1 ; i++ R5
B FOR ; repeat loop R4
RETURN
MOV R0, R5 ; return x R1
POP {R4, R5, LR} ; restore regs
MOV PC, LR ; return R0
R04
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Stack during Nonleaf Function
At beginning of f1 Just before calling f2 After calling f2

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Recursive Function
• A recursive function is a nonleaf function that calls itself. Recursive functions
behave as both caller and callee and must save both preserved and
nonpreserved registers.
• Example:

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Recursive Function Call

C Code
int factorial(int n) {
if (n <= 1)
return 1;
else
return (n * factorial(n-1));
}

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ARM Assembly Code
0x94 FACTORIAL STR R0, [SP, #-4]! ;store R0 on stack
0x98 STR LR, [SP, #-4]! ;store LR on stack
0x9C CMP R0, #2 ;set flags with R0-2
0xA0 BHS ELSE ;if (r0>=2) branch to else
0xA4 MOV R0, #1 ; otherwise return 1
0xA8 ADD SP, SP, #8 ; restore SP 1
0xAC MOV PC, LR ; return
0xB0 ELSE SUB R0, R0, #1 ; n = n - 1
0xB4 BL FACTORIAL ; recursive call
0xB8 LDR LR, [SP], #4 ; restore LR
0xBC LDR R1, [SP], #4 ; restore R0 (n) into R1
0xC0 MUL R0, R1, R0 ; R0 = n*factorial(n-1)
0xC4 MOV PC, LR ; return

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int factorial(int n) { 0x94 FACTORIAL STR R0, [SP, #-4]!
0x98 STR LR, [SP, #-4]!
if (n <= 1) 0x9C CMP R0, #2
return 1; 0xA0 BHS ELSE
0xA4 MOV R0, #1
0xA8 ADD SP, SP, #8 deallocate kora hoyeche because ei
0xAC MOV PC, LR stage e LR,R0 direct use kora jacche,
else 0xB0 ELSE SUB R0, R0, #1 preserve korar dorkar nei, but ager stage
return (n * factorial(n-1)); 0xB4 BL FACTORIAL er LR ke pawar jonno function caller
} 0xB8 here, it should be LDR LR, [SP], #4 porer line e PC transfer kora hoise
0xBC LDR
LR
R1, then LDR
LDR R1, [SP], #4
0xC0 MUL R0, R1, R0
0xC4 MOV PC, LR

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Stack during Recursive Call
Before call During call After call

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Function Call Summary

• Caller
• Puts arguments in R0-R3
• Saves any needed registers (LR, maybe R0-R3, R8-R12)
• Calls function: BL CALLEE
• Restores registers
• Looks for result in R0
• Callee
• Saves registers that might be disturbed (R4-R7)
• Performs function
• Puts result in R0
• Restores registers
• Returns: MOV PC, LR

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8 words (R4-R10, LR)
3 words (R4-R5, LR)
4 words (R3, R7, R9, LR)

1, because R12 is a non preserved register
2 words (R11, R12)

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Exercise 6.28: Fibonacci - C implementation

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Exercise 6.28: Fibonacci – Assembly implementation

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AREA MYCODE, CODE, READONLY
KEIL Code ; fib.s

; The fib() function computes the nth Fibonacci number.
; n is passed to fib() in R0, and fib() returns the result in R0.
MAIN
MOV R0, #9 ; n = 9
BL BBB ; call Fibonacci function
STOP MOV R0, R0 ;NOP

B STOP
;End of the program
; R1 = result; R2 = prevresult
BBB MOV R1, #1 ; R1 = result = fib(0)
MOV R2, #0 ; R2 = prevresult = fib(-1)
CMP R0, #0 ; n == 0?
BEQ DONE
LOOP
ADD R1, R1, R2 ; result = result + prevresult
SUB R2, R1, R2 ; prevresult = result – prevresult
SUBS R0, R0, #1 ; n = n - 1
BPL LOOP
DONE
MOV R0, R2 ; return result
MOV PC, LR
END
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R0 = 55

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87

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; ARM assembly code

; f: R0 = a, R1 = b, R4 = j;
; g: R0 = x, R4 = k 0x00008038 g PUSH {R4,LR} ; save registers on stack
0x00008000 test MOV R0, #5 ; a = 5 0x0000803C MOV R4, #3 ; k = 3
0x00008004 MOV R1, #3 ; b = 3 0x00008040 CMP R0, #0 ; x == 0?
0x00008008 BL f ; call f(5, 3) 0x00008044 BNE else ; branch when not equal
0x0000800C loop B loop ; and loop forever 0x00008048 MOV R0, #0 ; if equal, return value = 0
0x00008010 f PUSH {R1,R0,LR,R4} ; save registers stack 0x0000804C B done ; and clean up
0x00008014 MOV R4, R0 ; j = a 0x00008050 else SUB R0, R0, #1 ; x = x - 1
0x00008018 MOV R0, R1 ; place b as argument for g 0x00008054 BL g ; call g(x - 1)
0x0000801C BL g ; call g(b) 0x00008058 ADD R0, R0, R4 ; R0 = g(x - 1) + k
0x00008020 MOV R2, R0 ; place return value in R2 0x0000805C done POP {R4,LR} ; restore R0,R4,LR from stack
0x00008024 POP {R1,R0} ; restore a and b after call 0x00008060 MOV PC, LR ; return
0x00008028 ADD R0, R2, R0 ; R0 = g(b) + a
0x0000802C ADD R0, R0, R4 ; R0 = (g(b) + a) + j
0x00008030 POP {R4,LR} ; restore R4, LR
0x00008034 MOV PC, LR ; return

89
0x00008000 test MOV R0, #5 ; a = 5 ; ARM assembly code

0x00008004 MOV R1, #3 ; b = 3
0x00008008 BL f ; call f(5, 3)
; f: R0 = a, R1 = b, R4 = j;
0x0000800C loop B loop ; and loop forever ; g: R0 = x, R4 = k
0x00008010 f PUSH {R1,R0,LR,R4} ; save registers stack
0x00008014 MOV R4, R0 ; j = a FFFFFFFF R1=3
0x00008018 MOV R0, R1 ; place b as argument for g R0=5
FFFFFFFB
0x0000801C BL g ; call g(b)
FFFFFFF7 LR=0x00008008
0x00008020 MOV R2, R0 ; place return value in R2
0x00008024 POP {R1,R0} ; restore a and b after call FFFFFFF3 R4 (old value)
0x00008028 ADD R0, R2, R0 ; R0 = g(b) + a
FFFFFFEF R4=3 R0=3
0x0000802C ADD R0, R0, R4 ; R0 = (g(b) + a) + j
0x00008030 POP {R4,LR} ; restore R4, LR FFFFFFEB LR=0x00008020
FFFFFFE7 R4=3 R0=2
0x00008038 g PUSH {R4,LR} ; save registers on stack
0x0000803C MOV R4, #3 ; k = 3 FFFFFFE3 LR=0x00008058
0x00008040 CMP R0, #0 ; x == 0? R4=3 R0=1
FFFFFFDF
0x00008044 BNE else ; branch when not equal
0x00008048 MOV R0, #0 ; if equal, return value = 0 FFFFFFDB LR=0x00008058
0x0000804C B done ; and clean up R4 R0=0
FFFFFFD7
0x00008050 else SUB R0, R0, #1 ; x = x - 1
0x00008054 BL g ; call g(x - 1) FFFFFFD3 LR=0x00008058
0x00008058 ADD R0, R0, R4 ; R0 = g(x - 1) + k FFFFFFCF
0x0000805C done POP {R4,LR} ; restore R0,R4,LR from stack
EEE
0x00008060 MOV 415 - Department
PC, LR ; return of EEE, BUET Digital Design and Computer Architecture: ARM® Edition © 2015
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0x00008000 test MOV R0, #5 ; a = 5

0x00008004 MOV R1, #3 ; b = 3
0x00008008 BL f ; call f(5, 3)
0x0000800C loop B loop ; and loop forever
0x00008010 f PUSH {R1,R0,LR,R4} ; save registers stack
0x00008014 MOV R4, R0 ; j = a
0x00008018 MOV R0, R1 ; place b as argument for g
0x00008024 POP {R1,R0} ; restore a and b after call
0x00008028 ADD R0, R2, R0 ; R0 = g(b) + a
0x0000802C ADD R0, R0, R4 ; R0 = (g(b) + a) + j
0x00008030 POP {R4,LR} ; restore R4, LR
0x0000803C MOV R4, #3 ; k = 3
0x00008040 CMP R0, #0 ; x == 0?
0x00008048 MOV R0, #0 ; if equal, return value = 0
0x0000804C B done ; and clean up
0x00008050 else SUB R0, R0, #1 ; x = x - 1
0x00008054 BL g ; call g(x - 1)
0x00008058 ADD R0, R0, R4 ; R0 = g(x - 1) + k
EEE
91
0x00008000 test MOV R0, #5 ; a = 5

0x00008004 MOV R1, #3 ; b = 3
0x00008008 BL f ; call f(5, 3)
0x00008010 f PUSH {R1,R0,R4} ; save registers stack
0x00008014 MOV R4, R0 ; j = a FFFFFFFF R1=3
0x00008018 MOV R0, R1 ; place b as argument for g R0=5
FFFFFFFB
FFFFFFF7 R4 (old value)
0x00008024 POP {R1,R0} ; restore a and b after call FFFFFFF3 R4=3 R0=3
0x00008028 ADD R0, R2, R0 ; R0 = g(b) + a
0x0000802C ADD R0, R0, R4 ; R0 = (g(b) + a) + j FFFFFFEF LR=0x00008020
0x00008030 POP {R4} ; restore R4, LR FFFFFFEB R4=3 R0=2
0x00008038 g PUSH {R4,LR} ; save registers on stack FFFFFFE7 LR=0x00008058
0x0000803C MOV R4, #3 ; k = 3 FFFFFFE3 R4=3 R0=1
0x00008040 CMP R0, #0 ; x == 0?
FFFFFFDF LR=0x00008058
0x00008048 MOV R0, #0 ; if equal, return value = 0 FFFFFFDB R4 R0=0
0x0000804C B done ; and clean up LR=0x00008058
FFFFFFD7
0x00008050 else SUB R0, R0, #1 ; x = x - 1
0x00008054 BL g ; call g(x - 1) FFFFFFD3
0x00008058 ADD R0, R0, R4 ; R0 = g(x - 1) + k FFFFFFCF
EEE
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0x00008000 test MOV R0, #5 ; a = 5

0x00008004 MOV R1, #3 ; b = 3
0x00008008 BL f ; call f(5, 3)
0x00008010 f PUSH {R1,R0,R4} ; save registers stack
0x00008014 MOV R4, R0 ; j = a
0x00008018 MOV R0, R1 ; place b as argument for g
0x00008024 POP {R1,R0} ; restore a and b after call
0x00008028 ADD R0, R2, R0 ; R0 = g(b) + a
0x0000802C ADD R0, R0, R4 ; R0 = (g(b) + a) + j
0x00008030 POP {R4} ; restore R4, LR
0x0000803C MOV R4, #3 ; k = 3
0x00008040 CMP R0, #0 ; x == 0?
0x00008048 MOV R0, #0 ; if equal, return value = 0
0x0000804C B done ; and clean up
0x00008050 else SUB R0, R0, #1 ; x = x - 1
0x00008054 BL g ; call g(x - 1)
0x00008058 ADD R0, R0, R4 ; R0 = g(x - 1) + k
0x0000805C done POP {R4,LR} ; restore R0,R4,LR from stack Practice!
EEE
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Practice and Solve all interview questions!
For term final and CT, practice writing code by hand!

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DRAFT 6/17/2023

EEE 415 - Microprocessors and Embedded Systems

EEE Assembly Language:

415 Conditional Execution

Dr. Sajid Muhaimin Choudhury, Assistant Professor

Programming Building Blocks

Dr. Sajid Muhaimin Choudhury 2

Dr. Sajid Muhaimin Choudhury 3

The Stored Program

Dr. Sajid Muhaimin Choudhury 4

Unconditional Branching (B)

Dr. Sajid Muhaimin Choudhury 5

Unconditional Branching (B)

Labels (like TARGET) indicate instruction location.

Dr. Sajid Muhaimin Choudhury 6

The Branch Not Taken

Dr. Sajid Muhaimin Choudhury 7

Programming Building Blocks

Dr. Sajid Muhaimin Choudhury 8

Dr. Sajid Muhaimin Choudhury 9

if (i == j) CMP R3, R4 ; set flags with R3-R4

Dr. Sajid Muhaimin Choudhury 10

if (i == j) CMP R3, R4 ; set flags with R3-R4

Assembly tests opposite case (i != j) of high-level code (i == j)

Dr. Sajid Muhaimin Choudhury 11

if Statement: Alternate Code

if (i == j) CMP R3, R4 ; set flags with R3-R4

Dr. Sajid Muhaimin Choudhury 12

if Statement: Alternate Code

CMP R3, R4 CMP R3, R4 ; set flags with R3-R4

Useful for short conditional blocks of code

Dr. Sajid Muhaimin Choudhury 13

C Code ARM Assembly Code

if (i == j) CMP R3, R4 ; set flags with R3-R4

Dr. Sajid Muhaimin Choudhury 14

if/else Statement: Alternate Code

C Code ARM Assembly Code

if (i == j) CMP R3, R4 ; set flags with R3-R4

Dr. Sajid Muhaimin Choudhury 15

if/else Statement: Alternate Code

Original Alternate Assembly Code

CMP R3, R4 CMP R3, R4 ; set flags with R3-R4

Dr. Sajid Muhaimin Choudhury 16

Dr. Sajid Muhaimin Choudhury 17

Assembly tests for the opposite case (pow == 128) of the C

Dr. Sajid Muhaimin Choudhury 19

• initialization: executes before the loop begins

Dr. Sajid Muhaimin Choudhury 20

for (i=1; i!=10; i=i+1) FOR

Dr. Sajid Muhaimin Choudhury 21

for Loops: Decremented Loops

for (i=9; i!=0; i=i-1) FOR

Dr. Sajid Muhaimin Choudhury 22

Programming Building Blocks

Dr. Sajid Muhaimin Choudhury 23

Dr. Sajid Muhaimin Choudhury 24

Dr. Sajid Muhaimin Choudhury 25

ARM Assembly Code

LDR R1, [R0, #4] ; R1 = array[1]

Dr. Sajid Muhaimin Choudhury 26

Arrays using for Loops

for (i=199; i >= 0; i = i - 1)

ARM Assembly Code

Dr. Sajid Muhaimin Choudhury 27