Quanta Am9a Ra0 (Dell 7557)

1 2 3 4 5 6 7 8
Block Diagram 01
A A
HDMI Conn. Re-Driver INT HDMI

CPU GPU
Nvidia
PAGE 30 PS8407A PEG x 8 N16P-GX 50W
GDDR5 x 8
PAGE 30 Skylake-H 29 x 29 mm
(256 Mb x 16)
PAGE 22~25
Package : BGA908
Channel A PAGE 17~21
SYSTEM MEMORY
DDR3L 1600MT/s 1.35V
DDR3 SO-DIMM Processor : Quad Core
PAGE 15 Power : 45W (35W w/dGPU) eDP 4 Lanes 15.6" eDP Panel
Package : BGA1440 UHD 3840 x 2160
Channel B
Size : 42x28 (mm) PAGE 29
DDR3L 1600MT/s 1.35V
DDR3 SO-DIMM PAGE 2~8
PAGE 16
B
5GT/s B
DMI X 4 Giga LAN

SATA3 6GB /S PCIE TRANSFORMER RJ45
HDD PAGE 28 RTL8111GU PAGE 37 PAGE 37
PCIE Port 5 PAGE 37
NGFF
M.2(NGFF) SSD PCIE Gen III x4 / SATA III 2,3
Mobile Intel PCIE Camera
PCIE Port 6
PAGE 28
WLAN + BT
PAGE 36 PAGE 29
Flash ROM Port 5 Port 4

4 MB for ME PAGE 27 USB2.0
Flash ROM SPI I2C Sunrise point - H

8 MB for BIOS+EC EC Port 1 Port 2 Port 3
16 MB (Reserve) SPI ITE USB 3.0 USB 3.0 USB 3.0 Sub Woofer
C
PAGE 27
IT8528E LPC Power Share Type A Type A C
I2C PAGE 34
Touch Pad PS2 Package : LQPF128
PAGE 31
Platform Controller Hub AMP
Power : 2.8 Watt ANPEC
K/B PAGE 31 Package : FCBGA837 USB3.0 Port 1 Port 2 Port 3
ALC1003-CGT
Size : 23 x 23 (mm)
FAN PAGE 33
PAGE 26
HDA Audio Codec Universal Jack
Realtek
Card Reader ALC3246
SD slot Realtek PCIE SPEAKER
PAGE 35 RTS5227S
9 x 9mm PAGE 35
PCIe Port7
PAGE 9~14 IO Board
D D
www.schematic-x.blogspot.com Quanta Computer Inc.

PROJECT : AM9A
Size Document Number Rev
BLOCK DIAGRAM A0
Date: Monday, May 25, 2015 Sheet 1 of 57

1 2 3 4 5 6 7 8
5 4 3 2 1
Skylake Processor (DDR3-CH-A)

SKL with DDR3L is IL memory design.
Skylake Processor (DDR3-CH-B) 02
SKL with DDR3L is IL memory design.
SKYLAKE_HALO SKYLAKE_HALO
15 M_A_DQ[63:0] U10A 16 M_B_DQ[63:0] U10B
BGA1440 BGA1440
M_A_DQ0 BR6 Interleve AG1 M_A_CLKP0 M_B_DQ0 BT11 Interleve Non-Interleve AM9 M_B_CLKP0
M_A_DQ1 DDR0_DQ[0] DDR0_CKP[0] M_A_CLKN0 M_A_CLKP0 15 M_B_DQ1 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKP[0] M_B_CLKN0 M_B_CLKP0 16
BT6 AG2 M_A_CLKN0 15
BR11 AN9 M_B_CLKN0 16
M_A_DQ2 BP3 DDR0_DQ[1] DDR0_CKN[0] AK1 M_A_CLKN1 M_B_DQ2 BT8 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0] AM8 M_B_CLKN1
DDR0_DQ[2] DDR0_CKN[1] M_A_CLKN1 15 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKN[1] M_B_CLKN1 16
M_A_DQ3 BR3 AK2 M_A_CLKP1 M_B_DQ3 BR8 AM7 M_B_CLKP1
DDR0_DQ[3] DDR0_CKP[1] M_A_CLKP1 15 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] M_B_CLKP1 16
D M_A_DQ4 BN5 AL3 M_B_DQ4 BP11 AM11 D
M_A_DQ5 BP6 DDR0_DQ[4] DDR0_CLKP[2] AK3 M_B_DQ5 BN11 DDR1_DQ[4]/DDR0_DQ[20] DDR1_CLKP[2] AM10
M_A_DQ6 BP2 DDR0_DQ[5] DDR0_CLKN[2] AL2 M_B_DQ6 BP8 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CLKN[2] AJ10
M_A_DQ7 BN3 DDR0_DQ[6] DDR0_CLKP[3] AL1 M_B_DQ7 BN8 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CLKP[3] AJ11
M_A_DQ8 BL4 DDR0_DQ[7] DDR0_CLKN[3] M_B_DQ8 BL12 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CLKN[3]
M_A_DQ9 BL5 DDR0_DQ[8] AT1 M_A_CKE0 M_B_DQ9 BL11 DDR1_DQ[8]/DDR0_DQ[24] AT8 M_B_CKE0
M_A_DQ10 DDR0_DQ[9] DDR0_CKE[0] M_A_CKE1 M_A_CKE0 15 M_B_DQ10 DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0] M_B_CKE1 M_B_CKE0 16
BL2 AT2 BL8 AT10
M_A_DQ11 DDR0_DQ[10] DDR0_CKE[1] M_A_CKE1 15 M_B_DQ11 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1] M_B_CKE1 16
BM1 AT3 BJ8 AT7
M_A_DQ12 BK4 DDR0_DQ[11] DDR0_CKE[2] AT5 M_B_DQ12 BJ11 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CKE[2] AT11
M_A_DQ13 BK5 DDR0_DQ[12] DDR0_CKE[3] M_B_DQ13 BJ10 DDR1_DQ[12]/DDR0_DQ[28] DDR1_CKE[3]
M_A_DQ14 BK1 DDR0_DQ[13] AD5 M_A_CS#0 M_B_DQ14 BL7 DDR1_DQ[13]/DDR0_DQ[29] AF11 M_B_CS#0
M_A_DQ15 DDR0_DQ[14] DDR0_CS#[0] M_A_CS#1 M_A_CS#0 15 M_B_DQ15 DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0] M_B_CS#1 M_B_CS#0 16
BK2 AE2 BJ7 AE7
M_A_DQ16 BG4 DDR0_DQ[15] Non-Interleve DDR0_CS#[1] AD2
M_A_CS#1 15 M_B_DQ16 BG11 DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1] AF10
M_B_CS#1 16
M_A_DQ17 BG5 DDR0_DQ[16]/DDR0_DQ[32] DDR0_CS#[2] AE5 M_B_DQ17 BG10 DDR1_DQ[16]/DDR0_DQ[48] DDR1_CS#[2] AE10
M_A_DQ18 BF4 DDR0_DQ[17]/DDR0_DQ[33] DDR0_CS#[3] M_B_DQ18 BG8 DDR1_DQ[17]/DDR0_DQ[49] DDR1_CS#[3]
M_A_DQ19 BF5 DDR0_DQ[18]/DDR0_DQ[34] AD3 M_A_ODT0 M_B_DQ19 BF8 DDR1_DQ[18]/DDR0_DQ[50] AF7 M_B_ODT0
M_A_DQ20 DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0] M_A_ODT1 M_A_ODT0 15 M_B_DQ20 DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0] M_B_ODT1 M_B_ODT0 16
BG2 AE4 BF11 AE8
M_A_DQ21 DDR0_DQ[20]/DDR0_DQ[36] DDR0_ODT[1] M_A_ODT1 15 M_B_DQ21 DDR1_DQ[20]/DDR0_DQ[52] DDR1_ODT[1] M_B_ODT1 16
BG1 AE1 BF10 AE9
M_A_DQ22 BF1 DDR0_DQ[21]/DDR0_DQ[37] DDR0_ODT[2] AD4 M_B_DQ22 BG7 DDR1_DQ[21]/DDR0_DQ[53] DDR1_ODT[2] AE11
M_A_DQ23 BF2 DDR0_DQ[22]/DDR0_DQ[38] DDR0_ODT[3] M_B_DQ23 BF7 DDR1_DQ[22]/DDR0_DQ[54] DDR1_ODT[3]
M_A_DQ24 BD2 DDR0_DQ[23]/DDR0_DQ[39] DDR3L LPDDR3 DDR4 AH5 M_A_BS#0
M_A_BS#[2:0] 15
M_B_DQ24 BB11 DDR1_DQ[23]/DDR0_DQ[55] DDR3L LPDDR3 DDR4 AH10 M_B_RAS#
M_A_DQ25 DDR0_DQ[24]/DDR0_DQ[40] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] M_A_BS#1 M_B_DQ25 DDR1_DQ[24]/DDR0_DQ[56] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] M_B_WE# M_B_RAS# 16
BD1 AH1 BC11 AH11
DDR0_DQ[25]/DDR0_DQ[41] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR1_DQ[25]/DDR0_DQ[57] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] M_B_WE# 16
M_A_DQ26 BC4 AU1 M_A_BS#2 M_B_DQ26 BB8 AF8 M_B_CAS#
DDR0_DQ[26]/DDR0_DQ[42] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR1_DQ[26]/DDR0_DQ[58] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] M_B_CAS# 16
M_A_DQ27 BC5 M_B_DQ27 BC8
DDR0_DQ[27]/DDR0_DQ[43] DDR1_DQ[27]/DDR0_DQ[59] M_B_BS#[2:0] 16
M_A_DQ28 BD5 AH4 M_A_RAS# M_B_DQ28 BC10 AH8 M_B_BS#0
M_A_DQ29 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] M_A_WE# M_A_RAS# 15 M_B_DQ29 DDR1_DQ[28]/DDR0_DQ[60] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] M_B_BS#1
BD4 AG4 BB10 AH9
M_A_DQ30 DDR0_DQ[29]/DDR0_DQ[45] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] M_A_CAS# M_A_WE# 15 M_B_DQ30 DDR1_DQ[29]/DDR0_DQ[61] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] M_B_BS#2
BC1 AD1 BC7 AR9
M_A_DQ31 DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] M_A_CAS# 15 M_B_DQ31 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
BC2 M_A_A[15:0] 15 BB7 M_B_A[15:0] 16
M_A_DQ32 AB1 DDR0_DQ[31]/DDR0_DQ[47] AH3 M_A_A0 M_B_DQ32 AA11 DDR1_DQ[31]/DDR0_DQ[63] AJ9 M_B_A0
M_A_DQ33 AB2 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] AP4 M_A_A1 M_B_DQ33 AA10 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] AK6 M_B_A1
C M_A_DQ34 AA4 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] AN4 M_A_A2 M_B_DQ34 AC11 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] AK5 M_B_A2 C
M_A_DQ35 AA5 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] AP5 M_A_A3 M_B_DQ35 AC10 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] AL5 M_B_A3
M_A_DQ36 AB5 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] AP2 M_A_A4 M_B_DQ36 AA7 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[3] AL6 M_B_A4
M_A_DQ37 AB4 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] AP1 M_A_A5 M_B_DQ37 AA8 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4] AM6 M_B_A5
M_A_DQ38 AA2 DDR0_DQ[37]/DDR1_DQ[5] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] AP3 M_A_A6 M_B_DQ38 AC8 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] AN7 M_B_A6
M_A_DQ39 AA1 DDR0_DQ[38]/DDR1_DQ[6] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AN1 M_A_A7 M_B_DQ39 AC7 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] AN10 M_B_A7
M_A_DQ40 V5 DDR0_DQ[39]/DDR1_DQ[7] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AN3 M_A_A8 M_B_DQ40 W8 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] AN8 M_B_A8
M_A_DQ41 V2 DDR0_DQ[40]/DDR1_DQ[8] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] AT4 M_A_A9 M_B_DQ41 W7 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AR11 M_B_A9
M_A_DQ42 U1 DDR0_DQ[41]/DDR1_DQ[9] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] AH2 M_A_A10 M_B_DQ42 V10 DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] AH7 M_B_A10
M_A_DQ43 U2 DDR0_DQ[42]/DDR1_DQ[10] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] AN2 M_A_A11 M_B_DQ43 V11 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AN11 M_B_A11
M_A_DQ44 V1 DDR0_DQ[43]/DDR1_DQ[11] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] AU4 M_A_A12 M_B_DQ44 W11 DDR1_DQ[43]/DDR1_DQ[27] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] AR10 M_B_A12
M_A_DQ45 V4 DDR0_DQ[44]/DDR1_DQ[12] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] AE3 M_A_A13 M_B_DQ45 W10 DDR1_DQ[44]/DDR1_DQ[28] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AF9 M_B_A13
M_A_DQ46 U5 DDR0_DQ[45]/DDR1_DQ[13] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] AU2 M_A_A14 M_B_DQ46 V7 DDR1_DQ[45]/DDR1_DQ[29] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] AR7 M_B_A14
M_A_DQ47 U4 DDR0_DQ[46]/DDR1_DQ[14] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] AU3 M_A_A15 M_B_DQ47 V8 DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] AT9 M_B_A15
M_A_DQ48 R2 DDR0_DQ[47]/DDR1_DQ[15] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# M_B_DQ48 R11 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR0_DQ[48]/DDR1_DQ[32] DDR1_DQ[48]
M_A_DQ49
M_A_DQ50
P5
R4 DDR0_DQ[49]/DDR1_DQ[33] DDR0_PAR
AG3
AU5
3/11 add GND M_B_DQ49
M_B_DQ50
P11
P7 DDR1_DQ[49] DDR1_PAR
AJ7
AR8
3/11 add GND
M_A_DQ51 P4 DDR0_DQ[50]/DDR1_DQ[34] DDR0_ALERT# M_B_DQ51 R8 DDR1_DQ[50] DDR1_ALERT#
DDR0_DQ[51]/DDR1_DQ[35] DDR1_DQ[51]
M_A_DQ52 R5
DDR0_DQ[52]/DDR1_DQ[36]
Non-Interleve M_A_DQSN[3:0] 15
M_B_DQ52 R10
DDR1_DQ[52] Interleve Non-Interleve BP9 M_B_DQSN[7:0] 16
M_A_DQ53 P2 BR5 M_A_DQSN0 M_B_DQ53 P10 M_B_DQSN0
M_A_DQ54 R1
Interleve DDR0_DQSN[0]
DDR0_DQSN[1]
BL3 M_A_DQSN1 M_B_DQ54 R7 DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
BL9 M_B_DQSN1
M_A_DQ55 P1 BG3 M_A_DQSN2 M_B_DQ55 P8 BG9 M_B_DQSN2
M_A_DQ56 M4 DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] BD3 M_A_DQSN3 M_B_DQ56 L11 DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6] BC9 M_B_DQSN3
DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSN[3]/DDR0_DQSN[5] M_A_DQSP[7:4] 15 DDR1_DQ[56] DDR1_DQSN[3]/DDR0_DQSN[7]
M_A_DQ57 M1 AB3 M_A_DQSP4 M_B_DQ57 M11 AC9 M_B_DQSN4
M_A_DQ58 L4 DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSP[4]/DDR1_DQSP[0] V3 M_A_DQSP5 M_B_DQ58 L7 DDR1_DQ[57] DDR1_DQSN[4]/DDR1_DQSN[2] W9 M_B_DQSN5
M_A_DQ59 L2 DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] R3 M_A_DQSP6 M_B_DQ59 M8 DDR1_DQ[58] DDR1_DQSN[5]/DDR1_DQSN[3] R9 M_B_DQSN6
M_A_DQ60 M5 DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSP[6]/DDR1_DQSP[4] M3 M_A_DQSP7 M_B_DQ60 L10 DDR1_DQ[59] DDR1_DQSN[6] M9 M_B_DQSN7
M_A_DQ61 M2 DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSP[7]/DDR1_DQSP[5] M_B_DQ61 M10 DDR1_DQ[60] DDR1_DQSN[7]
M_A_DQ62 L5 DDR0_DQ[61]/DDR1_DQ[45] Non-Interleve BP5 M_A_DQSP0
M_A_DQSP[3:0] 15
M_B_DQ62 M7 DDR1_DQ[61] Interleve Non-Interleve BR9 M_B_DQSP0
M_B_DQSP[7:0] 16
M_A_DQ63 L1
Interleve DDR0_DQSP[0]
DDR0_DQSP[1]
BK3 M_A_DQSP1 M_B_DQ63 L8 DDR1_DQ[62]
DDR1_DQ[63]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSP[1]/DDR0_DQSP[3]
BJ9 M_B_DQSP1
B BF3 M_A_DQSP2 BF9 M_B_DQSP2 B
BA2 DDR0_DQSP[2]/DDR0_DQSP[4] BC3 M_A_DQSP3 AW11 DDR1_DQSP[2]/DDR0_DQSP[6] BB9 M_B_DQSP3
DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] M_A_DQSN[7:4] 15 DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7]
BA1 AA3 M_A_DQSN4 AY11 AA9 M_B_DQSP4
AY4 DDR0_ECC[1] DDR0_DQSN[4]/DDR1_DQSN[0] U3 M_A_DQSN5 AY8 DDR1_ECC[1] DDR1_DQSP[4]/DDR1_DQSP[2] V9 M_B_DQSP5
AY5 DDR0_ECC[2] DDR0_DQSN[5]/DDR1_DQSN[1] P3 M_A_DQSN6 AW8 DDR1_ECC[2] DDR1_DQSP[5]/DDR1_DQSP[3] P9 M_B_DQSP6
DDR0_ECC[3] DDR0_DQSN[6]/DDR1_DQSN[4] DDR1_ECC[3] DDR1_DQSP[6]
For ECC BA5
DDR0_ECC[4] DDR0_DQSN[7]/DDR1_DQSN[5]
L3 M_A_DQSN7 For ECC AY10
DDR1_ECC[4] DDR1_DQSP[7]
L9 M_B_DQSP7
BA4 AW10
AY1 DDR0_ECC[5] AY3 AY7 DDR1_ECC[5] AW9
DDR0_ECC[6] DDR0_DQSP[8] BA3 For ECC DDR1_ECC[6] DDR1_DQSP[8]
AY2
DDR0_ECC[7] DDR0_DQSN[8]
AW7
DDR1_ECC[7] DDR1_DQSN[8]
AY9 For ECC
DDR CHANNEL B
Place close to CPU
DDR CHANNEL A R301 121/F_4 DDR_RCOMP_0 G1 BN13 +DDR_VREF_CA
DDR_RCOMP[0] DDR_VREF_CA +DDR_VREF_CA
R299 75/F_4 DDR_RCOMP_1 H1 BP13 +VREFDQ_SA
DDR_RCOMP_2 J2 DDR_RCOMP[1] DDR0_VREF_DQ +VREFDQ_SB +VREFDQ_SA
R298 100/F_4 BR13
DDR_RCOMP[2] DDR1_VREF_DQ +VREFDQ_SB
1 OF 14 2 OF 14
SKL_H_BGA_BGA/BGA REV = 1 2/10 add net name
SKL_H_BGA_BGA/BGA REV = 1
Follow SKL-H WP(V0.91) Follow SKL-H WP(V0.91) support DDR3L SO-DIMM

support DDR3L SO-DIMM #549401 page 41
#549401 page 26
A A
Quanta Computer Inc.

PROJECT : AM9A
CPU A0

5 4 3 2 1
5 4 3 2 1
03
Skylake Processor (PEG, DMI)
Skylake Processor (DDI, eDP)
SKYLAKE_HALO
U10C SKYLAKE_HALO
#546884 PDG 1.0 page 163 U10D #546884 PDG 1.0 page 155
D D
BGA1440 BGA1440
INT_HDMI_TXP2 K36 D29 EDP_TXP0
30 INT_HDMI_TXP2 INT_HDMI_TXN2 DDI1_TXP[0] EDP_TXP[0] EDP_TXN0 EDP_TXP0 29
K37 E29
PEG_RXP7 PEG_TXP7 30 INT_HDMI_TXN2 INT_HDMI_TXP1 DDI1_TXN[0] EDP_TXN[0] EDP_TXP1 EDP_TXN0 29
17 PEG_RXP7 E25 B25 C589 0.22U/16V_4 PEG_TXP7_C 17 J35 F28
PEG_RXN7 PEG_RXP[0] PEG_TXP[0] PEG_TXN7 30 INT_HDMI_TXP1 INT_HDMI_TXN1 DDI1_TXP[1] EDP_TXP[1] EDP_TXN1 EDP_TXP1 29
17 PEG_RXN7 D25 A25 C591 0.22U/16V_4 PEG_TXN7_C 17 J34 E28
PEG_RXN[0] PEG_TXN[0] 30 INT_HDMI_TXN1 DDI1_TXN[1] EDP_TXN[1] EDP_TXN1 29
HDMI 30 INT_HDMI_TXP0
INT_HDMI_TXP0 H37
DDI1_TXP[2] EDP_TXN[2]
B29 EDP_TXN2
EDP_TXN2 29 eDP
PEG_RXP6 E24 B24 PEG_TXP6 C595 0.22U/16V_4 INT_HDMI_TXN0 H36 A29 EDP_TXP2
17 PEG_RXP6 PEG_RXP[1] PEG_TXP[1] PEG_TXP6_C 17 30 INT_HDMI_TXN0 DDI1_TXN[2] EDP_TXP[2] EDP_TXP2 29
PEG_RXN6 F24 C24 PEG_TXN6 C592 0.22U/16V_4 INT_HDMI_TXCP J37 B28 EDP_TXN3
17 PEG_RXN6 PEG_RXN[1] PEG_TXN[1] PEG_TXN6_C 17 30 INT_HDMI_TXCP DDI1_TXP[3] EDP_TXN[3] EDP_TXN3 29
INT_HDMI_TXCN J38 C28 EDP_TXP3
PEG_RXP5 PEG_TXP5 30 INT_HDMI_TXCN DDI1_TXN[3] EDP_TXP[3] EDP_TXP3 29
17 PEG_RXP5 E23 B23 C596 0.22U/16V_4 PEG_TXP5_C 17
PEG_RXN5 D23 PEG_RXP[2] PEG_TXP[2] A23 PEG_TXN5 C598 0.22U/16V_4 D27 C26 EDP_AUXP
17 PEG_RXN5 PEG_RXN[2] PEG_TXN[2] PEG_TXN5_C 17 DDI1_AUXP EDP_AUXP EDP_AUXP 29
E27 B26 EDP_AUXN
PEG_RXP4 PEG_TXP4 DDI1_AUXN EDP_AUXN EDP_AUXN 29
17 PEG_RXP4 E22 B22 C601 0.22U/16V_4 PEG_TXP4_C 17
PEG_RXN4 F22 PEG_RXP[3] PEG_TXP[3] C22 PEG_TXN4 C600 0.22U/16V_4 H34
17 PEG_RXN4 PEG_RXN[3] PEG_TXN[3] PEG_TXN4_C 17 DDI2_TXP[0]
H33
PEG_RXP3 E21 B21 PEG_TXP3 C602 0.22U/16V_4 F37 DDI2_TXN[0] A33 EDP_DISP_UTIL
17 PEG_RXP3 PEG_RXP[4] PEG_TXP[4] PEG_TXP3_C 17 DDI2_TXP[1] EDP_DISP_UTIL TP1
PEG_RXN3 D21 A21 PEG_TXN3 C603 0.22U/16V_4 G38
17 PEG_RXN3 PEG_RXN[4] PEG_TXN[4] PEG_TXN3_C 17 DDI2_TXN[1]
F34
PEG_RXP2 E20 B20 PEG_TXP2 C605 0.22U/16V_4 F35 DDI2_TXP[2] D37 EDP_RCOMP R29 24.9/F_4
17 PEG_RXP2 PEG_RXP[5] PEG_TXP[5] PEG_TXP2_C 17 DDI2_TXN[2] EDP_RCOMP +VCCIO
PEG_RXN2 F20 C20 PEG_TXN2 C604 0.22U/16V_4 E37
E36 Place inside CPU cavity
PEG_RXP1 E19 B19 PEG_TXP1 C606 0.22U/16V_4 DDI2_TXN[3]
17 PEG_RXP1 PEG_RXP[6] PEG_TXP[6] PEG_TXP1_C 17
PEG_RXN1 D19 A19 PEG_TXN1 C610 0.22U/16V_4 F26
17 PEG_RXN1 PEG_RXN[6] PEG_TXN[6] PEG_TXN1_C 17 DDI2_AUXP
E26
C DDI2_AUXN C
PEG_RXP0 E18 B18 PEG_TXP0 C614 0.22U/16V_4
17 PEG_RXP0 PEG_RXP[7] PEG_TXP[7] PEG_TXP0_C 17
PEG_RXN0 F18 C18 PEG_TXN0 C611 0.22U/16V_4 C34
D34
D17 A17 B36 DDI3_TXN[0]
E17 PEG_RXP[8] PEG_TXP[8] B17 B34 DDI3_TXP[1]
PEG_RXN[8] PEG_TXN[8] F33 DDI3_TXN[1]
F16 C16 E33 DDI3_TXP[2]
E16 PEG_RXP[9] PEG_TXP[9] B16 C33 DDI3_TXN[2]
PEG_RXN[9] PEG_TXN[9] B33 DDI3_TXP[3]
D15 A15 DDI3_TXN[3] G27 AUD_AZACPU_SCLK
PEG_RXP[10] PEG_TXP[10] PROC_AUDIO_CLK AUD_AZACPU_SCLK 10
E15 B15 A27 G25 AUD_AZACPU_SDO
PEG_RXN[10] PEG_TXN[10] DDI3_AUXP PROC_AUDIO_SDI AUD_AZACPU_SDO 10
B27 G29 AUD_AZACPU_SDI_R
DDI3_AUXN PROC_AUDIO_SDO AUD_AZACPU_SDI 10
F14 C14 R18 20_4
E14 PEG_RXP[11] PEG_TXP[11] B14 4 OF 14 Place near CPU
PEG_RXN[11] PEG_TXN[11] SKL_H_BGA_BGA/BGA REV = 1 PDG V1.0 P351
D13 A13
E13 PEG_RXP[12] PEG_TXP[12] B13
PEG_RXN[12] PEG_TXN[12]
F12 C12
D11 A11
B B
F10 C10
546884 V1.0 P188
R300
24.9/F_4 PEG_RCOMP G2
+VCCIO PEG_RCOMP
Place inside CPU cavity
EMI
DMI_RXP0 D8 B8 DMI_TXP0
9 DMI_RXP0 DMI_RXP[0] DMI_TXP[0] DMI_TXP0 9
DMI_RXN0 E8 A8 DMI_TXN0 AUD_AZACPU_SCLK EC10 *10P/50V_4_NC
9 DMI_RXN0 DMI_RXN[0] DMI_TXN[0] DMI_TXN0 9
DMI_RXP1 E6 C6 DMI_TXP1
DMI_RXN1 F6 B6 DMI_TXN1
DMI_RXP2 D5 B5 DMI_TXP2
DMI_RXN2 E5 A5 DMI_TXN2
DMI_RXP3 J8 D4 DMI_TXP3
DMI_RXN3 J9 B4 DMI_TXN3
2/3 Port 方方方方 3 OF 14 2/3 Port 方方方方

A SKL_H_BGA_BGA/BGA REV = 1 A

PROJECT : AM9A
CPU A0

5 4 3 2 1
5 4 3 2 1
Skylake Processor (CLK, SVID, CFG)

SVID
04
SIVD CLK VR_SVID_CLK
VR_SVID_CLK 41
SKYLAKE_HALO CFG [0..19] Internal
U10E
PU 3K to VCCIO
CLK_CPU_BCLKP BGA1440
+VCC_1.00 2/11 change to +VCC_1.00
B31 BN25 CFG0
12 CLK_CPU_BCLKP BCLKP CFG[0] TP63
D
12 CLK_CPU_BCLKN
CLK_CPU_BCLKN A32
BCLKN
100 MHz CFG[1]
BN27 CFG1
TP5
D
CFG[2]
BN26 CFG2
TP62 Place near CPU
PCI_CLK_CPU_BCLKP D35 BN28 CFG3 SVID DATA R271
12 PCI_CLK_CPU_BCLKP PCI_CLK_CPU_BCLKN PCI_BCLKP 100 MHz for PCIe CFG[3] TP6
C36 BR20 CFG4 100_4
12 PCI_CLK_CPU_BCLKN PCI_BCLKN CFG[4] BM20 TP69
CFG5
CPU_24MHZ_CLKP CFG[5] TP76 VR_SVID_DATA
E31 BT20 CFG6 VR_SVID_DATA 41
12 CPU_24MHZ_CLKP CLK24P CFG[6] TP70
12 CPU_24MHZ_CLKN
CPU_24MHZ_CLKN D31
CLK24N
24 MHz CFG[7]
BP20 CFG7
TP74
BR23 CFG8 +VCC_1.00
CFG[8] TP64
CFG[9]
BR22 CFG9
TP68 Place near CPU
BT23 CFG10 SVID ALERT
CFG[10] TP65
BT22 CFG11
CFG[11] BM19 TP67
CFG12 R273
CFG[12] BR19 TP10
CFG13 56.2/F_4
CFG[13] TP71
BP19 CFG14
CPU_VIDALERT# BH31 CFG[14] BT19 TP73
CFG15
VR_SVID_CLK VIDALERT# CFG[15] TP72 CPU_VIDALERT# R274
BH32 220_4 VR_SVID_ALERT# 41
VR_SVID_DATA BH29 VIDSCK BN23 CFG17
H_PROCHOT#_R BR30 VIDSOUT CFG[17] BP23 TP8
CFG16
PROCHOT# CFG[16] TP7
BP22 CFG19
DDR_VTT_CTRL CFG[19] TP66 +VCC_1.00
46 DDR_VTT_CTRL
VTT EN
BT13
DDR_VTT_CNTL CFG[18]
BN22 CFG18
TP9 Procssor HOT
2/9 add net name BPM#[0]
BR27
BT27
BPM#[1]
C BPM#[2]
BM31 Place near CPU R270 C
26,33 HWPG
1 2VCCST_PWRGD R314 60.4/F_4 VCCST_PWRGD_R H13
VCCST_PWRGD
(1V) BPM#[3]
BT30 PROC_TDI & PROC_TMS & BPM[3:0] PDG V1.0 P210 1K_4
D13 SDM10K45-7-F & PREQ# & CFG[19:0] had internal PU
BT31 H_PROCHOT#_R R269 499/F_4
10 H_PWRGOOD PROCPWRGD H_PROCHOT# 26,40,41
10 CPU_PLTRST# 2/3 remove 0 ohm BP35
RESET# PROC_TDO
BT28 PROC_TDO
TP59
H_PM_SYNC BM34 BL32 PROC_TDI
10 H_PM_SYNC PM_SYNC PROC_TDI TP2
10 H_PM_DOWN R265 20_4 H_PM_DOWN_R BP31 BP28 PROC_TMS
H_PECI PM_DOWN PROC_TMS PROC_TCK TP61
10,26 H_PECI BT34 BR28
J31 PECI PROC_TCK TP60
10 PCH_THERMTRIP# THERMTRIP#
2/3 remove 0 ohm PROC_TRST#
TP55
H_SKTOCC# BR33 PROC_TRST#
BP30
BL30 PROC_PREQ# TP57
TP3
CPU PU/PD
H_PROC_SELECT# BN1 SKTOCC# PROC_PREQ# BP27 PROC_PRDY#
TP77 PROC_SELECT# PROC_PRDY# TP4 +VCC_1.00
TP58
H_CATERR# BM30
CATERR#
Place near CPU
CFG_RCOMP
BT25 CFG_RCOMP R280 49.9/F_4 Place near CPU
Connector Less Debug Hooks Routing Guidelines VCCST_PWRGD R318 1K_4
#546884 PDG (V1.0) page 505 CFG_RCOMP PD resistor refer to H_CATERR# R272 *10K_4_NC
5 OF 14 #550607 SKL-H schematic page 16
PROC_TDO
PROC_TDO 10
PROC_TDI
PROC_TMS
PROC_TDI
PROC_TMS
10
10
Thermtrip
B PROC_TCK B
PROC_TCK 10
PROC_TRST#
PROC_TRST# 14 Place near CPU
PROC_PREQ#
PROC_PREQ# 14
PROC_PRDY#
PROC_PRDY# 14
CPU STRAP PIN Thermtrip PU 1K ohms 2/3 remove R186 1K_4

PDG #546884 P213 double PU
Pin Name Usage Configuration Circuitry
CFG[0] Stall reset sequence after PCU 1 = (Default) Normal Operation; No stall. CFG0 R281 *1K_4_NC
JTAG PU/PD #546884 PDG page 616-> PD 51 ohm
PLL lock until de-asserted 0 = Stall. Placed to within 200ps(1") of CPU pin
PROC_TCK
CFG[2] PCI Express* Static x16 Lane 1 = Normal operation (Default) CFG2 R279
2/4 pop R21 Lane numbers reversed
1K_4
PROC_TRST#
R276 *51_4_NC
R268 *51_4_NC
Numbering Reversal. 0 = Lane numbers reversed.
CFG[4] eDP enable 1 = Disabled(Default) CFG4 R283 1K_4
0 = Enabled
CFG[6:5] PCI Express* Bifurcation 00 = 1 x8, 2 x4 PCI Express*
CFG5 R288 1K_4 2/4 move R841 to PCH JTAG page
01 = reserved CFG6 R285 *1K_4_NC #546884 PDG 1.0 page 504
10 = 2 x8 PCI Express*
A
11 = 1 x16 PCI Express*(default) A
CFG[7] PEG Training 1 = PEG Train immediately following

CFG7 R287 *1K_4_NC
RESET# de-assertion.(default)
0 = PEG Wait for BIOS for training.
PROJECT : AM9A
CFG[1] CFG[3] Reserved configuration lanes.
CFG[19:8] CPU A0

5 4 3 2 1
5 4 3 2 1
PDG V1.0 #546844 page 573 VCC decoupling VCC = 60A (QC:35W+GT2) VCCOPC, VCCOPC_1p8, VCCEOPIO is OPC (On Package Cache)
47uFx4, 22uFx8, 10uFx28, 1uFx63
leverage other BU to optimums capacitor design

VCC = 68A (QC:45W+GT2)
Skylake Processor (POWER)
realted
Pandora
Rail is
power rail and used for 4+4e processor
support 4+2 Processor (w/o OPC)
unconnected for those pins w/o OPC
05
U10G SKYLAKE_HALO #544924 EDS (V0.92) page129 Note3
2/11 remove 47u*4,
+VCCIN +VCCIN U10J SKYLAKE_HALO
22u*4 BGA1440
BGA1440
AA13 V32
AA31 VCC S0 VCC V33 C148 10U/6.3V/X6S_4 BJ17
D AA32 VCC VCC V34 BJ19 VCCOPC D
AA33 VCC VCC V35 C124 1U/10V/X6S_4 BJ20 VCCOPC
AA34 VCC VCC V36 C121 1U/10V/X6S_4 BK17 VCCOPC
AA35 VCC VCC V37 BK19 VCCOPC
AA36 VCC VCC V38 BK20 VCCOPC
AA37 VCC VCC W13 BL16 VCCOPC
AA38 VCC VCC W14 BL17 VCCOPC
2
22U/6.3V/X6S_6 1C172 AB29 VCC VCC W29 BL18 VCCOPC
2
22U/6.3V/X6S_6 1C195 AB30 VCC VCC W30 C126 1U/10V/X6S_4 BL19 VCCOPC
2
22U/6.3V/X6S_6 1C182 AB31 VCC VCC W31 C270 1U/10V/X6S_4 BL20 VCCOPC
2
22U/6.3V/X6S_6 1C205 AB32 VCC VCC W32 C161 10U/6.3V/X6S_4 BL21 VCCOPC
10U/6.3V/X6S_4 C141 AB35 VCC VCC W35 C158 10U/6.3V/X6S_4 BM17 VCCOPC
10U/6.3V/X6S_4 C235 AB36 VCC VCC W36 BN17 VCCOPC
10U/6.3V/X6S_4 C288 AB37 VCC VCC W37 VCCOPC
10U/6.3V/X6S_4 C92 AB38 VCC VCC W38 BJ23
10U/6.3V/X6S_4 C63 AC13 VCC VCC Y29 C246 1U/10V/X6S_4 BJ26 RSVD
10U/6.3V/X6S_4 C83 AC14 VCC VCC Y30 C84 1U/10V/X6S_4 BJ27 RSVD
10U/6.3V/X6S_4 C107 AC29 VCC VCC Y31 BK23 RSVD
10U/6.3V/X6S_4 C160 AC30 VCC VCC Y32 C266 1U/10V/X6S_4 BK26 RSVD
10U/6.3V/X6S_4 C262 AC31 VCC VCC Y33 C138 1U/10V/X6S_4 BK27 RSVD
10U/6.3V/X6S_4 C123 AC32 VCC VCC Y34 C127 1U/10V/X6S_4 BL23 RSVD
10U/6.3V/X6S_4 C120 AC33 VCC VCC Y35 BL24 RSVD
10U/6.3V/X6S_4 C155 AC34 VCC VCC Y36 C81 1U/10V/X6S_4 BL25 RSVD
10U/6.3V/X6S_4 C101 AC35 VCC VCC L14 BL26 RSVD
C
10U/6.3V/X6S_4 C264 AC36 VCC VCC P29 C251 1U/10V/X6S_4 BL27 RSVD C
10U/6.3V/X6S_4 C122 AD13 VCC VCC P30 BL28 RSVD

10U/6.3V/X6S_4 C149 AD14 VCC VCC P31 C137 1U/10V/X6S_4 BM24 RSVD
10U/6.3V/X6S_4 C64 AD31 VCC VCC P32 RSVD
10U/6.3V/X6S_4 C234 AD32 VCC VCC P33 C82 1U/10V/X6S_4
10U/6.3V/X6S_4 C220 AD33 VCC VCC P34 C45 1U/10V/X6S_4 BL15
10U/6.3V/X6S_4 C66 AD34 VCC VCC P35 BM16 VCCOPC_SENSE
10U/6.3V/X6S_4 C151 AD35 VCC VCC P36 C279 1U/10V/X6S_4 VSSOPC_SENSE
10U/6.3V/X6S_4 C65 AD36 VCC VCC R13 BL22
10U/6.3V/X6S_4 C62 AD37 VCC VCC R31 BM22 RSVD
10U/6.3V/X6S_4 C233 AD38 VCC VCC R32 C269 1U/10V/X6S_4 RSVD
10U/6.3V/X6S_4 C106 AE13 VCC VCC R33 C129 1U/10V/X6S_4
10U/6.3V/X6S_4 C232 AE14 VCC VCC R34 BP15
10U/6.3V/X6S_4 C253 AE30 VCC VCC R35 C79 1U/10V/X6S_4 BR15 VCCEOPIO
10U/6.3V/X6S_4 C252 AE31 VCC VCC R36 C80 1U/10V/X6S_4 BT15 VCCEOPIO
AE32 VCC VCC R37 VCCEOPIO
AE35 VCC VCC R38 BP16
AE36 VCC VCC T29 BR16 RSVD
AE37 VCC VCC T30 BT16 RSVD
AE38 VCC VCC T31 RSVD
AF35 VCC VCC T32
AF36 VCC VCC T35 C277 1U/10V/X6S_4 BN15
AF37 VCC VCC T36 C105 1U/10V/X6S_4 BM15 VCCEOPIO_SENSE
AF38 VCC VCC T37 C159 10U/6.3V/X6S_4 VSSEOPIO_SENSE
B B
K13 VCC VCC T38 BP17
K14 VCC VCC U29 BN16 RSVD
L13 VCC VCC U30 C157 10U/6.3V/X6S_4 RSVD
N13 VCC VCC U31 C100 1U/10V/X6S_4
N14 VCC VCC U32 BM14
N30 VCC VCC U33 BL14 VCC_OPC_1P8
N31 VCC VCC U34 C44 1U/10V/X6S_4 VCC_OPC_1P8
N32 VCC VCC U35 C114 1U/10V/X6S_4 BJ35
N35 VCC VCC U36 BJ36 RSVD
N36 VCC VCC V13 RSVD
N37 VCC VCC V14
N38 VCC VCC V31 C104 1U/10V/X6S_4 AT13
P13 VCC VCC P14 AW13 ZVM#
VCC VCC MSM#
AU13
R26 100/F_4 AY13 ZVM2#
+VCCIN MSM2#
AG37
VCC_SENSE VCCCORE_SENSE 41
AG38 VSSCORE_SENSE 41 BT29
VSS_SENSE BR25 OPC_RCOMP
R23 100/F_4 BP25 OPCE_RCOMP
OPCE_RCOMP2
7 OF 14 Please near CPU
SKL_H_BGA_BGA/BGA REV = 1 10 OF 14
A SKL_H_BGA_BGA/BGA REV = 1 A
Unconnected for Processors without OPC.

#544924 EDS (V0.91) page121 Quanta Computer Inc.
PROJECT : AM9A
CPU A0

5 4 3 2 1
5 4 3 2 1
PDG V1.0 #546844 page 573 & 574 decoupling capacitor EDS V0.92 #544924 page 135~140 power rail
VCCSA: 220uFx1, 47uFx1, 10uFx10, 1uFx3
VCCIO: 47uFx2, 10uFx3, VDDQ: 22uFx4, 10uFx10
VDDQC: 10uFx1, VCCST:1uFx1, VCCSTG: 1uFx1
VDDQ: 1.35V/2.8A (DDR3L), 1.2V/2.8A (DDR4/LPDDR3)
VCCSA: 0.55-1.15V/11.1A, VCCIO: 0.95V/5.5A
VCCST: 1.0V/120mA, VCCPLL: 1.0V/145mA
06
VCCPLL: 1uFx1, VCCPLL_OC: 1uFx2,
leverage other BU to optimums capacitor design
2/11 47u*1 change SKYLAKE_HALO
+VCCSA U10I +V_VDDQ
to 22u*2 U10K SKYLAKE_HALO
BGA1440
D 22U/6.3V/X6S_6 2 1C164 J30
VCCSA S3 VDDQ
AA6 2/11 22u*2 change to NC BGA1440
D
22U/6.3V/X6S_6 2 1C174 K29 S0 AE12
10U/6.3V/X6S_4 C130 K30 VCCSA VDDQ AF5 D1 BM33
10U/6.3V/X6S_4 C131 K31 VCCSA VDDQ AF6 C2841 2 *22U/6.3V/X6S_6_NC E1 RSVD_TP RSVD_TP BL33
VCCSA VDDQ RSVD_TP RSVD_TP
10U/6.3V/X6S_4
10U/6.3V/X6S_4
C116
C143
K32
K33 VCCSA VDDQ
AG5
AG9
C3831
C3881
2
2
*22U/6.3V/X6S_6_NC
22U/6.3V/X6S_6 Skylake Processor (POWER) E3
E2 RSVD_TP BJ14
10U/6.3V/X6S_4 C142 K34 VCCSA VDDQ AJ12 C3851 2 22U/6.3V/X6S_6 RSVD_TP RSVD_TP BJ13
10U/6.3V/X6S_4 C41 K35 VCCSA VDDQ AL11 C320 10U/6.3V/X6S_4 BR1 RSVD_TP
VCCSA VDDQ RSVD_TP
2/9 remove 3*10u L31
VCCSA VDDQ
AP6 C281 10U/6.3V/X6S_4 BT2
RSVD_TP RSVD
BK28
L32 AP7 C283 10U/6.3V/X6S_4 BJ28
L35 VCCSA VDDQ AR12 C280 10U/6.3V/X6S_4 BN35 RSVD
1U/10V/X6S_4 C37 L36 VCCSA VDDQ AR6 C328 10U/6.3V/X6S_4 RSVD BJ18
1U/10V/X6S_4 C95 L37 VCCSA VDDQ AT12 C335 10U/6.3V/X6S_4 J24 VSS
1U/10V/X6S_4 C74 L38 VCCSA VDDQ AW6 C380 10U/6.3V/X6S_4 H24 RSVD BJ16
M29 VCCSA VDDQ AY6 C282 10U/6.3V/X6S_4 BN33 RSVD RSVD_TP BK16
M30 VCCSA VDDQ J5 C292 10U/6.3V/X6S_4 BL34 RSVD RSVD_TP
M31 VCCSA VDDQ J6 C381 10U/6.3V/X6S_4 RSVD
M32 VCCSA VDDQ K12 N29 BK24
M33 VCCSA VDDQ K6 R14 RSVD RSVD_TP BJ24
M34 VCCSA VDDQ L12 AE29 RSVD RSVD_TP
VCCSA VDDQ RSVD
22uFx4 Please
M35
M36 VCCSA VDDQ
L6
R6
4/31 change to 1u AA14
RSVD RSVD
BK21
BJ21
VCCSA VDDQ RSVD
near VR +VCCIO
VDDQ
T6 VCCPLL_OC source from VDDQ A36
RSVD
W6 EDS V0.92 #544924 P129 note 4 & 5 Debug pin A37 BT17
C
22U/6.3V/X6S_6 2 1C203 AG12 VDDQ RSVD RSVD BR17
C
VCCIO +VDDQ_CPU_CLK RSVD
22U/6.3V/X6S_6 2 1C227 G15 S0 Y12 C290 1U/10V/X6S_4 14 PROC_TRIGIN
PROC_TRIGIN H23
*22U/6.3V/X6S_6_NC2 1C618 G17 VCCIO VDDQC PROC_TRIGOUT_R J23 PROC_TRIGIN BK18
VCCIO +V_VDDQ PROC_TRIGOUT VSS
*22U/6.3V/X6S_6_NC2 1C613 G19 BH13 C340 1U/10V/X6S_4
VCCIO VCCPLL_OC
10U/6.3V/X6S_4 C191 G21
VCCIO
(PLL) VCCPLL_OC
G11 C300 1U/10V/X6S_4 +VCC_1.00 F30
RSVD RSVD_TP
BJ34
10U/6.3V/X6S_4 C218 H15 E30 BJ33
VCCIO RSVD RSVD_TP
10U/6.3V/X6S_4 C217 H16
VCCIO 2/11 change to +VCC_1.00
H17 H30 C168 1U/10V/X6S_4 B30
VCCIO S3 VCCST RSVD
2/11 47u*2 change H19
VCCIO
VCCSTG source from VCCST C30
RSVD
H20 H29 VCCSTG_R R16 1 2 *0_6_NC +VCC_1.00_PP G13
to 22u*4, 2pcs NC H21 VCCIO S0 VCCSTG R15 1 2 0_6
EDS V0.92 #544924 P129 note 4 & 5
G3 RSVD AJ8
VCCIO +VCC_1.00 +VCC_1.00 RSVD RSVD
H26 G30 C111 1U/10V/X6S_4 J3 BL31
H27 VCCIO S0 VCCSTG RSVD RSVD
J15 VCCIO H28 B2
VCCIO VCCPLL NCTF
J16
VCCIO
(PLL) VCCPLL
J28 C156 1U/10V/X6S_4
NCTF
B38
J17 BP1
J19 VCCIO R22 100/F_4 BR35 NCTF BR2
VCCIO +VCCSA RSVD NCTF
J20
VCCIO VCCSA_SENSE
M38
VCCSA_SENSE 41 2/11 change to +VCC_1.00 BR31
RSVD NCTF
C1
J21 M37 BH30 C38
VCCIO VSSSA_SENSE VSSSA_SENSE 41 RSVD NCTF
J26
J27 VCCIO H14 R30 100/F_4 11 OF 14
VCCIO VCCIO_SENSE J14 SKL_H_BGA_BGA/BGA REV = 1
VSSIO_SENSE R46 100/F_4 +VCCIO
B VCCIO_SENSE 47 B
VSSIO_SENSE 47
R47 100/F_4
Place near CPU

9 OF 14
PROC_TRIGOUT_R R36 30_4 PROC_TRIGOUT PROC_TRIGOUT 14
VDDQC for SKL - U/Y series, H series left NC.

#550607 reference schematic P18
+VDDQ_CPU_CLK +V_VDDQ
R49 0_4_
0430 add bom
A A

PROJECT : AM9A
CPU A0

5 4 3 2 1
5 4 3 2 1
PDG V1.0 #546884 P573-574 decupling

47uFx6, 22uFx8, 10uFx35, 1uFx68. 07
leverage other BU to optimums capacitor design Skylake Processor (POWER)
VCCGT = 55A (QC+GT2)
+VCCGT SKYLAKE_HALO
+VCCGT
2/11 change to NC U10N U10H SKYLAKE_HALO
D
BGA1440 +VCCGT D
AJ29 S0 BG34 BGA1440 AV29
2
*22U/6.3V_6_NC 1 C242 AJ30 VCCGT BG35 VCCGT VCCGT AV30
C274 C176 C170 C162 C273 2
*22U/6.3V_6_NC 1 C238 AJ31 VCCGT S0 AF29 BG36 VCCGT S0 VCCGT AV31
2
*22U/6.3V_6_NC 1 C237 AJ32 VCCGT VCCGTX AF30 BH33 VCCGT VCCGT AV32
10U/6.3V/X6S_4 10U/6.3V/X6S_4 10U/6.3V/X6S_4 10U/6.3V/X6S_4 10U/6.3V/X6S_4 2
*22U/6.3V_6_NC 1 C239 AJ33 VCCGT VCCGTX AF31 BH34 VCCGT VCCGT AV33
22U/6.3V_6 2 1 C241 AJ34 VCCGT VCCGTX AF32 BH35 VCCGT VCCGT AV34
22U/6.3V_6 2 1 C212 AK31 VCCGT VCCGTX AG13 BH38 VCCGT VCCGT AW14
10U/10V_4 C86 AK32 VCCGT VCCGTX AG14 BJ37 VCCGT VCCGT AW31
C256 C55 C119 C255 C163 10U/10V_4 C61 AK33 VCCGT VCCGTX AG31 BJ38 VCCGT VCCGT AW32
10U/6.3V/X6S_4 10U/6.3V/X6S_4 10U/10V_4 C154 AK34 VCCGT VCCGTX AG32 BL36 VCCGT VCCGT AW33
10U/6.3V/X6S_4 10U/6.3V/X6S_4 10U/6.3V/X6S_4 10U/10V_4 C258 AK35 VCCGT VCCGTX AG33 BL37 VCCGT VCCGT AW34
10U/10V_4 C139 AK36 VCCGT VCCGTX AG34 BM36 VCCGT VCCGT AW35
10U/10V_4 C267 AK37 VCCGT VCCGTX AG35 BM37 VCCGT VCCGT AW36
10U/10V_4 C67 AK38 VCCGT VCCGTX AG36 BN36 VCCGT VCCGT AW37
10U/10V_4 C261 AL13 VCCGT VCCGTX AH13 BN37 VCCGT VCCGT AW38
10U/10V_4 C153 AL29 VCCGT VCCGTX AH14 BN38 VCCGT VCCGT AY29
C278 C71 C76 C133 C112 10U/10V_4 C58 AL30 VCCGT VCCGTX AH29 BP37 VCCGT VCCGT AY30
1U/10V/X6S_4 1U/10V/X6S_4 10U/10V_4 C260 AL31 VCCGT VCCGTX AH30 BP38 VCCGT VCCGT AY31
1U/10V/X6S_4 1U/10V/X6S_4 1U/10V/X6S_4 10U/10V_4 C113 AL32 VCCGT VCCGTX AH31 BR37 VCCGT VCCGT AY32
10U/10V_4 C97 AL35 VCCGT VCCGTX AH32 BT37 VCCGT VCCGT AY35
10U/10V_4 C117 AL36 VCCGT VCCGTX AJ13 BE38 VCCGT VCCGT AY36
10U/10V_4 C96 AL37 VCCGT VCCGTX AJ14 BF13 VCCGT VCCGT AY37
VCCGT VCCGTX VCCGT VCCGT
10U/10V_4 C91 AL38
VCCGT VCCGTX is processor w/ GT3/4 power rail. BF14
VCCGT VCCGT
AY38
10U/10V_4 C59 AM13 BF29 BA13
C
C152 C136 10U/10V_4 C99 AM14 VCCGT Pandora support 4+2 Processor. BF30 VCCGT VCCGT BA14
C
1U/10V/X6S_4 10U/10V_4 C115 AM29 VCCGT Rail is unconnected for those pins w/o OPC BF31 VCCGT VCCGT BA29
VCCGT VCCGT VCCGT
1U/10V/X6S_4 10U/10V_4 C110 AM30
VCCGT
#544924 EDS page127 Note2 BF32
VCCGT VCCGT
BA30
10U/10V_4 C268 AM31 BF35 BA31
10U/10V_4 C57 AM32 VCCGT BF36 VCCGT VCCGT BA32
10U/10V_4 C118 AM35 VCCGT BG29 VCCGT VCCGT BA35
C132 C150 1U/6.3V_4 C60 AM36 VCCGT BG30 VCCGT VCCGT BA36
1U/10V/X6S_4 1U/6.3V_4 C291 AN13 VCCGT BG31 VCCGT VCCGT BB13
1U/10V/X6S_4 1U/6.3V_4 C72 AN14 VCCGT BG32 VCCGT VCCGT BB14
1U/6.3V_4 C75 AN31 VCCGT BG33 VCCGT VCCGT BB31
1U/6.3V_4 C289 AN32 VCCGT BC36 VCCGT VCCGT BB32
1U/6.3V_4 C77 AN35 VCCGT BD13 VCCGT VCCGT BB35
C98 1U/6.3V_4 C94 AN36 VCCGT BD14 VCCGT VCCGT BB36
1U/6.3V_4 C135 AN37 VCCGT BD29 VCCGT VCCGT BB37
1U/10V/X6S_4 1U/6.3V_4 C144 AN38 VCCGT BD30 VCCGT VCCGT BB38
1U/6.3V_4 C109 AP13 VCCGT BD31 VCCGT VCCGT BC29
C134 C145 C128 1U/6.3V_4 C89 AP32 VCCGT BD36 VCCGT VCCGT BE33
1U/10V/X6S_4 AP35 VCCGT BE31 VCCGT VCCGT BE34
B
1U/10V/X6S_4 1U/10V/X6S_4 1U/6.3V_4 C147 AP36 VCCGT BE32 VCCGT VCCGT BE35
B
1U/6.3V_4 C146 AP37 VCCGT BE37 VCCGT VCCGT BE36

AP38 VCCGT VCCGT VCCGT
AR29 VCCGT
AR30 VCCGT 8 OF 14
AR31 VCCGT R21 100/F_4 SKL_H_BGA_BGA/BGA REV = 1
VCCGT +VCCGT
AR32
AR33 VCCGT AH38
VCCGT VCCGT_SENSE VCCGT_SENSE 41
AR34 AH35
1U/6.3V_4 C140 AR35 VCCGT VSSGTX_SENSE AH37
VCCGT VSSGT_SENSE VSSGT_SENSE 41
AR36 AH36
AT14 VCCGT VCCGTX_SENSE R24 100/F_4
AT31 VCCGT
AT32 VCCGT
C73 C102 C78 AT33 VCCGT
1U/10V/X6S_4 AT34 VCCGT
1U/10V/X6S_4 1U/10V/X6S_4 AT35 VCCGT
47U/4V/X6S_8 C177 AT36 VCCGT
47U/4V/X6S_8 C180 AU14 VCCGT
AU31 VCCGT
AU32 VCCGT
AU35 VCCGT
A AU36 VCCGT A
AU37 VCCGT
AU38 VCCGT
VCCGT

14 OF 14
PROJECT : AM9A
CPU A0

5 4 3 2 1
5 4 3 2 1
Skylake Processor (GROUND) 08

SKYLAKE_HALO SKYLAKE_HALO
U10F U10L U10M SKYLAKE_HALO
BGA1440 BGA1440 BGA1440

D Y38 K1 C17 C25 BB4 AK30 D
Y37 VSS VSS J36 C13 VSS VSS C23 BB3 VSS VSS AK29
Y14 VSS VSS J33 C9 VSS VSS C21 BB2 VSS VSS AK4
Y13 VSS VSS J32 BT32 VSS VSS C19 BB1 VSS VSS AJ38
Y11 VSS VSS J25 BT26 VSS VSS C15 BA38 VSS VSS AJ37
Y7 VSS VSS J7 BT14 VSS VSS BM29 BA10 VSS VSS AJ3
W34 VSS VSS J4 BT12 VSS VSS BM25 BA9 VSS VSS AJ2
W33 VSS VSS H35 BT9 VSS VSS BM18 BA8 VSS VSS AJ1
W12 VSS VSS H32 BT5 VSS VSS BM11 BA7 VSS VSS AH34
W5 VSS VSS H25 BR36 VSS VSS BM8 BA6 VSS VSS AH33
W4 VSS VSS H22 BR34 VSS VSS BM7 B9 VSS ? VSS AH12
W3 VSS VSS H18 BR29 VSS VSS BM5 AY34 VSS VSS AH6
W2 VSS VSS H12 BR26 VSS VSS BM3 AY33 VSS VSS AG30
W1 VSS VSS H11 BR24 VSS VSS BL38 AY14 VSS VSS AG29
V30 VSS VSS G28 BR21 VSS VSS BL35 AY12 VSS VSS AG11
V29 VSS VSS G26 BR18 VSS VSS BL13 AW30 VSS VSS AG10
V12 VSS VSS G24 BR14 VSS VSS BL6 AW29 VSS VSS AG8
V6 VSS VSS G23 BR12 VSS VSS BK25 AW12 VSS VSS AG7
U38 VSS VSS G22 BR7 VSS VSS BK22 AW5 VSS VSS AG6
U37 VSS VSS G20 BP34 VSS VSS BK13 AW4 VSS VSS AF14
U6 VSS VSS G18 BP33 VSS VSS BK6 AW3 VSS VSS AF13
T34 VSS VSS G16 BP29 VSS VSS BJ30 AW2 VSS VSS AF12
T33 VSS VSS G14 BP26 VSS VSS BJ29 AW1 VSS VSS AF4
T14 VSS VSS G12 BP24 VSS VSS BJ15 AV38 VSS VSS AF3
C C
T13 VSS VSS G10 BP21 VSS VSS BJ12 AV37 VSS VSS AF2
T12 VSS VSS G9 BP18 VSS VSS BH11 AU34 VSS VSS AF1
T11 VSS VSS G8 BP14 VSS VSS BH10 AU33 VSS VSS AE34
T8 VSS VSS G4 BN34 VSS VSS BH3 AU10 VSS VSS AD30
T7 VSS VSS F36 BN31 VSS VSS BH2 AU9 VSS VSS AD29
T5 VSS VSS F31 BN30 VSS VSS BG37 AU8 VSS VSS AD12
T2 VSS VSS F25 BN21 VSS VSS BF34 AT30 VSS VSS AD9
T1 VSS VSS F23 BN20 VSS VSS BF6 AT29 VSS VSS AD8
R30 VSS VSS F21 BN19 VSS VSS BE30 AT6 VSS VSS AD7
R29 VSS VSS F19 BN18 VSS VSS BE5 AR38 VSS VSS AD6
R12 VSS VSS F17 BN14 VSS VSS BE4 AR37 VSS VSS AC38
P38 VSS VSS F15 BN12 VSS VSS BE3 AR14 VSS VSS AC37
P6 VSS VSS F9 BN4 VSS VSS BD38 AR4 VSS VSS AC5
N34 VSS VSS F8 BN2 VSS VSS BD37 AR3 VSS VSS AC4
N33 VSS VSS F5 BM38 VSS VSS BD12 AR2 VSS VSS AC3
N12 VSS VSS F4 BM35 VSS VSS BD11 AR1 VSS VSS AC2
N11 VSS VSS F3 BM28 VSS VSS BD10 AP34 VSS VSS AC1
N10 VSS VSS F2 BM27 VSS VSS BD8 AP33 VSS VSS AB34
N9 VSS VSS E38 BM26 VSS VSS BD7 AP12 VSS VSS AB33
N8 VSS VSS E35 BM23 VSS VSS BD6 AP11 VSS VSS AB6
B
N7 VSS VSS E34 BM21 VSS VSS BC33 AP10 VSS VSS AA30
B
N4 VSS VSS D33 BM9 VSS VSS BC6 AN30 VSS VSS A30
N3 VSS VSS D30 BM6 VSS VSS BB30 AN29 VSS VSS A28
N2 VSS VSS D28 BM2 VSS VSS BB29 AN12 VSS VSS A26
N1 VSS VSS D26 BL29 VSS VSS BB6 AN6 VSS VSS A24
M14 VSS VSS D24 BK29 VSS VSS BB5 AN5 VSS VSS A22
M13 VSS VSS D22 BK15 VSS VSS AM38 VSS VSS A20
M12 VSS VSS D20 BK14 VSS AM37 VSS VSS A18
M6 VSS VSS D18 BJ32 VSS AM12 VSS VSS A16
L34 VSS VSS D16 BJ31 VSS AM5 VSS VSS A14
L29 VSS VSS D10 BH14 VSS AM2 VSS VSS A9
K38 VSS VSS D9 BH12 VSS C2 AM1 VSS VSS A6
K11 VSS VSS D6 BH9 VSS NCTFVSS BT36 AL34 VSS VSS
K10 VSS VSS D3 BH8 VSS NCTFVSS BT35 AL33 VSS
K9 VSS VSS C37 BH5 VSS NCTFVSS BT4 AL14 VSS B37
K8 VSS VSS C31 BH4 VSS NCTFVSS BT3 AL12 VSS NCTFVSS B3
K7 VSS VSS C29 BH1 VSS NCTFVSS BR38 AL10 VSS NCTFVSS A34
K5 VSS VSS C27 BG38 VSS NCTFVSS AL9 VSS NCTFVSS A4
K4 VSS VSS BG13 VSS AL8 VSS NCTFVSS A3
K3 VSS D38 BG12 VSS AL7 VSS NCTFVSS
K2 VSS NCTFVSS BF33 VSS AL4 VSS
VSS BF12 VSS VSS
A 6 OF 14 BE29 VSS A
SKL_H_BGA_BGA/BGA REV = 1 BE6 VSS 13 OF 14
BD9 VSS SKL_H_BGA_BGA/BGA REV = 1
BC34 VSS
VSS
BC12
BB12 VSS
VSS
12 OF 14
SKL_H_BGA_BGA/BGA REV = 1 PROJECT : AM9A
CPU A0

5 4 3 2 1
5 4 3 2 1
09
SPT-H PCH (SPI) SPT-H PCH (DMI/PCIE/USB3/USB2)
SPI_CS0# for 1st SPI device, SPI_CS1# for

D D
second SPI device, SPI_CS3# for TPM.
#546884 PDG (V1.0) page 620
SPT-H_PCH
? U14B
SPT-H_PCH DMI_TXN0 L27
U14A
3 DMI_TXN0 DMI_TXP0 DMI_RXN0 USB2_N1
N27 AF5 USB2_N1 34
3 DMI_TXP0 DMI_RXP0 USB2N_1
BD17
GPP_A11/PME# (Primary)
BB27 PCI_PLTRST#
3 DMI_RXN0
DMI_RXN0 C27 AG7 USB2_P1
USB2_P1 34 USB3.0 Conn/MB(PS)
(Primary) GPP_B13/PLTRST# DMI_RXP0 B27 DMI_TXN0 USB2P_1 AD5 USB2_N2
3 DMI_RXP0 DMI_TXP0 USB2N_2 USB2_N2 38
AG15 DMI_TXN1 E24 AD7 USB2_P2 USB3.0 Conn / DB
TP23 RSVD 3 DMI_TXN1 DMI_RXN1 USB2P_2 USB2_P2 38
AG14 P43 DMI_TXP1 G24 AG8 USB2_N3
TP19 RSVD GPP_G16/GSXCLK 3 DMI_TXP1 DMI_RXP1 USB2N_3 USB2_N3 38
AF17 R39 DMI_RXN1 B28 AG10 USB2_P3
TP28
AE17 RSVD GPP_G12/GSXDOUT R36
3 DMI_RXN1 DMI_RXP1 A28 DMI_TXN1 USB2P_3 AE1 USB2_N4
USB2_P3 38 USB3.0 Conn / DB
TP27 RSVD GPP_G13/GSXSLOAD 3 DMI_RXP1 DMI_TXP1 USB2N_4 USB2_N4 29
Connector Less Debug Hooks R42 DMI_TXN2 G27 AE2 USB2_P4
Routing Guidelines AR19 GPP_G14/GSXDIN R41
3 DMI_TXN2 DMI_TXP2 E26 DMI_RXN2
DMI
USB2P_4 AC2 USB2_N5
USB2_P4 29 Camera
TP29 TP2 GPP_G15/GSXSRESET# 3 DMI_TXP2 DMI_RXP2 USB2N_5 USB2_N5 36
AN17 DMI_RXN2 B29 AC3 USB2_P5
#546884 PDG (V1.0) page 505 TP25 TP1 3 DMI_RXN2 DMI_TXN2 USB2P_5 USB2_P5 36 BT
PCH_SPI_SI BB29 AF41
3/17 change name 3 DMI_RXP2
DMI_RXP2
DMI_TXN3
C29
L29 DMI_TXP2 USB2N_6
AF2
AF3
USB2_N6
USB2_P6
USB2_N6 29
27 PCH_SPI_SI
PCH_SPI_SO BE30 SPI0_MOSI GPP_E3/CPU_GP0 AE44 3 DMI_TXN3 DMI_TXP3 K29 DMI_RXN3 USB2P_6 AB3
USB2_P6 29 Touch Screen
27 PCH_SPI_SO SPI0_MISO GPP_E7/CPU_GP1 3 DMI_TXP3 DMI_RXP3 USB2N_7
PCH_SPI_CS0# BD31 BC23R149 0_4 DMI_RXN3 B30 USB 2.0 AB2
27 PCH_SPI_CS0# SPI0_CS0# GPP_B3/CPU_GP2 PCH_TP_INTR# 31 3 DMI_RXN3 DMI_TXN3 USB2P_7
PCH_SPI_CLK BC31 BD24 DMI_RXP3 A30 AL8
27 PCH_SPI_CLK SPI0_CLK GPP_B4/CPU_GP3 +3.3V_SUS 3 DMI_RXP3 DMI_TXP3 USB2N_8 +3.3V_SUS
PCH_SPI_CS1# AW31 AL7
26,27 PCH_SPI_CS1# SPI0_CS1# USB2P_8
BC36 SML4ALERT# R210 *10K_4_NC AA1
C GPP_H18/SML4ALERT# USB2N_9 C
PCH_SPI_IO2 BC29 BE34 SML4DATA R419 *10K_4_NC PCIERCOMP_N B18 AA2
27 PCH_SPI_IO2 SPI0_IO2 GPP_H17/SML4DATA PCIE_RCOMPN USB2P_9
PCH_SPI_IO3 BD30 BD39 SML4CLK R217 *10K_4_NC R413 100/F_4 PCIERCOMP_P C17 AJ8
27 PCH_SPI_IO3 SPI0_IO3 GPP_H16/SML4CLK PCIE_RCOMPP USB2N_10
AT31 BB36 SML3ALERT# R205 *10K_4_NC AJ7 USB_OC0# RP13 2 1 10KX2
AN36 SPI0_CS2# GPP_H15/SML3ALERT# BA35 SML3DATA R199 *10K_4_NC H15 USB2P_10 W2 USB_OC1# 4 3
TP38 GPP_D1 GPP_H14/SML3DATA SMLINK[4:2] is for Server. PCIE1_RXN/USB3_7_RXN USB2N_11
AL39 BC35 SML3CLK R196 *10K_4_NC G15
External pull-up resistor is W3
AN41 GPP_D0 GPP_H13/SML3CLK BD35 SML2ALERT# R423 *10K_4_NC A16 PCIE1_RXP/USB3_7_RXP USB2P_11 AD3 USB_OC2# RP12 2 1 10KX2
GPP_D3 GPP_H12/SML2ALERT# required??? PCIE1_TXN/USB3_7_TXN USB2N_12
AN38 AW35SML2DATA R192 *10K_4_NC PCH EDS V1.0 P247&248 B16 AD2 USB_OC3# 4 3
PCIe/USB 3
AH43 GPP_D2 GPP_H11/SML2DATA BD34 SML2CLK R188 *10K_4_NC B19 PCIE1_TXP/USB3_7_TXP USB2P_12 V2
29 THSCR_EN GPP_D22 GPP_H10/SML2CLK PCIE2_TXN/USB3_8_TXN USB2N_13
CAP_LED AG44 C19 V1 USB_OC4# RP11 2 1 10KX2
31 CAP_LED GPP_D21 PCIE2_TXP/USB3_8_TXP USB2P_13
BE11 SM_INTRUDER# +3V_RTC E17 AJ11 USB_OC5# 4 3
1 OF 12 INTRUDER# ? R406 1M_4 G17 PCIE2_RXN/USB3_8_RXN USB2N_14 AJ13
SPT_PCH_H/SKT REV = 1.3 PDG P623->PU 1M ohm L17 PCIE2_RXP/USB3_8_RXP USB2P_14 USB_OC6# RP10 2 1 10KX2
CRB P102->PU 330K ohm K17 PCIE3_RXN/USB3_9_RXN USB_OC7# 4 3
B20 PCIE3_RXP/USB3_9_RXP
C20 PCIE3_TXN/USB3_9_TXN
E20 PCIE3_TXP/USB3_9_TXP AD43 USB_OC0#
PCIE4_RXN/USB3_10_RXN GPP_E9/USB2_OC0# USB_OC0# 34
G19 AD42 USB_OC1#
+3.3V_SUS PCIE4_RXP/USB3_10_RXP GPP_E10/USB2_OC1# USB_OC1# 38
#546884 PDG (V1.2) page 224 Device Down B21 AD39 USB_OC2#
A21 PCIE4_TXN/USB3_10_TXN GPP_E11/USB2_OC2# AC44 USB_OC3#
PCIE_RXN5 K19 PCIE4_TXP/USB3_10_TXP GPP_E12/USB2_OC3# Y43 USB_OC4#
37 PCIE_RXN5 PCIE_RXP5 PCIE5_RXN GPP_F15/USB2_OC4# USB_OC5#
L19 Y41
37 PCIE_RXP5 PCIE_TXN5 PCIE5_RXP GPP_F16/USB2_OC5# USB_OC6#
LAN D22 W44
37 PCIE_TXN5 PCIE5_TXN GPP_F17/USB2_OC6#
3/11 KB_DET# move to P10
37 PCIE_TXP5 move to device page PCIE_TXP5 C22
PCIE5_TXP GPP_F18/USB2_OC7#
W43 USB_OC7#
B PCIE_RXN6 G22 B
36 PCIE_RXN6 PCIE_RXP6 PCIE6_RXN Place near Pin
E22
PCH_TP_INTR# 36 PCIE_RXP6 PCIE6_RXP
R148 10K_4 WLAN 36 PCIE_TXN6 #546884 PDG (V1.2) page 226 Mini-Card B22 AG3 USBCOMP R382 113/F_4
PCIE6_TXN USB2_COMP
3/1 add PU 10K 36 PCIE_TXP6 move to device page A23
PCIE6_TXP USB2_VBUSSENSE
AD10 R120 1K_4
35 PCIE_RXN7
PCIE_RXN7 L22
PCIE7_RXN RSVD_AB13
AB13
TP22 2/3 add R896,R897
PCIE_RXP7 K22 AG2 R361 0_4
PCH_SPI_IO3 35 PCIE_RXP7 PCIE_TXN7 PCIE7_RXP USB2_ID
R174 1 2*100_4_NC Card Reader C23
35 PCIE_TXN7 PCIE7_TXN
3/2 add PD 100 35 PCIE_TXP7 move to device page PCIE_TXP7 B23
PCIE7_TXP
K24 BD14 If this signal is not in use, then it
L24 PCIE8_RXN GPD7/RSVD
PCIE8_RXP
should have a 1k PD to ground.
C24 #546717 EDS (V1.2) page 288
PCIE8_TXN
PLTRST# Buffer B24
PCIE8_TXP
2 OF 12 ?
SPT_PCH_H/SKT REV = 1.3
PCI_PLTRST# R165 1 2 *SHORT_4_NC PLTRST# PLTRST# 17,26,28,35,36,37
A A
R166
100K_4

PROJECT : AM9A
PCH A0

5 4 3 2 1
5 4 3 2 1
10
S0 Sleep Control: When PCH is idle and processor is
in C10 state, this pin will assert to indicate VR
+3.3V_RUN
SPT-H PCH (PCIE/SATA/FAN/CLINK) SPT-H PCH (AUDIO/SMBus/JTAG) controller can go into a light load mode.
This signal can also be connected to EC for other
power management related optimizations.
DCR_EN R428 10K_4 2/10 add HDA RS
+3.3V_SUS 3/16 NC
?
?
SPT-H_PCH Mobile HDA codec didn't need
2/25 modify U14C reset signal control from host
5/21 change to 47 ohm
SPT-H_PCH
U14D
KB_DET# R429 10K_4 AV2 2/3 Remove to conn page
AV3 CL_CLK G31 PCIE_RXN9
CL_DATA CLINK PCIE9_RXN/SATA0A_RXN PCIE_RXN9 28
iAMT used. AW2 H31 PCIE_RXP9 PCIE_RXP9 28 38 HDA_BITCLK R119 47_4 HDA_BCLK_R BA9 BB17
CL_RST# (Primary) PCIE9_RXP/SATA0A_RXP HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
C31 PCIE_TXN9 28 38 HDA_RST# R126 *33_4_NC HDA_RST#_R BD8 AW22 CLKRUN# CLKRUN# 26
D PCIE9_TXN/SATA0A_TXN HDA_RST# (Primary) GPP_A8/CLKRUN# D
R44 B31 PCIE_TXP9 28 38 HDA_SDIN0
BE7
R43 GPP_G8/FAN_PWM_0 PCIE9_TXP/SATA0A_TXP BC8 HDA_SDI0 AR15
U39 GPP_G9/FAN_PWM_1 G29 PCIE_RXN10 SSD HDA_SDI1 (Primary) (DSW) GPD11/LANPHYPC
GPP_G10/FAN_PWM_2 PCIE10_RXN/SATA1A_RXN PCIE_RXN10 28
N42 E29 PCIE_RXP10 PCIE_RXP10 28 38 HDA_SDOUT R145 33_4 HDA_SDO_R BB7 AV13 SLP_WLAN#
GPP_G11/FAN_PWM_3 PCIE10_RXP/SATA1A_RXP HDA_SYNC_R BD9 HDA_SDO (DSW) GPD9/SLP_WLAN# TP20
C32 PCIE_TXN10 28 38 HDA_SYNC R124 33_4
U43 FAN PCIE10_TXN/SATA1A_TXN B32 HDA_SYNC BC14 PCH_DRAMRST#
31
KB_LED_DET KB_DET# GPP_G0/FAN_TACH_0 PCIE10_TXP/SATA1A_TXP PCIE_TXP10 28 (DSW) DRAM_RESET# GPP_B2 PCH_DRAMRST# 16
31 KB_DET# U42 BD1 BD23
DCR_EN U41 GPP_G1/FAN_TACH_1 F41 Place near PCH BE2 RSVD_BD1 GPP_B2/VRALERT# AL27
29 DCR_EN GPP_G2/FAN_TACH_2 PCIE15_RXN/SATA2_RXN RSVD_BE2 GPP_B1
36 BT_RADIO_DIS#
M44 E41 2/3 Remove to conn page PDG V1.0 P351 AR27
WLAN_ON/OFF# U36 GPP_G3/FAN_TACH_3 PCIE15_RXP/SATA2_RXP B39 R360 30_4 AUD_AZACPU_SDO_R AM1 AUDIO GPP_B0 N44
36 WLAN_ON/OFF# GPP_G4/FAN_TACH_4 PCIE15_TXN/SATA2_TXN 3 AUD_AZACPU_SDO DISPA_SDO GPP_G17/ADR_COMPLETE
P44 A39 AUD_AZACPU_SDI AN2 AN24
GPP_G5/FAN_TACH_5 PCIE15_TXP/SATA2_TXP 3 AUD_AZACPU_SDI DISPA_SDI (Primary) GPP_B11
T45 3 AUD_AZACPU_SCLK R386 30_4 AUD_AZACPU_SCLK_R AM2 AY1 SYS_PWROK R367 0_4 EC_PWROK 26,33
T44 GPP_G6/FAN_TACH_6 D43 DISPA_BCLK (Primary) SYS_PWROK
#546884 PDG (V1.2) page 396 NGFF
GPP_G7/FAN_TACH_7 PCIE16_RXN/SATA3_RXN
PCIe/SATA
2/3 Remove to conn page E42 AL42
(DSW) WAKE#
BC13 PCH_WAKE# 2/9 remove off page conn
B33 PCIE16_RXP/SATA3_RXP A41 AN42 GPP_D8/I2S0_SCLK BC15 SLP_A# SIO_SLP_S0#
28 PCIE_TXP11 PCIE11_TXP PCIE16_TXN/SATA3_TXN GPP_D7/I2S0_RXD (DSW) GPD6/SLP_A# SLP_LAN# TP92
28 PCIE_TXN11 C33 A40 AM43 (DSW) SLP_LAN#
AV15 to EC or VR?
PCIE11_TXN PCIE16_TXP/SATA3_TXP GPP_D6/I2S0_TXD TP24
SSD 28 PCIE_RXP11 K31 AJ33 BC26 SLP_S0# 47
L31 PCIE11_RXP H42 AH44 GPP_D5/I2S0_SFRM (Primary) (Primary) GPP_B12/SLP_S0# AW15
28 PCIE_RXN11 PCIE11_RXN PCIE17_RXN/SATA4_RXN GPP_D20/DMIC_DATA0 (DSW) GPD4/SLP_S3# SIO_SLP_S3# 26,46
H40 AJ35 BD15 SIO_SLP_S4# 26
PCIE17_RXP/SATA4_RXP GPP_D19/DMIC_CLK0 (DSW) GPD5/SLP_S4#
AB33 E45 20 GC6_FB_EN AJ38 (DSW) GPD10/SLP_S5#
BA13 SIO_SLP_S5# 26,46
AB35 GPP_F10/SCLOCK PCIE17_TXN/SATA4_TXN F45 D8 2 1 SDM10K45-7-F AJ42 GPP_D18/DMIC_DATA1
GPP_F11/SLOAD PCIE17_TXP/SATA4_TXP 20 GPU_EVENT# GPP_D17/DMIC_CLK1
3/10 change PCIE port AA44
GPP_F13/SDATAOUT0 (DSW) GPD8/SUSCLK
AN15 PCH_SUSCLK
TP26
AA45
GPP_F12/SDATAOUT1 PCIE18_RXN/SATA5_RXN
K37 2/25 Add schottky diode (DSW) GPD0/BATLOW#
BD13 PCH_BATLOW#
G37 DSW_PWROK tied together with RSMRST# BB19 SUSACK left NC if no support DEEP Sx PDG V1.0 #546884 P364
SATA_TXN0 PCIE18_RXP/SATA5_RXP RTC_RST# (Primary) GPP_A15/SUSACK# SUS_PWR_ACK
28 SATA_TXN0
B38 G45 for platform no support deep Sx BC10 BD19 SUS_PWR_ACK 26
SATA_TXP0 PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN SRTC_RST# RTCRST# (Primary) GPP_A13/SUSWARN#/SUSPWRDNACK
28 SATA_TXP0 C38 G44 #546717 EDS V1.0 P196 BB10
SATA_RXN0 D39 PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP SRTCRST#
HDD 28 SATA_RXN0 SATA_RXP0 E37 PCIE14_RXN/SATA1B_RXN AD44 R144 0_4 PCH_PWROK AW11 BD11 LAN_WAKE#
28 SATA_RXP0 PCIE14_RXP/SATA1B_RXP GPP_E8/SATALED# SATALED# 38 26,41 IMVP_PWRGD
R130 0_4 PCH_RSMRST# BA11 PCH_PWROK (RTC) (DSW) GPD2/LAN_WAKE#
BB15 AC_PRESENT
C36 AG36 SATAGP0
26 RSMRST# RSMRST# (RTC) (DSW) GPD1/ACPRESENT BB13
AC_PRESENT 26
SLP_SUS left NC if no support DEEP Sx PDG V1.0 #546884 P197
PCIE13_TXN/SATA0B_TXN GPP_E0/SATAXPCIE0/SATAGP0 TP21 (DSW) SLP_SUS# EC_PWRBTN#
B36 AG35 SATAGP1 AT13 EC_PWRBTN# 26
C G35 PCIE13_TXP/SATA0B_TXP GPP_E1/SATAXPCIE1/SATAGP1 AG39 PCH_SYS_RESET# PCH_DPWROK AV11 (RTC) (DSW) GPD3/PWRBTN# AW1 PCH_SYS_RESET# C
SATAGP2 R129 0_4
PCIE13_RXN/SATA0B_RXN GPP_E2/SATAXPCIE2/SATAGP2 TP83 DSW_PWROK (Primary) SYS_RESET#
E35 AD35 SATAGP3 SMBALERT# BB41 (Primary) BD26
(Primary) GPP_B14/SPKR ACZ_SPKR 38
SMBUS
PCIE13_RXP/SATA0B_RXP GPP_F0/SATAXPCIE3/SATAGP3 AD31 SMB_PCH_CLK AW44 GPP_C2/SMBALERT# AM3
GPP_F1/SATAXPCIE4/SATAGP4 M.2_DET 28 Connector Less Debug Hooks GPP_C0/SMBCLK (Primary) PROCPWRGD H_PWRGOOD 4
A35 AD38 SMB_PCH_DAT BB43
28 PCIE_TXP12 PCIE12_TXP GPP_F2/SATAXPCIE5/SATAGP5 Routing Guidelines GPP_C1/SMBDATA
B35 AC43 M.2 DET SML0ALERT# BA40 (Primary) AT2 ITP_PMODE
28 PCIE_TXN12 PCIE_RXP12 PCIE12_TXN GPP_F3/SATAXPCIE6/SATAGP6 H = PCIE #546884 PDG (V1.0) page 505 SMB_ME0_CLK AY44 GPP_C5/SML0ALERT# ITP_PMODE PROC_TCK TP89 TP56
SSD H33 AB44 AR3
28
28
PCIE_RXP12
PCIE_RXN12
PCIE_RXN12 G33 PCIE12_RXP GPP_F4/SATAXPCIE7/SATAGP7 L = SATA For PHY SMB_ME0_DAT BB39 GPP_C3/SML0CLK
JTAG
JTAGX AR2 PROC_TMS 2/11 add TP
PCIE12_RXN GPP_C4/SML0DATA JTAG_TMS PROC_TDO TP87
W36 EDP_BKLTCTL 29 SML1ALERT# AT27 AP1
GPP_F21/EDP_BKLTCTL GPP_B23/SML1ALERT#/PCHHOT# JTAG_TDO TP84
2/3 Remove to conn page J45 W35 SMB_ME1_CLK AW42 AP2 PROC_TDI
K44 PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN W42
EDP_BKLTEN
EDP_VDDEN
26,29
29
For EC SMB_ME1_DAT AW45 GPP_C6/SML1CLK JTAG_TDI AN3 PCH_JTAG_TCK TP88
PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN GPP_C7/SML1DATA JTAG_TCK TP82
N38 HOST
N39 PCIE20_RXP/SATA7_RXP AJ3 PCH_THERMTRIP#_R R383 620_4 4 OF 12 ? Connector Less Debug Hooks Routing Guidelines
PCIE20_RXN/SATA7_RXN (Primary) THERMTRIP# PCH_PECI PCH_THERMTRIP# 4
H44 (Primary) PECI AL3 R364 13/F_4 H_PECI 4,26 PCH_THERMTRIP# SPT_PCH_H/SKT REV = 1.3 #546884 PDG (V1.0) page 505
H43 PCIE19_TXP/SATA6_TXP AJ4 H_PM_SYNC_R R363 30_4
PCIE19_TXN/SATA6_TXN (Primary) PM_SYNC H_PM_SYNC 4 #546884 PDG page214
L39 AK2 CPU_PLTRST# SMBUS Alert had internal PD
PCIE19_RXP/SATA6_RXP PLTRST_PROC# CPU_PLTRST# 4 PROC_TDO
L37 AH2 Default is GPO and driven low after RSMRST# PROC_TDO 4
PCIE19_RXN/SATA6_RXN (Primary) ?PM_DOWN H_PM_DOWN TP85 PROC_TDI
3 OF 12 H_PM_DOWN 4 PROC_TDI 4
SPT_PCH_H/SKT REV = 1.3 PROC_TMS
PROC_TMS 4
PECI: RPCH=13 ohm (PDG P215)CRB 12.1 ohms (P48) PROC_TCK
PROC_TCK 4
Leakage Isolation
RTC Circuitry
EDS #546717 P220
+3.3V_RUN
+3.3V_SUS +3.3V_SUS +3.3V_SUS +3.3V_RUN +3V_RTC
Layout note: RTCRST: It is imperative that this signal not
30mils be pulled low in the S0 to S5 states.
R401 30K/F_4 RTC_RST#
Q24
4
2
For EC
4
2
For DIMMs
2
4
*2N7002W_NC
3
B RP15 RP16 RP17 C686 B
2.2KX2 Q28 2.2KX2 Q27 2.2KX2 1U/10V/X5R_4 2 EC_RTC_RST 26
2N7002KDW 2N7002KDW
5 5
1
3
1
3
1
1
3
SMB_ME1_CLK 4 3 SMBCLK1 26
SMB_PCH_CLK 3 4 SMB_RUN_CLK 15,16 3/1 change to +3.3V_RUN +3.3V_RUN
R403 30K/F_4 SRTC_RST#
EDS #546717 P220 CLKRUN# R412 8.2K_4
2 2 SRTCRST: The only time this signal gets asserted (driven low in
C687 combination with RTCRST#) should be when the coin cell battery is GPP_B2 R411 10K_4
SMB_ME1_DAT 1 6 SMBDAT1 26
SMB_PCH_DAT 6 1 SMB_RUN_DAT 15,16 1U/10V/X5R_4
removed or not installed and the platform is in the G3 state. It 3/16 add PU 10K
is imperative that this signal not be pulled low in the S0 to S5 PCH_SYS_RESET# R366
states. 8.2K_4
3/16 change to +3.3V_RUN
PDG #546884 p623 (P369) PCH PU/PD setting
The recommended values for resistor and capacitor +3.3V_SUS
are 20 K and 1.0 µF. 2/9 change to +VCC_1.00 +VCC_1.00
5/18 change to non-pop
CRB p102 PU 30.1K_1% PCH_THERMTRIP#
#546884 PDG page213 PCH_THERMTRIP# R362 1K_4 SML1ALERT# R160 *10K_4_NC
CRB PCH_PECI PD(NC)
3/1 add +3.3V_SUS #550607 CRB page48
PM_DOWN PD(NC) to GND
PCH_PECI
H_PM_DOWN
R385
R384
*10K_4_NC
*0_4_NC
2/9 Remove R189 double PU
#546884 PDG page216 (V1.0) PCH_RSMRST# R127 *10K_4_NC
LAN_WAKE# R402 10K_4 2/9 PCH_PWROK add PD PCH_PWROK
PCH_DPWROK
R137 100K_4 0430 change to 100K +VCC_1.00
R131 100K_4
#546884 PDG page216 (V1.0)
3/10 add 3/3 DSW_PWROK add PD PROC_TDO R365 *51_4_NC
SATAGP0 R212 *10K_4_NC #546884 PDG page375 (V1.0) Near the PCH JTAG_TDO pin
PCH STRAPING <546717 Rev0.91> SATAGP1
SATAGP2
R215
R213
*10K_4_NC
*10K_4_NC +3.3V_SUS 2/4 move R841 to PCH JTAG page
A SATAGP3 R216 *10K_4_NC RP9 2.2KX2 A
SMB_ME0_CLK 4 3
Pin Name Usage Sampled Configuration Circuitry SMB_ME0_DAT 2 1
0 = Disable (Default) EC_PWRBTN# internally pulled-up
SPKR / GPP_B14 Top Swap Override PCH_PWROK 1 = Enable ACZ_SPKR R175 *1K_4_NC +3.3V_RUN
in PCH to VCCDSW_3p3 through a
weak pull-up resistor (15 kΩ to 40 kΩ). 2/9 change to NC
0 = Disable(Default)
EMI EC_PWRBTN#
PCH_WAKE#
R134 *10K_4_NC

SMBALERT# / GPP_C2 TLS Confidentiality RSMRST# 1 = Enable (support IAMT and iSBA with iTLS) SMBALERT# R219 *1K_4_NC +3.3V_SUS
WAKE# PU 10K to VCCDSW3.3 R405 10K_4
#546884 PDG P.627 (V1.0) PCH_BATLOW# R407 10K_4
0 = LPC Is selected for EC(Default) AUD_AZACPU_SCLK EC21 *10P/50V_4_NC BATLOW 8.2K-10K# PU to DSW well R408 10K_4
SML0ALERT# / GPP_C5 eSPI or LPC RSMRST# 1 = eSPI Is selected for EC. SML0ALERT# R218 *1K_4_NC +3.3V_SUS
HDA_BITCLK EC22 47P/50V_4 #546884 PDG P.627 (V1.0) AC_PRESENT R409 *100K_4_NC
PROJECT : AM9A
Flash Descriptor 0 = Enable(Default)
3/5 change net name Size Document Number Rev
HDA_SDO Security Override PCH_PWROK 1 = Disable (override) 26 PCH_MELOCK R140 1K_4 HDA_SDO_R
5/21 change to 47P PCH A0

5 4 3 2 1
5 4 3 2 1
U14E
? 11
HPD: 3.3V Tolerant SPT-H_PCH
INT_HDMI_HPD AW4
2/9 change net
BB3
30 INT_HDMI_HPD GPP_I0/DDPB_HPD0 GPP_I7/DDPC_CTRLCLK
AY2 BD6 DDPC_CTRL_DATA
AV4 GPP_I1/DDPC_HPD1 (Primary) GPP_I8/DDPC_CTRLDATA BA5 HDMI_SCL
GPP_I2/DDPD_HPD2 GPP_I5/DDPB_CTRLCLK HDMI_SCL 30
D BA4
GPP_I3/DDPE_HPD3 GPP_I6/DDPB_CTRLDATA
BC4 HDMI_SDA
HDMI_SDA 30 For HDMI D
BE5
GPP_I9/DDPD_CTRLCLK BE6 DDPD_CTRL_DATA
GPP_I10/DDPD_CTRLDATA
Y44
EDP_HPD BD7 GPP_F14 V44
29 EDP_HPD GPP_I4/EDP_HPD (Primary) GPP_F23 W39
GPP_F22 L43
GPP_G23 L44
GPP_G22 U35
GPP_G21 R35
GPP_G20 BD36
GPP_H23
5 OF 12 ?
PCH STRAPING <546717 Rev0.91>
Pin Name Usage Sampled Configuration Circuitry

#546884 PDG page170 (V1.0)
C C
0 = Port B is not detected. (Default) HDMI_SCL 4 3
+3.3V_RUN
DDPB_CTRLDATA/GPP_I6 Display Port B Detected PCH_PWROK HDMI_SDA 2 1
1 = Port B is detected.
RP8 2.2KX2
0 = Port C is not detected. (Default)
DDPC_CTRLDATA/GPP_I8 Display Port C Detected PCH_PWROK 1 = Port C is detected. DDPC_CTRL_DATA R387 *1K_4_NC +3.3V_RUN
0 = Port D is not detected. (Default)
DDPD_CTRLDATA/GPP_I10 Display Port D Detected PCH_PWROK DDPD_CTRL_DATA R395 *1K_4_NC
1 = Port D is detected. +3.3V_RUN +3.3V_RUN
#546884 PDG page629 (V1.0)
IRQ_SERIRQ R156 10K_4
SPT-H PCH (USB3/LPC/eSPI) PCI_PIRQA# R152 10K_4

EC_RCIN# R147 10K_4
?
SPT-H_PCH
U14F
USB3_TXN1 C11
34 USB3_TXN1 USB3_1_TXN
USB3_TXP1 B11 AT22
34 USB3_TXP1 LPC_LAD0 26,36
LPC/eSPI
USB3_RXN1 B7 USB3_1_TXP GPP_A1/LAD0/ESPI_IO0 AV22
USB3.0 CONN/MB(PS) 34 USB3_RXN1
USB3_RXP1 A7 USB3_1_RXN GPP_A2/LAD1/ESPI_IO1 AT19
LPC_LAD1 26,36
34 USB3_RXP1 USB3_1_RXP GPP_A3/LAD2/ESPI_IO2 LPC_LAD2 26,36
USB3_TXN2 B12 GPP_A4/LAD3/ESPI_IO3
BD16
LPC_LAD3 26,36 2/9 add PU 10K +3.3V_RUN
B 38 USB3_TXN2 B
USB3_TXP2 A12 USB3_2_TXN BE16 RP14
38 USB3_TXP2 LPC_LFRAME# 26,36
USB3.0 CONN / DB 38 USB3_RXN2
USB3_RXN2 C8 USB3_2_TXP GPP_A5/LFRAME#/ESPI_CS0# BA17 IRQ_SERIRQ
IRQ_SERIRQ 26
SMC_EXTSMI# 2 1
USB3_RXP2 B8 USB3_2_RXN (Primary) GPP_A6/SERIRQ/ESPI_CS1# AW17 PCI_PIRQA# SIO_EXT_SCI# 4 3
38 USB3_RXP2 USB3_2_RXP GPP_A7/PIRQA#/ESPI_ALERT0# AT17 EC_RCIN#
GPP_A0/RCIN#/ESPI_ALERT1# EC_RCIN# 26
B15 BC18 SUS_STAT# 10KX2
USB3_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET# TP30
C15
K15 USB3_6_TXP
USB3_6_RXN CLKOUT_LPC0 R410
USB
K13 BC17 22_4 CLK_24M_EC 26

USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK AV19 CLKOUT_LPC1 F1 22_4
GPP_A10/CLKOUT_LPC1 CLK_24M_DEBUG 36
B14
USB3_5_TXN
C14
USB3_5_TXP GPP_G19/SMI#
M45 2/3 MP Remove
G13 N43
USB3_5_RXN GPP_G18/NMI#
3/16 net name exchange H13
USB3_5_RXP
3/10 change for BIOS
USB3.0 CONN / DB
38
38
USB3_TXP3
USB3_TXN3
USB3_TXP3 D13
USB3_TXN3 C13 USB3_3_TXP
USB3_3_TXN
GPP_E6/DEVSLP2
GPP_E5/DEVSLP1
AE45
AG43
SIO_EXT_SCI#
SMC_EXTSMI#
26
26
EMI
USB3_RXP3 A9 AG42 R229 *0_4_NC
38 USB3_RXP3 USB3_3_RXP GPP_E4/DEVSLP0 DEVSLP0 28
USB3_RXN3 B10 AB39 CLK_24M_EC EC83 *10P/50V_4_NC
38 USB3_RXN3 USB3_3_RXN GPP_F9/DEVSLP7
GPP_F8/DEVSLP6
AB36
3/3 NC CLK_24M_DEBUG EC23 *10P/50V_4_NC
SATA
B13 AB43
A14 USB3_4_TXP GPP_F7/DEVSLP5 AB42
G11 USB3_4_TXN GPP_F6/DEVSLP4 AB41
E11 USB3_4_RXP GPP_F5/DEVSLP3
A USB3_4_RXN 6 OF 12 ? A

PROJECT : AM9A
PCH A0

5 4 3 2 1
5 4 3 2 1
Skylake PCH (CLOCK)

LPSS_GSPI1_MOSI AT29
AR29
U14K
GPP_B22/GSPI1_MOSI
SPT-H_PCH
?
AL44
12
GPP_B21/GSPI1_MISO GPP_D9 DGPU_PWR_EN 50
AV29 AL36
GPP_B20/GSPI1_CLK GPP_D10 DGPU_PWROK 17,51
? BC27 AL35
GPP_B19/GSPI1_CS# GPP_D11 DGPU_HOLD_RST# 17
5/18 change to short pad
SPT-H_PCH (Primary)
U14G AJ39
LPSS_GSPI0_MOSI BD28 GPP_D12
AR17 BD27 GPP_B18/GSPI0_MOSI AJ43
D GPP_A16/CLKOUT_48 L1 AW 27 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS# AL43 D
R390 *SHORT_4_NC CPU_24MHZ_CLKP_R G1 CLKOUT_ITPXDP L2 AR24 GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS# AK44
4 CPU_24MHZ_CLKP CPU_24MHZ_CLKN_R F1 CLKOUT_CPUNSSC_P CLKOUT_ITPXDP_P GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL
4 CPU_24MHZ_CLKN R389 *SHORT_4_NC
CLKOUT_CPUNSSC
24 MHz crystal GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA
AK45
J1 PCI_CLK_CPU_BCLKN_R R391 *SHORT_4_NC AV44
CLK_CPU_BCLKP_R CLKOUT_CPUPCIBCLK PCI_CLK_CPU_BCLKP_R PCI_CLK_CPU_BCLKN 4 GPP_C9/UART0_TXD
R375 *SHORT_4_NC G2 J2 R388 *SHORT_4_NC BA41
4 CLK_CPU_BCLKP CLK_CPU_BCLKN_R CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK_P PCI_CLK_CPU_BCLKP 4 GPP_C8/UART0_RXD (Primary)
4 CLK_CPU_BCLKN R370 *SHORT_4_NC H2
CLKOUT_CPUBCLK
100 MHz PCIe AU44
GPP_C11/UART0_CTS#
100 MHz CPU N7
CLK_PCIE_VGAN 17
AV43
XTAL24_OUT A5 CLKOUT_PCIE_N0 N8
CLK_PCIE_VGAP 17
DGPU GPP_C10/UART0_RTS#
+VCCPRIM_1P0 XTAL24_IN A6 XTAL24_OUT CLKOUT_PCIE_P0 AU41 BC38
XTAL24_IN GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL
R380 2.71K/F_4 XCLK_BIASREF E1 CLKOUT_PCIE_N1
L7
L5
3/4 del TP AT44
AT43 GPP_C14/UART1_RTS#/ISH_UART1_RTS# (Primary) GPP_H19/ISH_I2C0_SDA
BB38
XCLK_BIASREF CLKOUT_PCIE_P1 AU43 GPP_C13/UART1_TXD/ISH_UART1_TXD BD38
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL
RTC_X1
RTC_X2
BC9
BD10 RTCX1
32.768MHz CLKOUT_PCIE_N2
D3
F2 3/4 addUART2_CTS#
TP AN43 GPP_H21/ISH_I2C1_SDA
BE39
RTCX2 CLKOUT_PCIE_P2 TP96 UART2_RTS# AN44 GPP_C23/UART2_CTS#
CLK_PEGA_REQ# BC24 E5 TP97 UART2_TX AR39 GPP_C22/UART2_RTS#
17 CLK_PEGA_REQ# GPP_B5/SRCCLKREQ0# CLKOUT_PCIE_N3 TP41 GPP_C21/UART2_TXD
AW 24 G4 UART2_RX AR45 BC22
GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_P3 TP95 GPP_C20/UART2_RXD GPP_A23/ISH_GP5
AT24 BD18
BD25 GPP_B7/SRCCLKREQ2# D5 AR41 GPP_A22/ISH_GP4 BE21
BB24 GPP_B8/SRCCLKREQ3# (Primary) CLKOUT_PCIE_N4 E6
CLK_PCIE_LANN 37 LAN AR44 GPP_C19/I2C1_SCL (Primary) GPP_A21/ISH_GP3 BD22
37 PCIE_CLKREQ_LAN# GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_P4 CLK_PCIE_LANP 37 GPP_C18/I2C1_SDA GPP_A20/ISH_GP2
BE25 AR38 BD21
36 PCIE_CLKREQ_WLAN# GPP_B10/SRCCLKREQ5# 31 PCH_I2C_CLK_TP GPP_C17/I2C0_SCL GPP_A19/ISH_GP1
AT33 D8 AT42 BB22
35 PCIE_CLKREQ_CR#
AR31 GPP_H0/SRCCLKREQ6# CLKOUT_PCIE_N5 D7
CLK_PCIE_WLANN 36 WLAN 31 PCH_I2C_DAT_TP GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 BC19
GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_P5 CLK_PCIE_WLANP 36 GPP_A17/ISH_GP7
BD32 AM44
C
BC32 GPP_H2/SRCCLKREQ8# R8 AJ44 GPP_D4/ISH_I2C2_SDA/I2C3_SDA C
28 PCIE_CLKREQ_SSD#
BB31 GPP_H3/SRCCLKREQ9# CLKOUT_PCIE_N6 R7
CLK_PCIE_CRN 35 Card Reader 3/11 move to GPP_G2
GPP_D23/ISH_I2C2_SCL/I2C3_SCL
GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_P6 CLK_PCIE_CRP 35
BC33 11 OF 12 ?
SLKREQ# can floating if no used BA33 GPP_H5/SRCCLKREQ11# U5 SPT_PCH_H/SKT REV = 1.3
AW 33 GPP_H6/SRCCLKREQ12# CLKOUT_PCIE_N7 U7
PDG(#546884) V1.0 p619 GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_P7
BB33
BD33 GPP_H8/SRCCLKREQ14# W 10
GPP_H9/SRCCLKREQ15# CLKOUT_PCIE_N8 W 11
R13 CLKOUT_PCIE_P8 +3.3V_RUN
R11 CLKOUT_PCIE_N15 N3
CLKOUT_PCIE_P15 CLKOUT_PCIE_N9 N2
CLK_PCIE_SSD0N 28 M.2 SSD
CLKOUT_PCIE_P9 CLK_PCIE_SSD0P 28
P1
CLKOUT_PCIE_N14 2/25 reference AM9 +3.3V_RUN
R2 P3
CLKOUT_PCIE_P14 CLKOUT_PCIE_N10 P2 CLK_PEGA_REQ# R115 10K_4
CLKOUT_PCIE_P10
W7
CLKOUT_PCIE_N13 2/25 modify, 3/2 change to +3.3V_RUN R167 *10K_4_NC
Y5 R3
CLKOUT_PCIE_P13 CLKOUT_PCIE_N11 R4 DGPU_HOLD_RST# R169 10K_4
U2 CLKOUT_PCIE_P11 +3.3V_SUS
U3 CLKOUT_PCIE_N12
CLKOUT_PCIE_P12 7 OF 12 ?
SPT_PCH_H/SKT REV = 1.3 DGPU_PWR_EN R427 10K_4
PCH_I2C_CLK_TP R220 1K_4 R197 *10K_4_NC
PCH_I2C_DAT_TP R221 1K_4
B B
2/9 add PU, 2/11 change to 1K DGPU_PWROK R164 10K_4
UART2_CTS# R431 49.9K/F

3/16 add PU 10K
UART2_RTS# R430 49.9K/F
UART2_TX R222 49.9K/F
UART2_RX R432 49.9K/F
3/10 reserve for UART2

PCH STRAPING <546717 Rev0.91>
Pin Name Usage Sampled Configuration Circuitry

24MHz RTC Clock 32.768KHz GSPI0_MOSI/GPP_B18 No Reboot PCH_PWROK
0 = Disable(Default)
1 = Enable LPSS_GSPI0_MOSI R414 *1K_4_NC +3.3V_SUS
C679 12P/50V/_4 Bit6 Boot BIOS Destination
C683 15P/50V/_4 RTC_X1 GSPI1_MOSI/GPP_B22 Boot BIOS Strap Bit BBS PCH_PWROK LPSS_GSPI1_MOSI R168 *1K_4_NC
0 SPI(Default) +3.3V_SUS
1 LPC
3
4
A A
Y3 Y4 R400
R392 24MHz 32.768KHZ 10M_4
1M_4
1
2
XTAL24_IN C685 15P/50V/_4 RTC_X2

XTAL24_OUT C680 12P/50V/_4
PROJECT : AM9A
PCH A0

5 4 3 2 1
5 4 3 2 1
+VCCPRIM_1P0 VCCPRIM_1P0 = 2.899A

Skylake PCH (POWER)
?
Power Rating refernce EDS V1.0 #546717 P59-60
Power decoupling capacitor reference PDG V1.0 #546884 P578-579 13
+VCC_1.00 +VCCPRIM_1P0 SPT-H_PCH
U14H
2
R184 0_1206 AA23
C510 C500 R185 0_1206 AA26 VCCPRIM_1P0 AL22 +VCCFHV_2P8 R157 0_6
VCCPRIM_1P0 1.0V VCCPRIM_1P0 +VCCPRIM_1P0
1U/6.3V_4 22U/6.3V_6 AA28 Fuse
VCCPRIM_1P0 S3
1
D AC23 BA24 D
CORE
VCCPRIM_1P0 VCCDSW_3P3 +3.3V_SUS
AC26
VCCPRIM_1P0 2.899A (DSW) VCCDSW_3p3 = 204mA
AC28
VCCPRIM_1P0 VCCPGPPA
BA31 +VCCPGPPA +VCCPGPPA VCCPGPPA(3.3V) = 82mA
VCCGPIO
DCPDSW_1P0l is generated by on die DSW AE23
VCCPRIM_1P0
voltage regulator to supply DSW GPIOs, AE26
VCCPRIM_1P0 GPIO VCCPGPPBCH
BC42 +VCCPGPPBCH +VCCPGPPBCH VCCPGPPBCH(3.3V) = 229mA
DSW core logic and DSW USB 2.0 logic. Y23 BD40
PCH EDS V1.0(#546717) P51 VCCPRIM_1P0 VCCPGPPBCH
Y25
VCCPRIM_1P0 VCCPGPPEF
AJ41 +VCCPGPPEF +VCCPGPPEF VCCPGPPEF(3.3V) = 114mA
C511 1U/6.3V_4 DCPDSW_1P0 BA29
DCPDSW_1P0 (DSW)
3.3V/1.8V
VCCPGPPEF
AL41 +VCCPRTC_3P3
VCCPGPPG
AD41 +VCCPGPPG +VCCPGPPG VCCPGPPG(3.3V) = 65mA
VCCCLK1 = 21mA R143 0_4 VCCCLK1 N17 AN5 +VCCPHVC_3P3 VCCPRIM_3p3 = 117mA +3V_RTC
+VCCPRIM_1P0 VCCCLK1 VCCPRIM_3P3 +VCCPHVC_3P3
VCCCLK2 = 137mA R153 0_4 VCCCLK3 R19
VCCCLK3
VCCCLK3 = 50mA R154 0_4 VCCCLK4 U20
R142 0_4 VCCCLK2 V17 VCCCLK4 1.0V CLK AD15 +VCCDTS_1P0 R146 0_4
VCCCLK4 = 20mA VCCCLK2 VCCPRIM_1P0 +VCC_1.00
VCCCLK5 = 6mA R17
VCCCLK2
238mA
Thermal Sensor 3.3V VCCATS AD13 +V3.3S_VCCATS
+V3.3S_VCCATS VCCATS = 7mA C499 C498
3.3V VCCRTCPRIM_3P3
BA20 +VCCPRTCPRIM_3P3
+VCCPRTCPRIM_3P3 VCCRTCPRIM_3p3 = 1mA 1U/6.3V_4 0.1U/10V_4
R381 0_6 VCCCLK5 K2
VCCCLK5 VCCRTC
BA22 +3V_RTC VCCRTC = 117mA
Place close C678 1U/6.3V_4 K3 RTC BA26 VCC_RTCEXT_CAP Place close pin BA26 Place close pin BA22
VCCCLK5 DCPRTC
VCCMPHY_1p0 = 2.072A pin K2, K3 2 1 C506 0.1U/10V_4
DMI = 700mA +VCCMPHY_1P0 C677 U21
*22U/6.3V_6_NC
VCCMPHY_1P0 1.0V VCCPRIM_1P0
AJ20 +VCCPRIM_1P0
+VCCPRIM_1P0
USB3x3 = 396mA U23 AJ21
MPHY
VCCMPHY_1P0 1.0V VCCPRIM_1P0
PCIE3 x 4(SSD) = 616mA C501 1U/6.3V_4 U25
VCCMPHY_1P0
Core
VCCPRIM_1P0
AJ23 +VCCPRTCPRIM_3P3
SATA = 54mA Place close pin C5052 122U/6.3V_6 U26 AJ25
U21,U23,U25,U26,V26 V26 VCCMPHY_1P0 VCCPRIM_1P0
PCIE2 x 3 (WiFi/LAN/CR) = 306mA VCCMPHY_1P0 +3.3V_SUS +VCCPRTCPRIM_3P3
R208 0_6 +VCCAMPHYPLL_1P0 A43
C +VCCMPHY_1P0
VCCAMPHYPLL_1p0 = 80mA Place close pin A43,B43 B43 VCCAMPHYPLL_1P0_A43
(PLL) BE41 +VCCPSPI R425 0_4 VCCSPI = 29mA C
VCCAMPHYPLL_1P0_B43 SPI 3.3V
VCCSPI +3.3V_SUS
VCCMIPIPLL_1p0 = 30mA C519 1U/6.3V_4 C44
VCCMIPIPLL_1P0_C44 VCCSPI
BE43 R141 0_4
C516
*47U/6.3V_8_NC C45
VCCMIPIPLL_1P0_C45
(PLL) VCCSPI
BE42
VCCAPLLEBB_1p0 = 30mA +VCCPRIM_1P0 0_6 +VCCAPLLEBB_1P0V28
R187
VCCAPLLEBB_1P0 VCCPGPPD
BC44 +VCCPGPPD +VCCPGPPD VCCPGPPD = 78mA
C494 C495
0_6 +VCCDUSB_1P0 AC17
R155 BA45 1U/6.3V_4 0.1U/10V_4
+VCCPRIM_1P0 VCCPRIM_1P0 (PLL) GPIO 3.3V/1.8V VCCPGPPD
0_6 +VCCAUSB_1P0_L AJ5
R121 BC45
USB
+VCCPRIM_1P0 VCCUSB2PLL_1P0 VCCPGPPD
VCCUSB2PLL_1p0 = 12mA AL5
VCCUSB2PLL_1P0 VCCPGPPD
BB45 Place close pin AD41
+VCCPRIM_1P0 R158 0_6 +VCCAAZPLL_1P0_L AN19 (PLL)
VCCHDAPLL_1P0(HDA)
VCCHDAPLL_1p0 = 33mA C493 2 1 *22U/6.3V_6_NC (PLL) VCCPRIM_3P3
BD3 +VCCPFUSE_3P3 R396 0_4 +3.3V_SUS VCCSPI = 29mA
+VCCHDA R455 0_6 BA15 Fuse BE3
W15 VCCHDA (HDA) 3.3V VCCPRIM_3P3 BE4
VCCDSW_3p3 = 204mA +3.3V_SUS
DSW 3.3V VCCDSW_3P3 (DSW) VCCPRIM_3P3
1
VCCDSW_3P3 tie to VCCPRIM_3p3 if 8 OF 12 ?

Deep Sx is not supported on the C491 C749 C492 SPT_PCH_H/SKT REV = 1.3
platform, PDG V1.0(#546884) P448 1U/6.3V_4 0.1U/25V_4 0.1U/25V_4
3/10 add o.1u close BA15
2
Place close pin W15 +V3.3S_VCCATS

+VCCPHVC_3P3
5/14 add C749(0.1u) and (R455)0 ohm for EMI +3.3V_RUN +V3.3S_VCCATS +3.3V_SUS +VCCPHVC_3P3
5/18 R158 and R455 to 0402 size R136 0_4 R123 0_4
B
5/25 R158 and R455 to 0603 size, footprint is 0603 C488 C480 B
3/16 change to 3.3V_RUN 1U/6.3V_4 0.1U/10V_4
Place close pin AD13 Place close pin AN5
+VCCPGPPD +VCCPGPPA +VCCPGPPEF +VCCPGPPG

+3.3V_SUS +VCCPGPPD +3.3V_SUS +VCCPGPPA +3.3V_SUS +VCCPGPPEF +3.3V_SUS +VCCPGPPG
+VCCMPHY_1P0
R426 0_4 R182 0_4 R214 0_4 R211 0_4
+VCCMPHY_1P0 +VCC_1.00
R207 0_8
R198 0_8
+VCCPGPPBCH C515 C514
+VCCHDA 0.1U/10V_4 0.1U/10V_4
+3.3V_SUS +VCCPGPPBCH
1
C508 Place close pin AJ41, AL41 Place close pin AD41
A 0.1U/25V_4 R424 0_4 A
2
+VCCHDA +3.3V_SUS Quanta Computer Inc.

R139 0_4 C695
0.1U/10V_4 PROJECT : AM9A
Place close pin BC42,BD40 PCH A0

5 4 3 2 1
5 4 3 2 1
? ?
14
SPT-H_PCH
U14L U14I
SPT-H_PCH
AC18 AR5
C42 AB11 AN4 VSS VSS AR7
D D10 VSS VSS AB7 AN10 VSS VSS U15 D
D12 VSS VSS AB14 BE14 VSS VSS AL4
D15 VSS VSS AB31 BE18 VSS VSS AE29
D16 VSS VSS AB32 BE23 VSS VSS AE4
D17 VSS VSS AB38 BE28 VSS VSS AE42 ?
D19 VSS VSS AB4 BE32 VSS VSS AF18 U14J SPT-H_PCH
D21 VSS VSS AB5 BE37 VSS VSS AF20
D24 VSS VSS AC1 BE40 VSS VSS AF21
D25 VSS VSS AC20 BE9 VSS VSS AF23
D27 VSS VSS AC21 C10 VSS VSS AF25 BD2 AR22
D29 VSS VSS AC25 C2 VSS VSS AF26 BD45 VSS RSVD W13
D30 VSS VSS AC29 C28 VSS VSS AF28 BD44 VSS RSVD U13
D31 VSS VSS AC45 C37 VSS VSS AF29 BE44 VSS RSVD
VSS VSS VSS VSS VSS P31
D33 AB8 J7 AG11 D45 RSVD
VSS VSS VSS VSS VSS N31
D35 AD11 K10 AG13 A42 RSVD
D36 VSS VSS AD14 K27 VSS VSS AG31 B45 VSS P27
E13 VSS VSS AB15 K33 VSS VSS AG32 B44 VSS RSVD R27
E15 VSS VSS AD32 K36 VSS VSS AG33 A4 VSS RSVD N29
E31 VSS VSS AD33 K4 VSS VSS AG38 A3 VSS RSVD P29
E33 VSS VSS AD36 K42 VSS VSS AG4 B2 VSS RSVD AN29
F44 VSS VSS AD4 K43 VSS VSS AH1 A2 VSS RSVD R24
VSS VSS VSS VSS VSS RSVD
F8
VSS VSS
AD8 L12
VSS VSS
AH17 B1
VSS RSVD
P24 2/4 Remove TP,
G42
VSS VSS
AE18 L13
VSS VSS
AH18 BB1
VSS double TP
G9 AE20 L15 AH20 BC1 AT3 PROC_PREQ#
C
H17 VSS VSS AE21 L4 VSS VSS AH21 A44 VSS PREQ# AT4 PROC_PRDY# C
VSS VSS VSS VSS VSS PRDY#
H19
VSS VSS
AE25 L41
VSS VSS
AH23
CPU_TRST#
AY5 PROC_TRST#
TP86 2/4 add TP
H22 AE28 L8 AH25 C1 AL2 PROC_TRIGIN_R
H24 VSS VSS AL10 M35 VSS VSS AH26 D1 RSVD PCH_TRIGOUT AK1 PROC_TRIGOUT
VSS VSS VSS VSS RSVD PCH_TRIGIN PROC_TRIGOUT 6
H27 AL11 M42 AH28
H29 VSS VSS AL13 N10 VSS VSS AH29 ? Connector Less Debug Hooks Routing Guidelines
H3 VSS VSS AL17 N15 VSS VSS AH45 10 OF 12
VSS VSS VSS VSS
#546884 PDG (V1.0) page 505
H35 AL19 N19 AJ10 SPT_PCH_H/SKT REV = 1.3
J10 VSS VSS AL24 N22 VSS VSS AJ14
J11 VSS VSS AL29 N24 VSS VSS AJ15 PROC_PREQ#
VSS VSS VSS VSS PROC_PREQ# 4
J3 AL32 N35 AJ17 PROC_PRDY#
VSS VSS VSS VSS PROC_PRDY# 4
J39 AL33 N36 AJ18 PROC_TRST#
VSS VSS VSS VSS PROC_TRST# 4
J5 AL38 N4 AJ26
T42 VSS VSS AM15 N41 VSS VSS AJ28
U10 VSS VSS AM17 N5 VSS VSS AJ29
U11 VSS VSS AM19 P17 VSS VSS AJ31
U18 VSS VSS AM27 P45 VSS VSS AK4 PROC_TRIGIN_R R354 30_4
VSS VSS VSS VSS PROC_TRIGIN 6
U28 AM29 R10 AK42
U29 VSS VSS AM45 R14 VSS VSS AU7
VSS VSS VSS VSS
U31
U32 VSS VSS
AN11
AN22
R22
R29 VSS VSS
AV17
AV24
3/17 add 30 ohm
U33 VSS VSS AN27 R33 VSS VSS AV27
B B
U8 VSS VSS AN7 T1 VSS VSS AV6
V18 VSS VSS AN8 T2 VSS VSS AW13
V20 VSS VSS AP11 T4 VSS VSS AW19
V21 VSS VSS AP4 Y18 VSS VSS AW29
V23 VSS VSS AR33 Y20 VSS VSS AW37
V25 VSS VSS AR34 Y21 VSS VSS AW9
V29 VSS VSS AR42 Y26 VSS VSS AY38
V3 VSS VSS AR9 Y28 VSS VSS AY45
V45 VSS VSS AT10 Y29 VSS VSS B25
W14 VSS VSS AT15 A18 VSS VSS B3
W33 VSS VSS AU1 A37 VSS VSS B6
W38 VSS VSS AU35 AA17 VSS VSS BA1
W4 VSS VSS AU36 AA18 VSS VSS BB11
W8 VSS VSS AU39 AA20 VSS VSS BB16
Y17 VSS VSS AU45 AA21 VSS VSS BB21
VSS VSS C4 AA25 VSS VSS BB25
VSS AA29 VSS VSS BB30
AA4 VSS VSS BB34
AA42 VSS VSS BC2
A 12 OF 12 ? AB10 VSS VSS BD43 A
SPT_PCH_H/SKT REV = 1.3 VSS VSS
9 OF 12 ?

PROJECT : AM9A
PCH A0

5 4 3 2 1
5 4 3 2 1
2 M_A_A[15:0]
M_A_A0 98
JDIM2A
5 M_A_DQ4
Place these Caps near So-Dimm2.
M_A_DQ[63:0] 2
15
M_A_A1 97 A0 DQ0 7 M_A_DQ5
M_A_A2 96 A1 DQ1 15 M_A_DQ7 +V_VDDQ
M_A_A3 95 A2 DQ2 17 M_A_DQ3 JDIM2B
M_A_A4 92 A3 DQ3 4 M_A_DQ1 75 44
M_A_A5 91 A4 DQ4 6 M_A_DQ0 76 VDD1 VSS16 48
M_A_A7 86 A6 DQ6 18 M_A_DQ6 +SMDDR_VREF_CA 82 VDD3 VSS18 54
D D
M_A_A9 85 A8 DQ8 23 M_A_DQ12 C476 0.1U/16V/X7R_4 88 VDD5 VSS20 60
M_A_A11 84 A10/AP DQ10 35 M_A_DQ11 C475 *0.1U/16V/X7R_4_NC 94 VDD7 VSS22 65
A11 DQ11 VDD8 VSS23
M_A_A12
M_A_A13
83
119 A12/BC# DQ12
22
24
M_A_DQ13
M_A_DQ8 C477 *2.2U/6.3V_6_NC
2.48A 99
100 VDD9 VSS24
66
71
A15 DQ15 39 M_A_DQ16 111 VDD12 VSS27 128
2 M_A_BS#[2:0] DQ16 VDD13 VSS28
M_A_BS#0 109 41 M_A_DQ21 112
PC2100 DDR3 SDRAM SO-DIMM

133
BA0 DQ17 VDD14 VSS29

M_A_BS#1 108 51 M_A_DQ19 117 134
M_A_BS#2 79 BA1 DQ18 53 M_A_DQ18 +SMDDR_VREF_DQA 118 VDD15 VSS30 138
114 BA2 DQ19 40 M_A_DQ17 123 VDD16 VSS31 139
2
M_A_CS#0 S0# DQ20 VDD17 VSS32
121 42 M_A_DQ20 C455 0.1U/16V/X7R_4 124 144
2
M_A_CS#1 S1# DQ21 VDD18 VSS33
101 50 M_A_DQ23 145
2 M_A_CLKP0 CK0 DQ22 VSS34
103 52 M_A_DQ22 C456 *0.1U/16V/X7R_4_NC 199 150
2 M_A_CLKN0 CK0# DQ23 +3.3V_RUN VDDSPD VSS35
102 57 M_A_DQ25 151
2 M_A_CLKP1 CK1 DQ24 VSS36
104 59 M_A_DQ24 C448 2.2U/6.3V_6 77 155
2 M_A_CLKN1 CK1# DQ25 NC1 VSS37
73 67 M_A_DQ31 122 156
2 M_A_CKE0 CKE0 DQ26 NC2 VSS38
74 69 M_A_DQ30 125 161
2 M_A_CKE1 CKE1 DQ27 NCTEST VSS39
2 M_A_CAS# 115
110 CAS# DQ28
56
58
M_A_DQ28
M_A_DQ29 2/24 net name exchange R125 *10K/F_4_NC 198 VSS40
162
167
2 M_A_RAS# RAS# DQ29 +3.3V_RUN EVENT# VSS41
SO-DIMMA SPD ADDRESS IS 0XA0 113 68 M_A_DQ27 DRAMRST# 30 168
2 M_A_W E# WE# DQ30 16 DRAMRST# RESET# VSS42
RP2 2 1 10KX2 DIMM0_SA0 197 70 M_A_DQ26 172
4 3 DIMM0_SA1 201 SA0 DQ31 129 M_A_DQ36 VSS43 173
202 SA1 DQ32 131 M_A_DQ37 1 VSS44 178
10,16 SMB_RUN_CLK SCL DQ33 +SMDDR_VREF_DQA VREF_DQ VSS45
200 141 M_A_DQ34 126 179
10,16 SMB_RUN_DAT SDA DQ34 +SMDDR_VREF_CA VREF_CA VSS46
143 M_A_DQ38 184
M_A_ODT0 116 DQ35 130 M_A_DQ33 VSS47 185
2 M_A_ODT0 ODT0 DQ36 VSS48
C M_A_ODT1 120 132 M_A_DQ32 2 189 C
2 M_A_ODT1 ODT1 DQ37 VSS1 VSS49
140 M_A_DQ35 3 190
11 DQ38 142 M_A_DQ39 8 VSS2 VSS50 195
28 DM0 DQ39 147 M_A_DQ41 9 VSS3 VSS51 196
DM1 DQ40 M_A_DQ45 VSS4 VSS52
(204P)
46 149 C474 C457 13
63 DM2 DQ41 157 M_A_DQ47 0.01U/25V_4 0.01U/25V_4 14 VSS5
DM3 DQ42 M_A_DQ43 VSS6
(204P)
136 159 19
153 DM4 DQ43 146 M_A_DQ40 20 VSS7 203
170 DM5 DQ44 148 M_A_DQ44 25 VSS8 VTT1 204
DM6 DQ45 VSS9 VTT2 +DDR_VTT
187 158 M_A_DQ42 26
DM7 DQ46 160 M_A_DQ46 31 VSS10 205
2 M_A_DQSP[3:0] DQ47 VSS11 PAD1
M_A_DQSP0 12 163 M_A_DQ49 32 206
M_A_DQSP1 29 DQS0 DQ48 165 M_A_DQ48 37 VSS12 PAD2
M_A_DQSP2 47 DQS1 DQ49 175 M_A_DQ54 38 VSS13 207
M_A_DQSP3 64 DQS2 DQ50 177 M_A_DQ55 43 VSS14 HOLE1 208
2 M_A_DQSP[7:4] DQS3 DQ51 VSS15 HOLE2
M_A_DQSP4 137 164 M_A_DQ53
M_A_DQSP5 154 DQS4 DQ52 166 M_A_DQ52 +DDR_VTT
M_A_DQSP6 171 DQS5 DQ53 174 M_A_DQ50 DS2SK-20401-TP4B
M_A_DQSP7 188 DQS6 DQ54 176 M_A_DQ51 C467 1U/6.3V_4 ddr-ddrsk-20401-tp4b-204p-smt
2 M_A_DQSN[3:0] DQS7 DQ55
M_A_DQSN0 10 181 M_A_DQ60 DGMK4000428
M_A_DQSN1 27 DQS#0 DQ56 183 M_A_DQ57 C443 1U/6.3V_4
M_A_DQSN2 DQS#1 DQ57 M_A_DQ63
2 M_A_DQSN[7:4]
M_A_DQSN3
45
62 DQS#2 DQ58
191
193 M_A_DQ62 C465 1U/6.3V_4 H = 4.0mm
M_A_DQSN4 135 DQS#3 DQ59 180 M_A_DQ56
M_A_DQSN6 169 DQS#5 DQ61 192 M_A_DQ58
DQS#7 DQ63
C439 2 1 *22U/6.3V_8_NC
B DS2SK-20401-TP4B B
ddr-ddrsk-20401-tp4b-204p-smt
DGMK4000428 +3.3V_RUN +SMDDR_VREF_DQA +V_VDDQ +VREFDQ_SA
H =4.0mm C446 0.1U/16V/X7R_4
C444 2.2U/6.3V_6 R108

1K/F_4
R106 2/F_6
+V_VDDQ
C453 1U/6.3V_4 R107 C445 C447
C449 1U/6.3V_4 Pleace on the BOT side 1K/F_4 0.022U/16V_4 *0.1U/10V_4_NC
C471 1U/6.3V_4
Near to JDIM2 +3.3V_ALW 0.022uF -> WP
R105
V0.91 P.41
24.9/F_4
C451 1U/6.3V_4
1
C469 10U/6.3V_6 RT1

10K/NTC_4
C473 10U/6.3V_6 Follow SKL-H WP(V0.91) support DDR3L SO-DIMM
#549401 page 41
2
C450 10U/6.3V_6
T_DDR
26 T_DDR
C472 10U/6.3V_6
1
A
C470 10U/6.3V_6 A
R397
C382 2 1 *22U/6.3V_8_NC 1.5K/F_4
C386 2 1 *22U/6.3V_8_NC
2

C452 10U/6.3V_6
C454 10U/6.3V_6
PROJECT : AM9A
DDR3 DIMM1-STD (4.0H) A0

5 4 3 2 1
A B C D E
2 M_B_A[15:0] JDIM1A
M_B_DQ[63:0] 2
+V_VDDQ
16
M_B_A0 98 5 M_B_DQ5 +DDR_VTT JDIM1B
M_B_A1 97 A0 DQ0 7 M_B_DQ1 75 44
M_B_A2 96 A1 DQ1 15 M_B_DQ3 C416 1U/6.3V_4 76 VDD1 VSS16 48
M_B_A3 95 A2 DQ2 17 M_B_DQ2 81 VDD2 VSS17 49
1 1
A8 DQ8 VDD8 VSS23
M_B_A9
M_B_A10
85
107 A9 DQ9
23
33
M_B_DQ8
M_B_DQ10 C412 *1U/6.3V_4_NC
2.48A 99
100 VDD9 VSS24
66
71
M_B_A11 84 A10/AP DQ10 35 M_B_DQ11 105 VDD10 VSS25 72
M_B_A12 83 A11 DQ11 22 M_B_DQ13 C409 *1U/6.3V_4_NC 106 VDD11 VSS26 127
M_B_A13 119 A12/BC# DQ12 24 M_B_DQ12 111 VDD12 VSS27 128
M_B_A14 80 A13 DQ13 34 M_B_DQ14 112 VDD13 VSS28

C411 10U/6.3V_6 133
A15 DQ15 39 M_B_DQ16 C390 10U/6.3V_6 118 VDD15 VSS30 138
2 M_B_BS#[2:0] DQ16 VDD16 VSS31
M_B_BS#0 109 41 M_B_DQ17 123 139

M_B_BS#1 108 51 M_B_DQ19 124 144
M_B_BS#2 79
114 BA2 DQ19
53
40
M_B_DQ23
M_B_DQ20 2/24 net name exchange 199 VSS34
145
150
2 M_B_CS#0 S0# DQ20 +3.3V_RUN VDDSPD VSS35
121 42 M_B_DQ21 151
2 M_B_CS#1 S1# DQ21 VSS36
101 50 M_B_DQ18 77 155
2 M_B_CLKP0 CK0 DQ22 +3.3V_RUN NC1 VSS37
103 52 M_B_DQ22 122 156
2 M_B_CLKN0 CK0# DQ23 NC2 VSS38
102 57 M_B_DQ24 125 161
2 M_B_CLKP1 CK1 DQ24 NCTEST VSS39
104 59 M_B_DQ29 C408 0.1U/16V/X7R_4 162
2 M_B_CLKN1 CK1# DQ25 VSS40
73 67 M_B_DQ30 R87 *10K/F_4_NC 198 167
2 M_B_CKE0 CKE0 DQ26 +3.3V_RUN EVENT# VSS41
74 69 M_B_DQ26 C407 2.2U/6.3V_6 DRAMRST# 30 168
2 M_B_CKE1 CKE1 DQ27 RESET# VSS42
115 56 M_B_DQ28 172
2 M_B_CAS# CAS# DQ28 VSS43
SO-DIMMA SPD ADDRESS IS 0XA4 110 58 M_B_DQ25 173
2 M_B_RAS# RAS# DQ29 VSS44
113 68 M_B_DQ31 1 178
2 M_B_W E# WE# DQ30 +SMDDR_VREF_DQB VREF_DQ VSS45
R81 10K/F_4 DIMM1_SA0 197 70 M_B_DQ27 126 179
SA0 DQ31 +SMDDR_VREF_CA VREF_CA VSS46
R91 10K/F_4 DIMM1_SA1 201 129 M_B_DQ39 184
+3.3V_RUN SA1 DQ32 M_B_DQ37 VSS47
10,15 SMB_RUN_CLK 202 131 185
200 SCL DQ33 141 M_B_DQ32 2 VSS48 189
10,15 SMB_RUN_DAT SDA DQ34 VSS1 VSS49
143 M_B_DQ34 3 190
2 M_B_ODT0 116 DQ35 130 M_B_DQ38 8 VSS2 VSS50 195 2
2 M_B_ODT0 ODT0 DQ36 VSS3 VSS51
M_B_ODT1 120 132 M_B_DQ36 9 196
2 M_B_ODT1 ODT1 DQ37 VSS4 VSS52
M_B_DQ35
(204P)
140 C432 C397 13
11 DQ38 142 M_B_DQ33 +SMDDR_VREF_CA 0.01U/25V_4 0.01U/25V_4 14 VSS5
28 DM0 DQ39 147 M_B_DQ40 19 VSS6
46 DM1 DQ40 149 M_B_DQ41 C431 0.1U/16V/X7R_4 20 VSS7 203
DM2 DQ41 VSS8 VTT1 +DDR_VTT
63 157 M_B_DQ47 25 204
DM3 DQ42 M_B_DQ42 VSS9 VTT2
(204P)
136 159 C433 0.1U/16V/X7R_4 26
153 DM4 DQ43 146 M_B_DQ45 31 VSS10 205
170 DM5 DQ44 148 M_B_DQ44 C434 2.2U/6.3V_6 32 VSS11 PAD1 206
187 DM6 DQ45 158 M_B_DQ46 37 VSS12 PAD2
DM7 DQ46 160 M_B_DQ43 38 VSS13 207
2 M_B_DQSP[7:0] M_B_DQSP0 12 DQ47 163 M_B_DQ51 43 VSS14 HOLE1 208
M_B_DQSP1 29 DQS0 DQ48 165 M_B_DQ54 VSS15 HOLE2
M_B_DQSP2 47 DQS1 DQ49 175 M_B_DQ53
M_B_DQSP3 64 DQS2 DQ50 177 M_B_DQ48 +SMDDR_VREF_DQB DS2SK-20401-TP8D
M_B_DQSP4 137 DQS3 DQ51 164 M_B_DQ50 ddr-ds2sk-20401-tp8d-std-204p
M_B_DQSP5 154 DQS4 DQ52 166 M_B_DQ55 C398 0.1U/16V/X7R_4 DGMK4000431
M_B_DQSP6 DQS5 DQ53 M_B_DQ49
M_B_DQSP7
171
188 DQS6 DQ54
174
176 M_B_DQ52 C396 *0.1U/16V/X7R_4_NC H = 8.0mm
2 M_B_DQSN[7:0] M_B_DQSN0 10 DQS7 DQ55 181 M_B_DQ63
M_B_DQSN1 27 DQS#0 DQ56 183 M_B_DQ62 C399 2.2U/6.3V_6
M_B_DQSN2 45 DQS#1 DQ57 191 M_B_DQ56
M_B_DQSN6 169 DQS#5 DQ61 192 M_B_DQ61 +SMDDR_VREF_DQB +V_VDDQ +VREFDQ_SB
DQS#7 DQ63
3 3
DS2SK-20401-TP8D +V_VDDQ R90
ddr-ds2sk-20401-tp8d-std-204p 1K/F_4
Place these Caps near So-Dimm1. DGMK4000431 C404 0.1U/16V/X7R_4
H = 8.0mm C405 0.1U/16V/X7R_4
R88 2/F_6
+V_VDDQ C437 0.1U/16V/X7R_4 R89 C389 C387

1K/F_4 0.022U/16V_4 *0.1U/10V_4_NC
C438 1U/6.3V_4 C406 0.1U/16V/X7R_4
C402 1U/6.3V_4 0.022uF -> WP R82

V0.91 P.41 24.9/F_4
C436 1U/6.3V_4
C403 1U/6.3V_4
Follow SKL-H WP(V0.91) support DDR3L SO-DIMM
C430 10U/6.3V_6 #549401 page 41
C429 10U/6.3V_6
C428 10U/6.3V_6 +V_VDDQ +V_VDDQ

+SMDDR_VREF_CA +DDR_VREF_CA
C395 10U/6.3V_6
1
C401 10U/6.3V_6 R103 R101

470_4 1K/F_4
C400 2 1 *22U/6.3V_8_NC
4
R99 2/F_6 4
2
C394 2 1 *22U/6.3V_8_NC 10 PCH_DRAMRST# R102 0_4 DRAMRST# DRAMRST# 15

C427 10U/6.3V_6 C435 R100 C441 C442
0.1U/16V/X7R_4 1K/F_4 0.022U/16V_4 *0.1U/10V_4_NC
C426 10U/6.3V_6
C384
0.022uF -> WP V0.91 P.41
R104
24.9/F_4
+
*220U/2.5V/E15_3528_NC
Follow SKL-H WP(V0.91)
support DDR3L SO-DIMM
Follow SKL-H WP(V0.91)
support DDR3L SO-DIMM
PROJECT : AM9A
#549401 page 24&25 #549401 page 41
DDR3 DIMM2-STD (8.0H) A0

A B C D E
1 2 3 4 5 6 7 8
DG-07158-001 V05 PG51

PEX_IOVDD/Q : 3300mA
+1.05V_GFX AG19
U11A
N16P-GX
AN12 PEG_TXP0_C 3
+3V_GFX
3/16 change to NC
17
AG21 PEX_IOVDD_1 PEX_RX0 AM12 R306 *10K_4_NC
AG22 PEX_IOVDD_2 [PEG Interface] PEX_RX0_N AN14
PEG_TXN0_C
PEG_TXP1_C
3
3
Midway bewteen GPU and Power Supply AG24 PEX_IOVDD_3 PEX_RX1 AM14 R315 0_4
PEX_IOVDD_4 PEX_RX1_N PEG_TXN1_C 3 12,51 DGPU_PW ROK
AH21 AP14 PEG_TXP2_C 3
C586 22U/6.3V_6 AH25 PEX_IOVDD_5 PEX_RX2 AP15
PEX_IOVDD_6 PEX_RX2_N PEG_TXN2_C 3
2
C185 22U/6.3V_6 AN15 PEG_TXP3_C 3
C196 22U/6.3V_6 AG13 PEX_RX3 AM15
PEX_IOVDDQ_1 PEX_RX3_N PEG_TXN3_C 3
A C294 22U/6.3V_6 AG15 AN17 PEX_CLKREQ# 1 3 A
PEX_IOVDDQ_2 PEX_RX4 PEG_TXP4_C 3 CLK_PEGA_REQ# 12
C88 10U/6.3V_6 AG16 AM17 PEG_TXN4_C 3
C69 10U/6.3V_6 AG18 PEX_IOVDDQ_3 PEX_RX4_N AP17
PEX_IOVDDQ_4 PEX_RX5 PEG_TXP5_C 3
C584 10U/6.3V_6 AG25 AP18 PEG_TXN5_C 3
C301 10U/6.3V_6 AH15 PEX_IOVDDQ_5 PEX_RX5_N AN18 Q18
PEX_IOVDDQ_6 PEX_RX6 PEG_TXP6_C 3 2N7002W
AH18 AM18 PEG_TXN6_C 3
AH26 PEX_IOVDDQ_7 PEX_RX6_N AN20
PEX_IOVDDQ_8 PEX_RX7 PEG_TXP7_C 3
PLACE UNDER BGA AH27 AM20 PEG_TXN7_C 3
AJ27 PEX_IOVDDQ_9 PEX_RX7_N AP20
C583 1U/6.3V_4 AK27 PEX_IOVDDQ_10 PEX_RX8 AP21
C211 1U/6.3V_4 AL27 PEX_IOVDDQ_11 PEX_RX8_N AN21
C250 1U/6.3V_4 AM28 PEX_IOVDDQ_12 PEX_RX9 AM21
C221 1U/6.3V_4 AN28 PEX_IOVDDQ_13 PEX_RX9_N AN23 +3V_AON +3V_AON
PEX_IOVDDQ_14 PEX_RX10 AM23
PEX_RX10_N AP23
PLACE NEAR BALLS PEX_RX11 AP24
PEX_RX11_N AN24
C257 4.7U/6.3V_4 PEX_RX12 AM24 R61
C272 4.7U/6.3V_4 PEX_RX12_N AN26 C346
PEX_RX13 *10K_4_NC
AM26 0.1U/10V_4
PEX_RX13_N 20 SYS_PEX_RST_MON#
5
AP26 U1
PEX_RX14 AP27 RST_MON# R64 0_4 2
PEX_RX14_N AN27 4 PEGX_RST#
PEX_RX15 AM27 1
PEX_RX15_N 20 GPU_PEX_RST_HOLD#
MC74VHC1G08DFT2G
3
AK14 PEG_RXP0_C C265 2 1 0.22U/16V_4 R59
PEX_TX0 PEG_RXN0_C PEG_RXP0 3
AJ14 C286 2 1 0.22U/16V_4 100K_4
PEX_TX0_N PEG_RXP1_C PEG_RXN0 3
AH14 C263 2 1 0.22U/16V_4
B AG14 C245 2 1 0.22U/16V_4 B
AK15 C226 2 1 0.22U/16V_4
AJ15 C244 2 1 0.22U/16V_4
AL16 C223 2 1 0.22U/16V_4
AK16 C213 2 1 0.22U/16V_4
AK17 C200 2 1 0.22U/16V_4
AJ17 C206 2 1 0.22U/16V_4
AH17 C197 2 1 0.22U/16V_4
PEX_TX5 PEG_RXN5_C PEG_RXP5 3 +3V_AON
AC6 AG17 C189 2 1 0.22U/16V_4
NC_1 PEX_TX5_N PEG_RXP6_C PEG_RXN5 3
AJ28 AK18 C178 2 1 0.22U/16V_4
NC_2 PEX_TX6 PEG_RXN6_C PEG_RXP6 3
AJ4 AJ18 C184 2 1 0.22U/16V_4
NC_3 PEX_TX6_N PEG_RXP7_C PEG_RXN6 3
AJ5 AL19 C175 2 1 0.22U/16V_4
NC_4 PEX_TX7 PEG_RXN7_C PEG_RXP7 3
AL11 AK19 C171 2 1 0.22U/16V_4
NC_5 PEX_TX7_N PEG_RXN7 3
C15 AK20 C349
D19 NC_6 PEX_TX8 AJ20 74AHC1G09GW
NC_7 PEX_TX8_N 0.1U/10V_4
5
D20 AH20 U3
D23 NC_8 PEX_TX9 AG20 2
NC_9 PEX_TX9_N 9,26,28,35,36,37 PLTRST# RST_MON#
D26 AK21 4
H31 NC_10 PEX_TX10 AJ21 1
NC_11 PEX_TX10_N 12 DGPU_HOLD_RST#
T8 AL22
V32 NC_12 PEX_TX11 AK22
NC_13 PEX_TX11_N
3
DG-07158-001 V05 PG56 Y1
Y2 NC_14 PEX_TX12
AK23
AJ23
Y3 NC_15 PEX_TX12_N AH23
PLACE NEAR GPU AA1 NC_16 PEX_TX13 AG23
AA2 NC_17 PEX_TX13_N AK24
C354 4.7U/6.3V_4 AA3 NC_18 PEX_TX14 AJ24
C326 1U/6.3V_4 AA4 NC_19 PEX_TX14_N AL25
AA5 NC_20 PEX_TX15 AK25
C AA6 NC_21 PEX_TX15_N C
C327 0.1U/10V_4 AA7 NC_22
C353 *0.1U/10V_4_NC AA8 NC_23 AL13
NC_24 PEX_REFCLK CLK_PCIE_VGAP 12
C636 *0.1U/10V_4_NC AK13 CLK_PCIE_VGAN 12
PEX_REFCLK_N
DG-06803-001_V04 : R305 is unstuffed
PLACE UNDER GPU E2703.DSN : R305 is stuffed
AJ26 PEX_TSTCLK R34 *200_4_NC
J8 PEX_TSTCLK_OUT AK26 PEX_TSTCLK#
K8 3V3_AON_1 PEX_TSTCLK_OUT_N
+3V_AON 3V3_AON_2
+3V_GFX L8 AJ11
M8 3V3_MAIN_1 NC AJ12 PEGX_RST#
VDD33 : 85mA 3V3_MAIN_2 PEX_RST_N
PLACE NEAR GPU AK12 PEX_CLKREQ# R304 10K_4

PEX_CLKREQ_N +3V_AON
C322 4.7U/6.3V_4
C325 1U/6.3V_4 AP29 PEX_TERMP R278 2.49K/F_4
PEX_TERMP
+1.05V_GFX
AK11 TESTMODE R293 10K_4
TESTMODE
C355
C324
0.1U/10V_4
0.1U/10V_4
DG-07158-001 V05 PG52
C331 *0.1U/10V_4_NC AG26 +1.05V_GFX PEX_PLLVDD : 150mA C202 4.7U/6.3V_4 PLACE NEAR GPU
PEX_PLLVDD
PLACE UNDER GPU AH12 PEX_SVDD_3V3 : 210mA +3V_AON C219 1U/6.3V_4 PLACE NEAR GPU
PEX_PLL_HVDD AG12 0.1U/10V_4 C318
PEX_SVDD_3V3 4.7U/6.3V_4 C317 C236 0.1U/10V_4 PLACE UNDER GPU BALLS
4.7U/6.3V_4 C344
P8 3.3V_AUX
D 3.3V_AUX_NC PLACE NEAR BGA
D
L4
VDD_SENSE VGPU_CORE_SENSE 50

L5
GND_SENSE VSS_GPU_SENSE 50
3.3V_AUX PROJECT : AM9A

TP11 Size Document Number Rev
A0
N16P-GX - 1/5 (PCIE)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
FBA_CMD0 U30
U11B
N16P-GX
L28 VMA_DQ0
24,25 FBC_CMD[31:0]
FBC_CMD0
FBC_CMD1
FBC_CMD2
D13
E14
F14
U11C
N16P-GX
FBB_CMD0 (FBC_CMD25)
FBB_CMD1 (FBC_CMD23)
FBC_D00
FBC_D01
G9
E9
G8
VMC_DQ0
VMC_DQ1
VMC_DQ2
18
22,23 FBA_CMD[31:0] FBA_CMD1 T31 FBA_CMD0 (FBA_CMD25) FBA_D00 M29 VMA_DQ1 FBC_CMD3 A12 FBC_CMD2 MEMORY I/F C FBC_D02 F9 VMC_DQ3
FBA_CMD2 U29 FBA_CMD1 (FBA_CMD23) [MEMORY I/F A] FBA_D01 L29 VMA_DQ2 FBC_CMD4 B12 FBB_CMD3 (FBC_CMD0) FBC_D03 F11 VMC_DQ4
FBA_CMD3 R34 FBA_CMD2 FBA_D02 M28 VMA_DQ3 FBC_CMD5 C14 FBB_CMD4 (FBC_CMD10) FBC_D04 G11 VMC_DQ5
FBA_CMD4 R33 FBA_CMD3 (FBA_CMD0) FBA_D03 N31 VMA_DQ4 FBC_CMD6 B14 FBB_CMD5 (FBC_CMD26) FBC_D05 F12 VMC_DQ6
FBA_CMD5 U32 FBA_CMD4 (FBA_CMD10) FBA_D04 P29 VMA_DQ5 FBC_CMD7 G15 FBB_CMD6 (FBC_CMD14) FBC_D06 G12 VMC_DQ7
FBA_CMD6 U33 FBA_CMD5 (FBA_CMD26) FBA_D05 R29 VMA_DQ6 FBC_CMD8 F15 FBC_CMD7 FBC_D07 G6 VMC_DQ8
FBA_CMD7 U28 FBA_CMD6 (FBA_CMD14) FBA_D06 P28 VMA_DQ7 FBC_CMD9 E15 FBB_CMD8 (FBC_CMD1) FBC_D08 F5 VMC_DQ9
FBA_CMD8 V28 FBA_CMD7 FBA_D07 J28 VMA_DQ8 FBC_CMD10 D15 FBB_CMD9 (FBC_CMD22) FBC_D09 E6 VMC_DQ10
FBA_CMD9 V29 FBA_CMD8 (FBA_CMD1) FBA_D08 H29 VMA_DQ9 FBC_CMD11 A14 FBB_CMD10 (FBC_CMD20) FBC_D10 F6 VMC_DQ11
A
FBA_CMD10 V30 FBA_CMD9 (FBA_CMD22) FBA_D09 J29 VMA_DQ10 FBC_CMD12 D14 FBB_CMD11 (FBC_CMD24) FBC_D11 F4 VMC_DQ12 A
FBA_CMD11 U34 FBA_CMD10 (FBA_CMD20) FBA_D10 H28 VMA_DQ11 FBC_CMD13 A15 FBB_CMD12 (FBC_CMD18) FBC_D12 G4 VMC_DQ13
FBA_CMD12 U31 FBA_CMD11 (FBA_CMD24) FBA_D11 G29 VMA_DQ12 FBC_CMD14 B15 FBB_CMD13 (FBC_CMD9) FBC_D13 E2 VMC_DQ14
FBA_CMD13 V34 FBA_CMD12 (FBA_CMD18) FBA_D12 E31 VMA_DQ13 FBC_CMD15 C17 FBB_CMD14 (FBC_CMD29) FBC_D14 F3 VMC_DQ15
FBA_CMD14 V33 FBA_CMD13 (FBA_CMD9) FBA_D13 E32 VMA_DQ14 FBC_CMD16 D18 FBB_CMD15 (FBC_CMD8) FBC_D15 C2 VMC_DQ16
FBA_CMD15 Y32 FBA_CMD14 (FBA_CMD29) FBA_D14 F30 VMA_DQ15 FBC_CMD17 E18 FBB_CMD16 (FBC_CMD27) FBC_D16 D4 VMC_DQ17
FBA_CMD16 AA31 FBA_CMD15 (FBA_CMD8) FBA_D15 C34 VMA_DQ16 FBC_CMD18 F18 FBB_CMD17 (FBC_CMD15) FBC_D17 D3 VMC_DQ18
FBA_CMD17 AA29 FBA_CMD16 (FBA_CMD27) FBA_D16 D32 VMA_DQ17 FBC_CMD19 A20 FBB_CMD18 (FBC_CMD11) FBC_D18 C1 VMC_DQ19
FBA_CMD18 AA28 FBA_CMD17 (FBA_CMD15) FBA_D17 B33 VMA_DQ18 FBC_CMD20 B20 FBB_CMD19 (FBC_CMD16) FBC_D19 B3 VMC_DQ20
FBA_CMD19 AC34 FBA_CMD18 (FBA_CMD11) FBA_D18 C33 VMA_DQ19 FBC_CMD21 C18 FBB_CMD20 (FBC_CMD28) FBC_D20 C4 VMC_DQ21
FBA_CMD20 AC33 FBA_CMD19 (FBA_CMD16) FBA_D19 F33 VMA_DQ20 FBC_CMD22 B18 FBB_CMD21 (FBC_CMD3) FBC_D21 B5 VMC_DQ22
FBA_CMD21 AA32 FBA_CMD20 (FBA_CMD28) FBA_D20 F32 VMA_DQ21 FBC_CMD23 G18 FBB_CMD22 (FBC_CMD17) FBC_D22 C5 VMC_DQ23
FBA_CMD22 AA33 FBA_CMD21 (FBA_CMD3) FBA_D21 H33 VMA_DQ22 FBC_CMD24 G17 FBB_CMD23 (FBC_CMD5) FBC_D23 A11 VMC_DQ24
FBA_CMD23 Y28 FBA_CMD22 (FBA_CMD17) FBA_D22 H32 VMA_DQ23 VMA_DQ[63:0] FBC_CMD25 F17 FBB_CMD24(FBC_CMD4) FBC_D24 C11 VMC_DQ25
FBA_CMD24 FBA_CMD23 (FBA_CMD5) FBA_D23 VMA_DQ24 VMA_DQ[63:0] 22,23 FBC_CMD26 FBB_CMD25 (FBC_CMD21) FBC_D25 VMC_DQ26
Y29 P34 D16 D11
FBA_CMD25 W 31 FBA_CMD24 (FBA_CMD4) FBA_D24 P32 VMA_DQ25 VMC_DQ[63:0] FBC_CMD27 A18 FBB_CMD26 (FBC_CMD6) FBC_D26 B11 VMC_DQ27
FBA_CMD26 FBA_CMD25 (FBA_CMD21) FBA_D25 VMA_DQ26 VMC_DQ[63:0] 24,25 FBC_CMD28 FBB_CMD27 (FBC_CMD13) FBC_D27 VMC_DQ28
Y30 P31 D17 D8
FBA_CMD27 AA34 FBA_CMD26 (FBA_CMD6) FBA_D26 P33 VMA_DQ27 FBC_CMD29 A17 FBB_CMD28 (FBC_CMD19) FBC_D28 A8 VMC_DQ29
FBA_CMD28 Y31 FBA_CMD27 (FBA_CMD13) FBA_D27 L31 VMA_DQ28 FBC_CMD30 B17 FBB_CMD29 (FBC_CMD12) FBC_D29 C8 VMC_DQ30
FBA_CMD29 Y34 FBA_CMD28 (FBA_CMD19) FBA_D28 L34 VMA_DQ29 FBC_CMD31 E17 FBC_CMD30 FBC_D30 B8 VMC_DQ31
FBA_CMD30 Y33 FBA_CMD29 (FBA_CMD12) FBA_D29 L32 VMA_DQ30 FBC_CMD31 (NC) FBC_D31 F24 VMC_DQ32
FBA_CMD31 V31 FBA_CMD30 FBA_D30 L33 VMA_DQ31 FBC_D32 G23 VMC_DQ33
FBA_CMD31 (NC) FBA_D31 AG28 VMA_DQ32 FBC_DBI0 E11 FBC_D33 E24 VMC_DQ34
FBA_D32 VMA_DQ33 24,25 FBC_DBI[7:0] FBC_DBI1 FBC_DQM0 FBC_D34 VMC_DQ35
AF29 E3 G24
FBA_DBI0 P30 FBA_D33 AG29 VMA_DQ34 FBC_DBI2 A3 FBC_DQM1 FBC_D35 D21 VMC_DQ36
22,23 FBA_DBI[7:0] FBA_DBI1 FBA_DQM0 FBA_D34 VMA_DQ35 FBC_DBI3 FBC_DQM2 FBC_D36 VMC_DQ37
F31 AF28 C9 E21
FBA_DBI2 F34 FBA_DQM1 FBA_D35 AD30 VMA_DQ36 FBC_DBI4 F23 FBC_DQM3 FBC_D37 G21 VMC_DQ38
FBA_DBI3 M32 FBA_DQM2 FBA_D36 AD29 VMA_DQ37 FBC_DBI5 F27 FBC_DQM4 FBC_D38 F21 VMC_DQ39
FBA_DBI4 AD31 FBA_DQM3 FBA_D37 AC29 VMA_DQ38 FBC_DBI6 C30 FBC_DQM5 FBC_D39 G27 VMC_DQ40
FBA_DBI5 AL29 FBA_DQM4 FBA_D38 AD28 VMA_DQ39 FBC_DBI7 A24 FBC_DQM6 FBC_D40 D27 VMC_DQ41
FBA_DBI6 AM32 FBA_DQM5 FBA_D39 AJ29 VMA_DQ40 FBC_DQM7 FBC_D41 G26 VMC_DQ42
B FBA_DBI7 AF34 FBA_DQM6 FBA_D40 AK29 VMA_DQ41 FBC_D42 E27 VMC_DQ43 B
FBA_DQM7 FBA_D41 AJ30 VMA_DQ42 FBC_EDC0 D10 FBC_D43 E29 VMC_DQ44
FBA_D42 VMA_DQ43 24,25 FBC_EDC[7:0] FBC_EDC1 FBC_DQS_W P0 FBC_D44 VMC_DQ45
AK28 D5 F29
FBA_EDC0 M31 FBA_D43 AM29 VMA_DQ44 FBC_EDC2 C3 FBC_DQS_W P1 FBC_D45 E30 VMC_DQ46
22,23 FBA_EDC[7:0] FBA_EDC1 FBA_DQS_W P0 FBA_D44 VMA_DQ45 FBC_EDC3 FBC_DQS_W P2 FBC_D46 VMC_DQ47
G31 AM31 B9 D30
FBA_EDC2 E33 FBA_DQS_W P1 FBA_D45 AN29 VMA_DQ46 FBC_EDC4 E23 FBC_DQS_W P3 FBC_D47 A32 VMC_DQ48
FBA_EDC3 M33 FBA_DQS_W P2 FBA_D46 AM30 VMA_DQ47 FBC_EDC5 E28 FBC_DQS_W P4 FBC_D48 C31 VMC_DQ49
FBA_EDC4 AE31 FBA_DQS_W P3 FBA_D47 AN31 VMA_DQ48 FBC_EDC6 B30 FBC_DQS_W P5 FBC_D49 C32 VMC_DQ50
FBA_EDC5 AK30 FBA_DQS_W P4 FBA_D48 AN32 VMA_DQ49 FBC_EDC7 A23 FBC_DQS_W P6 FBC_D50 B32 VMC_DQ51
FBA_EDC6 AN33 FBA_DQS_W P5 FBA_D49 AP30 VMA_DQ50 FBC_DQS_W P7 FBC_D51 D29 VMC_DQ52
FBA_EDC7 AF33 FBA_DQS_W P6 FBA_D50 AP32 VMA_DQ51 FBC_D52 A29 VMC_DQ53
FBA_DQS_W P7 FBA_D51 AM33 VMA_DQ52 D9 FBC_D53 C29 VMC_DQ54
FBA_D52 AL31 VMA_DQ53 E4 FBC_DQS_RN0 FBC_D54 B29 VMC_DQ55
M30 FBA_D53 AK33 VMA_DQ54 B2 FBC_DQS_RN1 FBC_D55 B21 VMC_DQ56
H30 FBA_DQS_RN0 FBA_D54 AK32 VMA_DQ55 A9 FBC_DQS_RN2 FBC_D56 C23 VMC_DQ57
FBA_DQS_RN1 FBA_D55 FBC_DQS_RN3 FBC_D57
E34
M34 FBA_DQS_RN2 FBA_D56
AD34
AD32
VMA_DQ56
VMA_DQ57 GDDR5 NO USE D22
D28 FBC_DQS_RN4 FBC_D58
A21
C21
VMC_DQ58
VMC_DQ59
FBA_DQS_RN3 FBA_D57 FBC_DQS_RN5 FBC_D59
GDDR5 NO USE AF30
AK31 FBA_DQS_RN4 FBA_D58
AC30
AD33
VMA_DQ58
VMA_DQ59
A30
B23 FBC_DQS_RN6 FBC_D60
B24
C24
VMC_DQ60
VMC_DQ61
AM34 FBA_DQS_RN5 FBA_D59 AF31 VMA_DQ60 FBC_DQS_RN7 FBC_D61 B26 VMC_DQ62
AF32 FBA_DQS_RN6 FBA_D60 AG34 VMA_DQ61 FBC_D62 C26 VMC_DQ63
FBA_DQS_RN7 FBA_D61 AG32 VMA_DQ62 FBC_D63
FBA_D62
DG-07158-001 V05 PG48 AA27 FBA_D63
AG33 VMA_DQ63
D12
+1.35V_GFX FBVDDQ_1 FBC_CLK0 VMC_CLK0 24
AA30 E12
FBVDDQ_2 FBC_CLK0_N VMC_CLK0# 24
AB27 R30 E20
FBVDDQ_3 FBA_CLK0 VMA_CLK0 22 FBC_CLK1 VMC_CLK1 25
AB33 R31 F20
FBVDDQ_4 FBA_CLK0_N VMA_CLK0# 22 FBC_CLK1_N VMC_CLK1# 25
PLACE CLOSE UNDER GPU AC27 AB31
FBVDDQ_5 FBA_CLK1 VMA_CLK1 23
AD27 AC31 GK107 GM107
FBVDDQ_6 FBA_CLK1_N VMA_CLK1# 23
AE27 G14 FBB_DEBUG0_K *60.4/F_4_NC R52
FBVDDQ_7 FBB_CMD32 FBB_DEBUG1_K +1.35V_GFX
C187 1U/10V/X5R_4 AF27 GK107 GM107 FBA_DEBUG0 G20 *60.4/F_4_NC R48
C C231 1U/10V/X5R_4 AG27 FBVDDQ_8 R28 FBA_DEBUG0_K *60.4/F_4_NC R39 FBA_DEBUG1 FBB_CMD33 C12 FBB_DEBUG0 *60.4/F_4_NC R51 C
FBVDDQ_9 FBA_CMD32 FBA_DEBUG1_K +1.35V_GFX FBB_CMD34 FBB_DEBUG1
C316 1U/10V/X5R_4 B13 FBB_DEBUG0 AC28 *60.4/F_4_NC R35 NC C20 *60.4/F_4_NC R44
C68 1U/10V/X5R_4 B19 FBVDDQ_10 FBB_DEBUG1 FBA_CMD33 R32 FBA_DEBUG0 *60.4/F_4_NC R27 NC FBB_CMD35
C216 1 2 0.1U/16V/X7R_4 E13 FBVDDQ_12 NC FBA_CMD34 AC32 FBA_DEBUG1 *60.4/F_4_NC R28
C193 1 2 0.1U/16V/X7R_4 E19 FBVDDQ_13 NC FBA_CMD35 F8
FBVDDQ_15 FBB_W CK01 VMC_WCK01 24
C194 1 2 0.1U/16V/X7R_4 H10 H26 E8
FBVDDQ_16 FB_VREF FBB_W CK01_N VMC_WCK01# 24
C188 1 2 0.1U/16V/X7R_4 H11 A5
FBVDDQ_17 FBB_W CK23 VMC_WCK23 24
C271 4.7U/6.3V_4 H12 K31 A6
FBVDDQ_18 FBA_W CK01 VMA_WCK01 22 FBB_W CK23_N VMC_WCK23# 24
C548 4.7U/6.3V_4 H13 L30 D24
FBVDDQ_19 FBA_W CK01_N VMA_WCK01# 22 FBB_W CK45 VMC_WCK45 25
C13 4.7U/6.3V_4 H14 H34 D25
C307 4.7U/6.3V_4 H18 J34 B27
FBVDDQ_23 FBA_W CK23_N VMA_WCK23# 22 FBB_W CK67 VMC_WCK67 25
H19 AG30 C27
H20 AG31
FBVDDQ_25 FBA_W CK45_N VMA_WCK45# 23
H21 AJ34
FBVDDQ_26 FBA_W CK67 VMA_WCK67 23
PLACE CLOSE TO NEAE GPU H22 AK34 D6
FBVDDQ_27 FBA_W CK67_N VMA_WCK67# 23 FBB_W CKB01
H23 D7
C276 10U/6.3V_6 H24 FBVDDQ_28 J30 FBB_WCKBxx are reserved FBB_W CKB01_N C6
FBVDDQ_29 FBA_W CKB01 FBB_W CKB23
C612
C4
10U/6.3V_6
22U/6.3V_6
H8
H9 FBVDDQ_30
FBVDDQ_31
FBB_WCKBxx FBA_W CKB01_N
FBA_W CKB23
J31
J32 5/20 change to HCB1608KF-300T30 NC ON : GM108/GM107
USED ON : GK107
FBB_W CKB23_N
FBB_W CKB45
B6
F26
C537 22U/6.3V_6 L27
M27 FBVDDQ_32
are reserved
NC ON : GM108/GM107 FBA_W CKB23_N
J33
AH31
R317 10K_4
DG-07158-001 V05 PG50
change to CX300T30000 FBB_W CKB45_N
E26
A26
N27 FBVDDQ_33 FBA_W CKB45 AJ31 FBB_W CKB67 A27
FBVDDQ_34 USED ON : GK107 FBA_W CKB45_N +1.05V_GFX FBB_W CKB67_N
P27 AJ32
FBVDDQ_35 FBA_W CKB67
R27
FBVDDQ_36 FBA_W CKB67_N
AJ33 C276 close to H17 (under GPU)
T27 FB_PLLAVDD HCB1608KF-300T30 L1 near to GPU H17 FB_PLLAVDD
T30 FBVDDQ_37 E1 PS_FB_CLAMP FBB_PLL_AVDD
FBVDDQ_38 FB_CLAMP +FB_PLLAVDD : 62mA 0.1U/16V/X7R_4
1
T33
Y27 FBVDDQ_39 K27 C192 1 2 0.1U/16V/X7R_4 C295
FBVDDQ_44 FB_DLL_AVDD C186 1 2 0.1U/16V/X7R_4 under GPU
2
U27 +1.35V_GFX
FBA_PLL_AVDD C285 1 2 *0.1U/16V/X7R_4_NC Close to GPU BALL
D B16 F1 FBVDDQ_SENSE R322 *0_4_NC D
FBVDDQ_AON_1 FB_VDDQ_SENSE
E16
FBVDDQ_AON_2
C299 22U/6.3V_6 near to GPU
H15 F2 FB_GND_SENSE R326 *0_4_NC
H16 FBVDDQ_AON_3 FB_GND_SENSE
V27 FBVDDQ_AON_4 J27 FB_CAL_PD_VDDQ R38 40.2/F_4
FBVDDQ_AON_5 FB_CAL_PD_VDDQ +1.35V_GFX
W 27
W 30 FBVDDQ_AON_6 H27 FB_CAL_PU_GND R37 40.2/F_4
FBVDDQ_AON_7 FB_CAL_PU_GND
W 33
FBVDDQ_AON_8 H25 FB_CAL_TERM_GND R40 60.4/F_4
FB_CALTERM_GND
PLACE CLOSE TO GPU BALLS
PROJECT : AM9A
1201 Size Document Number Rev
A0
N16P-GX - 2/5 (Memory)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
AH8
U11D
N16P-GX
IFPAB_PLLVDD
[IFPA/B_LVDS]
IFPA_TXC
AM6
AN6
19
IFPA_TXC_N AP3
AG8 IFPA_TXD0 AN3
IFPA_IOVDD IFPA_TXD0_N AN5
AG9 IFPA_TXD1 AM5
IFPB_IOVDD IFPA_TXD1_N AL6
IFPA_TXD2 AK6
IFPA_TXD2_N AJ6
AJ8 IFPA_TXD3 AH6
A A
IFPAB_RSET IFPA_TXD3_N
AJ9
IFPB_TXC AH9
IFPB_TXC_N AP6
IFPB_TXD4 AP5
IFPB_TXD4_N AM7
IFPB_TXD5 AL7
IFPB_TXD5_N AN8
IFPB_TXD6 AM8
IFPB_TXD6_N AK8 R85 *0_4_NC
IFPB_TXD7 AL8 1 2
IFPB_TXD7_N
AF7 AG3
IFPC_PLLVDD IFPC_AUX_I2CW_SCL AG2 +3.3V_RUN
AG7
[IFPC/D_TMDS]IFPC_AUX_I2CW_SDA_N AK1 +3V_GFX
IFPD_PLLVDD IFPC_L0 AJ1
IFPC_L0_N AJ3
IFPC_L1 +3V_AON
5
AJ2 U4
IFPC_L1_N AH3 2
IFPC_L2 AH4 4
IFPC_L2_N 3V3_MAIN_PW RGD 50,52
AG5 1
AF6 IFPC_L3 AG4
IFPC_IOVDD IFPC_L3_N
1
MC74VHC1G08DFT2G
2
AG6 AK3 R86
IFPD_IOVDD IFPD_AUX_I2CX_SCL AK2 10K/F_4 C393
IFPD_AUX_I2CX_SDA_N AM1 0.1U/16V/X7R_4
IFPD_L0
1
AM2
IFPD_L0_N
2
B AM3 B
AF8 IFPD_L1 AM4
IFPC_RSET IFPD_L1_N AL3
AN2 IFPD_RSET IFPD_L2 AL4
NC IFPD_L2_N AK4
GM107 GK107/GK208 IFPD_L3 AK5
IFPD_L3_N
AB8 AB3
IFPEF_PLLVDD IFPE_AUX_I2CY_SCL AB4
[IFPE/F_DP] IFPE_AUX_I2CY_SDA_N AD2
AC7 IFPE_L0 AD3
AC8 IFPE_IOVDD IFPE_L0_N AD1
IFPF_IOVDD IFPE_L1 AC1
IFPE_L1_N AC2
AD6 IFPE_L2 AC3
IFPEF_RSET IFPE_L2_N AC4
IFPE_L3
IFPE_L3_N
AC5
5/18 add 560 0hm
AF3
IFPF_AUX_I2CZ_SCL AF2 XTAL27_IN
IFPF_AUX_I2CZ_SDA_N AE3 XTAL27_OUT R456 560_4 XTAL27_OUT_R
IFPF_L0 Y2
AE4
IFPF_L0_N AF4 3 2
IFPF_L1 AF5 4 1
IFPF_L1_N AD4
IFPF_L2 AD5 27MHZ +-10PPM
IFPF_L2_N AG1
IFPF_L3 AF1 C649 C641
C IFPF_L3_N 22P/50V_4 22P/50V_4 C
AG10 AK9
DACA_VDD DACA_RED AL10
[DACA/B_CRT] DACA_GREEN
AP9
DACA_VREF
DACA_BLUE
AL9
5/25 change to 22P
AM9
AP8 DACA_HSYNC AN9
DACA_RSET DACA_VSYNC
R4 I2CA_SCL 1.8K/F_4 R309

I2CA_SCL R5 I2CA_SDA 1.8K/F_4 R65
I2CA_SDA
PLACE CLOSE TO GPU PLACE CLOSE TO BALLS
L3 HCB1005KF-330T30 NV_PLLVDD AD8

+1.05V_GFX PLLVDD
2
PLLVDD : 200mA
C330 C338
22U/6.3V_6 0.1U/16V/X7R_4
1
Reserve
+3V_AON
PLLVDD AE8
SP_PLLVDD
XTAL_OUTBUFF
C283 Close to AE8 R302 *10K_4_NC
H3 XTAL27_IN
D
L2 HCB1005KF-181T15
C284 Close to AD7 AD7 XTAL_IN H2 XTAL27_OUT
D
+1.05V_GFX VID_PLLVDD XTAL_OUT J4 XTAL_OUTBUFF RP6 2 1 10KX2
[XTAL IN] XTAL_OUTBUFF
2
C333 C337 H1 XTAL_SSIN 4 3

C629 C631 XTAL_SSIN
10U/6.3V_6 47U/6.3V_8 0.1U/16V/X7R_4 0.1U/16V/X7R_4
1

PROJECT : AM9A
PS: DG-07158-001 V04 PG58 Size Document Number Rev
A0
PLLVDD/SP_PLLVDD/VID_PLLVDD : N16P-GX - 3/5 (Display)
Trace routing for the above power rails to the GPU BGA must 12mil to 16mil wide Date: Monday, May 25, 2015 Sheet 19 of 57
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U11E +3V_AON 4.99K/F_4: CS24992FB26 RES CHIP 4.99K 1/16W +1%(0402)

N16P-GX
[MIOA]
STRAP0
DG : STUFF 49.9KΩ PU TO 3.3V_AON
10K/F_4: CS31002FB26 RES CHIP 10K 1/16W +1% (0402)
15K/F_4: CS31502FB24 RES CHIP 15K 1/16W +1% (0402)
20K/F_4: CS32002FB29 RES CHIP 20K 1/16W +-1%(0402) 20
2
24.9K/F_4: CS32492FB16 RES CHIP 24.9K 1/16W +-1%(0402)
R79 R80 R331 R334 R338 30.1K/F_4: CS33012FB18 RES CHIP 30.1K 1/16W +-1%(0402)
49.9K/F_4 *4.99K/F_4_NC *4.99K/F_4_NC *45.3K/F_4_NC *10K/F_4_NC 34.8K/F_4: CS33482FB22 RES CHIP 34.8K 1/16W +-1% (0402)
45.3K/F_4: CS34532FB18 RES CHIP 45.3K 1/16W +-1% (0402)
Logical Strap Bit Mapping
1
STRAP0
STRAP1
STRAP2
STRAP3
A STRAP4 A
R77 R78 R332 R335 R339

*4.99K/F_4_NC *4.99K/F_4_NC *4.99K/F_4_NC *4.99K/F_4_NC *45.3K/F_4_NC
Default: Sam 4Gb VRAM

Vendor Q : P/N Mfr. P/N ROM_SI
Hynix AKG5PWUTW14 H5GC4H24AJR-R0C
(1.35V) 0110 35K PD
Micron AKG5PW0TL01 EDW4032BABG-60-F
(1.35V) 0100 24.9K PD
Samsung AKG5PGDT500 K4G41325FC-HC03
[MIOB] (1.35V) 0011 20K PD
N16P-GX device ID= 0x139b
Reserve PU/PD for Debug +3V_GFX
Netname N16P-GX
ROM_SCLK 4.99K PD 0000
+3V_AON ROM_SO 4.99K PD 0000
R327 R68 R76 STRAP0 49.9K PU
B *4.99K/F_4_NC *4.99K/F_4_NC *10K/F_4_NC B
JTAG_TMS R290 *10K_4_NC
JTAG_TDI R289 *10K_4_NC
JTAG_TCK R294 *10K_4_NC ROM_SI
JTAG_TCK need PD 270 Ω to GND ROM_SO
ROM_SCLK +3V_AON GFx SMBus Isolation
JTAG_TRST# R291 10K_4
R328 R69 R74 +3V_GFX
4
2
20K/F_4 4.99K/F_4 4.99K/F_4
RP1
2.2KX2 Q10
2N7002KDW
5
3
1
GFX_SCL 4 3
JTAG_TCK AM10 P6 SMBCLK3 26,33
JTAG_TMS JTAG_TCK GPIO0 GC6_FB_EN 10
AP11 M3 TP17
JTAG_TDI AM11 JTAG_TMS [MISC_GPIO/I2C/JTAG/THER] GPIO1 L6 TP14 2
TP75 JTAG_TDO AP12 JTAG_TDI GPIO2 P5 TP16
JTAG_TRST# AN11 JTAG_TDO GPIO3 P7 TP12 GFX_SDA 1 6
JTAG_TRST_N GPIO4 L7 +3V_MAIN_EN SMBDAT3 26,33
GPIO5 GPU_EVENT# +3V_MAIN_EN 50
M7 GPU_EVENT# 10
1.8K/F_4 R67 I2CB_SCL R7 GPIO6 N8 TP13
1.8K/F_4 R66 I2CB_SDA R6 I2CB_SCL GK107/GK208/GF117 GPIO7
I2CB_SDA L3 +3V_AON
GPIO8 SYS_PEX_RST_MON# 17
NC 10KX2
1.8K/F_4 R308 I2CC_SCL R2 VGA_OVT# 1 2 RP7
1.8K/F_4 R307 I2CC_SDA R3 I2CC_SCL M2 ALERT ALERT 3 4
C I2CC_SDA GPIO9 L1 MEM_VREF_CTL C
GPIO10 MEM_VREF_CTL 22,23,24,25
M5
GFX_SCL GPIO11 VGA_PW R_LEVEL DGPU_PW M_VID 50 GPU_EVENT#
T4 N3 VGA_PW R_LEVEL 26 R323 10K_4
GFX_SDA T3 I2CS_SCL GPIO12 M4 DGPU_PSI
I2CS_SDA GPIO13 DGPU_PSI 50 VGA_PW R_LEVEL
N4 R343 100K_4
GPIO14 P2
K4 GPIO15 R8 +3V_MAIN_EN R313 10K_4
K3 THERMDN GPIO16 M6
THERMDP GPIO17 R1 SYS_PEX_RST_MON# R319 10K_4
GPIO18 P3
GPIO19 P4 GPU_PEX_RST_HOLD#R310 10K_4
GPIO20 P1
GPIO21 GPU_PEX_RST_HOLD# 17 DGPU_PSI R316 10K_4
STRAP0 J2
STRAP0 [MISC2_ROM]
ROM_SCLK
ROM_CS_N
H4
H6
ROM_SCLK
0430 add 1.05V_GFX_PW RGD R454 10K_4
STRAP1 J7 H5 ROM_SI
STRAP2 J6 STRAP1 ROM_SI H7 ROM_SO
STRAP3 J5 STRAP2 ROM_SO
STRAP3
STRAP4 J3
STRAP4 1201 DG-07158--001 V05 PG182
MEM_VREF_CTL R311 100K_4
L2 GPU_BUFRST R312 *10K_4_NC
MULTISTRAP_REF_GND J1 BUFRST_N GC6_FB_EN R353 10K_4
MULTISTRAP_REF_GND
GK107/GF117 GM107/GM108/GK208
M1 VGA_OVT#
R305 GPIO8 OVERT
D 40.2K/F_4 D
GC6_FB_EN 1
D14
1.35V_GFX_EN
3
1.35V_GFX_EN 51
1

52 1.05V_GFX_PW RGD 2
R351
BAT54CW 100K_4
PROJECT : AM9A
2

N16P-GX - 4/5 (MISC) A0

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
VDD/XVDD : 43A
+VGACORE
A2
AA17
U11G
N16P-GX
GND_1
[GPU GND]
GND_101
D2
D31
+VGACORE
21
U11F +VGACORE AA18 GND_2 GND_102 D33
N16P-GX AA20 GND_3 GND_103 E10
AA12 U1 AA22 GND_4 GND_104 E22 C303 1U/6.3V_4
AA14 VDD_001 XVDD_001 U2 AB12 GND_5 GND_105 E25 C230 1U/6.3V_4
AA16 VDD_002 [GPU VDD] XVDD_002 U3 AB14 GND_6 GND_106 E5
AA19 VDD_003 XVDD_003 U4 AB16 GND_7 GND_107 E7
C315 1U/6.3V_4 PLACE UNDER GPU
C304 1U/6.3V_4
AA21 VDD_004 XVDD_004 U5 AB19 GND_8 GND_108 F28 C243 1U/6.3V_4
AA23 VDD_005 XVDD_005 U6 AB2 GND_9 GND_109 F7 C201 1U/6.3V_4
A A
AB13 VDD_006 XVDD_006 U7 AB21 GND_10 GND_110 G10 C229 1U/6.3V_4
AB15 VDD_007 XVDD_007 U8 A33 GND_11 GND_111 G13 C308 1U/6.3V_4
AB17 VDD_008 XVDD_008 V1 AB23 GND_12 GND_112 G16
AB18 VDD_009 XVDD_009 V2 AB28 GND_13 GND_113 G19 C311 4.7U/6.3V/X6S_6
AC12 VDD_012 XVDD_012 V5 AB5 GND_16 GND_116 G25 C379 4.7U/6.3V/X6S_6
AC14 VDD_013 XVDD_013 V6 AB7 GND_17 GND_117 G28 C209 4.7U/6.3V/X6S_6
AC16 VDD_014 XVDD_014 V7 AC13 GND_18 GND_118 G3 C312 4.7U/6.3V/X6S_6
AC19 VDD_015 XVDD_015 V8 AC15 GND_19 GND_119 G30 C210 4.7U/6.3V/X6S_6
AC21 VDD_016 XVDD_016 W2 AC17 GND_20 GND_120 G32 C207 4.7U/6.3V/X6S_6
AC23 VDD_017 XVDD_017 W3 AC18 GND_21 GND_121 G33 C639 4.7U/6.3V/X6S_6
M12 VDD_018 XVDD_018 W4 AA13 GND_22 GND_122 G5 C208 4.7U/6.3V/X6S_6
M14 VDD_019 XVDD_019 W5 AC20 GND_23 GND_123 G7 C224 4.7U/6.3V/X6S_6
M16 VDD_020 XVDD_020 W7 AC22 GND_24 GND_124 K2 C314 4.7U/6.3V/X6S_6
M19 VDD_021 XVDD_021 W8 AE2 GND_25 GND_125 K28 C222 4.7U/6.3V/X6S_6
M21 VDD_022 XVDD_022 Y4 AE28 GND_26 GND_126 K30 C321 4.7U/6.3V/X6S_6
M23 VDD_023 XVDD_026 Y5 AE30 GND_27 GND_127 K32 C240 4.7U/6.3V/X6S_6
N13 VDD_024 XVDD_027 Y6 AE32 GND_28 GND_128 K33
N15 VDD_025 XVDD_028 Y7 AE33 GND_29 GND_129 K5 C376 2 1 22U/6.3V_8
N17 VDD_026 XVDD_029 Y8 AE5 GND_30 GND_130 K7 2 1
N18 VDD_027 XVDD_030 AE7 GND_31 GND_131 M13
C377
C373 2 1
22U/6.3V_8
22U/6.3V_8
PLACE NEAR GPU
N20 VDD_028 AH10 GND_32 GND_132 M15 C374 2 1 22U/6.3V_8
N22 VDD_029 AA15 GND_33 GND_133 M17 C372 2 1 22U/6.3V_8
P12 VDD_030 AH13 GND_34 GND_134 M18 C375 2 1 22U/6.3V_8
P14 VDD_031 AH16 GND_35 GND_135 M20
P16 VDD_032 AH19 GND_36 GND_136 M22
P19 VDD_033 AH2 GND_37 GND_137 N12 C644 2 1 22U/6.3V_6
B P21 VDD_034 AH22 GND_38 GND_138 N14 C658 4.7U/6.3V/X6S_6 B
P23 VDD_035 AH24 GND_39 GND_139 N16 C305 4.7U/6.3V/X6S_6
R13 VDD_036 AH28 GND_40 GND_140 N19 C204 4.7U/6.3V/X6S_6
R18 VDD_039 AH32 GND_43 GND_143 N23
R20 VDD_040 AH33 GND_44 GND_144 N28 1 2
R22 VDD_041 AH5 GND_45 GND_145 N30 PC60 330U/2V/E9_7343
+
T12 VDD_042 AH7 GND_46 GND_146 N32
T14 VDD_043 AJ7 GND_47 GND_147 N33
T16 VDD_044 AK10 GND_48 GND_148 N5
T19 VDD_045 AK7 GND_49 GND_149 N7
T21 VDD_046 AL12 GND_50 GND_150 P13
T23 VDD_047 AL14 GND_51 GND_151 P15
U13 VDD_048 AL15 GND_52 GND_152 P17
U15 VDD_049 AL17 GND_53 GND_153 P18
U17 VDD_050 AL18 GND_54 GND_154 P20
U18 VDD_051 AL2 GND_55 GND_155 P22
U20 VDD_052 AL20 GND_56 GND_156 R12
U22 VDD_053 AL21 GND_57 GND_157 R14
V13 VDD_054 AL23 GND_58 GND_158 R16
V15 VDD_055 AL24 GND_59 GND_159 R19
V17 VDD_056 AL26 GND_60 GND_160 R21
V18 VDD_057 AL28 GND_61 GND_161 R23
V20 VDD_058 AL30 GND_62 GND_162 T13
V22 VDD_059 AL32 GND_63 GND_163 T15
W12 VDD_060 AL33 GND_64 GND_164 T17
W14 VDD_061 AL5 GND_65 GND_165 T18
W16 VDD_062 AM13 GND_66 GND_166 T2
C W19 VDD_063 AM16 GND_67 GND_167 T20 C
W21 VDD_064 AM19 GND_68 GND_168 T22
W23 VDD_065 AM22 GND_69 GND_169 AG11
Y13 VDD_066 AM25 GND_70 GND_170 T28
Y15 VDD_067 AN1 GND_71 GND_171 T32
Y18 VDD_068 AN10 GND_72 GND_172 T5
Y17 VDD_069 AN13 GND_73 GND_173 T7
Y20 VDD_070 AN16 GND_74 GND_174 U12
Y22 VDD_071 AN19 GND_75 GND_175 U14
VDD_072 AN22 GND_76 GND_176 U16
AN25 GND_77 GND_177 U19
AN30 GND_78 GND_178 U21
AN34 GND_79 GND_179 U23
AN4 GND_80 GND_180 V12
AN7 GND_81 GND_181 V14
AP2 GND_82 GND_182 V16
AP33 GND_83 GND_183 V19
B1 GND_84 GND_184 V21
B10 GND_85 GND_185 V23
B22 GND_86 GND_186 W13
B25 GND_87 GND_187 W15
B28 GND_88 GND_188 W17
B31 GND_89 GND_189 W18
B34 GND_90 GND_190 W20
B4 GND_91 GND_191 W22
B7 GND_92 GND_192 W28
C10 GND_93 GND_193 Y12
C13 GND_94 GND_194 Y14
C19 GND_95 GND_195 Y16
D
C22 GND_96 GND_196 Y19
D
C25 GND_97 GND_197 Y21

C28 GND_98 GND_198 Y23
C7 GND_99 GND_199 AH11
GND_100 GND_200

C16
GND_OPT_1
W32
GND_OPT_2
PROJECT : AM9A
A0
N16P-GX - 5/5 (Power)
1 2 3 4 5 6 7 8
5 4 3 2 1
CHANNEL A: 2G/4G GDDR5 VREF_VMA1_MOS

22
VMA_DQ[63:0] +1.35V_GFX +1.35V_GFX
18,23 VMA_DQ[63:0]
FBA_CMD[31:0]
HYU 256Mx16, H5GC4H24AJR-R0C QBC PN：
： AKG5PWUTW14
18,23 FBA_CMD[31:0] MIC 256Mx16, EDW4032BABG-60-F QBC PN：
： AKG5PW0TL01
2
18,23 FBA_DBI[7:0]
FBA_DBI[7:0] SAM 256Mx16, K4G41325FC-HC03 QBC PN：
： AKG5PGDT500 R259 R11 R254 R9
549/F_4 931/F_4 *549/F_4_NC *931/F_4_NC
FBA_EDC[7:0]
18,23 FBA_EDC[7:0]
1
VREFC_VMA1 VREFD_VMA1
Channel 0
1
R261 C38 R255 C23
<0-7,16-23> Channel 0
D 1.33K/F_4 820p/50V_4 *1.33K/F_4_NC *820p/50V_4_NC D
MF=0 Non-mirrored <8-15,24-31>
2
+1.35V_GFX MF=1 Mirrored +1.35V_GFX
M5 M1
M2 B1 M2 B1
M4 DQ31 | DQ7 VDDQ-B1 B3 M4 DQ31 | DQ7 VDDQ-B1 B3
N2 DQ30 | DQ6 VDDQ-B3 B12 N2 DQ30 | DQ6 VDDQ-B3 B12
VREF_VMA1_MOS
T2 DQ28 | DQ4 VDDQ-B14 D1 T2 DQ28 | DQ4 VDDQ-B14 D1
T4 DQ27 | DQ3 VDDQ-D1 D3 T4 DQ27 | DQ3 VDDQ-D1 D3
U2 DQ26 | DQ2 VDDQ-D3 D12 U2 DQ26 | DQ2 VDDQ-D3 D12
VMA_DQ23 M13 DQ24 | DQ0 VDDQ-D14 E5 VMA_DQ15 M13 DQ24 | DQ0 VDDQ-D14 E5
VMA_DQ22 DQ23 | DQ15 VDDQ-E5 VMA_DQ14 DQ23 | DQ15 VDDQ-E5
3
M11 E10 M11 E10
QD16~23 QD8~15
VMA_DQ21 N13 DQ22 | DQ14 VDDQ-E10 F1 VMA_DQ13 N13 DQ22 | DQ14 VDDQ-E10 F1
VMA_DQ20 N11 DQ21 | DQ13 VDDQ-F1 F3 VMA_DQ12 N11 DQ21 | DQ13 VDDQ-F1 F3 Q1
VMA_DQ19 T13 DQ20 | DQ12 VDDQ-F3 F12 VMA_DQ11 T13 DQ20 | DQ12 VDDQ-F3 F12 2 MEM_VREF_CTL
VMA_DQ18 T11 DQ19 | DQ11 VDDQ-F12 F14 VMA_DQ10 T11 DQ19 | DQ11 VDDQ-F12 F14 MEM_VREF_CTL 20,23,24,25
VMA_DQ17 U13 DQ18 | DQ10 VDDQ-F14 G2 VMA_DQ9 U13 DQ18 | DQ10 VDDQ-F14 G2
VMA_DQ16 U11 DQ17 | DQ9 VDDQ-G2 G13 VMA_DQ8 U11 DQ17 | DQ9 VDDQ-G2 G13 2N7002K
F13 DQ16 | DQ8 VDDQ-G13 H3 F13 DQ16 | DQ8 VDDQ-G13 H3
DQ15 | DQ23 VDDQ-H3 DQ15 | DQ23 VDDQ-H3
1
F11 H12 F11 H12
E13 DQ14 | DQ22 VDDQ-H12 K3 E13 DQ14 | DQ22 VDDQ-H12 K3
E11 DQ13 | DQ21 VDDQ-K3 K12 E11 DQ13 | DQ21 VDDQ-K3 K12
B13 DQ12 | DQ20 VDDQ-K12 L2 B13 DQ12 | DQ20 VDDQ-K12 L2
B11 DQ11 | DQ19 VDDQ-L2 L13 B11 DQ11 | DQ19 VDDQ-L2 L13
A13 DQ10 | DQ18 VDDQ-L13 M1 A13 DQ10 | DQ18 VDDQ-L13 M1
DQ9 | DQ17 VDDQ-M1 DQ9 | DQ17 VDDQ-M1
A11
DQ8 | DQ16 VDDQ-M3
M3 A11
DQ8 | DQ16 VDDQ-M3
M3
DG-07158-001 V05 PG49
VMA_DQ7 F2
DQ7 | DQ31 VDDQ-M12
M12 VMA_DQ31 F2
DQ7 | DQ31 VDDQ-M12
M12
Please close to M2 1127
VMA_DQ6 F4 M14 VMA_DQ30 F4 M14
QD0~7 QD24~31
VMA_DQ5 E2 DQ6 | DQ30 VDDQ-M14 N5 VMA_DQ29 E2 DQ6 | DQ30 VDDQ-M14 N5
DQ5 | DQ29 VDDQ-N5 DQ5 | DQ29 VDDQ-N5
Under M2
VMA_DQ4 E4 N10 VMA_DQ28 E4 N10 +1.35V_GFX
C DQ4 | DQ28 VDDQ-N10 DQ4 | DQ28 VDDQ-N10 C
VMA_DQ3
VMA_DQ2
B2
B4 DQ3 | DQ27
DQ2 | DQ26
VDDQ-P1
VDDQ-P3
P1
P3
VMA_DQ27
VMA_DQ26
B2
B4 DQ3 | DQ27
DQ2 | DQ26
VDDQ-P1
VDDQ-P3
P1
P3
+1.35V_GFX
Under M1 C26 0.1U/16V/X7R_4
VMA_DQ1 A2 P12 VMA_DQ25 A2 P12 C567 0.1U/16V/X7R_4 C33 0.1U/16V/X7R_4
VMA_DQ0 A4 DQ1 | DQ25 VDDQ-P12 P14 VMA_DQ24 A4 DQ1 | DQ25 VDDQ-P12 P14 C555 0.1U/16V/X7R_4 C20 0.1U/16V/X7R_4
DQ0 | DQ24 VDDQ-P14 T1 DQ0 | DQ24 VDDQ-P14 T1 C558 0.1U/16V/X7R_4 C43 0.1U/16V/X7R_4
VDDQ-T1 T3 VDDQ-T1 T3 C552 0.1U/16V/X7R_4 C14 0.1U/16V/X7R_4
VDDQ-T14 VDDQ-T14 C550 0.1U/16V/X7R_4 C24 0.1U/16V/X7R_4
FBA_CMD9 J5 FBA_CMD9 J5 C572 0.1U/16V/X7R_4 C15 0.1U/16V/X7R_4
FBA_CMD6 K4 RFU/A12/NC C5 FBA_CMD10 K4 RFU/A12/NC C5 C566 0.1U/16V/X7R_4 C22 0.1U/16V/X7R_4
FBA_CMD7 K5 A7/A8 | A0/A10 VDD-C5 C10 FBA_CMD11 K5 A7/A8 | A0/A10 VDD-C5 C10 C570 0.1U/16V/X7R_4
FBA_CMD4 K10 A6/A11 | A1/A9 VDD-C10 D11 FBA_CMD1 K10 A6/A11 | A1/A9 VDD-C10 D11 C35 1U/6.3V_4
FBA_CMD3 K11 A5/BA1 | A3/BA3 VDD-D11 G1 FBA_CMD2 K11 A5/BA1 | A3/BA3 VDD-D11 G1 C553 1U/6.3V_4 C18 1U/6.3V_4
FBA_CMD1 H10 A4/BA2 | A2/BA0 VDD-G1 G4 FBA_CMD4 H10 A4/BA2 | A2/BA0 VDD-G1 G4 C568 1U/6.3V_4 C16 1U/6.3V_4
FBA_CMD2 H11 A3/BA3 | A5/BA1 VDD-G4 G11 FBA_CMD3 H11 A3/BA3 | A5/BA1 VDD-G4 G11 C551 1U/6.3V_4 C28 1U/6.3V_4
FBA_CMD11 H5 A2 /BA0 | A4/BA2 VDD-G11 G14 FBA_CMD7 H5 A2 /BA0 | A4/BA2 VDD-G11 G14 C560 1U/6.3V_4
A1/A9 | A6/A11 VDD-G14 A1/A9 | A6/A11 VDD-G14
Close to M2
FBA_CMD10 H4 L1 FBA_CMD6 H4 L1
A0/A10 | A7/A8 VDD-L1 A0/A10 | A7/A8 VDD-L1
VDD-L4
VDD-L11
L4
L11 VDD-L4
VDD-L11
L4
L11 Close to M1 C19 4.7U/6.3V_4
L14 L14 C562 4.7U/6.3V_4 C36 4.7U/6.3V_4
VMA_WCK01 D4 VDD-L14 P11 VMA_WCK23 D4 VDD-L14 P11 C554 4.7U/6.3V_4
18 VMA_WCK01 WCK01 | WCK23 VDD-P11 WCK01 | WCK23 VDD-P11
VMA_WCK01# D5 R5 VMA_WCK23# D5 R5 C31 10U/6.3V_6
18 VMA_WCK01# WCK01# | WCK23# VDD-R5 WCK01# | WCK23# VDD-R5
R10 R10 C538 10U/6.3V_6 C5 10U/6.3V_6
VMA_WCK23 P4 VDD-R10 VMA_WCK01 P4 VDD-R10 C564 10U/6.3V_6
18 VMA_WCK23 WCK23 | WCK01 WCK23 | WCK01
VMA_WCK23# P5 VMA_WCK01# P5
18 VMA_WCK23# WCK23# | WCK01# WCK23# | WCK01#
A1 A1
R2 VSSQ-A1 A3 R2 VSSQ-A1 A3
FBA_EDC2 R13 EDC3 | EDC0 VSSQ-A3 A12 FBA_EDC1 R13 EDC3 | EDC0 VSSQ-A3 A12
C13 EDC2 | EDC1 VSSQ-A12 A14 C13 EDC2 | EDC1 VSSQ-A12 A14
FBA_EDC0 C2 EDC1 | EDC2 VSSQ-A14 C1 FBA_EDC3 C2 EDC1 | EDC2 VSSQ-A14 C1
EDC0 | EDC3 VSSQ-C1 C3 EDC0 | EDC3 VSSQ-C1 C3
P2 VSSQ-C3 C4 P2 VSSQ-C3 C4
FBA_DBI2 P13 DBI3# | DBI0# VSSQ-C4 C11 FBA_DBI1 P13 DBI3# | DBI0# VSSQ-C4 C11
D13 DBI2 #| DBI1# VSSQ-C11 C12 D13 DBI2 #| DBI1# VSSQ-C11 C12
FBA_DBI0 D2 DBI1# | DBI2# VSSQ-C12 C14 FBA_DBI3 D2 DBI1# | DBI2# VSSQ-C12 C14
B B
DBI0# | DBI3# VSSQ-C14 E1 DBI0# | DBI3# VSSQ-C14 E1
VSSQ-E1 E3 VSSQ-E1 E3
FBA_CMD12 G3 VSSQ-E12 E14 VMA_CLK0 FBA_CMD15 G3 VSSQ-E12 E14
FBA_CMD15 L3 RAS# | CAS# VSSQ-E14 F5 FBA_CMD12 L3 RAS# | CAS# VSSQ-E14 F5
CAS# | RAS# VSSQ-F5 F10 CAS# | RAS# VSSQ-F5 F10
VSSQ-F10 H2 R13 VSSQ-F10 H2
FBA_CMD14 J3 VSSQ-H2 H13 FBA_CMD14 J3 VSSQ-H2 H13
CKE# VSSQ-H13 80.6/F_4 CKE# VSSQ-H13
VMA_CLK0# J11 K2 VMA_CLK0# J11 K2
18 VMA_CLK0# CK# VSSQ-K2 CK# VSSQ-K2
VMA_CLK0 J12 K13 VMA_CLK0 J12 K13
18 VMA_CLK0 CK VSSQ-K13 CK VSSQ-K13
M5 VMA_CLK0# M5
VSSQ-M5 M10 VSSQ-M5 M10
FBA_CMD0 G12 VSSQ-M10 N1 FBA_CMD5 G12 VSSQ-M10 N1
FBA_CMD5 L12 CS# | WE# VSSQ-N1 N3 FBA_CMD0 L12 CS# | WE# VSSQ-N1 N3
WE# | CS# VSSQ-N3 N12 WE# | CS# VSSQ-N3 N12
VSSQ-N12 N14 VSSQ-N12 N14
R1 120/F_4 FBA_ZQ0 J13 VSSQ-N14 R1 R256 120/F_4 FBA_ZQ1 J13 VSSQ-N14 R1
GND SEN_A ZQ VSSQ-R1 GND SEN_A ZQ VSSQ-R1
R249 1K_4 J10 R3 J10 R3
SEN VSSQ-R3 R4 SEN VSSQ-R3 R4
VSSQ-R4 R11 VSSQ-R4 R11
FBA_CMD13 J2 VSSQ-R11 R12 FBA_CMD13 J2 VSSQ-R11 R12
R7 1K_4 J1 RESET# VSSQ-R12 R14 R17 1K_4 J1 RESET# VSSQ-R12 R14
GND MF VSSQ-R14 +1.35V_GFX MF VSSQ-R14
U1 U1
VSSQ-V1 U3 VSSQ-V1 U3
A5 VSSQ-V14 A5 VSSQ-V14
U5 Vpp,NC U5 Vpp,NC
Vpp,NC1 B5 Vpp,NC1 B5
VREFD_VMA1 A10 VSS-B5 B10 VREFD_VMA1 A10 VSS-B5 B10
U10 VREFD1 VSS-B10 D10 U10 VREFD1 VSS-B10 D10
VREFD2 VSS-D10 G5 VREFD2 VSS-D10 G5
VREFD_VMA1 0.4MM=16mils VSS-G5 G10 VSS-G5 G10
VSS-G10 H1 VSS-G10 H1
VSS-H1 H14 VSS-H1 H14
A VSS-H14 K1 VSS-H14 K1 A
VREFC_VMA1 J14 VSS-K1 K14 VREFC_VMA1 J14 VSS-K1 K14
VREFC VSS-K14 L5 VREFC VSS-K14 L5
VREFC_VMA1 0.4MM=16mils VSS-L5 L10 VSS-L5 L10
VSS-L10 P10 VSS-L10 P10
FBA_CMD8 J4 VSS-P10 T5 FBA_CMD8 J4 VSS-P10 T5
ABI# VSS-T5 T10 ABI# VSS-T5 T10
VSS-T10 VSS-T10

GDDR5 M5 GDDR5 M1
GND GND
+1.35V_GFX
FBA_CMD14 R253 10K_4

CKE* is strap pin to set ODT value of memory chip PROJECT : AM9A
FBA_CMD13 R8 10K_4 Size Document Number Rev
RST PD place @ the end of daisy-chain. N16P-GX_GDDR5 - A1 A0

5 4 3 2 1
5 4 3 2 1
18,22 VMA_DQ[63:0]
VMA_DQ[63:0]
CHANNEL A: 2G/4G GDDR5 23
Channel 1
FBA_CMD[31:0]
18,22 FBA_CMD[31:0]
FBA_DBI[7:0]
Channel 1
<40-47,56-63>
18,22 FBA_DBI[7:0]
<32-39,48-55>
FBA_EDC[7:0]
18,22 FBA_EDC[7:0]
MF=0 Non-mirrored MF=1 Mirrored

+1.35V_GFX +1.35V_GFX VREF_VMA2_MOS
M2 M6
M2 B1 M2 B1 +1.35V_GFX +1.35V_GFX
D M4 DQ31 | DQ7 VDDQ-B1 B3 M4 DQ31 | DQ7 VDDQ-B1 B3 D
DQ29 | DQ5 VDDQ-B12 DQ29 | DQ5 VDDQ-B12
2
N4 B14 N4 B14
T2 DQ28 | DQ4 VDDQ-B14 D1 T2 DQ28 | DQ4 VDDQ-B14 D1 R257 R10 R2 R250
T4 DQ27 | DQ3 VDDQ-D1 D3 T4 DQ27 | DQ3 VDDQ-D1 D3 549/F_4 931/F_4 *549/F_4_NC *931/F_4_NC
QD48~55
DQ24 | DQ0 VDDQ-D14 DQ24 | DQ0 VDDQ-D14
1
VMA_DQ55 M13 E5 VMA_DQ47 M13 E5 VREFC_VMA2 VREFD_VMA2
VMA_DQ54 M11 DQ23 | DQ15 VDDQ-E5 E10 VMA_DQ46 M11 DQ23 | DQ15 VDDQ-E5 E10
VMA_DQ53 N13 DQ22 | DQ14 VDDQ-E10 F1 VMA_DQ45 N13 DQ22 | DQ14 VDDQ-E10 F1
QD40~47
VMA_DQ52 DQ21 | DQ13 VDDQ-F1 VMA_DQ44 DQ21 | DQ13 VDDQ-F1
1
N11 F3 N11 F3 R258 C34 R3 C544
VMA_DQ51 T13 DQ20 | DQ12 VDDQ-F3 F12 VMA_DQ43 T13 DQ20 | DQ12 VDDQ-F3 F12 1.33K/F_4 820p/50V_4 *1.33K/F_4_NC *820p/50V_4_NC
VMA_DQ50 T11 DQ19 | DQ11 VDDQ-F12 F14 VMA_DQ42 T11 DQ19 | DQ11 VDDQ-F12 F14
DQ18 | DQ10 VDDQ-F14 DQ18 | DQ10 VDDQ-F14
2
VMA_DQ49 U13 G2 VMA_DQ41 U13 G2
VMA_DQ48 U11 DQ17 | DQ9 VDDQ-G2 G13 VMA_DQ40 U11 DQ17 | DQ9 VDDQ-G2 G13
F11 DQ15 | DQ23 VDDQ-H3 H12 F11 DQ15 | DQ23 VDDQ-H3 H12
VREF_VMA2_MOS
A13 DQ10 | DQ18 VDDQ-L13 M1 A13 DQ10 | DQ18 VDDQ-L13 M1
A11 DQ9 | DQ17 VDDQ-M1 M3 A11 DQ9 | DQ17 VDDQ-M1 M3
QD32~39
VMA_DQ39 F2 DQ8 | DQ16 VDDQ-M3 M12 VMA_DQ63 F2 DQ8 | DQ16 VDDQ-M3 M12
VMA_DQ38 F4 DQ7 | DQ31 VDDQ-M12 M14 VMA_DQ62 F4 DQ7 | DQ31 VDDQ-M12 M14
QD56~63
VMA_DQ37 E2 DQ6 | DQ30 VDDQ-M14 N5 VMA_DQ61 E2 DQ6 | DQ30 VDDQ-M14 N5
VMA_DQ36 E4 DQ5 | DQ29 VDDQ-N5 N10 VMA_DQ60 E4 DQ5 | DQ29 VDDQ-N5 N10
VMA_DQ35 DQ4 | DQ28 VDDQ-N10 VMA_DQ59 DQ4 | DQ28 VDDQ-N10
3
B2 P1 B2 P1
VMA_DQ34 B4 DQ3 | DQ27 VDDQ-P1 P3 VMA_DQ58 B4 DQ3 | DQ27 VDDQ-P1 P3
VMA_DQ33 A2 DQ2 | DQ26 VDDQ-P3 P12 VMA_DQ57 A2 DQ2 | DQ26 VDDQ-P3 P12 Q2
VMA_DQ32 A4 DQ1 | DQ25 VDDQ-P12 P14 VMA_DQ56 A4 DQ1 | DQ25 VDDQ-P12 P14 2 MEM_VREF_CTL
DQ0 | DQ24 VDDQ-P14 T1 DQ0 | DQ24 VDDQ-P14 T1 MEM_VREF_CTL 20,22,24,25
VDDQ-T1 T3 VDDQ-T1 T3
VDDQ-T3 T12 VDDQ-T3 T12 2N7002K
VDDQ-T14 VDDQ-T14
1
C C
FBA_CMD25 J5 FBA_CMD25 J5
FBA_CMD22 K4 RFU/A12/NC C5 FBA_CMD26 K4 RFU/A12/NC C5
FBA_CMD23 K5 A7/A8 | A0/A10 VDD-C5 C10 FBA_CMD27 K5 A7/A8 | A0/A10 VDD-C5 C10
FBA_CMD20 K10 A6/A11 | A1/A9 VDD-C10 D11 FBA_CMD17 K10 A6/A11 | A1/A9 VDD-C10 D11
A5/BA1 | A3/BA3 VDD-D11 A5/BA1 | A3/BA3 VDD-D11
FBA_CMD19 K11 G1 FBA_CMD18 K11 G1
FBA_CMD17 H10 A4/BA2 | A2/BA0 VDD-G1 G4 FBA_CMD20 H10 A4/BA2 | A2/BA0 VDD-G1 G4
FBA_CMD18 H11 A3/BA3 | A5/BA1 VDD-G4 G11 FBA_CMD19 H11 A3/BA3 | A5/BA1 VDD-G4 G11
FBA_CMD27 H5 A2 /BA0 | A4/BA2 VDD-G11 G14 FBA_CMD23 H5 A2 /BA0 | A4/BA2 VDD-G11 G14 +1.35V_GFX
A1/A9 | A6/A11 VDD-G14 A1/A9 | A6/A11 VDD-G14
FBA_CMD26 H4
A0/A10 | A7/A8 VDD-L1
VDD-L4
L1
L4
FBA_CMD22 H4
A0/A10 | A7/A8 VDD-L1
VDD-L4
L1
L4 Under M3
L11 L11 C25 0.1U/16V/X7R_4
VDD-L11 L14 VDD-L11 L14 C11 0.1U/16V/X7R_4
VMA_WCK45 D4 VDD-L14 P11 VMA_WCK67 D4 VDD-L14 P11 C12 0.1U/16V/X7R_4
18 VMA_WCK45 WCK01 | WCK23 VDD-P11 WCK01 | WCK23 VDD-P11
VMA_WCK45# D5 R5 VMA_WCK67# D5 R5 C29 0.1U/16V/X7R_4
18 VMA_WCK45# WCK01# | WCK23# VDD-R5 WCK01# | WCK23# VDD-R5
R10 R10 C9 0.1U/16V/X7R_4
VMA_WCK67 P4 VDD-R10 VMA_WCK45 P4 VDD-R10 C39 0.1U/16V/X7R_4
18 VMA_WCK67 WCK23 | WCK01 WCK23 | WCK01
VMA_WCK67# P5 VMA_WCK45# P5 C32 0.1U/16V/X7R_4
18 VMA_WCK67# WCK23# | WCK01# WCK23# | WCK01#
A1 A1 C8 0.1U/16V/X7R_4
R2 VSSQ-A1 A3 R2 VSSQ-A1 A3 C21 0.1U/16V/X7R_4
FBA_EDC6 R13 EDC3 | EDC0 VSSQ-A3 A12 FBA_EDC5 R13 EDC3 | EDC0 VSSQ-A3 A12 C42 0.1U/16V/X7R_4
FBA_EDC4 C2 EDC1 | EDC2 VSSQ-A14 C1 FBA_EDC7 C2 EDC1 | EDC2 VSSQ-A14 C1 C27 1U/6.3V_4
EDC0 | EDC3 VSSQ-C1 C3 EDC0 | EDC3 VSSQ-C1 C3 C10 1U/6.3V_4
P2 VSSQ-C3 C4 P2 VSSQ-C3 C4 C1 1U/6.3V_4
FBA_DBI6 P13 DBI3# | DBI0# VSSQ-C4 C11 FBA_DBI5 P13 DBI3# | DBI0# VSSQ-C4 C11 C7 1U/6.3V_4
D13 DBI2 #| DBI1# VSSQ-C11 C12 D13 DBI2 #| DBI1# VSSQ-C11 C12
DBI1# | DBI2# VSSQ-C12 DBI1# | DBI2# VSSQ-C12
FBA_DBI4 D2
DBI0# | DBI3# VSSQ-C14
VSSQ-E1
C14
E1
FBA_DBI7 D2
DBI0# | DBI3# VSSQ-C14
VSSQ-E1
C14
E1 Close to M3
E3 E3 C30 4.7U/6.3V_4
VSSQ-E3 E12 VSSQ-E3 E12 C6 4.7U/6.3V_4
FBA_CMD28 G3 VSSQ-E12 E14 FBA_CMD31 G3 VSSQ-E12 E14
FBA_CMD31 L3 RAS# | CAS# VSSQ-E14 F5 VMA_CLK1 FBA_CMD28 L3 RAS# | CAS# VSSQ-E14 F5 C2 10U/6.3V_6
CAS# | RAS# VSSQ-F5 F10 CAS# | RAS# VSSQ-F5 F10 C3 10U/6.3V_6
VSSQ-F10 H2 VSSQ-F10 H2
FBA_CMD30 J3 VSSQ-H2 H13 FBA_CMD30 J3 VSSQ-H2 H13
VMA_CLK1# J11 CKE# VSSQ-H13 K2 R14 VMA_CLK1# J11 CKE# VSSQ-H13 K2
B 18 VMA_CLK1# CK# VSSQ-K2 CK# VSSQ-K2
B
VMA_CLK1 J12 K13 80.6/F_4 VMA_CLK1 J12 K13
18 VMA_CLK1 CK VSSQ-K13 CK VSSQ-K13
M5 M5
VSSQ-M5 M10 VMA_CLK1# VSSQ-M5 M10
VSSQ-M10 VSSQ-M10
FBA_CMD16 G12 N1 FBA_CMD21 G12 N1
FBA_CMD21 L12 CS# | WE# VSSQ-N1 N3 FBA_CMD16 L12 CS# | WE# VSSQ-N1 N3
WE# | CS# VSSQ-N3 N12 WE# | CS# VSSQ-N3 N12
VSSQ-N12 N14 VSSQ-N12 N14 +1.35V_GFX
VSSQ-N14 VSSQ-N14
R12
R4
120/F_4
1K_4
J13
SEN_B J10 ZQ
SEN
VSSQ-R1
VSSQ-R3
R1
R3
R260 120/F_4
SEN_B
J13
J10 ZQ
SEN
VSSQ-R1
VSSQ-R3
R1
R3 Under M4
R4 R4 C563 0.1U/16V/X7R_4
VSSQ-R4 R11 VSSQ-R4 R11 C565 0.1U/16V/X7R_4
FBA_CMD29 J2 VSSQ-R11 R12 FBA_CMD29 J2 VSSQ-R11 R12 C546 0.1U/16V/X7R_4
J1 RESET# VSSQ-R12 R14 J1 RESET# VSSQ-R12 R14 C547 0.1U/16V/X7R_4
MF VSSQ-R14 +1.35V_GFX MF VSSQ-R14
R6 1K_4 U1 R252 1K_4 U1 C534 0.1U/16V/X7R_4
VSSQ-V1 U3 VSSQ-V1 U3 C556 0.1U/16V/X7R_4
A5 VSSQ-V14 A5 VSSQ-V14 C571 0.1U/16V/X7R_4
U5 Vpp,NC U5 Vpp,NC C543 0.1U/16V/X7R_4
Vpp,NC1 B5 Vpp,NC1 B5
VREFD_VMA2 A10 VSS-B5 B10 VREFD_VMA2 A10 VSS-B5 B10 C539 1U/6.3V_4
U10 VREFD1 VSS-B10 D10 U10 VREFD1 VSS-B10 D10 C545 1U/6.3V_4
VREFD2 VSS-D10 G5 VREFD2 VSS-D10 G5 C541 1U/6.3V_4
VSS-G5 G10 VSS-G5 G10
VREFD_VMA2 0.4MM=16mils VSS-G10
VREFD_VMA2 0.4MM=16mils
VSS-G10
C559 1U/6.3V_4
H1 H1
VSS-H1 VSS-H1
VSS-H14
VSS-K1
H14
K1 VSS-H14
VSS-K1
H14
K1 Close to M4
VREFC_VMA2 J14 K14 VREFC_VMA2 J14 K14 C561 4.7U/6.3V_4
VREFC VSS-K14 L5 VREFC VSS-K14 L5 C540 4.7U/6.3V_4
VREFC_VMA2 0.4MM=16mils VSS-L5 L10 VREFC_VMA2 0.4MM=16mils VSS-L5 L10
VSS-L10 P10 VSS-L10 P10 C535 10U/6.3V_6
FBA_CMD24 J4 VSS-P10 T5 FBA_CMD24 J4 VSS-P10 T5 C536 10U/6.3V_6
VSS-T10 VSS-T10
A GDDR5 M2 GDDR5 M6 A
+1.35V_GFX
FBA_CMD30
CKE* is strap pin to set ODT value of memory chip
R251 10K_4
FBA_CMD29 R5 10K_4
RST PD place @ the end of daisy-chain. PROJECT : AM9A
N16P-GX_ GDDR5 - A2 A0

5 4 3 2 1
5 4 3 2 1
18,25 VMC_DQ[63:0]
VMC_DQ[63:0]
FBC_CMD[31:0]
CHANNEL B: 2G/4G GDDR5 24
18,25 FBC_CMD[31:0]
FBC_DBI[7:0]
18,25 FBC_DBI[7:0]
Channel 0 Channel 0
FBC_EDC[7:0]
18,25 FBC_EDC[7:0]
<0-7,16-23> <8-15,24-31>
VREF_VMC1_MOS
D +1.35V_GFX +1.35V_GFX D
+1.35V_GFX +1.35V_GFX
2
M8 M4
M2 B1 M2 B1 R62 R297 R296 R60
M4 DQ31 | DQ7 VDDQ-B1 B3 M4 DQ31 | DQ7 VDDQ-B1 B3 549/F_4 931/F_4 *549/F_4_NC *931/F_4_NC
1
T2 D1 T2 D1 VREFC_VMC1 VREFD_VMC1
DQ25 | DQ1 VDDQ-D12 DQ25 | DQ1 VDDQ-D12
1
U4 D14 U4 D14 R63 C630 R295 C342
VMC_DQ23 M13 DQ24 | DQ0 VDDQ-D14 E5 VMC_DQ15 M13 DQ24 | DQ0 VDDQ-D14 E5 1.33K/F_4 820p/50V_4 *1.33K/F_4_NC *820p/50V_4_NC
VMC_DQ22 M11 DQ23 | DQ15 VDDQ-E5 E10 VMC_DQ14 M11 DQ23 | DQ15 VDDQ-E5 E10
QD16~23 QD8~15
DQ22 | DQ14 VDDQ-E10 DQ22 | DQ14 VDDQ-E10
2
VMC_DQ21 N13 F1 VMC_DQ13 N13 F1
VMC_DQ20 N11 DQ21 | DQ13 VDDQ-F1 F3 VMC_DQ12 N11 DQ21 | DQ13 VDDQ-F1 F3
VMC_DQ19 T13 DQ20 | DQ12 VDDQ-F3 F12 VMC_DQ11 T13 DQ20 | DQ12 VDDQ-F3 F12
VMC_DQ17 U13 DQ18 | DQ10 VDDQ-F14 G2 VMC_DQ9 U13 DQ18 | DQ10 VDDQ-F14 G2
VMC_DQ16 U11 DQ17 | DQ9 VDDQ-G2 G13 VMC_DQ8 U11 DQ17 | DQ9 VDDQ-G2 G13
VREF_VMC1_MOS
DQ10 | DQ18 VDDQ-L13 DQ10 | DQ18 VDDQ-L13
3
A13 M1 A13 M1
A11 DQ9 | DQ17 VDDQ-M1 M3 A11 DQ9 | DQ17 VDDQ-M1 M3
VMC_DQ7 F2 DQ8 | DQ16 VDDQ-M3 M12 VMC_DQ31 F2 DQ8 | DQ16 VDDQ-M3 M12 Q5
VMC_DQ6 F4 DQ7 | DQ31 VDDQ-M12 M14 VMC_DQ30 F4 DQ7 | DQ31 VDDQ-M12 M14 2 MEM_VREF_CTL
QD0~7 QD24~31
VMC_DQ5 E2 DQ6 | DQ30 VDDQ-M14 N5 VMC_DQ29 E2 DQ6 | DQ30 VDDQ-M14 N5 MEM_VREF_CTL 20,22,23,25
VMC_DQ4 E4 DQ5 | DQ29 VDDQ-N5 N10 VMC_DQ28 E4 DQ5 | DQ29 VDDQ-N5 N10
VMC_DQ3 B2 DQ4 | DQ28 VDDQ-N10 P1 VMC_DQ27 B2 DQ4 | DQ28 VDDQ-N10 P1 2N7002K
VMC_DQ2 B4 DQ3 | DQ27 VDDQ-P1 P3 VMC_DQ26 B4 DQ3 | DQ27 VDDQ-P1 P3
DQ2 | DQ26 VDDQ-P3 DQ2 | DQ26 VDDQ-P3
1
VMC_DQ1 A2 P12 VMC_DQ25 A2 P12
VMC_DQ0 A4 DQ1 | DQ25 VDDQ-P12 P14 VMC_DQ24 A4 DQ1 | DQ25 VDDQ-P12 P14
C DQ0 | DQ24 VDDQ-P14 DQ0 | DQ24 VDDQ-P14 C
T1 T1
VDDQ-T3 VDDQ-T3
VDDQ-T12
VDDQ-T14
T12
T14 VDDQ-T12
VDDQ-T14
T12
T14 Please close to M5 1127
FBC_CMD9 J5 FBC_CMD9 J5 +1.35V_GFX
RFU/A12/NC RFU/A12/NC
FBC_CMD6
FBC_CMD7
K4
K5 A7/A8 | A0/A10
A6/A11 | A1/A9
VDD-C5
VDD-C10
C5
C10
FBC_CMD10
FBC_CMD11
K4
K5 A7/A8 | A0/A10
A6/A11 | A1/A9
VDD-C5
VDD-C10
C5
C10 Under M5
FBC_CMD4 K10 D11 FBC_CMD1 K10 D11 C657 0.1U/16V/X7R_4
FBC_CMD3 K11 A5/BA1 | A3/BA3 VDD-D11 G1 FBC_CMD2 K11 A5/BA1 | A3/BA3 VDD-D11 G1 C615 0.1U/16V/X7R_4
FBC_CMD1 H10 A4/BA2 | A2/BA0 VDD-G1 G4 FBC_CMD4 H10 A4/BA2 | A2/BA0 VDD-G1 G4 C617 0.1U/16V/X7R_4
FBC_CMD11 H5 A2 /BA0 | A4/BA2 VDD-G11 G14 FBC_CMD7 H5 A2 /BA0 | A4/BA2 VDD-G11 G14 C620 0.1U/16V/X7R_4
FBC_CMD10 H4 A1/A9 | A6/A11 VDD-G14 L1 FBC_CMD6 H4 A1/A9 | A6/A11 VDD-G14 L1 C616 0.1U/16V/X7R_4
A0/A10 | A7/A8 VDD-L1 L4 A0/A10 | A7/A8 VDD-L1 L4 C619 0.1U/16V/X7R_4
VMC_WCK01 D4 VDD-L14 P11 VMC_WCK23 D4 VDD-L14 P11 C652 0.1U/16V/X7R_4
18 VMC_WCK01 WCK01 | WCK23 VDD-P11 WCK01 | WCK23 VDD-P11
VMC_WCK01# D5 R5 VMC_WCK23# D5 R5
18 VMC_WCK01# WCK01# | WCK23# VDD-R5 WCK01# | WCK23# VDD-R5
R10 R10 C621 1U/6.3V_4
VMC_WCK23 P4 VDD-R10 VMC_WCK01 P4 VDD-R10 C646 1U/6.3V_4
18 VMC_WCK23 WCK23 | WCK01 WCK23 | WCK01
VMC_WCK23# P5 VMC_WCK01# P5 C655 1U/6.3V_4
18 VMC_WCK23# WCK23# | WCK01# WCK23# | WCK01#
A1 A1 C640 1U/6.3V_4
EDC3 | EDC0 VSSQ-A3 EDC3 | EDC0 VSSQ-A3
Close to M5
FBC_EDC2 R13 A12 FBC_EDC1 R13 A12
FBC_EDC0 C2 EDC1 | EDC2 VSSQ-A14 C1 FBC_EDC3 C2 EDC1 | EDC2 VSSQ-A14 C1 C656 4.7U/6.3V_4
EDC0 | EDC3 VSSQ-C1 C3 EDC0 | EDC3 VSSQ-C1 C3 C650 4.7U/6.3V_4
FBC_DBI2 P13 DBI3# | DBI0# VSSQ-C4 C11 FBC_DBI1 P13 DBI3# | DBI0# VSSQ-C4 C11 C654 10U/6.3V_6
D13 DBI2 #| DBI1# VSSQ-C11 C12 D13 DBI2 #| DBI1# VSSQ-C11 C12 C622 10U/6.3V_6
FBC_DBI0 D2 DBI1# | DBI2# VSSQ-C12 C14 FBC_DBI3 D2 DBI1# | DBI2# VSSQ-C12 C14
VSSQ-E3 E12 VMC_CLK0 VSSQ-E3 E12
FBC_CMD12 G3 VSSQ-E12 E14 FBC_CMD15 G3 VSSQ-E12 E14
B B
FBC_CMD15 L3 RAS# | CAS# VSSQ-E14 F5 FBC_CMD12 L3 RAS# | CAS# VSSQ-E14 F5
CAS# | RAS# VSSQ-F5 F10 R70 CAS# | RAS# VSSQ-F5 F10
VSSQ-F10 H2 VSSQ-F10 H2
VSSQ-H2 80.6/F_4 VSSQ-H2
FBC_CMD14 J3 H13 FBC_CMD14 J3 H13
CKE# VSSQ-H13 CKE# VSSQ-H13
18
18
VMC_CLK0#
VMC_CLK0
VMC_CLK0#
VMC_CLK0
J11
J12 CK#
CK
VSSQ-K2
VSSQ-K13
K2
K13 VMC_CLK0#
VMC_CLK0#
VMC_CLK0
J11
J12 CK#
CK
VSSQ-K2
VSSQ-K13
K2
K13
M5 M5
VSSQ-M5 M10 VSSQ-M5 M10 +1.35V_GFX
VSSQ-M10 VSSQ-M10
Under M6
FBC_CMD0 G12 N1 FBC_CMD5 G12 N1
FBC_CMD5 L12 CS# | WE# VSSQ-N1 N3 FBC_CMD0 L12 CS# | WE# VSSQ-N1 N3
WE# | CS# VSSQ-N3 N12 WE# | CS# VSSQ-N3 N12 C363 0.1U/16V/X7R_4
VSSQ-N12 N14 VSSQ-N12 N14 C296 0.1U/16V/X7R_4
R72 120/F_4 J13 VSSQ-N14 R1 R71 120/F_4 J13 VSSQ-N14 R1 C297 0.1U/16V/X7R_4
R57 1K_4 SEN_C J10 ZQ VSSQ-R1 R3 SEN_C J10 ZQ VSSQ-R1 R3 C367 0.1U/16V/X7R_4
SEN VSSQ-R3 R4 SEN VSSQ-R3 R4 C313 0.1U/16V/X7R_4
FBC_CMD13 J2 VSSQ-R11 R12 FBC_CMD13 J2 VSSQ-R11 R12 C350 0.1U/16V/X7R_4
R50 1K_4 U1 R286 1K_4 U1 C306 0.1U/16V/X7R_4
VSSQ-V12 U14 VSSQ-V12 U14 C361 1U/6.3V_4
A5 VSSQ-V14 A5 VSSQ-V14 C351 1U/6.3V_4
U5 Vpp,NC U5 Vpp,NC C319 1U/6.3V_4
Vpp,NC1 B5 Vpp,NC1 B5 C366 1U/6.3V_4
VREFD_VMC1 A10 VSS-B5 B10 VREFD_VMC1 A10 VSS-B5 B10
VREFD1 VSS-B10 VREFD1 VSS-B10
U10
VREFD2 VSS-D10
VSS-G5
D10
G5
U10
VREFD2 VSS-D10
VSS-G5
D10
G5 Close to M6
G10 G10 C365 4.7U/6.3V_4
VSS-G10 H1 VSS-G10 H1 C358 4.7U/6.3V_4
VSS-H1 H14 VSS-H1 H14
VSS-H14 K1 VSS-H14 K1 C364 10U/6.3V_6
VREFC_VMC1 J14 VSS-K1 K14 VREFC_VMC1 J14 VSS-K1 K14 C332 10U/6.3V_6
VSS-L5 L10 VSS-L5 L10
A VSS-L10 P10 VSS-L10 P10 A
FBC_CMD8 J4 VSS-P10 T5 FBC_CMD8 J4 VSS-P10 T5
VSS-T10 VSS-T10
GDDR5 M8 GDDR5 M4
+1.35V_GFX
FBC_CMD14 R56 10K_4 CKE* is strap pin to set ODT value of memory chip Quanta Computer Inc.
FBC_CMD13 R292 10K_4
PROJECT : AM9A
RST PD place @ the end of daisy-chain. Size Document Number Rev
N16P-GX_GDDR5 - B1 A0

5 4 3 2 1
5 4 3 2 1
CHANNEL B: 2G/4G GDDR5 25

VMC_DQ[63:0]
18,24 VMC_DQ[63:0] VREF_VMC2_MOS
Channel 1 Channel 1
FBC_CMD[31:0]
18,24 FBC_CMD[31:0]
FBC_DBI[7:0] +1.35V_GFX +1.35V_GFX
<32-39,48-55> <40-47,56-63>
18,24 FBC_DBI[7:0]
FBC_EDC[7:0]
18,24 FBC_EDC[7:0]
2
R267 R20 R277 R275
549/F_4 931/F_4 *549/F_4_NC *931/F_4_NC
D D
+1.35V_GFX +1.35V_GFX
1
VREFC_VMC2 VREFD_VMC2
M3 M7
M2 B1 M2 B1
1
M4 B3 M4 B3 R266 C51 R32 C125
N2 DQ30 | DQ6 VDDQ-B3 B12 N2 DQ30 | DQ6 VDDQ-B3 B12 1.33K/F_4 820p/50V_4 *1.33K/F_4_NC *820p/50V_4_NC
2
T2 D1 T2 D1
VMC_DQ55 M13 DQ24 | DQ0 VDDQ-D14 E5 VMC_DQ47 M13 DQ24 | DQ0 VDDQ-D14 E5
VMC_DQ54 M11 DQ23 | DQ15 VDDQ-E5 E10 VMC_DQ46 M11 DQ23 | DQ15 VDDQ-E5 E10
QD48~55 QD40~47
VMC_DQ53 N13 DQ22 | DQ14 VDDQ-E10 F1 VMC_DQ45 N13 DQ22 | DQ14 VDDQ-E10 F1
VMC_DQ52 N11 DQ21 | DQ13 VDDQ-F1 F3 VMC_DQ44 N11 DQ21 | DQ13 VDDQ-F1 F3
VREF_VMC2_MOS
VMC_DQ49 U13 DQ18 | DQ10 VDDQ-F14 G2 VMC_DQ41 U13 DQ18 | DQ10 VDDQ-F14 G2
VMC_DQ48 U11 DQ17 | DQ9 VDDQ-G2 G13 VMC_DQ40 U11 DQ17 | DQ9 VDDQ-G2 G13
DQ13 | DQ21 VDDQ-K3 DQ13 | DQ21 VDDQ-K3
3
E11 K12 E11 K12
B11 DQ11 | DQ19 VDDQ-L2 L13 B11 DQ11 | DQ19 VDDQ-L2 L13 Q3
A13 DQ10 | DQ18 VDDQ-L13 M1 A13 DQ10 | DQ18 VDDQ-L13 M1 2 MEM_VREF_CTL
DQ9 | DQ17 VDDQ-M1 DQ9 | DQ17 VDDQ-M1 MEM_VREF_CTL 20,22,23,24
A11 M3 A11 M3
VMC_DQ39 F2 DQ8 | DQ16 VDDQ-M3 M12 VMC_DQ63 F2 DQ8 | DQ16 VDDQ-M3 M12
VMC_DQ38 F4 DQ7 | DQ31 VDDQ-M12 M14 VMC_DQ62 F4 DQ7 | DQ31 VDDQ-M12 M14 2N7002K
QD32~39 QD56~63
VMC_DQ37 E2 DQ6 | DQ30 VDDQ-M14 N5 VMC_DQ61 E2 DQ6 | DQ30 VDDQ-M14 N5
DQ5 | DQ29 VDDQ-N5 DQ5 | DQ29 VDDQ-N5
1
VMC_DQ36 E4 N10 VMC_DQ60 E4 N10
VMC_DQ35 B2 DQ4 | DQ28 VDDQ-N10 P1 VMC_DQ59 B2 DQ4 | DQ28 VDDQ-N10 P1
VMC_DQ34 B4 DQ3 | DQ27 VDDQ-P1 P3 VMC_DQ58 B4 DQ3 | DQ27 VDDQ-P1 P3
C DQ0 | DQ24 VDDQ-P14 DQ0 | DQ24 VDDQ-P14 C
T1 T1
VDDQ-T3 VDDQ-T3
VDDQ-T12
VDDQ-T14
T12
T14 VDDQ-T12
VDDQ-T14
T12
T14 Please close to M7 1127
FBC_CMD25 J5 FBC_CMD25 J5 +1.35V_GFX
RFU/A12/NC RFU/A12/NC
FBC_CMD22
FBC_CMD23
K4
K5 A7/A8 | A0/A10
A6/A11 | A1/A9
VDD-C5
VDD-C10
C5
C10
FBC_CMD26
FBC_CMD27
K4
K5 A7/A8 | A0/A10
A6/A11 | A1/A9
VDD-C5
VDD-C10
C5
C10 Under M7
FBC_CMD20 K10 D11 FBC_CMD17 K10 D11 C48 0.1U/16V/X7R_4
FBC_CMD19 K11 A5/BA1 | A3/BA3 VDD-D11 G1 FBC_CMD18 K11 A5/BA1 | A3/BA3 VDD-D11 G1 C47 0.1U/16V/X7R_4
FBC_CMD27 H5 A2 /BA0 | A4/BA2 VDD-G11 G14 FBC_CMD23 H5 A2 /BA0 | A4/BA2 VDD-G11 G14 C249 0.1U/16V/X7R_4
FBC_CMD26 H4 A1/A9 | A6/A11 VDD-G14 L1 FBC_CMD22 H4 A1/A9 | A6/A11 VDD-G14 L1 C198 0.1U/16V/X7R_4
A0/A10 | A7/A8 VDD-L1 L4 A0/A10 | A7/A8 VDD-L1 L4 C248 0.1U/16V/X7R_4
VMC_WCK45 D4 VDD-L14 P11 VMC_WCK67 D4 VDD-L14 P11 C85 0.1U/16V/X7R_4
18 VMC_WCK45 WCK01 | WCK23 VDD-P11 WCK01 | WCK23 VDD-P11
VMC_WCK45# D5 R5 VMC_WCK67# D5 R5
18 VMC_WCK45# WCK01# | WCK23# VDD-R5 WCK01# | WCK23# VDD-R5
R10 R10 C90 1U/6.3V_4
VMC_WCK67 P4 VDD-R10 VMC_WCK45 P4 VDD-R10 C54 1U/6.3V_4
18 VMC_WCK67 WCK23 | WCK01 WCK23 | WCK01
VMC_WCK67# P5 VMC_WCK45# P5 C183 1U/6.3V_4
18 VMC_WCK67# WCK23# | WCK01# WCK23# | WCK01#
A1 A1 C50 1U/6.3V_4
EDC3 | EDC0 VSSQ-A3 EDC3 | EDC0 VSSQ-A3
Close to M7
FBC_EDC6 R13 A12 FBC_EDC5 R13 A12
FBC_EDC4 C2 EDC1 | EDC2 VSSQ-A14 C1 FBC_EDC7 C2 EDC1 | EDC2 VSSQ-A14 C1 C49 4.7U/6.3V_4
EDC0 | EDC3 VSSQ-C1 C3 EDC0 | EDC3 VSSQ-C1 C3 C108 4.7U/6.3V_4
FBC_DBI6 P13 DBI3# | DBI0# VSSQ-C4 C11 FBC_DBI5 P13 DBI3# | DBI0# VSSQ-C4 C11 C46 10U/6.3V_6
D13 DBI2 #| DBI1# VSSQ-C11 C12 D13 DBI2 #| DBI1# VSSQ-C11 C12 C173 10U/6.3V_6
FBC_DBI4 D2 DBI1# | DBI2# VSSQ-C12 C14 FBC_DBI7 D2 DBI1# | DBI2# VSSQ-C12 C14
FBC_CMD28 G3 VSSQ-E12 E14 VMC_CLK1# FBC_CMD31 G3 VSSQ-E12 E14
B B
FBC_CMD31 L3 RAS# | CAS# VSSQ-E14 F5 FBC_CMD28 L3 RAS# | CAS# VSSQ-E14 F5
CAS# | RAS# VSSQ-F5 F10 CAS# | RAS# VSSQ-F5 F10
VSSQ-F10 VSSQ-F10
FBC_CMD30 J3
CKE#
VSSQ-H2
VSSQ-H13
H2
H13
R25
80.6/F_4 FBC_CMD30 J3
CKE#
VSSQ-H2
VSSQ-H13
H2
H13
VMC_CLK1# J11 K2 VMC_CLK1# J11 K2
18 VMC_CLK1# VMC_CLK1 CK# VSSQ-K2 VMC_CLK1 CK# VSSQ-K2 +1.35V_GFX
18 VMC_CLK1 J12 K13 J12 K13
CK VSSQ-K13 CK VSSQ-K13
Under M8
M5 VMC_CLK1 M5
VSSQ-M5 M10 VSSQ-M5 M10
FBC_CMD16 G12 VSSQ-M10 N1 FBC_CMD21 G12 VSSQ-M10 N1 C577 0.1U/16V/X7R_4
FBC_CMD21 L12 CS# | WE# VSSQ-N1 N3 FBC_CMD16 L12 CS# | WE# VSSQ-N1 N3 C609 0.1U/16V/X7R_4
WE# | CS# VSSQ-N3 N12 WE# | CS# VSSQ-N3 N12 C585 0.1U/16V/X7R_4
VSSQ-N12 N14 VSSQ-N12 N14 C597 0.1U/16V/X7R_4
R19 120/F_4 J13 VSSQ-N14 R1 R31 120/F_4 J13 VSSQ-N14 R1 C599 0.1U/16V/X7R_4
R33 1K_4 SEN_D J10 ZQ VSSQ-R1 R3 SEN_D J10 ZQ VSSQ-R1 R3 C608 0.1U/16V/X7R_4
SEN VSSQ-R3 R4 SEN VSSQ-R3 R4 C581 0.1U/16V/X7R_4
FBC_CMD29 J2 VSSQ-R11 R12 FBC_CMD29 J2 VSSQ-R11 R12 C587 0.1U/16V/X7R_4
R42 1K_4 U1 R282 1K_4 U1
A5 VSSQ-V14 A5 VSSQ-V14 C582 1U/6.3V_4
U5 Vpp,NC U5 Vpp,NC
Vpp,NC1 Vpp,NC1
VREFD_VMC2 A10
VREFD1
VSS-B5
VSS-B10
B5
B10 VREFD_VMC2 A10
VREFD1
VSS-B5
VSS-B10
B5
B10 Close to M8
U10 D10 U10 D10 C579 4.7U/6.3V_4
VREFD2 VSS-D10 G5 VREFD2 VSS-D10 G5 C588 4.7U/6.3V_4
VSS-G5 G10 VSS-G5 G10
VSS-G10 H1 VSS-G10 H1 C590 10U/6.3V_6
VSS-H1 H14 VSS-H1 H14 C575 10U/6.3V_6
VSS-H14 K1 VSS-H14 K1
VREFC_VMC2 J14 VSS-K1 K14 VREFC_VMC2 J14 VSS-K1 K14
VSS-L5 L10 VSS-L5 L10
A VSS-L10 P10 VSS-L10 P10 A
FBC_CMD24 J4 VSS-P10 T5 FBC_CMD24 J4 VSS-P10 T5
VSS-T10 VSS-T10
GDDR5 M3 GDDR5 M7
+1.35V_GFX
FBC_CMD30 R41 10K_4 CKE* is strap pin to set ODT value of memory chip Quanta Computer Inc.
FBC_CMD29 R284 10K_4
PROJECT : AM9A
RST PD place @ the end of daisy-chain. Size Document Number Rev
N16P-GX_GDDR5 - B2 A0

5 4 3 2 1
5 4 3 2 1
+3.3V_ALW +3.3V_EC
Place these caps close to ITE8528.
PECI
4,10 H_PECI
R200 33_4 EC_PECI +3V_RTC
1 2 C528
*0.1U/16V/X7R_4_NC
R247 C727 1
*SHORT_6_NC
+3.3V_ALW _AVCC
2 *0.1U/16V/X7R_4_NC
NB_MUTE# C698 1U/6.3V_4

+3.3V_EC
26
ALW _ON NB_MUTE# 38
PECI:REC=33 ohms PDG-P215, ALW _ON 32,45
CRB P153 is 33ohms. 4 EC_PW ROK C738 1 2 0.1U/16V/X7R_4
SIO_SLP_S4# EC_PW ROK 10,33
#546884 PDG V1.0 P615=43 ohm to EC C705 1 2 0.1U/16V/X7R_ C518 1 2 0.1U/16V/X7R_4
SIO_SLP_S4# 10
C699 1 2 0.1U/16V/X7R_4
+3.3V_RUN +3.3V_EC EC_SPI_SI LAN_PW R_EN_EC 37
3/1 add EC_SPI_SI 27
EC_SPI_SO 27
EC_SPI_CLK 27 +3.3V_ALW
D PCH_SPI_CS1# 9,27 D
CLKRUN#
CLKRUN# 10
U8 RP4 4.7KX2
114
121
127
IT8528 SMBDAT0 1 2
11
26
50
92
74
84
83
82
19
20
99
98
97
96
93
3
SMBCLK0 3 4
LPC_LAD0 10 110 SMBCLK0
11,36 LPC_LAD0 SMBCLK0 39,40
EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1
L80HLAT/BAO/GPE0
L80LLAT/GPE7
HMOSI/GPH6/ID6
HMISO/GPH5/ID5
HSCK/GPH4/ID4
HSCE#/GPH3/ID3
CLKRUN#/GPH0/ID0
VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
AVCC
VSTBY
VBAT
LPC_LAD1 9 LAD0/GPM0(3) SMCLK0/GPB3 111 SMBDAT0 RP3 2.2KX2
11,36 LPC_LAD1 LAD1/GPM1(3) SMDAT0/GPB4 SMBDAT0 39,40 Charge ,BAT
11,36 LPC_LAD2
LPC_LAD2 8
LAD2/GPM2(3) SM BUS SMCLK1/GPC1
115 SMBCLK1
SMBCLK1 10
SMBDAT1 1 2
LPC_LAD3 7 116 SMBDAT1 SMBCLK1 3 4
11,36 LPC_LAD3
PLTRST# 22 LAD3/GPM3(3) SMDAT1/GPC2 117 EC_PECI SMBDAT1 10 PCH
9,17,28,35,36,37 PLTRST# CLK_24M_EC LPCRST#/GPD2 PECI/SMCLK2/GPF6(3) SIO_SLP_S5# LID_SW #
13 118 R225 1 2 10K_4
11 CLK_24M_EC LPC_LFRAME# LPCCLK/GPM4(3) SMDAT2/GPF7(3) SIO_SLP_S5# 10,46
6
11,36 LPC_LFRAME# LFRAME#/GPM5(3) PCH_MELOCK +3.3V_RUN
85
IMVP_VR_ON PS2CLK0/TMB0/CEC/GPF0 H_PROCHOT_EC PCH_MELOCK 10
17 86 RP5 2.2KX2
41 IMVP_VR_ON LPCPD#/GPE6 PS2DAT0/TMB1/GPF1 89 TPCLK SMBDAT3 1 2
LCD_TST LCD_TST_R 126 PS2CLK2/GPF4 TPCLK 31
29 LCD_TST R204 *SHORT_4_NC 90 TPDATA SMBCLK3 3 4
IRQ_SERIRQ GA20/GPB5(3) PS2DAT2/GPF5 TPDATA 31
5
PS/2
11 IRQ_SERIRQ SERIRQ/GPM6(3)
SDM10K45-7-F 2 1 D9 EC__EXTSMI# 15
11 SMC_EXTSMI# ECSMI#/GPD4(3)
11 SIO_EXT_SCI#
SDM10K45-7-F 2 1 D12 EC__EXT_SCI# 23
ECSCI#/GPD3 LPC IMVP_VR_ON R438 *100K_4_NC
W RST# 14
WRST# GPIO
SDM10K45-7-F 2 1 D7 RCIN# 4
11 EC_RCIN# TP_PW R_EN# KBRST#/GPB6(3)
16
31 TP_PW R_EN# PWUREQ#/BBO/SMCLK2ALT/GPC7(3) BAT_LED_W HITE R457 10K_4
3/17 CHANGE to EC ref AM8 PWM0/GPA0
24 POW ER_LED
POW ER_LED 32
FAN2_PW M
5/18 add R457 10K PD
IT8528
25
PWM1/GPA1 FAN1_PW M FAN2_PW M 33 G
28
PWM2/GPA2 LCD_PW M_EC FAN1_PW M 33 PC
119 29
29,30,38,47,49 RUN_ON CRX0/GPC0 PWM3/GPA3 LCD_PW M_EC 29 P
39 PS_ID
123
CTX0/TMA0/GPB2(3) CIR PWM4/GPA4
30 KB_BACKLITE_EN
KB_BACKLITE_EN 31
U
+3.3V_ALW
C 31 USB_BACK_EN U +3.3V_RTC_LDO C
PWM5/GPA5 USB_BACK_EN 34
PWM
2
80
10 RSMRST# DAC4/DCD0#/GPJ4(3) FAN1_TACH
27 EC_FDIO3 104 47
USB_RIGHT_EN# 33 FDIO3/DSR0#/GPG6 TACH0A/GPD6(3) 48 FAN2_TACH FAN1_TACH 33 C R223 R227
38 USB_RIGHT_EN# GINT/CTS0#/GPD5 TACH1A/TMA1/GPD7(3) FAN2_TACH 33 GP
LID_SW # 88 100K_4 100K_4
38 LID_SW # PS2DAT1/RTS0#/GPF3 EDP_BKLTEN PU Q14
SDM10K45-7-F 2 1 D10 81 120
10 EC_PW RBTN# DAC5/RIG0#/GPJ5(3) TMRI0/GPC4(3) EDP_BKLTEN 10,29
1
HDD_LED_EN# 87 124 SIO_SLP_S3# U 5
38 HDD_LED_EN# PS2CLK1/DTR0#/GPF2 TMRI1/GPC6(3) SIO_SLP_S3# 10,46
109
4,33 HW PG SUB_MUTE# TXD/SOUT0/GPB1
108 4 3 W RST#
38 SUB_MUTE# RXD/SIN0/GPB0
3/2 modify BID1 71

ADC5/DCD1#/GPI5(3) PWRSW/GPE4(3)
125 SYS_PW R_SW #
SYS_PW R_SW # 32
C525 1U/6.3V_4
40 IINP
72
ADC6/DSR1#/GPI6(3) UART port RI1#/GPD0(3)
18 PBAT_PRES#
ACAV_R 2 PBAT_PRES# 39,40
2
THERM_STP# 33
73 21 1 D11
28 T_SSD ADC7/CTS1#/GPI7(3) RI2#/GPD1 ACAV_IN 32,39,40
29 LCD_BAK
35
RTS1#/GPE5 WAKE UP SDM10K45-7-F 1 6
34
38 BEEP PWM7/RIG1#/GPA7 AC_PRESENT
27 EC_FDIO2 107 112
FDIO2/DTR1#/SBUSY/GPG1/ID7(Dn) RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 AC_PRESENT 10
SMBDAT3 95 2N7002KDW
20,33 SMBDAT3 CTX1/SOUT1/GPH2/SMDAT3/ID2
SMBCLK3 94
Thermal , GPU 20,33 SMBCLK3 CRX1/SIN1/SMCLK3/GPH1/ID1
105
27 EC_SPI_SLK FSCK
101
27 EC_SPI_CS# FSCE#
27 EC_SPI_DIN
102
FMOSI EXTERNAL SERIAL FLASH
103 66 R245 *SHORT_4_NC
27 EC_SPI_DO FMISO ADC0/GPI0(3) USB_CHG_DET#_EC T_DDR 15
67
ADC1/GPI1(3) SUS_PW R_ACK USB_CHG_DET#_EC 32
MY16 56 68
31 MY16 KSO16/SMOSI/GPC3(3) ADC2/GPI2(3) SUS_PW R_ACK 10
VGA_PW R_LEVEL_EC#
BAT_LED_AMBER
57
32 KSO17/SMISO/GPC5(3) ADC3/GPI3(3)
69
70 PCIE_EC_W AKE# TP_INTR# 31 3/17 modify
B 38 BAT_LED_AMBER PWM6/SSCK/GPA6 ADC4/GPI4(3) PCIE_EC_W AKE# 37 B
46,48,49 SUS_ON
SUS_ON 100
SSCE0#/GPG2 A/D D/A
34 USBP0_BUS_SW _CB0
USBP0_BUS_SW _CB0
MY[0..15]
106
SSCE1#/GPG0(Up) SPI ENABLE
76
3/2 modify +3.3V_ALW
Board ID Straps
31 MY[0..15] TACH2/HDIO2/GPJ0(3) EC_SPI_IO2 27
MY0 36 77 EC_SPI_IO3 27
KSO0/PD0 HDIO3/GPJ1(3)
5/20 change Board ID
2
MY1 37 78 PTP_DISABLE# 31
MY2 38 KSO1/PD1 DAC2/TACH0B/GPJ2(3) 79 IMVP_PW RGD
KSO2/PD2 DAC3/TACH1B/GPJ3(3) IMVP_PW RGD 10,41
MY3 39 R244
KSO3/PD3
MY4 40
KSO4/PD4 KBMX 45.3K/F_4
MY5 41
KSO5/PD5
1
MY6 42
MY7 43 KSO6/PD6 BID1
MY8 44 KSO7/PD7
KSO8/ACK#
1
MY9 45 100K/F_4: CS41002FB28
46 KSO9/BUSY
MY10
KSO10/PE 45.3K/F_4: CS34532FB18
MY11 51 2 BAT_LED_W HITE R243 24.3K/F_4: CS32432FB19
KSO11/ERR# CK32KE/GPJ7(3) BAT_LED_W HITE 38
KSI3/SLIN#
CLOCK RTC_RST_R
KSI1/AFD#
52
KSI0/STB#
MY12 128 12K/F_4 : CS31202FB15

KSI2/INIT#
R206 *0_4_NC 20K/F_4

KSO12/SLCT CK32K/GPJ6(3) EC_RTC_RST 10
MY13 53 6.49K/F_4: CS26492FB23
VCORE
KSO13
2
MY14 54 1.65K/F_4: CS21652FB29
AVSS
KSI4
KSI5
KSI6
KSI7
KSO14
VSS
VSS
VSS
VSS
VSS
VSS
MY15 55 It is necessary to connect this pin to the ground

20 VGA_PW R_LEVEL KSO15 if “Crystal-Free” feature is activated and GPJ6 is
R209
100K_4 not configured as GPI/GPO.
58
59
60
61
62
63
64
65
27
49
91
113
122
75
12
3
BID1
Q19 2 VGA_PW R_LEVEL_EC# 000 0.5V PU 100K EVT (X00)
H_PROCHOT# 4,40,41
001 1.0V PU 45.3K DVT1 (X01)
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
2N7002W
2
C713 010 1.5V PU 24.3K DVT2 (X02)

1
3
0.1U/16V/X7R_4 100 2.0V PU 12K PILOT (AOO)
MX[0..7] H_PROCHOT_EC 2 2N7002W 101 2.5V PU 6.49K
31 MX[0..7]
1
Q15 C520 110 3.0V PU 1.65K

A A
47P/50V_4 111 0V NO PU
R230 1
+3.3V_EC L6
FCM1005KF-121T05 *100K_4_NC
2 1 +3.3V_ALW _AVCC R224
75_4
2
C527
L5 0.1U/16V/X7R_4
FCM1005KF-121T05
PROJECT : AM9A
1
2 1 EC_AVSS
SIO (ITE8528H) A0

5 4 3 2 1
5 4 3 2 1
27
For EC 4Mbit (512K Byte) +3.3V_ALW
For Share ROM 64Mbit (8M Byte) 3/17 pop
1
D D
R439 R422
5/5 net name change 1K_4 1K_4 RTC BATTERY
2
EC_FDIO3 EC_HOLD#
26
26
EC_FDIO3
EC_FDIO2
EC_FDIO2
R418
R444
0_4
0_4 EC_W P# (non Rechargable BATT)
+3V_RTC +3.3V_RTC_LDO
Layout note:
U16
R441 33_4 EC_CS# 1 8 RTCD1
30mils
26 EC_SPI_CS# CE# VDD
R421 33_4 EC_SLK 6 1
26 EC_SPI_SLK SCK
R420 33_4 EC_DIN 5
26 EC_SPI_DIN SI
1
R440 33_4 EC_DO 2 7 3 RTCBT1
26 EC_SPI_DO SO HOLD# C691 RTCR1 1K_4
3 4 0.1U/16V/X7R_4 2 +RTC_2 1 2 +RTC_1
WP# VSS 1
2
2
1
W 25Q64FVSSIQ BAT54CW
C532
1U/6.3V_4 50271-00201-001
2
3/16 change footprint
RTC-BATTERY
Follow JWA battery QPN
C C
For PCH ME 32Mbit (4M Byte)

+3.3V_SUS
3/24 change to pop

3/3 change to 1K ohm
1
R191 R181
B
5/5 net name change 3/20 change to 33 ohm 1K_4 1K_4 B
TP for ICT flash BIOS process EMI

2
2
26 EC_SPI_IO3
EC_SPI_IO3
EC_SPI_IO2
R177 33_4 3/17 change to 33 ohm PCH_SPI_CS1# EC_SPI_SLK
26 EC_SPI_IO2 R195 33_4 TP35 EC27 *10P/50V_4_NC
PCH_SPI_CS0# TP31 EC_SPI_CS# TP40
PCH_SPI_IO3 R176 33_4 SPI_HOLD# PCH_SPI_CLK TP34 EC_SPI_SLK TP94 PCH_SPI_CLK EC26 *10P/50V_4_NC
9 PCH_SPI_IO3
PCH_SPI_IO2 R190 33_4 SPI_W P# PCH_SPI_SO TP33 EC_SPI_DO TP39
9 PCH_SPI_IO2
PCH_SPI_SI TP37 EC_SPI_DIN TP93
2/10 remove R2181
PCH_SPI_CS0#
U15 PCH_SPI_IO3
PCH_SPI_IO2
TP32
9 PCH_SPI_CS0# 1 8 TP36
PCH_SPI_CLK R189 33_4 SPI_CLK 6 CE# VDD
9 PCH_SPI_CLK SCK
PCH_SPI_SI R193 33_4 SPI_SI 5
9 PCH_SPI_SI SI
1
PCH_SPI_SO R183 33_4 SPI_SO 2 7

9 PCH_SPI_SO SO HOLD# C507
3 4 *0.1U/16V/X7R_4_NC
WP# VSS
2
2/10 remove R2183

9,26,27 PCH_SPI_CS1# W 25Q32FVSSIQ
9,26,27 PCH_SPI_CS1#
26 EC_SPI_CLK R186 33_4
26 EC_SPI_SI R194 33_4
26 EC_SPI_SO R180 33_4
EDS #546884 P330

A Use one 33- series-resistor per device if using two SPI A
devices and place it close to the devices.
15- series-resistor required if a single device is used.

PROJECT : AM9A
FLASH / RTC A0

5 4 3 2 1
A B C D E
28
SATA HDD Connector
DG: Place TX cap close to connector 3/17 change conn
CN12
4 4
20 24
SATA_TXP0 C742 2 1 0.01U/25V_4 SATA_TXP0_C 19 GND1 GND12 23
10 SATA_TXP0 SATA_TXN0 C741 2 SATA_TXN0_C RXP GND11
1 0.01U/25V_4 18 22
10 SATA_TXN0 RXN GND10
17 21
SATA_RXN0 C740 2 1 0.01U/25V_4 SATA_RXN0_C 16 GND2 GND9
10 SATA_RXN0 SATA_RXP0 C739 2 SATA_RXP0_C TXN
1 0.01U/25V_4 15
10 SATA_RXP0 TXP +5V_HDD
14
GND3
C743 *10U/6.3V/X6S_8_NC
13
12 3.3V_0 C735 4.7U/6.3V_6
11 3.3V_1
10 3.3V_2 C744 4.7U/6.3V_6
9 GND4
8 GND5 C734 0.1U/16V/X7R_4
R458 0_8 +5V_HDD 7 GND6
+5V_RUN 5V_0
6
5 5V_1
5V_2
5/20 add 0 ohm 4
3 GND7
RSVD
2
1 GND8
NC
CVS520EM1RB-NH
gs12201-1011-9f-20p-l-smt
3 3
NGFF M.2 +3.3V_RUN

3/9 add Reserve
AC decoupling used 220nF CON1 5/20 add 0 ohm +3.3V_SSD
capacitors
PDG(#546884) V1.0 P397 Place caps close to connector.
2/3 Reserve 0 ohm 2/11 change to NC 1
NGFF 2 +3.3V_SSD R459 1 2 0_6
3 Presence IND/GND 3.3Vaux 4
GND 3.3Vaux
1
10 PCIE_RXN12 5 6 C729 C692 C730 C733 C723 C694 C697 C703
7 NC Card_Power_OFF# 8
10 PCIE_RXP12 USB_D+ W_DISABLE#
9 10 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 10U/6.3V_6 10U/6.3V_6 *68P/50V_4_NC
USB_D- LED#1 SSD_LED# 38
2
2 C693 0.22U/16V_4 PCIE_TXN12_C 11 12 *47U/6.3V_8_NC 2
10 PCIE_TXN12 GND Key
C696 0.22U/16V_4 PCIE_TXP12_C 13 14
10 PCIE_TXP12 Key Key
15 16
Key Key
10
10
PCIE_RXN11
PCIE_RXP11
17
19 Key
Key
Key
Audio3
18
20 5/18 change to 10u
21 22
C702 0.22U/16V_4 PCIE_TXN11_C 23 SSD IND Audio2 24
10 PCIE_TXN11 Reserved Audio1
C704 0.22U/16V_4 PCIE_TXP11_C 25 26
10 PCIE_TXP11 Reserved Audio0 +3.3V_ALW
27 28
29 GND UIM_RFU 30
10 PCIE_RXN10 PETN1 UIM-Reset
10 PCIE_RXP10 31 32 M.2 Pin 38
33 PETP1 UIM-CLK 34 SATA = DEVSLP
GND UIM-DATA PCIE = NC +3.3V_SSD
1
C706 0.22U/16V_4 PCIE_TXN10_C 35 36
10 PCIE_TXN10 PERN1 UIM-PWR
3/13 net name exchange10 PCIE_TXP10 C707 0.22U/16V_4 PCIE_TXP10_C 37
39 PERP1 DEVSLP
38
40
DEVSLP0 11 RT2
10K/NTC_4
41 GND Reserver GNSS 42
10 PCIE_RXP9 SATA-B+ Reserver GNSS
10 PCIE_RXN9 43 44 R237
SATA-B- Reserver GNSS
2
45 46 10K_4
C718 0.22U/16V_4 PCIE_TXN9_C 47 GND Reserver GNSS 48
10 PCIE_TXN9 SATA-A- Reserver GNSS 26 T_SSD
C715 0.22U/16V_4 PCIE_TXP9_C 49 50
10 PCIE_TXP9 SATA-A+ PERST# PLTRST# 9,17,26,35,36,37
3/13 change to 0.22u51 GND CLKREQ#
52
PCIE_CLKREQ_SSD# 12
1
12 CLK_PCIE_SSD0N 53 54
REFCLKN PEWAKE#
12 CLK_PCIE_SSD0P 55
REFCLKP NC
56 3/13 remove mos R446
57 58 1.5K/F_4
59 GND NC 60
61 ANTCTL0 COEX3 62
ANTCTL1 COEX2
2
3/17 change to de-pop 63
ANTCTL2 COEX1
64
+3.3V_RUN
M.2 Pin 69 65 66
R240 *10K_4_NC SATA = GND 67 ANTCTL3 SIM Detect 68
1 PCIE = NC 69 Reset# SUSCLK 70
1
10 M.2_DET PEDET/GND-SATA 3.3Vaux
71 72
73 GND 3.3Vaux 74
75 GND 3.3Vaux
GND
GND
SSD DET Device USB3.0 IND
High PCIE SSD NASM0-S6701-TS85 Quanta Computer Inc.

76
77
Low SATA SSD

PROJECT : AM9A
HDD/M.2(NGFF) A0

A B C D E
5 4 3 2 1
GS12401-1011P-7H
CN9
3/18 net nane exchange
3/17 change to R 0 ohm
R358 0_4
29
41
USBP4+_R
1 USB2_P4 9
USBP4-_R
2 USB2_N4 9 CAMERA
3 DMIC_DATA_C R355 0_4
4 DMIC_DATA 38
DMIC_CLK_C R356 0_4 R359 0_4
5 DMIC_CLK 38 DMIC #546884 PDG 1.0 page 156
6 +3.3V_RUN
7 +5V_RUN
2/4 add AC Cap
8
DMIC_DATA_C EC63 *10P/50V_4_NC 2/4 remove common chock, 0 ohm
D
9 3/18 CHANGE to NC DMIC_CLK_C EC64 *10P/50V_4_NC EDP_AUXN_C
EDP_AUXP_C
C676 0.1U/16V/X7R_4 EDP_AUXN
0.1U/16V/X7R_4 EDP_AUXP
EDP_AUXN 3 D
42 10 +LCDVCC
C675 EDP_AUXP 3 Close to CN4
11
12 LCD_TST
13 LCD_TST 26 +LCDVCC
14 EDP_HPD 11 Reserve for UHD
EDP_AUXP_C R379 0_4
15 EDP_AUXN_C
16 1 2
17 EDP_TXP0_R R398 100K_4 EDP_TXN1_R EDP_TXN1_C C669 0.1U/16V/X7R_4 EDP_TXN1
18 EDP_TXN1 3
EDP_TXN0_R EDP_TXP1_R EDP_TXP1_C C668 0.1U/16V/X7R_4 EDP_TXP1 C458 C674 C461
19 EDP_TXP1 3
20 EDP_TXP1_R
2/9 move to conn page 0.1U/16V/X7R_4 0.1U/16V/X7R_4 10U/6.3V_6
21 EDP_TXN1_R R378 0_4
22
23 EDP_TXP2_R R377 0_4
43 24 EDP_TXN2_R
25
26 EDP_TXP3_R EDP_TXN0_R EDP_TXN0_C C667 0.1U/16V/X7R_4 EDP_TXN0
27 EDP_TXN0 3
EDP_TXN3_R EDP_TXP0_R EDP_TXP0_C C666 0.1U/16V/X7R_4 EDP_TXP0
28 EDP_TXP0 3
29 LCD_PW M_IN +3.3V_RUN
30
31
LCD_BAK_R R368 0_4 R376 0_4 Reserve for UHD
THSCR_EN
32 THSCR_EN 9
DCR_EN R372 0_4
33 DCR_EN 10
USB2_P6_R
34 USB2_P6 9
USB2_N6_R
35 USB2_N6 9
EDP_TXN2_R EDP_TXN2_C C671 0.1U/16V/X7R_4 EDP_TXN2
36 EDP_TXN2 3
EDP_TXP2_R EDP_TXP2_C C670 0.1U/16V/X7R_4 EDP_TXP2 C478 C484
37 +LED_BL EDP_TXP2 3
C R369 0_4 0.01U/25V_4 *4.7U/6.3V_6_NC C
38
39 R371 0_4
40
44
R374 0_4
EDP_TXN3_R EDP_TXN3_C C673 0.1U/16V/X7R_4 EDP_TXN3 EDP_TXN3 3

EDP_TXP3_R EDP_TXP3_C C672 0.1U/16V/X7R_4 EDP_TXP3 EDP_TXP3 3
+LED_BL
R373 0_4 Reserve for UHD
1
C464 C468
LCD_VCC 0.1U/25V_6 *10U/25V_8_NC
2
+3.3V_RUN
+LCDVCC
U6
4 1
5 IN OUT
IN
1
2
3 GND C459
EN 0.1U/16V/X7R_4
2
1
C479 G5243AT11U
B 0.1U/16V/X7R_4 Brightness Power Brightness Control B
2
D3
D5
1 EDP_VDDEN 1
EDP_VDDEN 10 +PW R_SRC +LED_BL 10 EDP_BKLTCTL
EN_LCDVCC 3 3 LCD_PW M_IN
1
2 LCD_TST 2 R110
26 LCD_PW M_EC
80mil 80mil
1
R112 BAT54CW 1 3 BAT54CW 10K_4

10K_4
1
Q7
2
1
AO3409
2
2
R135 C485
1
100K_4 1U/25V_6 C463
2
2
0.1U/25V_6
2
1
LED_BL_ON
R118
120/F_6
2 1
2
BAK_EN R122
2/11 modify net disconnect
100K_4
D4
3
10,26 EDP_BKLTEN 1 Q8
2N7002K
3 LCD_BAK_R R138 0_4 2
A 49 RUN_ON# A
3
26 LCD_BAK 2 26,30,38,47,49 RUN_ON 2

1
R117 Q6
1
*BAT54CW _NC 2N7002W C486

1
*10K_4_NC *0.1U/16V/X7R_4_NC

R116 0_4
2
2
PROJECT : AM9A
EDP/CCD A0

5 4 3 2 1
5 4 3 2 1
+5V_HDMIF1
30
HDMI Conn.
close to HDMI CONN for EMI
2
CN7
D1 D2
SDM10K45-7-F SDM10K45-7-F Female
R341 2 1 0_4
1
TYPE A
D D
HDMI_TX0+_R HDMI_TX0+_C HDMI_TX2+_C 1
+5V_HDMIF1_D24
D2+
HDMI_TX0-_R HDMI_TX0-_C 2
+5V_HDMIF1_D
GND
HDMI_TX0+_C R342 120/F_4 HDMI_TX2-_C 3 D2-
R344 2 1 0_4 HDMI_TX1+_C 4 D1+
R320 2 1 0_4 HDMI_TX0-_C 5 22
GND
HDMI_TX1-_C 6 D1-
HDMI_TX0+_C 7 D0+
HDMI_TX2+_R HDMI_TX2+_C HDMI_TX1+_C R330 120/F_4 8 GND
HDMI_TX2-_R HDMI_TX2-_C HDMI_TX0-_C 9 D0-
HDMI_TX1-_C R84 R83 HDMI_CLK+_C 10 CK+
R325 2 1 0_4 2.2K_4 2.2K_4 11 GND
R329 2 1 0_4 HDMI_CLK-_C 12 CK-
HDMI_TX2+_C R324 120/F_4 13 CEC
14 RSVD
HDMI_TX1+_R HDMI_TX1+_C HDMI_TX2-_C HDMI_SCL_SNK 15 23
SCL
HDMI_TX1-_R HDMI_TX1-_C HDMI_SDA_SNK 16 SDA
17
GND
R333 2 1 0_4 HDMI_CLK+_C R337 120/F_4 HDMIF1 KMC3S110RY +5V_HDMIF1 18
+5V_RUN +5V
R336 2 1 0_4 HDMI_HP 19 HPD
HDMI_CLK-_C
1
HDMI_CLK+_R HDMI_CLK+_C
GND
HDMI_CLK-_R HDMI_CLK-_C 0.1U/16V/X7R_4
C391 20
2
R340 2 1 0_4
3/24 change to pop 21 80146-1021
5/18 change to DFHD19MR250

C
5/14 remove common chock HDMI HPD :
C
1. PS8407A internal PD 150kohm

2. PS8407A has implement level shifter
+3.3V_RUN DC cou;ing enable; Internal pull down at ~150kohm, 3.3V +3.3V_RUN Configuration pin, 3.3V IO, internal pull down at ~150kohm. 3.3V
I/O. I/O.
R97 *4.7K_4_NC HDMI_DCIN_EN L: default, AC coupling input R345 *4.7K_4_NC HDMI_CFG L: HDMI ID disable
H: DC coupling input 11 HDMI_SCL H: HDMI ID enable
11 HDMI_SDA
+3.3V_RUN Enable active DDC buffer; Internal pull down at ~150Kohm, 3.3V +3.3V_RUN
0.01U/25V_4
0.01U/25V_4
0.1U/16V/X7R_4
I/O Receiver equalization setting; Internal pull down at ~150kohm,3.3V
R349 4.7K_4 HDMI_DDCBUF L: default, passive DDC pass-through R347 *4.7K_4_NC HDMI_EQ I/O.
H: active DDC buffer with default threshold L: programmable EQ for channel loss up to 12.4dB
R348 *4.7K_4_NC M: active DDC buffer without internal pull up resistor R346 *4.7K_4_NC
H: programmable EQ for channel loss up to 4.3dB
M: programmable EQ for channel loss up to 8.6dB
C413
C659
+1.35V_RUN C4141
+3.3V_RUN Output pre-emphasis setting; Internal pull down at ~150kohm, 3.3V +3.3V_RUN TMDS output swing adjustment; Internal pull down at ~150kohm, 3.3V
I/O. I/O.
HDMI_SDA_SNK
HDMI_SCL_SNK
R96 *4.7K_4_NC HDMI_PRE L: no pre-emphasis R92 *4.7K_4_NC HDMI_ISET L: default
TP80
H: 1.6dB pre-emphasis H: increase +13%
+1.35V_RUN
R95 *4.7K_4_NC R94 *4.7K_4_NC
+3.3V_RUN
HDMI_ISET
B M: 2.5dB pre-emphasis M: reduce -13% B
U5 VDDRX, VDDTX, VDDTA change to 1.35V because SKL hadn't 1.5V power rail.
41
40
39
38
37
36
35
34
33
32
31
+5V_ALW 2 +15V_ALW +V_VDDQ +1.35V_RUN
VDD33
PD#
INT HDMI EPAD
VDDRX
SDA_SRC
SCL_SRC
GND
SDA_SNK
SCL_SNK
VDDTX
ISET
Near PS8407A
INT_HDMI_TXP2 C418 1 2 0.1U/16V/X7R_4 HDMI_TX2+ 1 30 HDMI_TX2+_R
3 INT_HDMI_TXP2 IN_D2p OUT_D2p
1
INT_HDMI_TXN2 C419 1 2 0.1U/16V/X7R_4 HDMI_TX2- 2 29 HDMI_TX2-_R 8 3
3 INT_HDMI_TXN2 IN_D2n OUT_D2n
1
R98 2 10_4 3 28 HDMI_HP 7 2
11 INT_HDMI_HPD HPD_SRC HPD_SNK
INT_HDMI_TXP1 C420 1 2 0.1U/16V/X7R_4 HDMI_TX1+ 4 27 HDMI_TX1+_R R393 6 1
INT_HDMI_TXN1 HDMI_TX1- HDMI_TX1-_R
3 INT_HDMI_TXN1
INT_HDMI_TXP0
C421
C422
1
1
2 0.1U/16V/X7R_4
2 0.1U/16V/X7R_4 HDMI_TX0+
5
6 IN_D1n PS8407A OUT_D1n 26
25 HDMI_TX0+_R
R399
100K_4
100K_4 5
Q22
2
INT_HDMI_TXN0 C423 1 2 0.1U/16V/X7R_4 HDMI_TX0- 7 24 HDMI_TX0-_R AON7506
DCIN_EN/SCL_CTL
DDCBUF/SDA_CTL
3 INT_HDMI_TXN0 IN_D0n OUT_D0n
4
8 23 HDMI_CFG 1 2
I2C_CTL_EN CFG/I2C_ADDR1
1
INT_HDMI_TXCP HDMI_CLK+
EQ/I2C_ADDR0
C424 1 2 0.1U/16V/X7R_4 9 22 HDMI_CLK+_R R394 10K_4

3 INT_HDMI_TXCP IN_CKp OUT_CKp
3
INT_HDMI_TXCN C425 1 2 0.1U/16V/X7R_4 HDMI_CLK- 10 21 HDMI_CLK-_R C660
3 INT_HDMI_TXCN IN_CKn OUT_CKn 5 Q23A 0.1U/10V_4
2
1
2N7002KDW
VDDRX
VDDTA
VDDTX
VDD33
6
C681
REXT
GND
PRE
4
26,29,38,47,49 RUN_ON 2 Q23B 0.047U/25V_4
2
2N7002KDW
11
12
13
14
15
16
17
18
19
20
1
A A
+1.35V_RUN
+1.35V_RUN
+1.35V_RUN
+3.3V_RUN
HDMI_DCIN_EN
HDMI_DDCBUF
HDMI_PRE
HDMI_EQ

C664 2 1 0.1U/16V/X7R_4 C661 2 1 0.1U/16V/X7R_4
C662 2 1 0.1U/16V/X7R_4
C415 0.01U/25V_4 C663 2 1 0.1U/16V/X7R_4
+1.35V_RUN
R93
3.9K/F_4 PROJECT : AM9A
HDMI/Re-driver A0
5/16 change to 3.9K ohm Date: Monday, May 25, 2015 Sheet 30 of 57
5 4 3 2 1
5 4 3 2 1
26 MY[0..15]
MY[0..15]
31
Key board illumination +KB_LED power trace width >10 mil
MX[0..7]
26 MX[0..7]
FS1
Keyboard Connector CN2

Q11
2N7002K 192mA +5V_RUN 1
1206L050YR
2 +KB_LED_PWR
LED_PWM# J1
196451-30041-3 1 3
1
1
1
KB_LED_DET 1 R179 2 KB_LED_DET_R 2
10 KB_LED_DET 2
D 3 5 C502 D
32
3 5
1
KB_DET# 100K_4 LED_PWM# 4 6 0.1U/16V/X7R_4
10 KB_DET# 30 4 6
2
MX7 R178
MX6 29 KB_BACKLITE_EN 200K_4
28 26 KB_BACKLITE_EN 51575-00401-V01
MX4
MX2 27
26
2
MX5
MX1 25 MY1 EC67 100P/50V_4
MX3 24 MY2 EC66 100P/50V_4
MX0 23 MY4 EC72 100P/50V_4
MY5 22 MY0 EC65 100P/50V_4
MY4 21
MY7 20 MX4 EC80 100P/50V_4
19
Vi(on_max)= -1.4V
MY6 MX6 EC81 100P/50V_4
MY8 18 MX3 EC75 100P/50V_4
17
MY3
MY1 16
15
MX2 EC78 100P/50V_4
Vi(off_min)=-0.3
MY2 MY5 EC73 100P/50V_4
MY0 14 MY6 EC70 100P/50V_4
MY12 13 MY3 EC68 100P/50V_4 +5V_RUN
MY16 12 MY7 EC71 100P/50V_4
26 MY16 11
MY15
MY13 10 MY8 EC69 100P/50V_4
9
1
MY14 MY9 EC56 100P/50V_4
MY9 8 MY10 EC54 100P/50V_4 Q20
MY11 7 MY11 EC55 100P/50V_4 LTA014YUBFS8TL
MY10 6 47K
CAP_LED_L 5 MX7 EC79 100P/50V_4 2
4 MX0 EC74 100P/50V_4
3 10K
3
MX5 EC77 100P/50V_4
2 MX1 EC76 100P/50V_4 CAP_LED 2
1 9 CAP_LED
Q21
31
3
1
MY12 EC62 100P/50V_4 2N7002W
1
MY13 EC59 100P/50V_4 R352
MY14 EC57 100P/50V_4 10K_4 R350
C C
MY15 EC60 100P/50V_4 150_4
MY16 EC61 100P/50V_4 1 2 CAP_LED_L
2
8.67mA
Based on EEIG to add TP power controller circuity

Touch Pad Connector +3.3V_TP
PTP is operation on 400KHz TPDATA 4.7K_4 R151

+3.3V_RUN PU resistor is 0.4K ~ 2.4K if TPCLK 4.7K_4 R150
Capacitance less than 100pF PTP_DISABLE# 10K_4 R170
+3.3V_TP
+15V_ALW +3.3V_SUS +3.3V_TP
3/18 modify ref AM8 TP_INTR# 10K_4 R171
3/1 modify ref AM6 R415

2
*0_6_NC
1
+3.3V_TP Vendor suggestion 10K PU(01/27 mail)
2
R416 Q9B *2N7002KDW_NC
1
33_6 1 6
3 1 12 PCH_I2C_DAT_TP 25 mils
R417 R172 R173 C503 0.1U/16V/X7R_4
6
100K_4 Q26 2N7002K 1 2 *1K_4_NC *1K_4_NC C504 0.1U/16V/X7R_4

2 Q25B R163 0_4
2
2N7002KDW C509
1
5
B 0.1U/16V_4 Q9A *2N7002KDW_NC B
8 10
2
TP_PWR_EN TP_I2C_DAT
4 3 TP_I2C_CLK 7 9
12 PCH_I2C_CLK_TP 6
3
5
1
5 Q25A C689 TP_INTR#

26 TP_PWR_EN# 4
2N7002KDW 1 2
0.1U/16V_4 R159 0_4 TPDATA-1 3
2
4
TPCLK-1
1
50503-0080N-001
CN4
26 PTP_DISABLE#
26 TPDATA R162 0_4

26 TPCLK R161 0_4
3/1 add EC25 *10P/50V_4_NC
EC24 *10P/50V_4_NC
3/18 modify ref AM8

D6 SDM10K45-7-F
2 1 TP_INTR#
9 PCH_TP_INTR#
26 TP_INTR#
A A

PROJECT : AM9A
KB/TP A0

5 4 3 2 1
A B C D E
32
+3.3V_RTC_LDO +3.3V_ALW
3VALW_ON POWER LOGIC
2
1
R445
4 R447 100K_4 4
*10K_4_NC
1
2
1 USB_CHG_DET#_EC 26 +3.3V_RTC_LDO +3.3V_ALW +3.3V_RTC_LDO
3
34 USB_CHG_DET#
C728
2
D16 2 LATCH 0.1U/16V/X7R_4
R435 R436
BAT54CW *10K_4_NC 10K_4
2
R443 R448
1
100K_4 100K_4
1 SYS_PW R_SW # 26
1
1
POW ER_ SW _IN0# 3 3.3V_ALW _ON 33
C712
1
D15 2 0.1U/16V/X7R_4
2
C714 C725
*0.1U/16V/X7R_4_NC BAT54CW 0.01U/25V_4
2
3
LATCH 5 Q31A
2N7002KDW
4
*0.1U/16V/X7R_4_NC Q31B
6
C716 2N7002KDW
2
3
Q30 2
3
POWER BOARD CONN 26,39,40 ACAV_IN 2
26,45 ALW _ON
3
1
+5V_ALW 2N7002W
1
J2
1
1
1
C517 2 POW ERLED

0.1U/16V/X7R_4 2 3
3
3
4 POW ER_ SW _IN0#

4
2
2
POW ER_LED 26
50505-00401-V01
Q12
1
2N7002W
2 2
GPU CPU
H7 H17 H1 H8 H10 H3 H6 H4 H11 H5 H9
H-C157O83X126P2 O-AM9-3 H-C315D94P2 h-tc256bc150d150pt h-tc256bc150d150pt h-tc256bc150d150pt h-tc256bc150d150pt h-tc256bc150d150pt h-tc256bc150d150pt h-tc256bc150d150pth-tc256bc150d150pt
1
1
PCH
H20 H18 H2 H16 H14 H15 H13
H-O83X126D83X126N O-AM9-3 H-C315D94P2 O-AM9-3 H-TC217BC142D142PT H-TC217BC142D142PT h-c303d197p2
1
1 1
H19 H12 PAD2 PAD1

h-c157d83p2 h-c303d197p2
*SPAD-RE275X275NP *SPAD-RE275X275NP
PROJECT : AM9A
1

3VALW ON POWER LOGIC A0

A B C D E
1 2 3 4 5 6 7 8
CPU FAN1 CONN HWPG

33
+5V_FAN +3.3V_RUN
Max Current : 400 mA
+3.3V_RUN +5V_RUN R201
10K_4
C334 4.7U/6.3V_6
A 46 DDR_PW RGD 1 2 A
R55 C339 0.1U/16V/X7R_4 R202 0_4
10K_4
50278-00401-001 1 2
48 1V_PW RGD HW PG 4,26
26 FAN1_PW M R203 0_4
1
26 FAN1_TACH 2 5
3 5 6 1 2
4 6 47 VCCIO_PGOOD
R433 0_4
FAN1
1 2 THERM_STP#
R226 0_4
45 +3.3V_EN2 1 2 3.3V_ALW _ON 32
GPU FAN2 CONN

R228 0_4
+3.3V_RUN +5V_RUN
C371 4.7U/6.3V_6
R75 C370 0.1U/16V/X7R_4
10K_4
50278-00401-001
26 FAN2_PW M 1
B B
26 FAN2_TACH 2 5
3 5 6
4 6
FAN2
SYS_SHD#
THERMAL IC OTP 85 degree C 2K 7.5K 10.5K 14K 18.7K

ALERT#
R262 1 2 18.7K/F_4 THERM_ALERT#
+3.3V_RUN
R264 2K/F_4 SYS_SHDN# 2K 77'C 87'C 97'C 107'C 117'C
Need closed to CPU OTP 85 degree : R526= 18.7K, R527= 2K

+3.3V_RUN 7.5K 79'C 89'C 99'C 109'C 119'C
Place under CPU 10/20mils

C C
REM_DIODE1_P
10.5K 81'C 91'C 101'C 111'C 121'C
C225 C574 U9
3
1 8 SMBCLK3 SMBCLK3 20,26 14K 83'C 93'C 103'C 113'C 123'C

Q4 2 *2200P/50V_4_NC 2200P/50V_4 VDD SCL
MMST3904-7-F 2 7 SMBDAT3 SMBDAT3 20,26
DP SDA
2
2
1
50 REM_DIODE1_N 50 3 6 THERM_ALERT# 18.7K 85'C 95'C 105'C 115'C 125'C

DN ALERT#
4 5
SYS_SHDN# GND
NCT7718W
1
C573
0.1U/16V/X7R_4
2
SYS_SHDN#
Q17
2N7002W
1 3 THERM_STP#
THERM_STP# 26
D D
2
10,26 EC_PW ROK

2

R263
100K_4 External resistor is required for output de-glitch.
PROJECT : AM9A
1

FAN & THERMAL A0

1 2 3 4 5 6 7 8
5 4 3 2 1
USB Power share USB3.0/2.0 COMBO X 1

USBP0_BUS_SW_CB0
High
Mode
CDP
Operating at
S0, 1.5 A
+USB_SIDE3_PW R
+USB_SIDE3_PW R
34
C483 1 2 150P/50V_4 CN8
Low DCP, Auto-detect S3/S4/S5, 2.1/1.5 A C684 1 2 *10U/6.3V_8_NC 100 mil 1

EL3 VBUS
C481 10U/6.3V_6 USB2_N1_R 1 2 USB2_N1_L 2
USB2_P1_R 4 3 USB2_P1_L 3 D- USB2.0
C482 1 2 0.1U/16V/X7R_4 D+
DLP11SN900HL2L 4
GND
D Close to CONN EL1 USB3.0_RXN1_L 5
D
1 2 USB3.0_RXN1_L USB3.0_RXP1_L 6 SSRX-

11 USB3_RXN1 USB3.0_RXP1_L SSRX+
4 3
11 USB3_RXP1 USB3_TXN1_L 8 USB 3.0
R133 R128 DLW 21HN900HQ2L USB3_TXP1_L 9 SSTX-
22.6K/F_4 78.7K/F_4 SSTX+ 11
+5V_ALW 7 GND 12
GND 12 13
USB_OC0# 9 GND
10 14
32 USB_CHG_DET#
ILIM_LO
D1 DETECT GND
ILIM_HI
1
C496 *4.7U/6.3V_6_NC
EL2 EC20 YUSB0012-P001A
+USB_SIDE3_PW R C460 1 2 0.1U/16V/X7R_4 USB3.0_TXN1_C 1 2 USB3_TXN1_L 100P/50V_4
11 USB3_TXN1
2
C497 0.1U/16V/X7R_4 C462 1 2 0.1U/16V/X7R_4 USB3.0_TXP1_C 4 3 USB3_TXP1_L
17
16
15
14
13
11 USB3_TXP1
U7
DLW 21HN900HQ2L
PwPd
ILIM_HI
ILIM_LO
GND
FAULT
5/18 change to short pad 1
IN OUT
12
5/14 remove co-lay resistor,
9 USB2_N1
2
3 DM_OUT DM_IN
11
10
USB2_N1_R
USB2_P1_R pop EL1,EL2 Need closed to CN9
9 USB2_P1 DP_OUT DP_IN
4 9
R404 *SHORT_4_NC +5V_ALW _USB3 ILIM_SEL STATUS EU1
+5V_ALW
3/17 remove
CTL1
CTL2
CTL3
USB3.0_RXN1_L 5 6 USB3.0_RXN1_L
1
EN
C688 2+ NC
USB3.0_RXP1_L 4 7 USB3.0_RXP1_L
*100P/50V_4_NC TPS2546RTER R89 mA
2
2- NC
5
6
7
8
+5V_ALW
3 8
USB3_CTL2 R132 GND GND
26 USB_BACK_EN 100K_4 OC 22.6k ohm 2224 USB3_TXN1_L 2 9 USB3_TXN1_L
C limitation 1+ NC C
1
USB3_TXP1_L 1 10 USB3_TXP1_L
C490 23.2k ohm 2167 1- NC
*100P/50V_4_NC
2
AZ1045-04F
26 USBP0_BUS_SW _CB0
1
C487
*100P/50V_4_NC
2
B B
A A

PROJECT : AM9A
USB3/USB Charger A0

5 4 3 2 1
5 4 3 2 1
35
D D
3V3aux is 375mA
+3.3V_RUN +3.3V_RUN +3.3V_RUN
R450 R451
10K_4
10K_4
1
SD_CD#
SD_WP
CR_W AKE# C737 C732
2
4.7U/6.3V_6 0.1U/16V_4
32
31
30
29
28
27
26
25
U17 5/14 change value for EMI
R437 change to 33ohm SD / MMC
WAKE#
MS_INS#
SD_CD#
SP7
3V3aux
GPIO
NC
NC
+CARD_3V3
C717 change to 5.6p
CARD READER
C C
1 24 C522 1 2 0.1U/16V_4
9,17,26,28,36,37 PLTRST# PCIE_CLKREQ_CR# PERST# NC
2 23 JCARD1
0.1U/16V_4 PCIE_TXP7_C CLKREQ# NC SD_D2
9 PCIE_TXP7
C726
C722 0.1U/16V_4 PCIE_TXN7_C
3
4 HSIP RTS5227S NC
22
21 SD_D2
C521 4.7U/6.3V_6
SD_D3
1
2 DAT2
9 PCIE_TXN7 HSIN SP6 DAT3
12 CLK_PCIE_CRP
5
REFCLKP SP5
20 SD_D3 Near JCARD1 SD_CMD 3
CMD
6 19 SD_CMD SD_CD# 4
12 CLK_PCIE_CRN REFCLKN SP4 C/D
C720 2 1 0.1U/16V_4 PCIE_RXP7_C 7 18 DV33_18 5
9 PCIE_RXP7 HSOP DV33_18 VSS1
C719 2 1 0.1U/16V_4 PCIE_RXN7_C 8 17 SDCLKR1 2 SD_CLK 6
9 PCIE_RXN7 HSON SP3 VDD
CARD_3V3
R437 33_4 SD_CLK 7
8 CLK
3V3_IN
VSS2
DV12S
C717 C721 SD_D0 9
RREF
AV12
DAT0
SP1
SP2
5.6P/50V_4 1U/6.3V_4 SD_D1 10
NC
33 GND SD_W P 11 DAT1
+3.3V_RUN 12 W/P
GND
9
10
11
12
13
14
15
16
Near pin18 13
GND
14
R449 SD_D0 15 GND
R434 RREF SD_D1 GND
6.2K/F_4 AV12 PSDBR2-09GLBS1NN4H0
10K_4 AV12 DFHS11FR148
1
sdcard-psdbr2-09glbs1nn4h0-11p
C711 C709
1
PCIE_CLKREQ_CR# 0.1U/16V_4 4.7U/6.3V_6
12 PCIE_CLKREQ_CR#
2
C708 C710
*4.7U/6.3V_6_NC 0.1U/16V_4 +CARD_3V3
2
Near pin10
B
3/11 remove mos Near pin14 B
The system power rail capacity of 3V3_IN

shellsreserve 1.2A at least
+3.3V_RUN
C523 1 C524
10U/6.3V_6 0.1U/16V_4
2
Near pin11
A A

PROJECT : AM9A
Card Reader RTS5227S A0

5 4 3 2 1
A B C D E
36
4 4
M.2 (NGFF) A-KEY

WLAN/BT(Option) +3.3V_RUN
+3.3V_RUN
CN10 +3.3V_RUN
R452 1 2 0_4
2
W LAN_W AKE#_R R235 1 2 10K_4
1
NGFF 2
USB2_P5_R 3 GND 3.3V 4 3 1 W LAN_CLKREQ# R241 1 2 10K_4
9 USB2_P5 USB2_N5_R USB_D_P 3.3V 12 PCIE_CLKREQ_W LAN#
5 6 Q29
9 USB2_N5 USB_D_N LED_WLAN
7 8 *2N7002W _NC
9 GND Module Key 10 2 1
R453 1 2 0_4 11 Module Key Module Key 12 R442 0_4
13 Module Key Module Key 14
17 Module Key LED_BT 18
19 NC GND 20
21 NC NC 22 +3.3V_RUN
23 NC NC 24
25 NC Module Key 26
Module Key Module Key
1
29 30
Module Key Module Key
2/3 move to conn page 31
Module Key NC
32 C529 C533 C700 C526 C701
33 34 0.1U/16V/X7R_4 0.047U/10V_4 0.1U/16V/X7R_4 0.047U/10V_4 4.7U/6.3V_6
GND NC
2
C736 0.1U/16V_4 PCIE_TXP6_C 35 36
9 PCIE_TXP6 PERp0 NC
C731 0.1U/16V_4 PCIE_TXN6_C 37 38
9 PCIE_TXN6 PERn0 RSVD
3 39 40 3
41 GND RSVD 42
9 PCIE_RXP6 PETp0 RSVD
9 PCIE_RXN6 43 44
45 PETn0 LTE_ACTIVE 46
47 GND LTE_PRI 48
12 CLK_PCIE_W LANP REFCLKP LTE_SYNC
49 50
12 CLK_PCIE_W LANN REFCLKN SUSCLK(32kHz)
51 52
W LAN_CLKREQ# GND PERST# BT_RADIO_DIS# PLTRST# 9,17,26,28,35,37
53 54
W LAN_W AKE#_R CLKREQ# BT_DISABLE# W LAN_ON/OFF# BT_RADIO_DIS# 10
55 56
PEWAKE# WLAN_DISABLE# W LAN_ON/OFF# 10
57 58
59 GND I2C_DATA 60
61 NC I2C_CLK 62
63 NC ALERT 64 LPC_LAD0_R R242 1 2 0_4 LPC_LAD0
65 GND RSVD 66 LPC_LAD1_R R236 1 2 0_4 LPC_LAD1 LPC_LAD0 11,26
67 NC UIM_SWP 68 LPC_LAD2_R R233 1 2 0_4 LPC_LAD2 LPC_LAD1 11,26
69 NC UIM_POWER_SNK 70 LPC_LAD3_R R232 1 2 0_4 LPC_LAD3 LPC_LAD2 11,26
CLK_24M_DEBUG 71 GND UIM_POWER_SRC 72 LPC_LAD3 11,26
11 CLK_24M_DEBUG LPC_LFRAME#_R NC 3.3V
R231 1 2 0_4 73 74 Remove on MP
11,26 LPC_LFRAME# NC 3.3V
75
GND
GND
GND
Remove on MP
APCI0162-P001A
76
2 77 2
1 1

PROJECT : AM9A
WLAN/BT A0

A B C D E
5 4 3 2 1
LAN_XTALI C347 10P/50V_4

MDI0+
MDI0-
VDD10
VDD10 C626
C625
0.1U/16V/X7R_4
0.1U/16V/X7R_4
LAN POWER 37
MDI1+ C645 0.1U/16V/X7R_4
151mA
3
4
MDI1-
Y1 MDI2+ C343 0.1U/16V/X7R_4 +3.3V_ALW +3VLANVCC
25MHz MDI2- U13
VDD10
TPS22965DSGR
3/3 remove
1
2
D Each CAP near IC pin 3 , 8 , 22 , 30 1 2 1
VIN_01 VOUT_02
8 D
C638 1U/6.3V_4
LAN_XTALO C345 10P/50V_4
U2 3/3 remove 2
VIN_02 VOUT_01
7
33
8
7
6
5
4
3
2
1
RTL8111GUS 3 6 LAN_CT C634
26 LAN_PWR_EN_EC ON CT 0.1U/10V_4
GND
AVDD10
MDIN2(NC)
MDIP2(NC)
MDIN1
MDIP1
AVDD10(NC)
MDIN0
MDIP0
+5V_ALW 4 5
VBIAS GND
PAD
1
C341 *4.7U/6.3V_6_NC C647
1
1000P/50V_4
2
C632 *4.7U/6.3V_6_NC C653 C648
MDI3+ 9 32 +3VLANVCC C627 0.1U/16V/X7R_4 0.1U/10V_4 0.01U/25V_4
MDIP3(NC) AVDD33
2
MDI3- 10 31 RTL8111G_REST
C628 0.1U/16V/X7R_4 +3VLANVCC 11 MDIN3(NC) RSET 30 VDD10 R58 2.49K/F_4
PCIE_CLKREQ_LAN# 12 AVDD33(NC) AVDD10 29 LAN_XTALO
C368 0.1U/16V/X7R_4 PCIE_TXP5_C 13 CLKREQB CKXTAL2 28 LAN_XTALI
9 PCIE_TXP5 HSIP CKXTAL1
C369 0.1U/16V/X7R_4 PCIE_TXN5_C 14 27 LAN_LED0 TP15
9 PCIE_TXN5 HSIN LED0 LAN_LED1 +3.3V_RUN +3VLANVCC
12 CLK_PCIE_LANP 15 26 TP78
VDDREG(DVDD33)
16 REFCLK_P LED1/GPO 25 LAN_LED2 TP79
12 CLK_PCIE_LANN REFCLK_N LED2(LED1)
REGOUT(NC)
R303
DVDD10(NC)
LANWAKEB
R321
3/3 change to 1K
ISOLATEB
PERSTB
10K_4
HSON
HSOP
1K_4
PCIE_CLKREQ_LAN# PCIE_EC_WAKE#
PCIE_CLKREQ_LAN# 12 PCIE_EC_WAKE# 26
17
18
19
20
21
22
23
24
C C
3/12 modify
change net name REG_OUT
C642 0.1U/16V/X7R_4 PCIE_RXP5_C +3VLANVCC
9 PCIE_RXP5
C643 0.1U/16V/X7R_4 PCIE_RXN5_C VDD10
9 PCIE_RXN5
9,17,26,28,35,36 PLTRST# LAN_ISOLAT# C624 C635
PCIE_EC_WAKE# C356 C357
0.1U/16V/X7R_4
4.7U/6.3V_6
0.1U/16V/X7R_4
1U/6.3V_4
3/3 update footprint
SW mode
4.7uH_760mA_DCR=0.2 @1MHz
near IC pin 23 REG_OUT L4 VDD10
+3.3V_RUN 1K_4 R73 LAN_ISOLAT# near IC pin 22 2/4 exchange location,
C352 C2249 near L2004
C359 C360
CN6
*0.1U/16V/X7R_4_NC
0.1U/16V/X7R_4
4.7U/6.3V_6
LAN_MX3- 8
RX1-
B
3/3 change to NC LAN_MX3+
LAN_MX1-
7
6 RX1+ 9 B
LAN_MX2- 5 RX0- GND 10
LAN_MX2+ 4 TX1- GND 11
TX1+ GND
EMI LAN_MX1+
LAN_MX0-
3
2 RX0+
TX0-
GND
12
MDI1+ MDI1- MDI0+ MDI0- EMI U12

LAN_MX0+ 1
TX0+
EC18 *6.8P/50V/NPO_4_NC MDI3+ 1 24 LAN_MX3+
EC17 *6.8P/50V/NPO_4_NC MDI3- 2 TD1+ MX1+ 23 LAN_MX3-
EC16 *6.8P/50V/NPO_4_NC MDI2+ 5 TD1- MX1- 20 LAN_MX2+
EC15 *6.8P/50V/NPO_4_NC MDI2- 6 TD2+ MX2+ 19 LAN_MX2-
1
C287 C254 C215 C199 EC14 *6.8P/50V/NPO_4_NC MDI1+ 7 TD2- MX2- 18 LAN_MX1+ C100MP-10809-L
EC13 *6.8P/50V/NPO_4_NC MDI1- 8 TD3+ MX3+ 17 LAN_MX1- DFTJ08FR414
TD3- MX3-
EC12 *6.8P/50V/NPO_4_NC MDI0+ 11 14 LAN_MX0+
3/19 modify rj45-c100mp-10809-l-8p
2
*MLVG04021R0UV18BP_NC *MLVG04021R0UV18BP_NC *MLVG04021R0UV18BP_NC *MLVG04021R0UV18BP_NC EC11 *6.8P/50V/NPO_4_NC MDI0- 12 TD4+ MX4+ 13 LAN_MX0-
TD4- MX4-
TRA_V_DAC 3 22 LAN_MCTG3 R54 75_4
MDI3+ MDI2+ MDI3- MDI2- TRA_V_DAC 4 TCT1 MCT1 21 LAN_MCTG2 R53 75_4
TRA_V_DAC 9 TCT2 MCT2 16 LAN_MCTG1 R45 75_4
TRA_V_DAC 10 TCT3 MCT3 15 LAN_MCTG0 R43 75_4 LAN_MCTG C593 1000P/3KV_18
TCT4 MCT4
1
C336 C310 C323 C302 NS692417

C228
2
0.1U/16V/X7R_4
*MLVG04021R0UV18BP_NC *MLVG04021R0UV18BP_NC *MLVG04021R0UV18BP_NC *MLVG04021R0UV18BP_NC FCE: NS692417, DB0KL3LAN02
BOT: NA0069R LF, DB0KL3LAN01
A A

PROJECT :AM9A
LAN(RTL8111GUS)/RJ45 A0

5 4 3 2 1
5 4 3 2 1
38
MB to IO Connector
D D
DMIC_DATA_R EC33 *10P/50V_4_NC

+5V_ALW DMIC_CLK_R EC32 *10P/50V_4_NC
CN5 HDA_BITCLK_R EC28 *10P/50V_4_NC
USB3_TXN2
1 USB3_TXP2 USB3_TXN2 11
2 USB3_TXP2 11
1
C512 C513 3 USB3_RXN2

0.1U/16V/X7R_4 1U/6.3V_4 4
5
USB3_RXP2 USB3_RXN2
USB3_RXP2
11
11 LED Board CONN
2
6
7 USB2_N2 9 +3.3V_ALW +5V_ALW
8 USB2_P2 9
9 USB3_TXN3 J3
10 USB3_TXP3 USB3_TXN3 11
1
+3.3V_RUN +3.3V_SUS 11 USB3_TXP3 11 BAT_LED_W # 1
2
12 USB3_RXN3 BAT_LED_AMBER# 3 2
13 USB3_RXP3 USB3_RXN3 11 3
4
14 USB3_RXP3 11 LID_SW # 4
5
15 26 LID_SW # 5
1
USB2_N3 9 6
C746 C745 16 6
17 USB2_P3 9
0.1U/16V/X7R_4 0.1U/16V/X7R_4
18 5/21 change to short pad 50506-00641-V01
2
HDA_BITCLK_R R234 *SHORT_4_NC

19 HDA_SDOUT HDA_BITCLK 10
20 HDA_SDIN0 HDA_SDOUT 10
+3.3V_RUN
21 HDA_SDIN0 10
HDA_SYNC 2/10 add HDA RST
C
22
23
24
ACZ_SPKR
BEEP
HDA_SYNC
HDA_RST#
ACZ_SPKR
10
10
10
Mobile HDA codec didn't need
reset signal control from host Battery LED Battrey charger LED C
25 BEEP 26
3
Q13B Q13A
+5V_RUN 26 SUB_MUTE# 26 BAT_LED_W HITE BAT_LED_AMBER
2 5 BAT_LED_AMBER 26
27 NB_MUTE# 26 26 BAT_LED_W HITE
2
28 DMIC_CLK_R R246 0_4 R239 2N7002KDW 2N7002KDW
29 DMIC_CLK 29
4
DMIC_DATA_R R248 0_4 10K_4
30 DMIC_DATA 29
1
31 USB_RIGHT_EN# 26 Vsd(typ)=0.82 V Vsd(typ)=0.82 V

C530 C531 IF (rating) =115mA IF (rating) =115mA
32 USB_OC1# 9
3
0.1U/16V/X7R_4 1U/6.3V_4 RUN_ON 26,29,30,47,49
33
2
+3.3V_SUS SATALED# 5
34 10 SATALED#
35 +3.3V_RUN
6
+3.3V_ALW 2N7002KDW Q16A
36
4
2
41 37 26 HDD_LED_EN#
R238
42 38 0_4 2N7002KDW Q16B
43 39 +5V_RUN
1
44 40
28 SSD_LED#
50473-0400M-V01
B
POWER & AUDIO SPEAKER CON +PW R_SRC
B
+5V_ALW 2
50281-00401-001
CN3 CN1
1
AUD_SPK_L+
1 AUD_SPK_L- 1 C489 C690 C724
2 AUD_SPK_R- 2 0.1U/25V_6 0.1U/25V_6 0.1U/16V/X7R_4
3 3 2
2
AUD_SPK_R+
4 4
5
6 EC42 1 2 *100P/50V_4_NC
7 EC43 1 2 *100P/50V_4_NC
8 +5V_ALW
EC44 1 2 *100P/50V_4_NC +PW R_SRC
50281-00801-001 EC45 1 2 *100P/50V_4_NC
Near CN3
1
1
C748 C665 C747 C682 C623
0.1U/25V_6 0.1U/25V_6 0.1U/25V_6 0.1U/25V_6 0.1U/25V_6
2
2
A A

PROJECT : AM9A
IO BD CONN/LED A0

5 4 3 2 1
A B C D E
+VCHGR
EC29 ESD1
0.1U/25V_6 1 6 SMBCLK0
1 2 2 1 6 5
PBAT_PRES# 2 5 +3.3V_ALW
3 4 SMBDAT0
EC30 3 4
1000P/50V_4 *TVL ST23 04 AD0_NC
1 2
5/18 change to DFHD11MS028

1 1
EC31 +3.3V_ALW
2200P/50V_4
1 2
1
JBAT1
50288-01171-V01 PR222
11 10K/F_4
BATT1+ 10
BATT2+ 9
BATT3+
2
8 SMBCLK0_B PR223 1 2 100_4
SMB_CLK 7 SMBDAT0_B PR224 1 2 100_4 SMBCLK0 26,40
SMB_DAT 6 SMBDAT0 26,40
PR221 1 2 100_4
BATT_PRES# 5 PBAT_PRES# 26,40
SYSPRES# 4
BATT_VOLT 3
BATT3- 2
BATT2- 1
BATT1-
2 2
5/18 change to DFHD08MS160 +5V_ALW2 +3.3V_ALW
CN11
50293-0087N-002
A1
1
B1
A2
B2 Q1 PR203
2.2K_4
A3
PQ29
B3
2
EL14 FDV301N PR202 PD1
A4
3
FCM1005KF-102T03(1000 300MA) 33_4 BAV99W-7-F
B4 +DOCK_PSID 1 2 3 1 1 2
A5 PS_ID 26
B5 +DCIN_JACK
1
PR196
A6
B6
10K/F_4 The ESD is highly potential
2
PR193 1 2
+5V_ALW2
A7
B7
100K/F_4 issue on PSID pin(Q1), a
1
A8 Gate-Source zener for ESD

2
1
2 PQ28
B8
PD2
PC229 MMST3904-7-F ruggedness, such as
1
100P/50V_4
FDV301N(Fairchild) is
2
*BAS316_NC
2
PR186
15K/F_4
recommended or able to sustain
6KV ESD protection.
2
FL1
HCB2012KF800T50(80,5A)
1 2 +DC_IN
3 3
FL2
HCB2012KF800T50(80,5A)
1 2
+5V_ALW2
1
1
EC38 EC37 EC36 PC239 PR194 PR185
2200P/50V_4 1000P/50V_4 0.1U/25V_6 0.1U/25V_6 6.8K_4 6.8K_4
2
1 PR214
2
100K/F_4
PQ31
2
2N7002W
3
PQ36 2
2N7002W
1
3
2
26,32,40 ACAV_IN
1
4 4

PROJECT : AM9A
DCin & Bat A

A B C D E
5 4 3 2 1
Reverse Input Voltage Protection
3
PR195
*1M/F_4_NC
2
PQ30
PR201 *LU1L002SNFS8_NC
*1M/F_4_NC
1
D D
PQ40 PQ41 +PW R_SRC

+DC_IN RQ3E100BNFU7TB +DC_IN_SS RQ3E100BNFU7TB PR232
0.01_0612
8 3 3 8
7 2 2 7 1 2
1 2
5/18 6 1 1 6 1P
1P 2P
2P
5 5
1
1
4
4
PR61 PC84 PC85
2.2_12 1000P/50V_4 0.047U/25V_4
2
2
2
1
PC241
PQ33
1
PC88 0.1U/25V_4 PR231
8
7
6
5
2.2U/25V_4 0.01_PJ RQ3E100BNFU7TB
PR217 PR218 1 2
2
4.02K/F_6 4.02K/F_6 4
2
1
1
PR234 PD4
CHGR_ACP
CHGR_ACN
PC251 PC250 10_12 1SS355VM
2
1U/25V_6 0.1U/25V_4 2 1 1 2 +DC_IN
3
2
1
PD3
PC245 1SS355VM
1U/25V_6 1 2
CHGR_VCC +VCHGR
1 2
CHGR_REGN
28
2
1
EC87 PC230 PC232 PC231
ACP
ACN
VCC
CHGR_REGN = 6V PC226 2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8
2
2.2U/10V_6
C CHGR_CMSRC 3 24 CHGR_REGN 1 2 C
CMSRC REGN
1
PR219 PC236
5
6
7
8
PR228 0_6 0.047U/25V_4
220K/F_4 CHGR_ACDRV 4 25 CHGR_BST1 2 1 2
ACDRV BTST 4 PQ37 +VCHGR
RQ3E070BNFU7TB
2
CHGR_ACDET 6 26 CHGR_HIDRV PR220

PR211 ACDET HIDRV PL15 0.01_0612
1
2
3
0_4 6.8UH (MMD-06CZ-6R8M-V1Q)
1 2 SMBDAT0_P 11 27 CHGR_PHASE 1 2 +VCHGR_P 1 2
26,39 SMBDAT0 SDA PHASE 1 2
1
PR200 1P 2P
1P 2P
1
PR229 0_4
5
6
7
8
1
PC246 35.7K/F_4 CHGR_REGN 1 2 SMBCLK0_P 12 23 CHGR_LODRV PC242
0.01U/50V_4 26,39 SMBCLK0 PR230 SCL LODRV 2200P/50V_4
2
0_4 PU15 4 PQ32

2
2
1 2 CHGR_ACOK 5 BQ24780SRUYR 22 RQ3E070BNFU7TB PC79
ACOK GND
1
1
CHGR_HIDRV 0.1U/25V_4
TP102
1
PR237 PC238 1 2 100P/50V_4 1 2 PC227 PC228
1
2
3
8.06K/F_4 7 CHGR_LODRV PR235 10U/25V_8 10U/25V_8
26 IINP IADP TP98
2
2.2_8
1
2
1
CHGR_IDCHG 8 20 CHGR_SRP PR189 PR188
TP101 IDCHG SRP
2
PR216 PC82 10_6 10_6 PC81
26,32,39 ACAV_IN
0_4 0.1U/25V_4 0.1U/25V_4
2
1 2 9 19 CHGR_SRN
41 SYS_PMON PMON SRN
2
PR215
1
0_4
PR236 1 2 CHGR_PROCHOT# 10 15
4,26,41 H_PROCHOT# PROCHOT BATPRES PBAT_PRES# 26,39
10K/F_4
13 18 CHGR_BATDRV 1 2 CHGR_BATDRV_P
CMPIN BATDRV
2
PR192
100K/F_4 4.02K/F_6
+3.3V_ALW
1 2 21 17 CHGR_BATSRC 1 PR187 2 +VCHGR_P
ILIM BATSRC
10_6
14 16 CHGR_TB_STAT PR190
CMPOUT TB_STAT
1
B B
PR199 PR191 PC224
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
22.1K/F_4 6.04K/F_4 100P/50V_4

2
ChargeOption0 [2]: Hybrid Power Boost Mode

2
29
30
31
32
33
34
35
36
37
38
ChargeOption0 [2]=0, Disable Hybrid Power Boost Mode <defaule> --> Set
ChargeOption0 [2]=1, Enable Hybrid Power Boost Mode
ChargeOption0 [9:8]: Switching Freq Setting

ChargeOption0 [9:8]=00, 600KHz
ChargeOption0 [9:8]=01, 800KHz <defaule> --> Set
ChargeOption0 [9:8]=10, 1MHz
Charge Current Limit = 3A ChargeOption0 [4]: IADP Amplifier Gain
Discharge Current Limit =3A ChargeOption0 [4]=0, 20X <default> --> Set
ChargeOption0 [4]=1, 40X
ChargeOption0 [3]: IDCHG Amplifier Gain

ChargeOption0 [3]=0, 8x with discharge current regulation range 0-32A
ChargeOption0 [4]=1, 16x with discharge current regulation range 0 – 16A <default> --> Set
IADP : Buffered Adapter Current Output VADP=20 OR 40* (VACP-VACN)

IDCHG : Buffered Discharge Current Output VDCHG=8 OR 16* (VSRN-VSRP)
ILIM : VILIM=20*(VSRP-VSRN) for charge current limit 5*(VSRN-VSRP) for discharge current limit.
A A

PROJECT : AM9A
Charger (BQ24780SRUYR) A

5 4 3 2 1
5 4 3 2 1
Place close to VCCSA Inductor
PR63 PR104 PR106

100K/B4250/1%_4 12K/F_4 7.5K/F_6
2 1 1 2 1 2 SW_1PH 44
PC145
8200P/25V_4
1 2
PC144
0.01U/50V_4 +VCC_1.00
1 2
D D
5/13 44 CSN_1PH +3.3V_RUN
PC45
2
PR36 1000P/50V_4
1
2.26K/F_4 2 1
1
1 2 PC141 PR103 PR29 PR99 PR93 PR90 PR85
PR31 470P/50V_4 48.7K/F_4 10K/F_4 45.3/F_4 *75/F_4_NC 100_4 *75/F_4_NC PC43
1
PC152 20K/F_4 0.1U/25V_4
2
1000P/50V_4 2 1
2
6 VCCSA_SENSE 1 2
PR32 PC50
1
PC157 1.5K/F_4 6800P/50V_4 49.9/F_4 2 1 PR98
IMVP_PWRGD 10,26 VR_SVID_CLK 4
1000P/50V_4 PR35 2 1 2 1
1K/F_4 0_4 2 1 PR92
PWM1_1PH/ICCMAX1 44 VR_SVID_ALERT# 4
2
6 VSSSA_SENSE 1 2
PR100 1 2 34.8K/F_4 10/F_4 2 1 PR89
2 1 VR_SVID_DATA 4
PC44 1 2 *0.1U/10V_4_NC 75/F_4 2 1 PR84 H_PROCHOT# 4,26,40
1 2 15P/50V_4
PC46 0_4 2 1 PR28 IMVP_VR_ON 26
2200P/50V_4
PC153
5 VCCCORE_SENSE
1
PC151
1000P/50V_4 PR113
81205_ALERT#
910/F_4 VCCGT_SENSE 7
81205_SCLK
1 2
81205_SDIO
COMP_1PH
5 VSSCORE_SENSE
IMON_1PH
1
81205_EN
VSN_1PH
CSP_1PH
VSP_1PH
ILIM_1PH
PR80 PC132
910/F_4 1000P/50V_4
2
1 2 1 2 VSSGT_SENSE 7
3300P/50V_4
53
51
52
50
49
48
47
46
45
44
43
42
41
40
C PC146 PR40 PC56 PC156 1 2 C
47P/50V_4 49.9/F_4 680P/50V_4
PWM_1PH/ICCMAX1
ALERT#
PAD
VSN_1PH
VSP_1PH
COMP_1PH
ILIM_1PH
CSN_1PH
CSP_1PH
IMON_1PH
EN
SDIO
VR_RDY
SCLK
1 2 1 2 1 2 PR41 3300P/50V_4 PR71 PC116 PC138
29.4K/F_4 PC131 49.9/F_4 470P/50V_4 47P/50V_4
2 1 1 2 1 2 1 2
PR112 PC154 PR34 PR76
4.02K/F_4 3300P/50V_4 649/F_4 PC155 1 39 VR_HOT# 28.7K/F_4 PR75 PR79 PC134
1 2 1 2 1 2 470P/50V_4 VSN_3PH_A 2 VSP_3PH_A VR_HOT# 38 1 2 1K/F_4 4.02K/F_4 3300P/50V_4
2 1 IMON_3PH_A 3 VSN_3PH_A VSP_3PH_B 37 VSN_3PH_B 1 2 1 2 1 2
DIFFOUT_3PH_A 4 IMON_3PH_A VSN_3PH_B 36 IMON_3PH_B PC117 1 2 470P/50V_4
FB_3PH_A 5 DIFFOUT_3PH_A IMON_3PH_B 35 DIFFOUT_3PH_B
COMP_3PH_A 6 FB_3PH_A PU8 DIFFOUT_3PH_B 34 FB_3PH_B
15.4K/F_4 2 1 PR33 ILIM_3PH_A 7 COMP_3PH_A NCP81205MNTXG FB_3PH_B 33 COMP_3PH_B
CSCOMP_3PH_A 8 ILIM_3PH_A COMP_3PH_B 32 ILIM_3PH_B 17.4K/F_4 2 1 PR83
CSSUM_3PH_A 9 CSCOMP_3PH_A ILIM_3PH_B 31 CSCOMP_3PH_B
CSSUM_3PH_A CSCOMP_3PH_B
1
10 30 CSSUM_3PH_B
CSREF_3PH_A CSSUM_3PH_B Place close to
1
PR109 0.1U/25V_4 2 1 PC150 29
PR65 75K/F_4 CSREF_3PH_B PC137 1 2 0.1U/25V_4 PR74
GT Inductor
Place close to
PWM1_3PH_A/ICCMAX3A
PWM1_3PH_B/ICCMAX3B
220K/B4500/5%_4 CSP1_3PH_A 11 75K/F_4 PR67
VCORE Inductor CSP1_3PH_A
1
CSP2_3PH_A 12 28 CSP1_3PH_B
PWM3_3PH_A/VBOOT
220K/B4500/5%_4
PWM2_3PH_B/DOSC1
CSP2_3PH_A CSP1_3PH_B
PWM2_3PH_A/ADDR
2
1
PSYS/TSENSE_1PH
PC55 PC54 13 27
PWMx_3PH/DOSC3
2
390P/50V_4 680P/50V_4 PC133 PC130
TSENSE_3PH_A
TSENSE_3PH_B
2
2
1
390P/50V_4 680P/50V_4 PR77
2
5/18
1
CSPx_3PH_B
PR111 97.6K/F_6
165K/F_4 +5V_RUN PR73 2 1
SW1_3PH_B 41,43
140K/F_6 2 1 PR44 165K/F_4
41,42 SW1_3PH_A Remove PR110
DRON
VRMP
PR72
VCC
2
+PWR_SRC
1
140K/F_6 2 1 PR43 97.6K/F_6
41,42 SW2_3PH_A
2
2 1
2 1 PR42 SW2_3PH_B 41,43
140K/F_6 PR88
41,42 SW3_3PH_A
14
15
16
17
18
19
20
21
22
23
24
25
26
1
1K/F_4
2
PR105 PC143 CSP3_3PH_B
41,42 CSREF_3PH_A 1K/F_4 0.1U/25V_4
2 1 TSENSE_3PH_A TSENSE_3PH_B PC139 1 2 0.1U/25V_4
2
SYS_PMON 40
+5V_RUN 1 2
B B
42,43,44 DRVON PR91 1 2 15.4K/F_4
1
2.2_6
PR30 CSREF_3PH_B 41,43
1
PC142 PR95 1 2 43.2K/F_4

2.21K/F_4 2 1 PR39 0.01U/50V_4 PC140
41,42 SW1_3PH_A
2
1U/25V_6
2
1
0.1U/25V_4 2 1 PC149
41,42 CSREF_3PH_A PWM1_3PH_B/ICCMAX3B 43
2.21K/F_4 2 1 PR82
SW1_3PH_B 41,43
PR101 PR97 PR94
53.6K/F_4 130K/F_4 97.6K/F_4 0.1U/25V_4 2 1 PC136
PWM2_3PH_B/DOSC1 43 CSREF_3PH_B 41,43
42 PWM1_3PH_A/ICCMAX3A
2
2
2.21K/F_4 2 1 PR38
41,42 SW2_3PH_A
0.22U/25V_4 2 1 PC148 42 PWM2_3PH_A/ADDR
41,42 CSREF_3PH_A 2 1 PR81
2.21K/F_4
SW2_3PH_B 41,43
4.22K/F_4 2 1 PR239
0.1U/25V_4 2 1 PC135
CSREF_3PH_B 41,43
1
PR102 PR96
2.21K/F_4 2 1 PR37 3.92K/F_4 24.9K/F_4
41,42 SW3_3PH_A
2
0.22U/25V_4 2 1 PC147
41,42 CSREF_3PH_A
1.6K/F_4 2 1 PR238
PR108 PR86
61.9K/F_4 61.9K/F_4
1 2 1 2 42 PWM3_3PH_A/VBOOT
PR107 PR87
0_4 0_4
TSENSE_3PH_A 1 2 1 2 TSENSE_3PH_B 1 2 1 2
A PR64 PR66 A
220K/B4500/5%_4 220K/B4500/5%_4
Place close to Place close to

VCORE Mosfet GT Mosfet

PROJECT : AM9A
IMVP8 VR (NCP81205) A

5 4 3 2 1
5 4 3 2 1
PR14
+VCCIN_PWR_SRC 0.01_PJ
5/13 5/13
2 1
+PWR_SRC
1
TP45
EC3 EC6 + PC24 PC14 PC22
2200P/50V_4 0.1U/25V_4 15U/25V/E100_3528 10U/25V_8 10U/25V_8
D
2
D
4
HGCPU1
5/18 PQ8
8
PU3 AOE6930
DRVH
PR9 PC10 1
1_6 0.22U/25V_6 PL6
2 1 1 2 1 2 2 0.24UH (ETQP4LR24AFM)
41 PWM1_3PH_A/ICCMAX3A PWM BST 5 1 2
1 2 3 7 SWCPU1 6
41,42,43,44 DRVON EN SW 7 3 4
0_4
1
NCP81151MNTBG PC37
PR3
1
2200P/50V_4
4 8 PC98
+5V_RUN
GND
VCC
PAD
2
5 LGCPU1 0.1U/16V_4
DRVL
2
1
1
PC2
9
6
2.2U/6.3V_4
2
10
PR20 PR24
TP54 2.2_8 10/F_4
+VCCCORE
2
CSREF_3PH_A 41,42
PL2_MAX : 56A +VCCIN
SW1_3PH_A 41 ICC_MAX : 68A
5/19 Change SW conection from PQ8.2 to Inductor
+VCCIN_PWR_SRC
5/13
5/13
1
1
TP46 PC51 PC105 PC47 PC53 PC49 PC48 PC120
1
PC27 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6
2
C EC4 EC9 + PC26 PC16 10U/25V_8 C
2
2200P/50V_4 0.1U/25V_4 15U/25V/E100_3528 10U/25V_8
2
HGCPU2
4
5/18 PQ7
8
PU2 AOE6930
DRVH
PR8 PC11 1
1_6 0.22U/25V_6 PL5
2 1 1 2 1 2 2 0.24UH (ETQP4LR24AFM)
41 PWM2_3PH_A/ADDR PWM BST 5 1 2
1 2 3 7 SWCPU2 6
41,42,43,44 DRVON EN SW 7 3 4
1
0_4 NCP81151MNTBG PC36
PR2
1
2200P/50V_4
1
4 8 PC91
+5V_RUN
GND
VCC
PAD
2
5 LGCPU2 0.1U/16V_4 PC110 PC125 PC114 PC129 PC104 PC119 PC52
DRVL
2
1
22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6
2
1
1
PC3
9
6
2.2U/6.3V_4
2
10
PR19 PR23
TP53 2 2.2_8 10/F_4
2
CSREF_3PH_A 41,42
SW2_3PH_A 41
5/19 Change SW conection from PQ7.2 to Inductor 5/13
+VCCIN_PWR_SRC
5/13
5/13
1
+ + +
B B
1
1
TP47 PC58 PC33 PC99
EC1 EC5 + PC19 PC13 PC28 330U/2V/E6_7343 *330U/2V/E9_7343_NC *330U/2V/E9_7343_NC
2
2200P/50V_4 0.1U/25V_4 15U/25V/E100_3528 10U/25V_8 10U/25V_8
2
2
4
HGCPU3
5/18 PQ5
8
PU4 AOE6930
DRVH
PR10 PC12 1
1_6 0.22U/25V_6 PL2
2 1 1 2 1 2 2 0.24UH (ETQP4LR24AFM)
41 PWM3_3PH_A/VBOOT PWM BST 5 1 2
1 2 3 7 SWCPU3 6
41,42,43,44 DRVON EN SW 7 3 4
0_4
1
NCP81151MNTBG PC30
1
PR4 2200P/50V_4
4 8 PC115
+5V_RUN
GND
VCC
PAD
5 LGCPU3 0.1U/16V_4
DRVL
2
1
PC5
9
6
2.2U/6.3V_4
2
10
PR16 PR21
TP50 2.2_8 10/F_4
2
CSREF_3PH_A 41,42
SW3_3PH_A 41
A A

PROJECT : AM9A
VCCIA 3-Phase Power Stage A

5 4 3 2 1
5 4 3 2 1
D D
PR12
+VCCGT_PWR_SRC
5/13 0.01_PJ
5/13 2 1
+PWR_SRC
1
TP48
EC8 EC41 + PC25 PC17 PC21
2200P/50V_4 0.1U/25V_4 15U/25V/E100_3528 10U/25V_8 10U/25V_8
2
4
HGGPU1
5/18 PQ6
+VCCGT
8
PU6 AOE6930
PL2_MAX : 39A
DRVH
PR13 PC18 1
1_6 0.22U/25V_6 PL3 ICC_MAX : 54A
2 1 1 2 1 2 2 0.24UH (ETQP4LR24AFM)
41 PWM1_3PH_B/ICCMAX3B PWM BST 5 1 2
+VCCGT
C 1 2 3 7 SWGPU1 6 C
41,42,43,44 DRVON EN SW
0_4
7 3 4 5/13
1
NCP81151MNTBG PC34
PR15
1
2200P/50V_4
1
4 8 PC96
+5V_RUN
GND
VCC
PAD
2
5 LGGPU1 0.1U/16V_4 PC122 PC107 PC109 PC124
DRVL
2
1
22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6
2
1
1
PC29
9
6
2.2U/6.3V_4
2
10
PR18 PR22
TP51 2.2_8 10/F_4
2
CSREF_3PH_B 41,43
SW1_3PH_B 41
Remove
5/19 Change SW conection from PQ6.2 to Inductor PC112,PC127,PC106,PC121
5/13 +VCCGT_PWR_SRC
5/13
1
1
1
TP44 PC123 PC126 PC111 PC108
EC2 EC7 + PC23 PC15 PC20 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6
2
2200P/50V_4 0.1U/25V_4 15U/25V/E100_3528 10U/25V_8 10U/25V_8
2
2
4
HGGPU2
5/18 PQ9
8
PU1 AOE6930
DRVH
PR6 PC9 1
1_6 0.22U/25V_6 PL4 5/13
2 1 1 2 1 2 2 0.24UH (ETQP4LR24AFM)
B 41 PWM2_3PH_B/DOSC1 PWM BST B
5 1 2
1 2 3 7 SWGPU2 6
41,42,43,44 DRVON EN SW 7 3 4
0_4
1
NCP81151MNTBG PC35
PR1
1
2200P/50V_4
4 8 PC97 + + +
+5V_RUN
GND
VCC
PAD
5 LGGPU2 0.1U/16V_4 PC57 PC32 PC31

DRVL
2
1
330U/2V/E6_7343 *330U/2V/E9_7343_NC *330U/2V/E9_7343_NC
2
1
1
PC4
9
6
2.2U/6.3V_4
2
10
PR17 PR25
TP52 2.2_8 10/F_4
2
CSREF_3PH_B 41,43
SW2_3PH_B 41
A A

PROJECT : AM9A
VCCGT 2-Phase Power Stage A

5 4 3 2 1
5 4 3 2 1
D D
PR7
0.01_PJ
1 2
+PWR_SRC
1
EC40 EC39 PC1 PC7
2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8
2
TP49
HGVCCSA
+VCCSA
5
6
7
8
PU5
PL2_MAX : 10A +VCCSA
DRVH
PR11 PC8 4 PQ4
C
0_6 0.22U/25V_6 RQ3E100BNFU7TB ICC_MAX : 11A C
2 1 1 2 1 2 PL1
41 PWM1_1PH/ICCMAX1 PWM BST 0.47UH (PCMC063T-R47MN)
1
2
3
1 2 3 7 SWVCCSA 1 2
41,42,43 DRVON EN SW
0_4 NCP81253MNTBG 3 4
PR5
5
6
7
8
4
+5V_RUN
GND
VCC
PAD
1
5 LGVCCSA 4 PQ3
DRVL
1
RQ3E150BNFU7TB PC38 PC94 PC41 PC40 PC39 PC93 PC92

PC6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 0.1U/16V_4
9
6
2
2.2U/6.3V_4
2
1
2
3
TP43
CSN_1PH 41
SW_1PH 41
B B
A A

PROJECT : AM9A
VCCSA 1-Phase Power Stage A

5 4 3 2 1
5 4 3 2 1
D D
+3.3V_RTC_LDO
PC225
1U/6.3V_4
2 1
PR209 PR207
30.9K/F_4 13K/F_4
TPS51225_FB1 1 2 TPS51225_VFB1 TPS51225_VFB2 1 2 TPS51225_FB2
1
2
PR59 PR206 PR233
0.01_PJ PR210 5/13 20K/F_4 0.01_PJ
20K/F_4
2
1 2 PR208 PR204 2 1
+PWR_SRC +PWR_SRC
1
36.5K/F_4 86.6K/F_4
1 2 1 2 3.3V_DH
5V_DH TP42
TP100 3.3V_DL
1
1 5V_DL TP99
1
PC244 PC243 EC35 EC34 TP103 EC89 EC88 PC240
10U/25V_8 10U/25V_8 0.1U/25V_6 2200P/50V_4 2200P/50V_4 0.1U/25V_6 10U/25V_8
2
2
1
5
CS1
VFB1
VREG3
VFB2
CS2
C 21 C
GPAD
22
GPAD
PR205
+3.3V_ALW
+5V_ALW 1
0_4
2 20 6 3.3 Volt +/- 5%
26,32 ALW_ON EN1 EN2 +3.3V_EN2 33
5 Volt +/- 5% PQ38 PC235 VCLK 19 7 PC234 PQ39 Fsw : 355K
Fsw : 300K PR227 VCLK PDDG PR226
TDC : 5.4A
8
7
6
5
5
6
7
8
RQ3E100BNFU7TB 0.1U/25V_6 2.2_6 PU16 2.2_6 0.1U/25V_6 RQ3E080BNFU7TB
5V_BST 3.3V_BST
PR212
TDC 7.5A 4
2 1 1 2 17
VBST1 TPS51225CRUKR VBST2
9 1 2 2 1
4 OCP : 8.5A PR198
0.01_PJ OCP : 11.7A 5V_DH 16
DRVH1 DRVH2
10 3.3V_DH 0.01_PJ
PL17 PL16
2.2UH (MMD-06CZ-2R2M-V1W) 18 8 3.3UH (MMD-06CZ-3R3M-V1W)
SW1 SW2
3
2
1
1
2
3
2 1 2 1 5V_SW 3.3V_SW 1 2 1 2
+5V_ALW +3.3V_ALW
1
1
25 PC249
GPAD
8
7
6
5
5
6
7
8
PC83 23 *2200P/50V_4_NC
VREG5
GPAD
DRVL1
DRVL2
1
*2200P/50V_4_NC 26
GPAD
1 2
2
VO1
5V_DL 3.3V_DL
1
4 24 4
*SJ0201_NC
SJ13
+ PC222
VIN
1
GPAD
1
1
220U/6.3V/E25_7343 PC237 PC221 + PC223
1
1
*SJ0201_NC
SJ12
*SJ0201_NC
SJ11
PQ42 PQ35 0.1U/16V_4
2
0.1U/16V_4 150U/6.3V/E25_3528
1
15
14
13
12
11
PC233 PR60 RQ3E150BNFU7TB RQ3E100BNFU7TB
3
2
1
1
2
3
2
10U/6.3V_6 *2.2_8_NC PR225
2
2
2
*2.2_8_NC
TPS51225_FB2
2
2
TPS51225_VO1
TPS51225_FB1
TPS51225_VO1
+PWR_SRC
+5V_ALW2
1
close to
PC248 PC247 output Cap
close to 1U/6.3V_4 0.1U/25V_6
2
output Cap
B B
PC86
0.1U/25V_6 BAT54SW-7-F
2 1 2 PC89
0.1U/25V_6
PD5 3 2 1
2 1 1
PC90
0.1U/25V_6
Follow ZM6 VCLK
BAT54SW-7-F
2 PC252
0.1U/25V_6
PD6 3 2 1
1
+15V_ALW
2
PR62
*100K_4_NC PC87
0.1U/25V_6
2
1
A A

PROJECT : AM9A
3.3V/5V (TPS51225) A

5 4 3 2 1
5 4 3 2 1
D D
33 DDR_PW RGD
PR168
*0_4_NC
1 2
26,48,49 SUS_ON
PR170 PR171
2
0_4 0.01_PJ
1 2 1P35V_S5
10,26 SIO_SLP_S5#
PR163 PR165
PR166 200K/F_4 46.4K/F_4 1 2 +PW R_SRC
*0_4_NC
1P35V_TRIP 1
1 2
4 DDR_VTT_CTRL 1P35V_DH
1P35V_MODE
TP91
1
PR167
0_4 1P35V_DL EC84 EC82 PC204 PC202
TP90
1 2 1P35V_S3 2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8
10,26 SIO_SLP_S3#
2
PC199 +V_VDDQ
0.047U/25V_4 1.35 Volt +/- 5%
17
16
20
19
18
24 PQ24 Fsw : 400KHz
S3
S5
PGOOD
MODE
TRIP
PwPd
5
6
7
8
23 PwPd
25 RQ3E100BNFU7TB
TDC : 6.3A
C
+DDR_VTT 22
PwPd
PwPd
26 4 OCP : 10A C
PR169 PC200
PwPd
0.675 Volt +/- 5% 4 15 1P35V_VBST 1
2.2_6
2
0.1U/25V_6
1 2 JP2
TDC : 1.2A VTTGND VBST
1
2
3
0.001/F_3720
1 14 1P35V_DH PL14
VTTSNS DRVH 1UH (MMD-06CZ-1R0M-V1W )
3 TPS51216RUKR 13 1P35V_SW 1 2 1 2
+DDR_VTT VTT SW +V_VDDQ
PU13
5 11 1P35V_DL
+DDR_VTTREF VTTREF DRVL
1
1P35V_VLDOIN 2 12 PC77
VLDOIN V5IN +5V_ALW
5/18
5
6
7
8
1000P/50V_4
1 2
1
1
+ PC214
1
4
VDDQSNS
PC195 PC196 PC194 PC216
10U/6.3V_6 0.22U/10V_4 10U/6.3V_6 PC201 0.1U/16V_4 220U/2.5V/E15_3528 SJ10 SJ9
1
2
2
REFIN
PGND 1U/25V_6 PQ23 PR54

VREF
PwPd
*SJ0201_NC *SJ0603_NC
GND
2
RQ3E130BNFU7TB 2.2_8
2
1
2
3
2
6
10
21
9
1
PR162
10K/F_4 1P35V_VDDQSNS
B B
2
1
PC197
1
0.1U/16V_4
2
PR164
30K/F_4 PC198
0.01U/50V_4
2
2
A A

PROJECT : AM9A
1.35V_DDR/0.675V(TPS51216) A

5 4 3 2 1
5 4 3 2 1
+PWR_SRC
1
PR125
D 0.01_PJ D
VCCIO_PGOOD 33
2
PR117
5.1_6
1 2 +3.3V_SUS
1
PC163
1
10 VCCIO_3V3
1U/6.3V_4
VCCIO_VIN
2
PC166 PC165 EC47 EC46
10U/25V_8 10U/25V_8 0.1U/25V_6 2200P/50V_4 +VCCIO
2
2
VCCIO_AGND
+VCCIO
13
1
0.95 Volt +/-5%
2
PR124 PR115 PC162
VIN
PG
3V3
20K_4 3.3_6 0.22U/25V_6
+3.3V_SUS 1 2 VCCIO_C1 3
C1 BST
9VCCIO_BST 1 2 1 2 Fsw : 750KHz PR114
Iccmax : 5.5A 0.001_PJ
OCP: 7.0A
1
PR123 PL8
C
20K_4 0.68UH (MMD-06CZ-R68M-V1Q) C
1 2 VCCIO_C0 4 PU9 8VCCIO_SW 1 2
C0 NB681GD-Z SW
1
PR116 PC59
1
0_4 *2200P/50V_4_NC
2
1 2 VCCIO_LP# 6 12 VCCIO_VOUT SJ2 PC158 PC159 PC160 PC161
10 SLP_S0#
1
LP VOUT
MODE
PGND
AGND
*SJ0201_NC 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 0.1U/16V_4
2
1
PR118
2
EN
*20K_4_NC
2
1 2 PR45
+3.3V_SUS
11
*2.2_8_NC
PR121
2
0_4
1 2 VCCIO_EN
26,29,30,38,49 RUN_ON
SJ3 PR119
1 *SJ0603_NC 6.8/F_4
PC164 1 2 2 1
1 2
0.1U/16V_4
2
B VCCIO_AGND PR122 B
0_4
2 1
VCCIO_SENSE 6
2 1
VSSIO_SENSE 6
0_4
PR120
A A

PROJECT : AM9A
VCCIO (NB681GD-Z) A

5 4 3 2 1
5 4 3 2 1
+PWR_SRC
D D
1
PR176
2 0.01_PJ 1V_PWRGD 33
PR173
5.1_6
1 2
+3.3V_ALW
1
PC205
1
1
1U/6.3V_4
10 1P0V_3V3
1P0V_VIN
2
PC211 PC212 EC85 EC86
10U/25V_8 10U/25V_8 0.1U/25V_6 2200P/50V_4 +VCC_1.00
2
2
+ VCC_1.00
13
1
1.0 Volt +/-5%
2
PR182 PR175 PC203
VIN
PG
3V3
C C
20K_4 3.3_6 0.22U/25V_6
+3.3V_ALW 1 2 1P0V_C1 3
C1 BST
91P0V_BST 1 2 1 2 Fsw : 750KHz PR177
Iccmax : 5.7A 0.001_PJ
OCP: 7.0A
1
PR181 PL13
20K_4 0.68UH (MMD-06CZ-R68M-V1Q)
1 2 1P0V_C0 4 PU14 81P0V_SW 1 2
C0 NB681GD-Z SW
1
PR179 PC215
1
20K_4 *2200P/50V_4_NC
2
1 2 1P0V_LP# 6 12 1P0V_VOUT SJ8 PC208 PC209 PC207 PC213
+3.3V_ALW
1
LP VOUT
MODE
AGND
PGND
*SJ0201_NC 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 0.1U/16V_4
2
1
2
EN
2
5 PR183
11
2
*2.2_8_NC
PR180
2
0_4
1 2 1P0V_EN
26,46,49 SUS_ON
1
B PR178 B
100K/F_4
2
A A

PROJECT : AM9A
VCC_1.00 VCCIO (NB681GD-Z) A

5 4 3 2 1
1 2 3 4 5
+3.3V_SUS
+5V_ALW2 +15V_ALW
Peak Current : 1.1A
+3.3V_ALW PQ27 +3.3V_SUS
RQ3E080BNFU7TB
1
8 3
1
7 2
PR197 6 1
PR213 100K_4 5
A A
1
100K_4 PR184
2
10K_4 PC219
4
1 2 0.1U/16V_4
2
6
SUS_ON# 2 PQ34B
1
2N7002KDW
3
PC217
1
5 PQ34A 0.047U/25V_4
26,46,48 SUS_ON
2
2N7002KDW
4
+5V_RUN
Peak Current : 6.5A
+5V_ALW2 +15V_ALW
+5V_ALW PQ1 +5V_RUN
RQ3E080BNFU7TB
1
8 3
1 7 2
B PR58 6 1 B
PR57 100K_4 5
1
100K_4 PR56
2
10K_4 PC78
2
4
1 2 0.1U/16V_4
2
6
1
RUN_ON# 2 PQ2B PC80
29 RUN_ON#
2N7002KDW 0.047U/25V_4
2
3
1
5 PQ2A
26,29,30,38,47,49 RUN_ON
2N7002KDW
4
+3.3V_RUN
Peak Current : 4.7A
+3.3V_ALW PQ26 +3.3V_RUN
RQ3E080BNFU7TB
8 3
7 2
6 1
5
1
PR55
10K_4 PC220
4
1 2 0.1U/16V_4
2
C C
1
PC218
0.047U/25V_4
+VCC_1.00_PP
+5V_ALW2 +15V_ALW
Peak Current : 265mA
+VCC_1.00 PQ25 +VCC_1.00_PP
*RQ3E080BNFU7TB_NC
1
8 3
1
7 2
PR174 6 1
PR172 *100K_4_NC 5
1
*100K_4_NC PR53
2
*10K_4_NC PC210
2
1 2 *1U/16V_4_NC
2
6
D 2 PQ22B D
1
*2N7002KDW_NC
3
PC206
1
5 PQ22A *0.047U/25V_4_NC
26,29,30,38,47,49 RUN_ON
2
*2N7002KDW_NC
4

PROJECT : AM9A
SUS_RUN Power Switch A

1 2 3 4 5
5 4 3 2 1
+PW R_SRC
1
PR161
0.01_PJ
2
DGPU_PW R_SRC
PU11
RT8813CGQW
1
1
1
PR146 + PC76 PC73 PC70
D D
1_6 EC48 EC52 15U/25V/E100_3528 10U/25V_8 10U/25V_8
+VGACORE
2
+5V_RUN 1 2 21 2 2200P/50V_4 0.1U/25V_6
PVCC UGATE1
EDP : 51.1A
2
1
PC185 EDP-Peak : 87A +VGACORE
2
2.2U/6.3V_6
OCP : 100A
G1
D1
D1
D1
G1
D1
D1
D1
PQ14
FDMS3660S
PQ19
FDMS3660S
Fsw : 300KHz
PR52 PR143 PR130 PC175 PL11
S1/D2
S1/D2
2.2_6 499K/F_4 2.2_6 0.1U/25V_6 0.24UH (ETQP4LR24AFM)
+PW R_SRC 1 2 1 2 9 1 1 2 1 2 9 9 1 2
TON BOOT1
PC184
G2
G2
S2
S2
S2
S2
S2
S2
1
1U/25V_6
1
2 1 PC66
1
1000P/50V_4 +
1
1 2
SJ7 PC61 PC63
24 *SJ0201_NC 470U/2V/E6_7343
2
0.1U/16V_4
PHASE1
2
PR156
2
100K_4 PR48
1 2 RT8813_PG 16 2.2_8
+3.3V_RUN PGOOD
2
PR131
0_4 23
1 2 3 LGATE1 PR136 7.15K/F_4
19,52 3V3_MAIN_PW RGD EN 1 2
PR132
0_4 PR157 10K/F_4
1 2 4 15 1 2
20 DGPU_PSI PSI VCC/ISEN1
PR133
0_4
1 2 5
20 DGPU_PW M_VID VID DGPU_PW R_SRC
17
UGATE2
1
8
VREF
1
+ PC75 PC72 PC69
1
C EC50 EC53 15U/25V/E100_3528 10U/25V_8 10U/25V_8 C
2
1
2
PR51 PC182 2200P/50V_4 0.1U/25V_6
2
G1
D1
D1
D1
G1
D1
D1
D1
PC177 20K/F_4 0.1U/25V_4
2
2700P/50V_4 PQ15 PQ20

FDMS3660S FDMS3660S
2
2 1 2 1 6 PR160 PC193
REFADJ
S1/D2
S1/D2
2.2_6 0.1U/25V_6
1
20K/F_4 18 1 2 1 2 9 9
PR135 BOOT2
PR137
G2
G2
S2
S2
S2
S2
S2
S2
PR140 2K/F_4 PL10
18K/F_4 0.24UH (ETQP4LR24AFM)
2
5
2 1 7 1 2
REFIN
1
1
19
PC178 PHASE2 PC67
1
*100P/50V_4_NC 1000P/50V_4
2
1 2
1
+ +
1
SJ6 PC62 PC171 PC64
*SJ0201_NC 470U/2V/E6_7343 470U/2V/E6_7343
2
0.1U/16V_4
2
20 PR50
LGATE2
2
PR47 PC188 2.2_8
10/F_4 10P/50V_4
2
+VGACORE
2 1 PR151 2 1 PR158
0_4 10K/F_4
2 1 11 14 1 2
17 VGPU_CORE_SENSE VSNS TALERT/ISEN2
1
PC187
*100P/50V_4_NC DGPU_PW R_SRC
2
2 1 10
17 VSS_GPU_SENSE RGND
2 1 0_4 2 1
PR148
PR46 10P/50V_4
10/F_4 PC186
1
PU10
1
PC191 PR145 RT9610BZQW + PC74 PC68 PC71
10P/50V_4 0_4 EC49 EC51 15U/25V/E100_3528 10U/25V_8 10U/25V_8
2
1
2
2 1 12 22 1 2 5 3 2200P/50V_4 0.1U/25V_6
SS GND/PWM3 PWM UGATE
2
B B
G1
D1
D1
D1
G1
D1
D1
D1
PQ16 PQ21
13 FDMS3660S FDMS3660S
TSNS/SEN3 PR142 PC176 PR134 PL9
S1/D2
S1/D2
0_4 0.1U/25V_6 2.2_6 0.24UH (ETQP4LR24AFM)
GND
+5V_RUN
1 2 1 4 1 2 1 2 9 9 1 2
EN BOOT
1
25
G2
G2
S2
S2
S2
S2
S2
S2
2 PC65
PHASE
1
PR149 1000P/50V_4
1 2
0_6
1
2
1
+5V_RUN
1 2 8 7 SJ5
GND
GND
PR159 VCC LGATE *SJ0201_NC PC169
2
1
10K/F_4 PR49 0.1U/16V_4
2
PC189 2.2_8
6
100P/50V_4
1
2
+3V_GFX
Peak Current : 170mA +3V_AON
Peak Current : 170mA
+15V_ALW +15V_ALW
+5V_ALW 2 +3.3V_ALW +3V_GFX +5V_ALW 2 +3.3V_ALW +3V_AON
PQ13 PQ11
AO6402A AO6402A
1
6 6
5 4 5 4
1
PR129 2 PR127 2
100K_4 1 100K_4 1
PR128 PR126
2
2
1
1
A 100K_4 100K_4 A
3
3
PC174 PC167
2
0.1U/16V_4 0.1U/16V_4
2
2
6
6
1
1
+3V_MAIN_EN# 2 PQ12B DGPU_PW R_EN# 2 PQ10B
2N7002KDW PC172 2N7002KDW PC168
3
4700P/25V_4 4700P/25V_4
1
5 PQ12A 5 PQ10A
20 +3V_MAIN_EN 12 DGPU_PW R_EN
2N7002KDW 2N7002KDW
4

PROJECT : AM9A
dGPU CORE (RT8813C) A

5 4 3 2 1
5 4 3 2 1
D D
PR155
0.01_PJ
PR153
360K/F_4
FBVDD_TON 1 2 2 1
+5V_RUN +PWR_SRC
PC181
4.7U/10V_6
1
2 1
EC19 EC58 PC192 PC190 +FBVDD
C 2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8 1.35V +/-5% C
2
5/13 Fsw : 300K
11
5
5
6
7
8
PR154
78.7K/F_4
EDP : 8.75A
VCC
TON
1 2 FBVDD_CS 10 3 FBVDD_DH 4 PQ18
CS UGATE PR139 PC180 RQ3E100BNFU7TB Peak EDP : 11.41A
1_6 0.1U/25V_6 JP1
12,17 DGPU_PWROK
9 4 FBVDD_BST 1 2 1 2 0.001/F_3720 OCP : 13.7A
PGOOD BOOST
1
2
3
PL12
PU12 1UH (MMD-06CZ-1R0M-V1W)
2 1 FBVDD_PG 8 RT8228AZQW 2 FBVDD_LX 1 2 1 2
20 1.35V_GFX_EN EN PHASE +1.35V_GFX
0_4
1
PC183
PR152
1
1 FBVDD_DL PQ17 *2200P/50V_4_NC
LGATE
5
6
7
8
13 RQ3E130BNFU7TB SJ4
1
PAD
1 2
MODE
*SJ0201_NC
GND
2
FB
2
PR138
12
6
5/18
1
*2.2_8_NC +
1
2
3
PC170 PC173
2
5/13 0.1U/16V_4 330U/2.5V/E15_3528
2
1
B PR150 B
1
10K/F_4 PR141
1 2 PC179 33.2K/F_4
+5V_RUN
*1500P/50V_NC
2
1
1
PIN 7 Mode PR147
*10K/F_4_NC FBVDD_DH PR144
TP18
20K/F_4
5.0V DEM FBVDD_DL
TP81
2
2
2.5V ASM
GND FCCM
Vout=0.5*(R1+R2)/R2
A A

PROJECT : AM9A
FBVDD_GPU(RT8228AZ) A

5 4 3 2 1
5 4 3 2 1
D D
+1.05V_GFX
1.05 Volt +/- 5%
TDC : 2.9A
OCP : 3.5A
PR69
0.001_PJ
PR78 PL7
+5V_ALW 0.01_PJ 2.2UH (MMD-05AEH2R2M-T1Q)
4 1 1 2 1 2
20 1.05V_GFX_PWRGD PGOOD LX1 +1.05V_GFX
1
1 2 9 2
PVIN LX2 SJ1
1
10 3 *SJ0201_NC
C PVIN LX3 C
2
PR70 PU7 7
NC
2
10_6 RT8068AZQW PC42 *22P/50V_4_NC
1
1 2 8 6 2 1
SVIN FB PC100 PC101 PC102
11 5 2 1 2 1 0.1U/16V_4 22U/6.3V_6 22U/6.3V_6
GND EN
2
PR26 15K/F_4
0_4
1
1
PC103 PC118 PC95 PR68
10U/6.3V_6 0.1U/16V_4 1U/25V_6 PR27
2
20K/F_4
2
3V3_MAIN_PWRGD 19,50
B B
Vout=0.6*(R1+R2)/R2
A A

PROJECT : AM9A
1.05V_GFX (RT8068AZQW) A

5 4 3 2 1
1 2 3 4 5 6 7 8
AM9A PSequence G3 to S0
+PWR_SRC
+5V_ALW2 and
+3.3V_RTC_LDO G3 mode: > EC reset time + output ALW_ON
S5 mode: > Power button DE-BOUNCE time
H/W:PWRBTN POWER_ SW_IN0#
3.3V_ALW_ON G3 mode: Asserted by HW latch of power button event

& +3.3V_EN2 S0 mode: Be keeped on high by ALW_ON
A +3.3V_ALW A
ALW_ON(EC) G3 mode: > 1650 Tick (50 ms)
+5V_ALW
+15V_ALW
G3 mode: EC don't care this event.

H/W:PWRBTN SYS_PWR_SW# S5 mode: Upon power always exist, and this pin keeped on high. Start from this event.
SUS_ON(EC) ? ms (EC, ALW_ON to SUS_ON, EC)
+3.3V_SUS 10ms(Minium) (VccRTC (+3.3_RTC_LDO) to VccDSW_3P3 (+3.3V_SUS), tPCH04 = min 9ms)
+ VCC_1.00 10ms(Minimum) (+3.3V_SUS to +VCC_1.00 rise up at the same time)
RSMRST#(EC) 37.6 ms [VCCDSW(+3.3V_SUS) to RSMRST#(DSW_PWROK), tPCH02 = min 10ms)]

(For platforms NOT supporting Deep Sx, DSWPWROK can be tied to RSMRST#)
(DSW_PWROK)
SUS_PWR_ACK(PCH) tPLT01 = 200 ms Controlled By PCH
Thd = 500 us
EC_PWRBTN# (EC) (EC) tPCH43 = 95mS(Minimum) The EC_PWRBTN# must assert for at least 16ms after the minimum tPCH43 timing before PCH will detect PWRBTN# as a wake event
B B
SIO_SLP_S5#(PCH) TBDms (RSMRST# to SLP_S5)
SIO_SLP_S4#(PCH) 30us (SLP_S5 to SLP_S4, tPCH27 = 30us,min)
+V_VDDQ
DDR_PWRGD 27ms (+V_VDDQ to DDR_PWRGD, t44=min 100ns)

VDDQ (CPU) (-20% of nominal value) to VR_VDDQPWRGD
SIO_SLP_S3#(PCH) 30 us (SLP_S4 to SLP_S3, tPCH28 = 30us,min)

DDR_VTT_CTRL(CPU)
+DDR_VTT
RUN_ON(EC) 22 ms(SLP_S3# to RUN_ON,EC)

EC: SIO_SLP_S3# to RUN_ON delay 1ms
+5V_RUN
+3.3V_RUN
C
+1.35V_RUN C
+VCCIO
HWPG (VCCST_PWRGD) 5.7 ms(VCCASW to APWROK, t11 mim =1ms)
IMVP_VR_ON(EC) EC: HWPG to IMVP_VR_ON delay 100ms
VCC_CORE turn on after SVID vaild.

+VCCIN (CPU core) Vboot
15.3 ms(APWROK to PWROK, t30 mim =0ms)
15.3 ms(ALL_SYS_PWRGD (HWPG) to PWROK, t14 mim =5ms)
IMVP_PWRGD 20.9 ms(PCH CORE to PWROK, t41 mim =5ms)
PCH CLK valid Last un-core power rail stable to DRAMPWROK assertion.
? ms(PCH CLK stable to H_PWRGOOD, t19 min = 1 ms)

H_PWRGOOD(PCH) 23.6 ms(+VCC_CORE to H_PWRGOOD, min = 5<t13<650 ms)
23.6 ms(PWROK to H_PWRGOOD, t20 min = 2 ms)
+VCCGT
D CPU SVID BUS(CPU) valid

D
SYS_PWROK 124 ms(HPWG to SYS_PWROK, t15 min = 5~99 ms)

EC: HPWG to EC_PWROK(EC) Delay 100 ms
(EC_PWROK)
PLTRST# 2.08 ms (SYS_PWROK to PLTRST#, t21+t22 = min 1.06 ms)

PLTRST# could de-assert prior to final SVID value

PROJECT : AM9A
06 PS_G3 to S0 A0

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+PWR_SRC
AM9A PSequence G3 to S0 Block (Battery mode)
2 +3.3V_RTC_LDO
+3.3V_RTC_LDO VCC
1 1a
+3.3V_ALW 4
3V/5V +PWR_SRC +VCHGR
VR +5V_ALW 7
CHARGER Battery
+15V_ALW 7a
EN2
EN1
PWR SW
A A
+5V_ALW
3
5 3.3V_ALW_ON
(+3.3V_EN2)
POWER_ SW_IN0#
+PWR_SRC VCC +V_VDDQ 16
6 ALW_ON
25
+V_VDDQ
DDR/0.675V +DDR_VTT
+3.3V_ALW
5a
VR SYS_PWR_SW#
DDR_PWRGD 17
PG
23 VCC RSMRST# 10
S4
S3
RSMRST#(DPWROK)
9b 1.00V_PWRGD HWPG
DDR_VTT_CTRL 24 AC_PRESENT 11
ACPRESENT
SIO_SLP_S4# 14 22 VCCIO_PGOOD EC_PWRBTN# 13
EC PWRBTN#
SUS_PWR_ACK 12
SUS_PWR_ACK
B B
14 SLP_S5#
SLP_S5#
15
IMVP_VR_ON
SIO_SLP_S3#
SIO_SLP_S4#
SIO_SLP_S5#
SLP_S4#
EC_PWROK
SLP_S4#
16
SUS_ON
RUN_ON
SLP_S3#
SLP_S3#
28 IMVP_PWRGD PCH
8 18 33 26 16 15 14 PCH_PWROK
29
PLTRST_PROC#
PCH_CLK
PCH_CLK
37
PROCPWRGD
PCI_PLTRST#
PLTRST#
33 EC_PWROK
SYS_PWROK
C C
CPU_PLTRST#
H_PWRGOOD
+PWR_SRC
+5V_ALW
+3V_ALW SUS +3.3V_SUS 27
LS 9 +PWR_SRC VCC +VCCIN
+PWR_SRC VCC +VCC_1.00V 9a
G 30 36
1.00V IMVP 32
VR 1.00V_PWRGD 9b
SUS_ON 8 VR +VCCGT
PG 23 HWPG
EN
RESET#
PWRGOOD
VCCST_PWRGD
+5V_ALW +5V_RUN 19 28
SUS_ON 8 RUN 24 DDR_VTT_CTRL
IMVP_PWRGD DDR_VTT_CTRL
SVID
LS 20
PG
EN
+3.3V_ALW +3.3V_RUN
+3.3V_ALW 31 31 SVID
SVID IMVP_VR_ON 26 CPU
+3.3V_ALW VCC +VCCIO 21 CPU power
G G
D
VCCIO D
22
VR VCCIO_PGOOD
18
EN
RUN_ON
RUN_ON 18 RUN_ON 18 Quanta Computer Inc.

PROJECT : AM9A
PSeq_G3 to S0 Block_vPRO A0

1 2 3 4 5 6 7 8
5 4 3 2 1
SMBus Block
PCIe CLKOUT
PORT 0 DGPU
HSIO Port SKL H AM9A
06
PORT 1 X USB3.0 USB 3.0 CONN
PORT 2 PORT 1 PORT1 MB(PS)
X
+3.3V_ALW +3.3V_ALW PORT 3 X USB3.0 USB 3.0 CONN
PORT 4 GIGA LAN PORT 2 PORT2 DB
PORT 5 NGFF WLAN USB3.0 USB 3.0 CONN
PORT 6 Card reader PORT 3 PORT3 DB
4.7K 4.7K
Slave address: 03H PORT 7 X USB3.0
SMBCLK0 PORT 8 PORT 4 PORT4 X
D
BAT/CHARGE X D
SMB0 PORT 9 M.2 SSD USB3.0

SMBDAT0
PORT 10 PORT 5 PORT5 X
P43 X
PORT 11 X USB3.0
PORT 12 PORT 6 PORT6 X
Slave address: 1001100xb (98h) X
PORT 13 X USB3.0 PCIe*
+3V_RUN +3V_RUN CPU
PORT 14 PORT 7 PORT7 Port 1 X
Thermal Sensor X
PORT 15 X USB3.0 PCIe*
NCT7718W P36 PORT 8 PORT8 Port 2 X
2.2K 2.2K
USB3.0 PCIe*
SMBCLK3 PORT 9 PORT9 Port 3 X
SMB3 USB3.0 PCIe*
SMBDAT3 PORT10 PORT10 Port 4 X
PCIe*
Slave address: 10011110 (0X9Eh) PORT11 Port 5 GIGA LAN
+3V_AON +3V_AON PCIe*
+3V_GFX
GPU PORT12 Port 6 NGFF WLAN
N16P-GX
PCIe*
EC G
2.2K 2.2K
P23 PORT13 Port 7 Card Reader
PCIe*
IT8528E D
NMOS
S GFX_SCL PORT14 Port 8 X
D S GFX_SDA SATA 6Gb/s PCIe*
NMOS PORT15 Port 0
C
(128 Pin LQFP) SATA 6Gb/s
Port 9
PCIe*
C
+3.3V_ALW +3.3V_ALW +3.3V_SUS +3.3V_SUS PORT16 Port 1 Port10

M.2(NGFF)SSD
PCIe*
+3.3V_SUS PORT17 Port11
2.2K 2.2K 2.2K 2.2K PCIe*
PORT18 Port12
G
SMBCLK1 D S SMB_ME1_CLK SATA 6Gb/s PCIe*
NMOS PORT19 Port 0 SATA HDD
SMB1
SMBDAT1 D S SMB_ME1_DAT
Port13
NMOS SATA 6Gb/s PCIe*
PORT20 Port 1 Port14 X
P29
SATA 6Gb/s PCIe*
+3.3V_SUS +3.3V_SUS PORT21 Port 2 Port15 X
SATA 6Gb/s PCIe*
PORT22 Port 3 Port16 X
2.2K 2.2K SATA 6Gb/s PCIe*
SMB_ME0_CLK PORT23 Port 4 Port17 X
SATA 6Gb/s
PCH Controller
SMLink0 SMB_ME0_DAT PORT24 Port 5
PCIe*
Port18 X
PCIe*
INTEL Slave address: 4BH PORT25 Port19 X
(HM87) SMB_ME1_DAT PCIe*
27mm X 25mm
Controller PORT26 Port20 X
B
SMLink1 SMB_ME1_CLK B
Slave address: A0H Slave address: A4H

+3.3V_SUS +3.3V_SUS +3V_RUN +3V_RUN
DDR3L-SODIMM DDR3L-SODIMM
+3V_RUN CH.A(STD) P18 CH.B(STD) P19
2.2K 2.2K 2.2K 2.2K

G
HOST SMB_PCH_CLK D S SMB_RUN_CLK
SMBUS NMOS
SMB_PCH_DAT D S SMB_RUN_DAT
NMOS
P13
USB 2.0
EHCI #1 EHCI #2
Slave address: 2CH PORT 1 USB3.0 CONN/MB(PS) PORT 9 X
Touch PADP34
PORT 2 USB3.0 Conn / DB PORT 10 X
PORT 3 USB3.0 CONN / DB PORT 11 X
PORT 4 Camera PORT 12 X
PORT 5 BT PORT 13 X
PORT 6 Touch Screen PORT 14 X
PORT 7 X
A PORT 8 X A

PROJECT : AM9A
SMBus Block A0

5 4 3 2 1
5 4 3 2 1
Adapter
Charger
D
bq24780 D
PWR_SRC
Battery
+3.3V_EN2 ALW_ON SLP_S5# RUN_ON SUS_ON 1.35V_GFX_EN DGPU_VGACORE_PG 3V3_MAIN_PWRGD IMVP_VR_ON
TI TI AOS AOS Richtec AOS Richtek ONSemi

TPS51225CRUKR TPS51216 AOZ1267QI-03 AOZ1267QI-04 RT8228 AOZ1267QI-06 RT8813 NCP81205
+15V_ALW
+V_VDDQ +DDR_VTT +VCCIO +VCC_1.0V +1.35V_GFX +1.05V_GFX +VGACORE

+3.3V_ALW +5V_ALW
SLP_S5# VCORE VCCGT VCCSA
Load Switch
RUN_ON SUS_ON DGPU_PWR_EN +3V_MAIN_EN RUN_ON AON7506
C C
Load Switch Load Switch Load Switch Load Switch Load Switch
AON7506 AON7506 AO6402A AO6402A AON7506
+VCC_1.00_PP
+3.3V_RUN +3.3V_SUS +3V_AON +3V_GFX +5V_RUN
B B
A A

PROJECT : AM9A
Power Block Diagram C0

5 4 3 2 1
1 2 3 4 5 6 7 8
AM9 GPU Power UP sequence AM9 GPU GC62.0 Entry/Exit sequence

Note.0
02
PEX_LINK Active Detect Train
DGPU_PWR_EN GPU_PEX_RST_HOLD#
A (PCH) 251us, DGPU_PWR_EN to +3V_AON (GPU) A
+3V_AON PEGX_RST#
GC6_FB_EN GPU Detects PCIE link disabled

+3V_MAIN_EN
(GPU) 150us, +3V_MAIN_EN to +3V_GFX
+3V_AON
90% Keep High
+3V_GFX
+3V_MAIN_EN
3V3_MAIN_PWRGD (GPU)
(+3V_GFX) +3V_GFX
1.23ms, 3V3_MAIN_PWRGD to +VGACORE
90% 3V3_MAIN_PWRGD
+VGACORE (+3V_GFX)
1.23ms, 3V3_MAIN_PWRGD to +1.05V_GFX
90%
B +1.05V_GFX +VGACORE B
DGPU_VGACORE_EN
(1.35V_GFX_EN) +1.05V_GFX
(+VGACORE_PWRGD) 1.09ms, DGPU_VC_EN to +1.35V_GFX DGPU_VC_EN
(+VGACORE_PWRGD)
+1.35V_GFX
+1.35V_GFX Keep High Note.1
DGPU_PWROK DGPU_PWROK T1 0.04ms < T1 < 4ms.

Note.2 Note.3
GPU_EVENT# T0 min = 0.001ms.
GC6 Entry GC6 Exit
Note.0 : GPU driver ACPI call SBIOS to disables PCIE link.
Note.1 : When GC6 2.0 mode, +1.35V_GFX enabled by GC6_FB_EN
C Note.2 : GPU driver ACPI call SBIOS then confirm entry complete by C
sensing GC6_FB_EN =1, Enable PCIE Link. Then PCH asserts GPU_EVENT#
Note.3 : SBIOS detects GC6_FB_EN =0, then De-asserts GPU_EVENT#
P.S. The entire entry and exit sequence must complete within 200 ms
AM9 Optimus GPU On/Off sequence T0 = 220 us, PEGX_RST# to DGPU_PWR_EN

2.21 ms, DGPU_PWR_EN to DGPU_PWROK
0ms< T0 < 5ms

PEGX_RST#
(PCH DGPU_HOLD_RST# control) 0.1ms < T1 < 5ms
DGPU_PWR_EN
(PCH) < 200ms
DGPU_PWROK
D D
(All Rail PGOOD)
< 200ms

P.S. The entire entry and exit sequence must PROJECT : AM9A
complete within 200 ms Size Document Number Rev
GPU Sequence A0

1 2 3 4 5 6 7 8

Quanta Am9a Ra0 (Dell 7557)

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Quanta Am9a Ra0 (Dell 7557)

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1 2 3 4 5 6 7 8

HDMI Conn. Re-Driver INT HDMI

DMI X 4 Giga LAN

Flash ROM Port 5 Port 4

Flash ROM SPI I2C Sunrise point - H

www.schematic-x.blogspot.com Quanta Computer Inc.

Date: Monday, May 25, 2015 Sheet 1 of 57

Skylake Processor (DDR3-CH-A)

Follow SKL-H WP(V0.91) Follow SKL-H WP(V0.91) support DDR3L SO-DIMM

Quanta Computer Inc.

Date: Monday, May 25, 2015 Sheet 2 of 57

2/3 Port 方 方 方 方 3 OF 14 2/3 Port 方 方 方 方

Quanta Computer Inc.

Date: Monday, May 25, 2015 Sheet 3 of 57

Skylake Processor (CLK, SVID, CFG)

CPU STRAP PIN Thermtrip PU 1K ohms 2/3 remove R186 1K_4

CFG[7] PEG Training 1 = PEG Train immediately following

Date: Monday, May 25, 2015 Sheet 4 of 57

leverage other BU to optimums capacitor design

10U/6.3V/X6S_4 C122 AD13 VCC VCC P30 BL28 RSVD

Unconnected for Processors without OPC.

Date: Monday, May 25, 2015 Sheet 5 of 57

Place near CPU

VDDQC for SKL - U/Y series, H series left NC.

Quanta Computer Inc.

Date: Monday, May 25, 2015 Sheet 6 of 57

PDG V1.0 #546884 P573-574 decupling

1U/6.3V_4 C146 AP37 VCCGT BE37 VCCGT VCCGT BE36

Quanta Computer Inc.

Date: Monday, May 25, 2015 Sheet 7 of 57

Skylake Processor (GROUND) 08

BGA1440 BGA1440 BGA1440

Date: Monday, May 25, 2015 Sheet 8 of 57

SPI_CS0# for 1st SPI device, SPI_CS1# for

PCI_PLTRST# R165 1 2 *SHORT_4_NC PLTRST# PLTRST# 17,26,28,35,36,37

Quanta Computer Inc.

Date: Monday, May 25, 2015 Sheet 9 of 57

Quanta Computer Inc.

Date: Monday, May 25, 2015 Sheet 10 of 57

PCH STRAPING <546717 Rev0.91>

Pin Name Usage Sampled Configuration Circuitry

SPT-H PCH (USB3/LPC/eSPI) PCI_PIRQA# R152 10K_4

K13 BC17 22_4 CLK_24M_EC 26

Quanta Computer Inc.

Date: Monday, May 25, 2015 Sheet 11 of 57

Skylake PCH (CLOCK)

UART2_CTS# R431 49.9K/F

3/10 reserve for UART2

Pin Name Usage Sampled Configuration Circuitry

XTAL24_IN C685 15P/50V/_4 RTC_X2

Date: Monday, May 25, 2015 Sheet 12 of 57

+VCCPRIM_1P0 VCCPRIM_1P0 = 2.899A

VCCDSW_3P3 tie to VCCPRIM_3p3 if 8 OF 12 ?

Place close pin W15 +V3.3S_VCCATS

Place close pin AD13 Place close pin AN5

+VCCPGPPD +VCCPGPPA +VCCPGPPEF +VCCPGPPG

+VCCHDA +3.3V_SUS Quanta Computer Inc.

Place close pin BC42,BD40 PCH A0

Date: Monday, May 25, 2015 Sheet 13 of 57

Quanta Computer Inc.

Date: Monday, May 25, 2015 Sheet 14 of 57

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

2/3 Port 方方方方 3 OF 14 2/3 Port 方方方方